[all-commits] [llvm/llvm-project] a07483: [TableGen] Inherit properties from the nearest all...

[Pete Chou via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a074831cd978659a6025c528c0ca75b8cf46940f
      https://github.com/llvm/llvm-project/commit/a074831cd978659a6025c528c0ca75b8cf46940f
  Author: Pete Chou <petechou at gmail.com>
  Date:   2025-03-25 (Tue, 25 Mar 2025)

  Changed paths:
    A llvm/test/TableGen/RegisterInfoEmitter-inherit-properties.td
    M llvm/utils/TableGen/Common/CodeGenRegisters.cpp

  Log Message:
  -----------
  [TableGen] Inherit properties from the nearest allocatable superclass. (#127018)

Previously isAlocatable was updated to allow inheritance from any
superclass for a generated register class, but other properties are
still inherited from its nearest superclass. This could cause
a generated regclass inherit undesired properties, e.g., tsflags, from
an unallocatable superclass due to the topological inheritance order.

This change updates to inherit properties from the nearest allocatable
superclass if possible and includes a test to demonstrate a potential
incorrect inheritance of tsflags.



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