[all-commits] [llvm/llvm-project] 8a1338: [RISCV] Xqciint SystemRegs, Final Assembly Insts (...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8a133882bbb2bc89578985973d32d7450bed3611
      https://github.com/llvm/llvm-project/commit/8a133882bbb2bc89578985973d32d7450bed3611
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-03-23 (Sun, 23 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVSystemOperands.td
    A llvm/test/MC/RISCV/xqciint-csrs-invalid.s
    A llvm/test/MC/RISCV/xqciint-csrs-valid.s
    M llvm/test/MC/RISCV/xqciint-invalid.s
    M llvm/test/MC/RISCV/xqciint-valid.s

  Log Message:
  -----------
  [RISCV] Xqciint SystemRegs, Final Assembly Insts (#130867)

This adds the Xqciint system registers from the Xqci-0.7 spec, as well
as two leftover instructions: `qc.c.mret` and `qc.c.mnret`

Co-authored-by: Sudharsan Veeravalli <quic_svs at quicinc.com>



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