[all-commits] [llvm/llvm-project] e71079: Recommit "[RISCV] Add Qualcomm uC Xqcisync (Sync D...

Sudharsan Veeravalli via All-commits all-commits at lists.llvm.org
Fri Mar 21 22:38:09 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e7107973b83b7053f3ba92a40a33a27db0c90529
      https://github.com/llvm/llvm-project/commit/e7107973b83b7053f3ba92a40a33a27db0c90529
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-03-22 (Sat, 22 Mar 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/TargetParser/RISCVISAInfo.cpp
    M llvm/test/CodeGen/RISCV/attributes.ll
    A llvm/test/MC/RISCV/xqcisync-invalid.s
    A llvm/test/MC/RISCV/xqcisync-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  Recommit "[RISCV] Add Qualcomm uC Xqcisync (Sync Delay) extension (#132184)" (#132520)


With a minor fix for the build failures.

Original message:

This extension adds nine instructions, eight for non-memory-mapped devices synchronization and delay instruction.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0

This patch adds assembler only support.

Co-authored-by: Sudharsan Veeravalli quic_svs at quicinc.com



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