[all-commits] [llvm/llvm-project] 42a881: [RISCV] Rename VariantKind to Specifier

[Fangrui Song via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 42a8813757dca4eed0ac462ed371f15b4ff004eb
      https://github.com/llvm/llvm-project/commit/42a8813757dca4eed0ac462ed371f15b4ff004eb
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-03-20 (Thu, 20 Mar 2025)

  Changed paths:
    M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

  Log Message:
  -----------
  [RISCV] Rename VariantKind to Specifier

Follow the X86 and Mips renaming.

> "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
> "Relocation specifier" is clear, aligns with Arm and IBM AIX's documentation, and fits the assembler's role seamlessly.

In addition, rename *MCExpr::getKind, which confusingly shadows the base class getKind.



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