[all-commits] [llvm/llvm-project] 4d4d9d: [TTI] Use TypeSize in isLoadFromStackSlot and isSt...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4d4d9d5d333cd8c3cfa0822157ded5ff735aed29
      https://github.com/llvm/llvm-project/commit/4d4d9d5d333cd8c3cfa0822157ded5ff735aed29
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-03-20 (Thu, 20 Mar 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/StackSlotColoring.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h

  Log Message:
  -----------
  [TTI] Use TypeSize in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#132244)

Motivation is supporting scalable spills and reloads, e.g. in
https://github.com/llvm/llvm-project/pull/120524.

Looking at this API, I'm suspicious that the access size should just be
coming from the memory operand on the load or store, but we don't appear
to be consistently setting that up. That's a larger change so I may or
may not bother pursuing that.



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