[all-commits] [llvm/llvm-project] 03ceb2: [RISCV] Fix incorrect slide offset when using vnsr...

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03ceb26b55b855c64385c52020846eaa86dd278b
      https://github.com/llvm/llvm-project/commit/03ceb26b55b855c64385c52020846eaa86dd278b
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2025-03-20 (Thu, 20 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll

  Log Message:
  -----------
  [RISCV] Fix incorrect slide offset when using vnsrl to de-interleave (#132123)

Given this shuffle:
```
shufflevector <8 x i8> %0, <8 x i8> %1, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 undef, i32 undef, i32 undef, i32 undef>
```
#127272 lowers it with a bunch of vnsrl. If we describe the result in
terms of the shuffle mask, we expect:
```
<0, 4, 8, 12, u, u, u, u>
```
but we actually got:
```
<0, 4, u, u, 8, 12, u, u>
```
for factor larger than 2. This is caused by `CONCAT_VECTORS` on
incorrect (sub) vector types. This patch fixes the said issue by
building an aggregate vector with the correct sub vector types.

Fix #132071



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications