[all-commits] [llvm/llvm-project] eb7706: [RISCV] Add assembler support for Zvqdotq. (#132118)

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: eb77061a428c28e9297c7a35cdbe568811025b2b
      https://github.com/llvm/llvm-project/commit/eb77061a428c28e9297c7a35cdbe568811025b2b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-03-20 (Thu, 20 Mar 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    A llvm/lib/Target/RISCV/RISCVInstrInfoZvqdotq.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    A llvm/test/MC/RISCV/rvv/zvqdotq-invalid.s
    A llvm/test/MC/RISCV/rvv/zvqdotq.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add assembler support for Zvqdotq. (#132118)

Based on the 0.0.1 spec here
https://github.com/riscv/riscv-dot-product/releases/tag/v0.0.1



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