[all-commits] [llvm/llvm-project] 5ac8c5: [RISCV] Correct the register class in the C_SWSP a...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5ac8c52a61dcea1a480e3f9d1d04b3e00a72b4fb
      https://github.com/llvm/llvm-project/commit/5ac8c52a61dcea1a480e3f9d1d04b3e00a72b4fb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-03-19 (Wed, 19 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/test/MC/RISCV/rv64c-aliases-valid.s
    M llvm/test/MC/RISCV/rvc-aliases-valid.s

  Log Message:
  -----------
  [RISCV] Correct the register class in the C_SWSP and C_SDSP InstAliases. (#132086)

These instructions use GPR not GPRNoX0. Only the load forms prohibit X0.



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