[all-commits] [llvm/llvm-project] 11b869: [LV] Don't skip instrs with side-effects in reg pr...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 11b869957232e6f5dfec5c88d636fe808e329d8d
      https://github.com/llvm/llvm-project/commit/11b869957232e6f5dfec5c88d636fe808e329d8d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-03-19 (Wed, 19 Mar 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/LoongArch/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

  Log Message:
  -----------
  [LV] Don't skip instrs with side-effects in reg pressure computation. (#126415)

calculateRegisterUsage adds end points for each user of an instruction
to Ends and ignores instructions not added to it, i.e. instructions with
no users.

This means things like stores aren't included, which in turn means
values that are only used in stores are also not included for
consideration. This means we underestimate the register usage in cases
where the only users are things like stores.

Update the code to don't skip instructions without users (i.e. not in
Ends) if they have side-effects.

PR: https://github.com/llvm/llvm-project/pull/126415



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