[all-commits] [llvm/llvm-project] 74f5a0: Reapply "[AArch64][SVE] Improve fixed-length addre...

[Ricardo Jesus via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 74f5a028cb612e7e9bcf75d8ceb1a0a9d20fdb80
      https://github.com/llvm/llvm-project/commit/74f5a028cb612e7e9bcf75d8ceb1a0a9d20fdb80
  Author: Ricardo Jesus <rjj at nvidia.com>
  Date:   2025-03-19 (Wed, 19 Mar 2025)

  Changed paths:
    M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64Subtarget.h
    A llvm/test/CodeGen/AArch64/sve-fixed-length-offsets.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
    M llvm/test/CodeGen/AArch64/sve-vscale-attr.ll

  Log Message:
  -----------
  Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)

The original patch from #129732 exposed a bug in `getMemVTFromNode`, which was returning incorrect types for fixed length vectors.



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