[all-commits] [llvm/llvm-project] 125553: [RISCV] Add statistics for total LMUL spilled/relo...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 125553a6779ba179a9b4b5212c531da2474258fd
      https://github.com/llvm/llvm-project/commit/125553a6779ba179a9b4b5212c531da2474258fd
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-03-19 (Wed, 19 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

  Log Message:
  -----------
  [RISCV] Add statistics for total LMUL spilled/reloaded (#131747)

The cost of a vector spill/reload may vary highly depending on the size
of the vector register being spilled, i.e. LMUL, so the usual
regalloc.NumSpills/regalloc.NumReloads statistics may not be an accurate
reflection of the total cost.

This adds two new statistics for RISCVInstrInfo that collects the total
number of vector registers spilled/reloaded within groups. It can be
used to get a better idea of regalloc changes in e.g. #131176 #113675



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications