[all-commits] [llvm/llvm-project] 5d53a8: [RISCV] Change RISCVMCExpr::VK_RISCV_None to RISCV...
Diana Picus via All-commits
all-commits at lists.llvm.org
Tue Mar 18 05:22:40 PDT 2025
Branch: refs/heads/users/rovka/dvgpr-3
Home: https://github.com/llvm/llvm-project
Commit: 5d53a88416dbf9e5771ff66ec744f96e59ebabb4
https://github.com/llvm/llvm-project/commit/5d53a88416dbf9e5771ff66ec744f96e59ebabb4
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Change RISCVMCExpr::VK_RISCV_None to RISCVMCExpr::VK_None (#131774)
Fix RISCVMCExpr::VK_RISCV_None which were added in #130779
Commit: 31e98c70370c7498891d4fb075a6b2b81885b0dd
https://github.com/llvm/llvm-project/commit/31e98c70370c7498891d4fb075a6b2b81885b0dd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
R llvm/test/Analysis/CostModel/X86/abs-codesize.ll
R llvm/test/Analysis/CostModel/X86/abs-latency.ll
R llvm/test/Analysis/CostModel/X86/abs-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/abs.ll
Log Message:
-----------
[CostModel][X86] merge abs costs tests using -cost-kind=all (#131619)
Now that we have #130490 - merge the cost test files to avoid bitrot
Lots more set of files to do - but this is give an example
Commit: 9cf46fb2303627fd2c74ed88dcd9f3f8cbfe0c93
https://github.com/llvm/llvm-project/commit/9cf46fb2303627fd2c74ed88dcd9f3f8cbfe0c93
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/Lexer.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/LiteralSupport.cpp
A clang/test/C/C2y/n3353.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Add octal prefixes, deprecate unprefixed octals (#131626)
WG14 N3353 added support for 0o and 0O as octal literal prefixes. It
also deprecates use of octal literals without a prefix, except for the
literal 0.
This feature is being exposed as an extension in older C language modes
as well as in all C++ language modes.
Commit: 332f0603635d06986d6d3c8c9ba4fee04c7cab18
https://github.com/llvm/llvm-project/commit/332f0603635d06986d6d3c8c9ba4fee04c7cab18
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
A llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
A llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/preserve-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Don't set unsound inbounds flag (#130616)
The language reference says about inbounds geps that "if the
getelementptr has any non-zero indices[...] [t]he base pointer has an in
bounds address of the allocated object that it is based on [and]
[d]uring the successive addition of offsets to the address, the
resulting pointer must remain in bounds of the allocated object at each
step."
If (gep inbounds p, (a + 5)) is translated to (gep [inbounds] (gep p,
a), 5) with p pointing to the beginning of an object and a=-4, as the
example in the comments suggests, that's the case for neither of the
resulting geps. Therefore, we need to clear the inbounds flag for both
geps.
We might want to use ValueTracking to check if a is known to be
non-negative to preserve the inbounds flags.
For the AMDGPU tests with scratch instructions, removing the unsound
inbounds flag means that AMDGPUDAGToDAGISel::isFlatScratchBaseLegal sees
no NUW flag at the pointer add, which prevents generation of scratch
instructions with immediate offsets.
For SWDEV-516125.
Commit: aea3ad8bd3a35adc021cf80b97fad073ece8737b
https://github.com/llvm/llvm-project/commit/aea3ad8bd3a35adc021cf80b97fad073ece8737b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode - add handling for VPERMV3 intrinsic opcodes (#131768)
We already handle the X86ISD::VPERMV3 node type, but if we can handle equivalent cases before intrinsic lowering we can simplify the code further - e.g. #109272 before constant BUILD_VECTOR nodes gets lowered to constant pool loads.
Commit: 2586e7fcd8ea8485867a2af11daf8a4f42ece704
https://github.com/llvm/llvm-project/commit/2586e7fcd8ea8485867a2af11daf8a4f42ece704
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
Log Message:
-----------
[LV][NFC] Tidy up partial reduction tests with filter-out-after option (#129047)
A few test files seemed to have been edited after using the
update_test_checks.py script, which can make life hard for
developers when trying to update these tests in future
patches. Also, the tests still had this comment at the top
; NOTE: Assertions have been autogenerated by ...
which could potentially be confusing, since they've not
strictly been auto-generated.
I've attempted to keep the spirit of the original tests by
excluding all CHECK lines after the scalar.ph IR block,
however I've done this by using a new option called
--filter-out-after to the update_test_checks.py script.
Commit: 3d631914677b58a5479b310f480ac76e27d41e7e
https://github.com/llvm/llvm-project/commit/3d631914677b58a5479b310f480ac76e27d41e7e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
Log Message:
-----------
[X86] Ignore NSW when DstSVT is i32 (#131755)
We don't have PACKSS for i64->i32.
Fixes: https://godbolt.org/z/qb8nxnPbK, which was introduced by ddd2f57b
Commit: ed489720107ba97ba66d9d2d2c7a4db8d3df9074
https://github.com/llvm/llvm-project/commit/ed489720107ba97ba66d9d2d2c7a4db8d3df9074
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/Lexer.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/LiteralSupport.cpp
A clang/test/C/C2y/n3353.c
M clang/www/c_status.html
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
R llvm/test/Analysis/CostModel/X86/abs-codesize.ll
R llvm/test/Analysis/CostModel/X86/abs-latency.ll
R llvm/test/Analysis/CostModel/X86/abs-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
A llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
A llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/preserve-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Log Message:
-----------
Merge branch 'main' into users/rovka/dvgpr-3
Compare: https://github.com/llvm/llvm-project/compare/6b7d1740c5c7...ed489720107b
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