[all-commits] [llvm/llvm-project] f406b2: [AArch64][SVE] Fold integer lane extract and store...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f406b28f8ba0fa660e8a7b6cafc6986675abfcbf
      https://github.com/llvm/llvm-project/commit/f406b28f8ba0fa660e8a7b6cafc6986675abfcbf
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-03-18 (Tue, 18 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
    A llvm/test/CodeGen/AArch64/aarch64-sve-ldst-one.ll
    M llvm/test/CodeGen/AArch64/add.ll
    M llvm/test/CodeGen/AArch64/andorxor.ll
    M llvm/test/CodeGen/AArch64/bitcast.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
    M llvm/test/CodeGen/AArch64/ctlz.ll
    M llvm/test/CodeGen/AArch64/ctpop.ll
    M llvm/test/CodeGen/AArch64/cttz.ll
    M llvm/test/CodeGen/AArch64/mul.ll
    M llvm/test/CodeGen/AArch64/neon-rshrn.ll
    M llvm/test/CodeGen/AArch64/neon-truncstore.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/shufflevector.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/store.ll
    M llvm/test/CodeGen/AArch64/sub.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitcast.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-optimize-ptrue.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-stores.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll

  Log Message:
  -----------
  [AArch64][SVE] Fold integer lane extract and store to FPR store (#129756)

This helps avoid pointless fmovs to GPRs, which may be slow, especially
in streaming mode.



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