[all-commits] [llvm/llvm-project] d01776: [ADT] Avoid repeated hash lookups (NFC) (#131418)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Mar 17 20:07:27 PDT 2025
Branch: refs/heads/users/MaskRay/spr/docs-mention-discard-locals-discard-all-change-for-llvm-strip
Home: https://github.com/llvm/llvm-project
Commit: d0177670a0e59e9d9719386f85bb78de0929407c
https://github.com/llvm/llvm-project/commit/d0177670a0e59e9d9719386f85bb78de0929407c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/SCCIterator.h
Log Message:
-----------
[ADT] Avoid repeated hash lookups (NFC) (#131418)
Commit: 508db53d1af5b01f8f8275229f087bb6407f0033
https://github.com/llvm/llvm-project/commit/508db53d1af5b01f8f8275229f087bb6407f0033
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#131493)
Commit: 0689d23ab3089eb9920b8f5caa92e423fe3475f8
https://github.com/llvm/llvm-project/commit/0689d23ab3089eb9920b8f5caa92e423fe3475f8
Author: Michael Park <mcypark at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Modules/pr121245.cpp
A clang/test/Modules/pr129982.cpp
Log Message:
-----------
[C++20][Modules] Prevent premature calls to PassInterestingDeclsToConsumer() within FinishedDeserializing(). (#129982)
`ASTReader::FinishedDeserializing` uses `NumCurrentElementsDeserializing` to keep track of nested `Deserializing` RAII actions. The `FinishedDeserializing` only performs actions if it is the top-level `Deserializing` layer. This works fine in general, but there is a problematic edge case.
If a call to `redecls()` in `FinishedDeserializing` performs deserialization, we re-enter `FinishedDeserializing` while in the middle of the previous `FinishedDeserializing` call.
The known problematic part of this is that this inner `FinishedDeserializing` can go all the way to `PassInterestingDeclsToConsumer`, which operates on `PotentiallyInterestingDecls` data structure which contain decls that should be handled by the previous `FinishedDeserializing` stage.
The other shared data structures are also somewhat concerning at a high-level in that the inner `FinishedDeserializing` would be handling pending actions that are not "within its scope", but this part is not known to be problematic.
We already have a guard within `PassInterestingDeclsToConsumer` because we can end up with recursive deserialization within `PassInterestingDeclsToConsumer`. The implemented solution is to apply this guard to the portion of `FinishedDeserializing` that performs further deserialization as well. This ensures that recursive deserialization does not trigger `PassInterestingDeclsToConsumer` which may operate on entries that are not ready to be passed.
Commit: 3fe914c9faa8367ec72f44e8953de1d1ea63e011
https://github.com/llvm/llvm-project/commit/3fe914c9faa8367ec72f44e8953de1d1ea63e011
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86VZeroUpper.cpp
Log Message:
-----------
[X86] Use Register and MCRegister. NFC
Commit: 1e02442df6cfdcc70123a9087173ca84c518d0a1
https://github.com/llvm/llvm-project/commit/1e02442df6cfdcc70123a9087173ca84c518d0a1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/docs/CIBestPractices.rst
Log Message:
-----------
[Github][Docs] Add best practice for top level read permissions (#131470)
This patch adds a section pointing out how permissions should be done
within Github workflows. I believe all of our workflows are currently
compliant with this, but it helps to have something to point to
documenting the practice and especially the motivation.
Commit: f4043f451d0e8c30c8a9826ce87a6e76f3ace468
https://github.com/llvm/llvm-project/commit/f4043f451d0e8c30c8a9826ce87a6e76f3ace468
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
Log Message:
-----------
Skip more WebKit checker tests on targets where builtin is not supported. (#131501)
Commit: de03e102d1ea4da1c62b9ad735848d8869d08b44
https://github.com/llvm/llvm-project/commit/de03e102d1ea4da1c62b9ad735848d8869d08b44
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/RawBufferLoad.ll
M llvm/test/CodeGen/DirectX/cross.ll
Log Message:
-----------
[DirectX] Change placeholders from `undef` to `poison` used in fully instantiated vector [NFC] (#130970)
Commit: 3fac23505ffdb3b7ff7a61fc8beca2aabc2cb6c8
https://github.com/llvm/llvm-project/commit/3fac23505ffdb3b7ff7a61fc8beca2aabc2cb6c8
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
R llvm/test/CodeGen/AArch64/arm64-vclz.ll
R llvm/test/CodeGen/AArch64/arm64-vpopcnt.ll
A llvm/test/CodeGen/AArch64/ctlz.ll
A llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/cttz.ll
R llvm/test/CodeGen/AArch64/vec_cttz.ll
Log Message:
-----------
[AArch64][GlobalISel] Add cttz, ctlz and ctpop test coverage. NFC
Commit: 90e6ba606f7a0a8c9b7b3881a7a8df2cf4cfeb70
https://github.com/llvm/llvm-project/commit/90e6ba606f7a0a8c9b7b3881a7a8df2cf4cfeb70
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] Remove min/max v2s64 clamp
We can now lower the icmp, allowing us to remove the FIXME.
Commit: 926d980017d82dedb9eb50147a82fdfb01659f16
https://github.com/llvm/llvm-project/commit/926d980017d82dedb9eb50147a82fdfb01659f16
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Log Message:
-----------
[AArch64][GlobalISel] Some minor reordering of types for consistency. NFC
Commit: dc9a183ac6aa2d087ceac56970255b06c4772ca3
https://github.com/llvm/llvm-project/commit/dc9a183ac6aa2d087ceac56970255b06c4772ca3
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Move DebugInfoFinder decl closer to its place of usage (#129154)
Summary:
This makes it clear that DIFinder is only really necessary for llvm.dbg.cu update.
Test Plan:
ninja check-llvm-unit
Commit: 4e9894498e166ef6b207c25e780db0b6f006cc89
https://github.com/llvm/llvm-project/commit/4e9894498e166ef6b207c25e780db0b6f006cc89
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
Log Message:
-----------
[VPlan] Truncate VFxUF if needed in VPWidenPointerInduction::execute.
Create truncate if needed after 56b05a0d6. Note that this preserves the
original behavior pre 56b05a0d6. If truncate would strip any set bits,
then the explicit computation in the narrower type would wrap.
Commit: d928a671b84afb9c2ad64353694537a198f04651
https://github.com/llvm/llvm-project/commit/d928a671b84afb9c2ad64353694537a198f04651
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][Vector] Refactor VectorEmulateNarrowType.cpp (#123529)
This is PR refactors `alignedConversionPrecondition` from
VectorEmulateNarrowType.cpp and adds new helper hooks.
**Update `alignedConversionPrecondition` (1)**
This method doesn't require the vector type for the "container" argument. The
underlying element type is sufficient. The corresponding argument has been
renamed as `containerTy` - this is meant as the multi-byte container element
type (`i8`, `i16`, `i32`, etc). With this change, the updated invocations of
`alignedConversionPrecondition` (in e.g. `RewriteAlignedSubByteIntExt`) make it
clear that the container element type is assumed to be `i8`.
**Update alignedConversionPrecondition (2):**
The final check in `alignedConversionPrecondition` has been replaced with a new
helper method, `isSubByteVecFittable`. This helper hook is now also re-used in
`ConvertVectorTransferRead` (to improve code re-use).
**Other updates**
Extended + unified comments.
**Implements**: https://github.com/llvm/llvm-project/issues/123630
Commit: 215c0d2b651dc757378209a3edaff1a130338dd8
https://github.com/llvm/llvm-project/commit/215c0d2b651dc757378209a3edaff1a130338dd8
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Log Message:
-----------
[AArch64][GlobalISel] Reorder getActionDefinitionsBuilders. NFC
These had grown fairly organically and the order wasn't very clear. I've tried
to move some similar nodes closer to one another.
Commit: 616d1046c3e2d7e5167ba2e6fc0c5fe06cf0a503
https://github.com/llvm/llvm-project/commit/616d1046c3e2d7e5167ba2e6fc0c5fe06cf0a503
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] fix ioctl interception for musl. (#131464)
Commit: 9829d457ae197cf8ef3ed34392b18f481f57d760
https://github.com/llvm/llvm-project/commit/9829d457ae197cf8ef3ed34392b18f481f57d760
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M libcxx/test/libcxx/system_reserved_names.gen.py
Log Message:
-----------
[libc++][test] Adds a test for a reserved name. (#131363)
This was discovered when using this name in #130500.
Commit: 8705e489dc17eb7124aca5070201d2dd234f97c1
https://github.com/llvm/llvm-project/commit/8705e489dc17eb7124aca5070201d2dd234f97c1
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
Log Message:
-----------
[lldb] Remove use of comma operator (NFC) (#131233)
No reason for the comma operator, make this more conventional with two statements.
Commit: e2438ce9400243ce9367d74151e00d4772797ec4
https://github.com/llvm/llvm-project/commit/e2438ce9400243ce9367d74151e00d4772797ec4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
Log Message:
-----------
[BPF] Avoid repeated map lookups (NFC) (#131494)
Commit: 48ecec20a2048689e53007ce4b929a7d6a9a3b17
https://github.com/llvm/llvm-project/commit/48ecec20a2048689e53007ce4b929a7d6a9a3b17
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
Log Message:
-----------
[Hexagon] Avoid repeated hash lookups (NFC) (#131496)
Commit: 1bc2108c49f413052cee798906c9d57dc18e1a1e
https://github.com/llvm/llvm-project/commit/1bc2108c49f413052cee798906c9d57dc18e1a1e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131497)
Commit: 93ce345504519ec383a19716f2d45bac93db8207
https://github.com/llvm/llvm-project/commit/93ce345504519ec383a19716f2d45bac93db8207
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#131498)
Commit: 7c98cddc5add28834330a7a8fc3c9468b7d6fca3
https://github.com/llvm/llvm-project/commit/7c98cddc5add28834330a7a8fc3c9468b7d6fca3
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M mlir/include/mlir-c/AffineExpr.h
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/CAPI/IR/AffineExpr.cpp
M mlir/test/python/ir/affine_expr.py
Log Message:
-----------
[mlir] Expose `AffineExpr.shift_dims/shift_symbols` through C and Python bindings (#131521)
Commit: 4e841d7d63cd6056c7fc0e5c5dc23022d7694cd7
https://github.com/llvm/llvm-project/commit/4e841d7d63cd6056c7fc0e5c5dc23022d7694cd7
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M libc/docs/getting_started.rst
M libc/docs/index.rst
A libc/docs/uefi/building.rst
A libc/docs/uefi/index.rst
A libc/docs/uefi/support.rst
A libc/docs/uefi/testing.rst
A libc/docs/uefi/using.rst
Log Message:
-----------
[libc] add uefi docs (#131426)
Adds documentation for the UEFI target since #131246 was merged.
Commit: b6485765284a40297c667386e7ac662045195366
https://github.com/llvm/llvm-project/commit/b6485765284a40297c667386e7ac662045195366
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineDebugify.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131495)
Commit: ee29e16135a9a775fa7eb9f434d1c62bb9bcfbfd
https://github.com/llvm/llvm-project/commit/ee29e16135a9a775fa7eb9f434d1c62bb9bcfbfd
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Reorganize tests for narrowing interleave group transform.
Make test target-dependent, as they will require access to a concrete
vector register width. Also add new tests for cost modeling, unrolling
and removing the vector loop region.
Commit: 40b703421377fbc0f72a7f028d1d56a057d8448e
https://github.com/llvm/llvm-project/commit/40b703421377fbc0f72a7f028d1d56a057d8448e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
Log Message:
-----------
[LV] Add tests for vector backedge elimination with early-exit loops.
Commit: 3e6f618e86f5fbad2c2d5802416ec3d3366a2837
https://github.com/llvm/llvm-project/commit/3e6f618e86f5fbad2c2d5802416ec3d3366a2837
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[llvm][ADT] Add `getSingleElement` helper (#131508)
This commit adds a new helper function: `getSingleElement`
This function asserts that the container has a single element and then
returns that element. This helper function is useful during 1:N dialect
conversions in MLIR, where certain `ValueRange`s (returned from the
adaptor) are known to have a single value.
Commit: 950bc6cd77455b1ec1679cf9f125055e2de1910f
https://github.com/llvm/llvm-project/commit/950bc6cd77455b1ec1679cf9f125055e2de1910f
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFuse] Change placeholder from `undef` to `poison` (#131535)
Use `poison` instead of `undef` as a placeholder for phi entries of
unreachable predecessors.
Commit: 91328dbae986dfa93cf2acef0a93361fd5ced66d
https://github.com/llvm/llvm-project/commit/91328dbae986dfa93cf2acef0a93361fd5ced66d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate user-defined conversion functions (#131434)
Also fix/delete existing invalid/redundant test cases.
Fix #130894
Commit: 81ba006296680c9d62aba12c5e3f083e2f7c595d
https://github.com/llvm/llvm-project/commit/81ba006296680c9d62aba12c5e3f083e2f7c595d
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/nocf_check.ll
Log Message:
-----------
[X86] nocf_check: disable tail call
When a function pointer is annotated with
`void (*fptr)(void) __attribute__((nocf_check));`, calling it should use
the NOTRACK prefix, as the callee may not contain an ENDBR.
https://reviews.llvm.org/D41879 implemented NOTRACK variants for
X86ISD::CALL and ISD::BRIND but not for TCRETURN. Given that there are
so many tail call variants (e.g. conditional tailcall
https://reviews.llvm.org/D29856), let's just disable tailcall.
While nocf_check has some uses within the Linux kernel, it isn't a
popular attribute.
Fix #91228
Pull Request: https://github.com/llvm/llvm-project/pull/131487
Commit: 2dc123b33d51fcccb9e1af7230bc6573f77b3ccc
https://github.com/llvm/llvm-project/commit/2dc123b33d51fcccb9e1af7230bc6573f77b3ccc
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/SemaOpenCL/invalid-kernel-attrs.cl
Log Message:
-----------
[clang][opencl] Allow passing all zeros to reqd_work_group_size (#131543)
Allow passing all zeros to reqd_work_group_size.
Test plan: ninja check-all
Commit: 125c4db7301875cae928406043f02ed5b1133195
https://github.com/llvm/llvm-project/commit/125c4db7301875cae928406043f02ed5b1133195
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
Log Message:
-----------
[lldb][lldb-dap] setVariable request should send the correct response (#130773)
The display value was incorrectly sent as "result" instead of "value".
Commit: 2e78abe788c55721033d38a408d8f34af20bc8cc
https://github.com/llvm/llvm-project/commit/2e78abe788c55721033d38a408d8f34af20bc8cc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
Log Message:
-----------
[MSP430] Delete unneeded fixupNeedsRelaxationAdvanced
Commit: 4b86a7f3860a3cb0368e308494f65c103c02fa18
https://github.com/llvm/llvm-project/commit/4b86a7f3860a3cb0368e308494f65c103c02fa18
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Update the minimum python version requirement
See https://llvm.org/docs/GettingStarted.html#software
Fix #131456
Commit: 4fde8c341f9166e6ec6dff6e7704be175e382f5b
https://github.com/llvm/llvm-project/commit/4fde8c341f9166e6ec6dff6e7704be175e382f5b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/CUDA/cuda-shared.cuf
Log Message:
-----------
[flang][cuda] Lower CUDA shared variable with cuf.shared_memory op (#131399)
Use `cuf.shared_memory` operation instead of `cuf.alloc` for CUDA shared
variable. These variables do not need free operations.
Commit: e24e523150c2a4e7597dae9919da0378ee3d4255
https://github.com/llvm/llvm-project/commit/e24e523150c2a4e7597dae9919da0378ee3d4255
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
Log Message:
-----------
[LoopVectorize] Add test for follow-up metadata for loops (NFC) (#131337)
When pragma of loop transformations are encoded in LLVM IR, follow-up
metadata is used if multiple transformations are specified. They are
used to explicitly express the order of the transformations. However,
they are not properly processed on each transformation pass, so now only
the first one is attempted to be applied. This is a pre-commit to add a
test that causes the problem.
ref:
https://github.com/llvm/llvm-project/pull/127474#issuecomment-2717790398
Commit: 752aa81c4ff754945c695ac771577c1370564411
https://github.com/llvm/llvm-project/commit/752aa81c4ff754945c695ac771577c1370564411
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaRISCV.cpp
Log Message:
-----------
[clang][RISCV] Rename variable name in SemaRISCV. NFC (#131261)
Commit: 2a2d6d61b178f0d8d542333155510896c7bc75b5
https://github.com/llvm/llvm-project/commit/2a2d6d61b178f0d8d542333155510896c7bc75b5
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
Log Message:
-----------
[RISCV] Remove unused check prefixes from half arith strict test. NFC
Commit: 687c9d359ee124acecbdcdd699aefa77ccd6d16a
https://github.com/llvm/llvm-project/commit/687c9d359ee124acecbdcdd699aefa77ccd6d16a
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/FEntryInserter.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/Passes/PassBuilder.cpp
A llvm/test/CodeGen/X86/fentry.mir
Log Message:
-----------
[CodeGen][NPM] Port FEntryInserter to NPM (#129857)
Commit: de60c0e034f90b634235ce01fc19da9afd8b699c
https://github.com/llvm/llvm-project/commit/de60c0e034f90b634235ce01fc19da9afd8b699c
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
[MC] .reloc: move FirstLiteralRelocationKind check to evaluateFixup
Target shouldForceRelocation checks `FirstLiteralRelocationKind` to
determine whether a relocation is forced due to the .reloc directive. We
should move the code to evaluateFixup so that many targets don't need to
override shouldForceRelocation.
Commit: baab447aadd59b34bd838584b16d11475329853f
https://github.com/llvm/llvm-project/commit/baab447aadd59b34bd838584b16d11475329853f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/tools/llc/new-pm/option-conflict.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Report error in lieu of warning for invalid cl option (#128846)
Commit: c5a491e9ea22014b65664b6e09134b4f055933e2
https://github.com/llvm/llvm-project/commit/c5a491e9ea22014b65664b6e09134b4f055933e2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
A llvm/test/Transforms/LoopUnroll/pr131465.ll
Log Message:
-----------
[SCEV] Check whether the start is non-zero in `ScalarEvolution::howFarToZero` (#131522)
https://github.com/llvm/llvm-project/pull/94525 assumes that the loop
will be infinite when the stride is zero. However, it doesn't hold when
the start value of addrec is also zero.
Closes https://github.com/llvm/llvm-project/issues/131465.
Commit: e0fee65b87872c434ab7a60fe237573d5ce88ca9
https://github.com/llvm/llvm-project/commit/e0fee65b87872c434ab7a60fe237573d5ce88ca9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
Log Message:
-----------
[PowerPC] Use Register in FastISel. NFC
Commit: b09b9ac1081d19c8021df8e55e96cd1325f0eed0
https://github.com/llvm/llvm-project/commit/b09b9ac1081d19c8021df8e55e96cd1325f0eed0
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue128714.mir
Log Message:
-----------
[llvm][CodeGen] Fix the empty interval issue in Window Scheduler (#129204)
The interval of newly generated reg in ModuloScheduleExpander is empty.
This will cause crash at some corner case. This patch recalculate the
live intervals of these regs.
Commit: 8a1b4d0ed2bb5cf29714cef33604b53f42ae8273
https://github.com/llvm/llvm-project/commit/8a1b4d0ed2bb5cf29714cef33604b53f42ae8273
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
Log Message:
-----------
[MC] Rework AVR #121498 to not add extra argument to shouldForceRelocation
This removes the extra argument from commit 814b34f31e163e76b816194004689985f5b9fd7b.
Also remove unneeded `>= FirstLiteralRelocationKind`.
Commit: f75d75b8899aa44cfb2cd4e94fb43fa561f0f285
https://github.com/llvm/llvm-project/commit/f75d75b8899aa44cfb2cd4e94fb43fa561f0f285
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
Log Message:
-----------
AMDGPU: Use MFPropsModifier modifier in SIFoldOperands (#127752)
This doesn't appear to work. I do not get an error in the new PM.
---------
Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>
Commit: f402953339fa5b1c206cb5d6ac3d9b15b1e81509
https://github.com/llvm/llvm-project/commit/f402953339fa5b1c206cb5d6ac3d9b15b1e81509
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
Log Message:
-----------
[ORC] Fix code example in comment: SPS function sigs are function types. NFCI.
Commit: 6c867e27a7b597910571677abdef77b703a5a601
https://github.com/llvm/llvm-project/commit/6c867e27a7b597910571677abdef77b703a5a601
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Shape/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/test/lib/Analysis/TestCFGLoopInfo.cpp
Log Message:
-----------
[mlir] Use `getSingleElement`/`hasSingleElement` in various places (#131460)
This is a code cleanup. Update a few places in MLIR that should use
`hasSingleElement`/`getSingleElement`.
Note: `hasSingleElement` is faster than `.getSize() == 1` when it is
used with linked lists etc.
Depends on #131508.
Commit: 009d36222cfdb59f49597e01d157ca4f65ac9295
https://github.com/llvm/llvm-project/commit/009d36222cfdb59f49597e01d157ca4f65ac9295
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
A clang/test/CodeCompletion/if-const.cpp
Log Message:
-----------
[clang][CodeComplete] Add code completion for if constexpr and consteval (#124315)
Code complete `constexpr` and `consteval` keywords after `if` in the
relevant language modes. If pattern completion is enabled, the
completions also include placeholders for the condition (in the case
of `constexpr`) and statement block.
Commit: 2c35cb6f16b21d984b298e2ddf445d20f194e142
https://github.com/llvm/llvm-project/commit/2c35cb6f16b21d984b298e2ddf445d20f194e142
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
Log Message:
-----------
[MC] Remove unneeded getNumFixupKinds
Commit: 05607a3f39f97449e75358159ce8526e5d734615
https://github.com/llvm/llvm-project/commit/05607a3f39f97449e75358159ce8526e5d734615
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131551)
Commit: 78408fddccf34b7d79eb655fa2cb4dfacdfb8ae3
https://github.com/llvm/llvm-project/commit/78408fddccf34b7d79eb655fa2cb4dfacdfb8ae3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
Log Message:
-----------
[ExecutionEngine] Avoid repeated map lookups (NFC) (#131552)
Commit: 7eb8b731784722669106267764c74997e9a63cbe
https://github.com/llvm/llvm-project/commit/7eb8b731784722669106267764c74997e9a63cbe
Author: sharang.12492 <sharang.12492 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/test_taskloop_lastprivate_semantic_restrictions.f90
A flang/test/Semantics/OpenMP/test_taskloop_reduction_semantic_restrictions.f90
Log Message:
-----------
[Flang][OpenMP][taskloop] Adding missing semantic checks in Taskloop (#128431)
Below semantic checks for Taskloop clause mentioned in OpenMP [5.2]
specification were missing, this patch contains the semantic checks,
corresponding error messages and test cases:
OpenMP standard [5.2]:
[12.6] Taskloop Construct
[Restrictions]
Restrictions to the taskloop construct are as follows:
• The reduction-modifier must be default.
• The conditional lastprivate-modifier must not be specified.
Authored-by: shkaushi <sharang.kaushik at amd.com>
Commit: 3b1e18c2dba850922bc259a258e65490058e523d
https://github.com/llvm/llvm-project/commit/3b1e18c2dba850922bc259a258e65490058e523d
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/capturing-this-in-member-variable.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/capturing-this-in-member-variable.cpp
Log Message:
-----------
[clang-tidy] Add new check bugprone-capture-this-by-field (#130297)
Finds lambda captures that capture the ``this`` pointer and store it as
class
members without handle the copy and move constructors and the
assignments.
Capture this in a lambda and store it as a class member is dangerous
because the
lambda can outlive the object it captures. Especially when the object is
copied
or moved, the captured ``this`` pointer will be implicitly propagated to
the
new object. Most of the time, people will believe that the captured
``this``
pointer points to the new object, which will lead to bugs.
Fixes: #120863
---------
Co-authored-by: Baranov Victor <70346889+vbvictor at users.noreply.github.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: c3f6d2c024968d21157aa0a523ef1f1e61a07441
https://github.com/llvm/llvm-project/commit/c3f6d2c024968d21157aa0a523ef1f1e61a07441
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 3b1e18c2dba8
Commit: 57e36419b251f7e5a86566c86b4d61fbd605db5c
https://github.com/llvm/llvm-project/commit/57e36419b251f7e5a86566c86b4d61fbd605db5c
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/docs/analyzer/developer-docs.rst
A clang/docs/analyzer/developer-docs/Statistics.rst
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
A clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/WorkList.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/Analysis/analyzer-config.c
A clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
A clang/test/Analysis/csv2json.py
M clang/test/lit.cfg.py
Log Message:
-----------
[analyzer] Introduce per-entry-point statistics (#131175)
So far CSA was relying on the LLVM Statistic package that allowed us to
gather some data about analysis of an entire translation unit. However,
the translation unit consists of a collection of loosely related entry
points. Aggregating data across multiple such entry points is often
counter productive.
This change introduces a new lightweight always-on facility to collect
Boolean or numerical statistics for each entry point and dump them in a
CSV format. Such format makes it easy to aggregate data across multiple
translation units and analyze it with common data-processing tools.
We break down the existing statistics that were collected on the per-TU
basis into values per entry point.
Additionally, we enable the statistics unconditionally (STATISTIC ->
ALWAYS_ENABLED_STATISTIC) to facilitate their use (you can gather the
data with a simple run-time flag rather than having to recompile the
analyzer). These statistics are very light and add virtually no
overhead.
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
CPP-6160
Commit: 9b1ce477af5603e665258362fb8b9fe4091efbde
https://github.com/llvm/llvm-project/commit/9b1ce477af5603e665258362fb8b9fe4091efbde
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
Log Message:
-----------
[gn build] Port 57e36419b251
Commit: ccfabe8380572d99a6833bfff09a62018aca1a15
https://github.com/llvm/llvm-project/commit/ccfabe8380572d99a6833bfff09a62018aca1a15
Author: Julian Ruess <julianonline+github at posteo.de>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy-diff] Add an option to treat warnings as errors (#128221)
This patch allows to treat warnings as erros using clang-tidy-diff.
Co-authored-by: Piotr Zegar <me at piotrzegar.pl>
Commit: 3af6c9fa832ac29125cad76acb397d6235c371e9
https://github.com/llvm/llvm-project/commit/3af6c9fa832ac29125cad76acb397d6235c371e9
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/Transport.cpp
Log Message:
-----------
[lldb][lldb-dap][NFC] Fix swapped logging directions for DAP messages. (#131544)
The logging markers for incoming ("<--") and outgoing ("-->") messages
were incorrectly reversed. from #7790d69
Commit: 6b47bba44087caa7d4805bdb3229153a3bfba7a5
https://github.com/llvm/llvm-project/commit/6b47bba44087caa7d4805bdb3229153a3bfba7a5
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds_alias.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
Log Message:
-----------
[AMDGPU] Add intrinsics and MIs for ds_bvh_stack_* (#130007)
New intrinsics / instructions :
int_amdgcn_ds_bvh_stack_push4_pop1_rtn / ds_bvh_stack_push4_pop1_rtn_b32
int_amdgcn_ds_bvh_stack_push8_pop1_rtn / ds_bvh_stack_push8_pop1_rtn_b32
int_amdgcn_ds_bvh_stack_push8_pop2_rtn / ds_bvh_stack_push8_pop2_rtn_b64
Co-authored-by: Mateja Marjanovic <mateja.marjanovic at amd.com>
Commit: fd41f1b0ce1e7d4eb2d51da82418b3e41dbb59ba
https://github.com/llvm/llvm-project/commit/fd41f1b0ce1e7d4eb2d51da82418b3e41dbb59ba
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
A clang/test/Analysis/fixed-address-notes.c
Log Message:
-----------
[clang][analyzer] Add BugReporterVisitor messages for non-null fixed pointer (#129557)
Commit: a10e1e0135970861d3fd2f742e3628fe94e00af4
https://github.com/llvm/llvm-project/commit/a10e1e0135970861d3fd2f742e3628fe94e00af4
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
Log Message:
-----------
[RISCV] Remove unused check prefixes from double maximum/minimum test. NFC
Commit: d9110858ee938db424887cd3435488525dd632cb
https://github.com/llvm/llvm-project/commit/d9110858ee938db424887cd3435488525dd632cb
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaAccess.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
Log Message:
-----------
[Clang] Fix an incorrect assumption on getTemplatedDecl() (#131559)
Since a68d20e98, we've been calling HandleDelayedAccessCheck() for
concept declarations when the declaration contains invalid member
accesses.
However, a concept declaration is TemplateDecl such that doesn't contain
any TemplatedDecl.
Fixes https://github.com/llvm/llvm-project/issues/131530
Commit: 8cc6c2e80fb007f0e0e2ee65bca070c0f7fb7010
https://github.com/llvm/llvm-project/commit/8cc6c2e80fb007f0e0e2ee65bca070c0f7fb7010
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
Log Message:
-----------
AMDGPU: Migrate more tests away from undef (#131314)
andorbitset.ll is interesting since it directly depends on the
difference between poison and undef. Not sure it's useful to keep
the version using poison, I assume none of this code makes it to
codegen.
si-spill-cf.ll was also a nasty case, which I doubt has been reproducing
its original issue for a very long time. I had to reclaim an older version,
replace some of the poison uses, and run simplify-cfg. There's a very
slight change in the final CFG with this, but final the output is approximately
the same as it used to be.
Commit: 4f2ee07454b0d0b156a728ca540f584310ef4a62
https://github.com/llvm/llvm-project/commit/4f2ee07454b0d0b156a728ca540f584310ef4a62
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/AArch64/test-indirect-branch.s
Log Message:
-----------
[BOLT][AArch64] Do not crash on authenticated branch instructions (#129898)
When an indirect branch instruction is decoded, analyzeIndirectBranch
method is asked if this is a well-known code pattern. On AArch64, the
only special pattern which is detected is Jump Table, emitted as a
branch to the sum of a constant base address and a variable offset.
Therefore, `Inst.getOpcode()` being one of `AArch64::BRA*` means Inst
cannot belong to such Jump Table pattern, thus returning early.
Commit: ee8a804cbab56fdc00dea43091e2cfabd01a3b9f
https://github.com/llvm/llvm-project/commit/ee8a804cbab56fdc00dea43091e2cfabd01a3b9f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
Log Message:
-----------
AMDGPU: Switch test to generated checks (#131315)
I doubt this is testing what it originally intended anymore. Also
replace an undef.
Commit: a6ae965cec96ac3a79b908afa9e2cd1ed5f3d5e1
https://github.com/llvm/llvm-project/commit/a6ae965cec96ac3a79b908afa9e2cd1ed5f3d5e1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
Log Message:
-----------
AMDGPU: Switch scheduler-subrange-crash.ll to generated checks (#131316)
Also remove unnecessarily requiring asserts, and replace undef
with poison.
Commit: 1f1f8200bdf568ce41259ffcf78b32dd4630e1e8
https://github.com/llvm/llvm-project/commit/1f1f8200bdf568ce41259ffcf78b32dd4630e1e8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
Log Message:
-----------
AMDGPU: Switch simplifydemandedbits-recursion.ll to generated checks (#131317)
This just checked the s_endpgm. Generate full checks, and remove undefs.
Commit: 7dcea28bf92e49737fa285e93621cfa814323524
https://github.com/llvm/llvm-project/commit/7dcea28bf92e49737fa285e93621cfa814323524
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
Log Message:
-----------
[AMDGPU] Add identity_combines to RegBankCombiner (#131305)
Commit: 27099982da2f5a6c2d282d6b385e79d080669546
https://github.com/llvm/llvm-project/commit/27099982da2f5a6c2d282d6b385e79d080669546
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugType.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Core/Checker.cpp
Log Message:
-----------
[NFC][analyzer] Framework for multipart checkers (#130985)
In the static analyzer codebase we have a traditional pattern where a
single checker class (and its singleton instance) acts as the
implementation of several (user-facing or modeling) checkers that have
shared state and logic, but have their own names and can be enabled or
disabled separately.
Currently these multipart checker classes all reimplement the same
boilerplate logic to store the enabled/disabled state, the name and the
bug types associated with the checker parts. This commit extends
`CheckerBase`, `BugType` and the checker registration process to offer
an easy-to-use alternative to that boilerplate (which includes the ugly
lazy initialization of `mutable std::unique_ptr<BugType>`s).
In this new framework the single-part checkers are internally
represented as "multipart checkers with just one part" (because this way
I don't need to reimplement the same logic twice) but this does not
require any changes in the code of simple single-part checkers.
I do not claim that these multi-part checkers are perfect from an
architectural point of view; but they won't suddenly disappear after
many years of existence, so we might as well introduce a clear framework
for them. (Switching to e.g. 1:1 correspondence between checker classes
and checker names would be a prohibitively complex change.)
This PR ports `DivZeroChecker` to the new framework as a proof of
concept. I'm planning to do a series of follow-up commits to port the
rest of the multi-part checker.
Commit: ab1dcac6db2229387c711b7a4059e36ba09583cc
https://github.com/llvm/llvm-project/commit/ab1dcac6db2229387c711b7a4059e36ba09583cc
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
Log Message:
-----------
[AMDGPU][RegBankInfo] Promote scalar i16 and/or/xor to i32 (#131306)
See #64591
Commit: e456579e346c0790603544dc7617edfe44953f4c
https://github.com/llvm/llvm-project/commit/e456579e346c0790603544dc7617edfe44953f4c
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU][RegBankCombiner] Add cast_of_cast and constant_fold_cast combines (#131307)
We can add a bunch of exts/truncs during RBSelect, we should be able to fold
them away afterwards.
Commit: 0878dd14b20579dd127396787ec81ba7239b3366
https://github.com/llvm/llvm-project/commit/0878dd14b20579dd127396787ec81ba7239b3366
Author: David Green <david.green at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
Log Message:
-----------
[AArch64][GlobalISel] Add coverage for arm64-neon-2velem.ll. NFC
Commit: 93e0df07c2b32610ff8cc9451b5b5036f9a3ed37
https://github.com/llvm/llvm-project/commit/93e0df07c2b32610ff8cc9451b5b5036f9a3ed37
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/metadirective-common.f90
Log Message:
-----------
[Flang][OpenMP] Allow zero trait score (#131473)
Commit: 5c73c5c9bf0e048737682040f22734c3eb63cbbf
https://github.com/llvm/llvm-project/commit/5c73c5c9bf0e048737682040f22734c3eb63cbbf
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][NFC] Add missing immediate qualifier to VSM3RNDS2 instruction (#131576)
Commit: 0c34d7a9e7a4b5d249dda46ff8ab754cf3f934c7
https://github.com/llvm/llvm-project/commit/0c34d7a9e7a4b5d249dda46ff8ab754cf3f934c7
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Require operand/result tensors of at least rank 1 for some operations (#131335)
This commit updates the following operations (operands/results) to be of
at least rank 1 such that it aligns with the expectations of the
specification:
- ARGMAX (input)
- REDUCE_ALL (input/output)
- REDUCE_ANY (input/output)
- REDUCE_MAX (input/output)
- REDUCE_MIN (input/output)
- REDUCE_PRODUCT (input/output)
- REDUCE_SUM (input/output)
- CONCAT (each input in input1/output)
- PAD (input1/output)
- REVERSE (input1/output)
- SLICE (input1/output)
- TILE (input1/output)
- TRANSPOSE (input1/output)
In addition to this change, PAD has been updated to allow unranked
tensors for input1/output, inline with other operations.
Commit: 846cf86b2bbec68c01f762f65e2778a32fe15daa
https://github.com/llvm/llvm-project/commit/846cf86b2bbec68c01f762f65e2778a32fe15daa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
libclc: Add missing gfx950 target (#131585)
Commit: 8c939f54b4907935a877e75d09ee88bf90401cb4
https://github.com/llvm/llvm-project/commit/8c939f54b4907935a877e75d09ee88bf90401cb4
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Change placeholder from `undef` to `poison` (#131536)
Use `poison` instead of `undef` as a placeholder for phi entries of
unreachable predecessors.
Commit: 6eb32a2fa0d16bea03f22dd2078f53da6d9352cd
https://github.com/llvm/llvm-project/commit/6eb32a2fa0d16bea03f22dd2078f53da6d9352cd
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
Log Message:
-----------
[clang] Change placeholder from `undef` to `poison` (#131533)
Return a `poison` value, instead of `undef`, if there is no available
SEH info.
Commit: e57cd100ca297cf81854e35cccbf703edddd4aad
https://github.com/llvm/llvm-project/commit/e57cd100ca297cf81854e35cccbf703edddd4aad
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Support/Compiler.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (#131578)
While building llvm (clang, lld) against emscripten we see this
[error](https://github.com/emscripten-forge/recipes/actions/runs/13803029307/job/38608794602#step:9:1715)
```
│ │ In file included from $SRC_DIR/llvm/lib/Frontend/OpenACC/ACC.cpp:9:
│ │ $SRC_DIR/build/include/llvm/Frontend/OpenACC/ACC.h.inc:192:1: error: unknown type name 'LLVM_ABI'
│ │ 192 | LLVM_ABI Directive getOpenACCDirectiveKind(llvm::StringRef Str);
│ │ | ^
│ │ $SRC_DIR/build/include/llvm/Frontend/OpenACC/ACC.h.inc:192:19: error: expected ';' after top level declarator
│ │ 192 | LLVM_ABI Directive getOpenACCDirectiveKind(llvm::StringRef Str);
│ │ | ^
```
Now this was happening because we weren't defining LLVM_ABI correctly when building against emscripten. If you see [llvm/Support/Compiler.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/Compiler.h#L206-L210), the condition only checked for the platform __WASM__ . Now Emscripten targets WebAssembly but doesn't imply the platform by default so the check isn't complete to define LLVM_ABI.
The successful build after using this patch can be seen [here](https://github.com/emscripten-forge/recipes/actions/runs/13805214092/job/38614585621)
Commit: f4feab927ba33e897c4f05bf3b52226bc0a824c7
https://github.com/llvm/llvm-project/commit/f4feab927ba33e897c4f05bf3b52226bc0a824c7
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[NFC][KeyInstr] Add (LLVM_)EXPERIMENTAL_KEY_INSTRUCTIONS (cmake/)definition (#131344)
Key Instructions will start development behind a compile time flag to avoid
passing on the increased memory usage to all debug builds. We're working on
improving DILocation memory characteristics simultaneously; once that work lands
we can remove `EXPERIMENTAL_KEY_INSTRUCTIONS`.
This patch doesn't add any code, it's just so we can get the SIE buildbot
building with the new option right away.
Commit: 6085f3f6a80dc3be97d31a4c31a22fd77dbb6e83
https://github.com/llvm/llvm-project/commit/6085f3f6a80dc3be97d31a4c31a22fd77dbb6e83
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp_sched.cpp
Log Message:
-----------
[OpenMP] Address __kmp_dist_for_static_init issue (#129902)
This patch attempts to provide a fix for an issue that appears when the
`__kmp_dist_for_static_init` function is called from a serialized team.
This is triggered by code generated by flang for `distribute parallel
do` constructs whenever an `if` clause for the `parallel` leaf construct
is present. This results in the introduction of a call to
`__kmpc_fork_call_if` in place of `__kmpc_fork_call`. When it evaluates
to `false`, it defers execution to `__kmp_serialized_parallel`, which
creates a new serial team that is picked up by
`__kmp_dist_for_static_init`, resulting in an incorrect `team` pointer
that causes the `nteams == (kmp_uint32)team->t.t_parent->t.t_nproc`
assertion to fail.
The sequence of calls replicating this issue can be summarized as:
- `__kmpc_fork_teams`
- `__kmpc_fork_call_if`
- `__kmpc_dist_for_static_init_*`
Since I am not familiar with the implementation of the OpenMP runtime,
it is possible that the above sequence of calls is incorrect, or that
the bug can be better fixed in another way, so I am open to discussing
this.
The following Fortran program can be compiled with flang to show the
issue:
```f90
! Compile and run: flang -fopenmp test.f90 -o test && ./test
! Check LLVM IR: flang -fc1 -emit-llvm -fopenmp test.f90 -o -
program main
implicit none
integer, parameter :: n = 10
integer :: i, idx(n)
!$omp teams
!$omp distribute parallel do if(.false.)
do i=1,n
idx(i) = i
end do
!$omp end teams
print *, idx
end program
```
Commit: e0223fa24aedf14895ea31beb87dac6d5a2137f0
https://github.com/llvm/llvm-project/commit/e0223fa24aedf14895ea31beb87dac6d5a2137f0
Author: Imad Aldij <os at imadij.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[Clang][NFC] Rename SecondArgIsLastNamedArgument for clarity and consistency (#131346)
Change the name of the control variable `SecondArgIsLastNamedArgument`
to `SecondArgIsLastNonVariadicArgument` for clarity and consistency.
Following feedback on earlier PR that was merged:
-
https://github.com/llvm/llvm-project/pull/131238#discussion_r1995690691_
Commit: 17b4be8f63a9a2c17290c8540d84f17a370b1915
https://github.com/llvm/llvm-project/commit/17b4be8f63a9a2c17290c8540d84f17a370b1915
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Move setting name and adding VFs after recipe creation.(NFC)
Recipe creation is the only place where the VF range is restricted. Move
setting the VFs just after initial recipe creation.
Commit: 06546e005d2f9363c51552cfdbe7e69d0bcb5f02
https://github.com/llvm/llvm-project/commit/06546e005d2f9363c51552cfdbe7e69d0bcb5f02
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/unique_object_duplication.h
Log Message:
-----------
[clang][NFC] Fix typo 'initializeation' (#131594)
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: ed57ab0c2b8f359e7937f2c565239bd7cf124a9f
https://github.com/llvm/llvm-project/commit/ed57ab0c2b8f359e7937f2c565239bd7cf124a9f
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A cmake/Modules/FindLibcCommonUtils.cmake
R llvm/cmake/modules/FindLibcCommonUtils.cmake
Log Message:
-----------
[cmake] Move FindLibcCommonUtils to shared cmake, to fix standalone builds (#131586)
Move `FindLibcCommonUtils` from LLVM's CMake module directory to the
shared top-level CMake directory, as the module is intended to be used
from within the source tree rather than the installed LLVM version. This
fixes standalone offload builds after #131205.
Commit: b79d53caaad7a36b1f20c70ea777fa283d181652
https://github.com/llvm/llvm-project/commit/b79d53caaad7a36b1f20c70ea777fa283d181652
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
A llvm/test/CodeGen/X86/pr131389.ll
Log Message:
-----------
[X86] X86MCInstLower.cpp - printConstant - don't assume the source constant data is smaller than the printed data
Bail out if the constant types aren't compatible
Fixes #131389
Commit: 1e89a76a0490b6c55a3e46ecf967da3e30c9112b
https://github.com/llvm/llvm-project/commit/1e89a76a0490b6c55a3e46ecf967da3e30c9112b
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
Log Message:
-----------
[MLIR] Refactor to create vectorization convOp precondition check (#130181)
In corner situations, the vectorization pass may face to lower a conv2d
op and assert in a completely irrelevant location in
vectorizeConvolution() subroutine.
~~This PR rejects the conv2d op early and make the asserted routine to
return failure as a defensive workaround.~~
In addressing this, the PR moved all condition check away from the
`Conv1dGenerator` into the `convOpPreconditionCheck()` function. This
makes the unsupported ops such as conv2d to be rejected early and leave
a cleaner `Conv1dGenerator` constructor.
Commit: 19adc69029ba090d9eae3b89069dee7eadb1bd26
https://github.com/llvm/llvm-project/commit/19adc69029ba090d9eae3b89069dee7eadb1bd26
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
Log Message:
-----------
[analyzer] Add [[maybe_unused]] forgotten in 57e36419b251 (#131617)
Fixes
https://github.com/llvm/llvm-project/pull/131175#discussion_r1998764727
Commit: 1c3a9a853ce68c3c539e7cab21380b9d8b18f426
https://github.com/llvm/llvm-project/commit/1c3a9a853ce68c3c539e7cab21380b9d8b18f426
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
A llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
Log Message:
-----------
[AMDGPU] frame index elimination hit assertion for scavenged nonreg (#130287)
Avoid spilling and fold the offset into `FIOp` when the scavenger fails
to find a free reg during frame index elimination.
Fixes #130120
Commit: 2ff370f45266b14c2a86e6395042a4574701f2d2
https://github.com/llvm/llvm-project/commit/2ff370f45266b14c2a86e6395042a4574701f2d2
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/unnecessary-virtual-specifier.cpp
Log Message:
-----------
Warn about virtual methods in `final` classes (#131188)
There's never any point to adding a `virtual` specifier to methods in a
`final` class, since the class can't be subclassed. This adds a warning
when we notice this happening, as suggested in #131108.
We don't currently implement the second part of the suggestion, to warn
on `virtual` methods which are never overridden anywhere. Although it's
feasible to do this for things with internal linkage (so we can check at
the end of the TU), it's more complicated to implement and it's not
clear it's worth the effort.
I tested the warning by compiling chromium and clang itself. Chromium
resulted in [277 warnings across 109
files](https://github.com/user-attachments/files/19234889/warnings-chromium.txt),
while clang had [38 warnings across 29
files](https://github.com/user-attachments/files/19234888/warnings-clang.txt).
I inspected a subset of the warning sites manually, and they all seemed
legitimate.
This warning is very easy to fix (just remove the `virtual` specifier)
and I haven't seen any false positives, so it's suitable for
on-by-default. However, I've currently made it off-by-default because it
fires at several places in the repo. I plan to submit a followup PR
fixing those places and enabling the warning by default.
Commit: 8bc0f879a05228c58235ded510360da2220f0afd
https://github.com/llvm/llvm-project/commit/8bc0f879a05228c58235ded510360da2220f0afd
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] D16 LDS load/store pseudo instructions in true16 (#131427)
Implement new pseudos with the suffix _t16 which have VGPR_16 as the
store src or load dst. This affects LDS 8 and 16-bit loads and stores.
Lower the pseudos to the existing real Hi/Lo instructions in MC inst
layer with VGPR_32 src or dst
---------
Co-authored-by: Abhinav <abhinav.garg at amd.com>
Commit: b8317df8d8f6dc110edfbf86d8269c912cb2a2a9
https://github.com/llvm/llvm-project/commit/b8317df8d8f6dc110edfbf86d8269c912cb2a2a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Avoid repeated hash lookups (NFC) (#131553)
Commit: 8789c0083de178fd044e5fb94b3a36c2eec49e0a
https://github.com/llvm/llvm-project/commit/8789c0083de178fd044e5fb94b3a36c2eec49e0a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131554)
Commit: e71686ed1539abe8ec68a4efa010f5ede13e9888
https://github.com/llvm/llvm-project/commit/e71686ed1539abe8ec68a4efa010f5ede13e9888
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[TargetParser] Avoid repeated hash lookups (NFC) (#131555)
Commit: 9455df969ef34681d08b2118a2ca2e8b0bd0155b
https://github.com/llvm/llvm-project/commit/9455df969ef34681d08b2118a2ca2e8b0bd0155b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131556)
Commit: 83356f3b62e95b980ca48083aafa4a1b4040d4c9
https://github.com/llvm/llvm-project/commit/83356f3b62e95b980ca48083aafa4a1b4040d4c9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Compile functions lazily (#131596)
Create the Function* handles for all functions we see, but delay the
actual compilation until we really call the function. This speeds up
compile times with the new interpreter a bit.
Commit: 1b237198dc9d308c6d589e01637ec7496b48b3e0
https://github.com/llvm/llvm-project/commit/1b237198dc9d308c6d589e01637ec7496b48b3e0
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
Reapply "[lldb] Implement basic support for reverse-continue (#125242)" (again) (#128156)
This reverts commit
https://github.com/llvm/llvm-project/commit/87b7f63a117c340a6d9ca47959335fd7ef6c7ad2,
reapplying
https://github.com/llvm/llvm-project/commit/7e66cf74fb4e6a103f923e34700a7b6f20ac2a9b
with a small (and probably temporary)
change to generate more debug info to help with diagnosing buildbot
issues.
Commit: 37c3fbfa5ae9c124fffa4d53df708c688d8584c6
https://github.com/llvm/llvm-project/commit/37c3fbfa5ae9c124fffa4d53df708c688d8584c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Add test showing failure to merge concatenatable VPERMV3 nodes
Commit: 269c40fafc80576ab4efcd7fba954fd5588ea118
https://github.com/llvm/llvm-project/commit/269c40fafc80576ab4efcd7fba954fd5588ea118
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
Log Message:
-----------
[X86] Add tests for concatenation of VPERMV nodes
Commit: 52e7ca9279b4cbe30cacca67548347ef5f96b120
https://github.com/llvm/llvm-project/commit/52e7ca9279b4cbe30cacca67548347ef5f96b120
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
Log Message:
-----------
[LLVM][NVPTX] Add support for ldmatrix extensions introduced in PTX 8.6 (#124899)
This commit adds support for the following ldmatrix extensions
introduced in PTX 8.6
- Support for m16n16 with b8 type with mandatory transpose
- Support for m16n16 with m8n16 with source and desitination formats
The above extensions are only supported on sm_100a, sm_101a, sm_120a
Please refer the PTX ISA for more information:
https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-ldmatrix
Commit: 3959bbc1345b9eb99b208e816a86e6a39103c345
https://github.com/llvm/llvm-project/commit/3959bbc1345b9eb99b208e816a86e6a39103c345
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[NFC] Remove trailing white spaces from `llvm/docs/LangRef.rst`
Commit: a4510aa7cb6073ccec63edce3aaed3e6f92563a5
https://github.com/llvm/llvm-project/commit/a4510aa7cb6073ccec63edce3aaed3e6f92563a5
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/GetToolchainDirs.cmake
Log Message:
-----------
[flang-rt] replace the triple dir to 'aix' for flang-rt to be consistent with clang on AIX. (#130875)
This change is to put `libflang_rt.runtime.a` into
`build/lib/clang/21/lib/aix/libflang_rt.runtime.a`, which is consistent
with clang on AIX.
Commit: 7054655c52e03a2a0d3bca679cb883241679a14e
https://github.com/llvm/llvm-project/commit/7054655c52e03a2a0d3bca679cb883241679a14e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[llvm-exegesis] Add myself as an llvm-exegesis maintainer (#131580)
More people have been interested in exegesis recently, so having a point
of contact would probably be good. Exegesis also never had proper code
owners in the previous system, so adding them now is a decent step
forward.
I'm nominating myself as I'm interested in pushing the project further,
and have a decent amount of experience with the code base. Two of the
original authors, Clement and Guillaume, now have different priorities
at work and are thus not as invested into maintaining exegesis anymore.
Commit: e2c43ba981620cf71ce3ccf004db7c0db4caf8a7
https://github.com/llvm/llvm-project/commit/e2c43ba981620cf71ce3ccf004db7c0db4caf8a7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
Log Message:
-----------
[NFC][AMDGPU] Auto generate check lines for `llvm/test/CodeGen/AMDGPU/packed-fp32.ll` (#131629)
Commit: eef5ea0c42fc07ef2c948be59b57d0df8ec801ca
https://github.com/llvm/llvm-project/commit/eef5ea0c42fc07ef2c948be59b57d0df8ec801ca
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
Log Message:
-----------
[VPlan] Account for dead FOR splice simplification in cost model (#131486)
Fixes #131359
After #129645, a first-order recurrence will no longer have it's splice
costed if the VPInstruction::FirstOrderRecurrenceSplice has no users and
is dead.
The legacy cost model didn't account for this, so this accounts for it
in planContainsAdditionalSimplifications to avoid the "VPlan cost model
and legacy cost model disagreed" assertion.
Commit: b00ad366323cee324b0294f6395c33ae4b047e2c
https://github.com/llvm/llvm-project/commit/b00ad366323cee324b0294f6395c33ae4b047e2c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
Log Message:
-----------
[RISCV] Use hasFeature instead of checkFeature in llvm-exegesis. NFC (#131401)
Until recently checkFeature was quite slow. #130936
I was curious where we use checkFeature and noticed these. I thought we
could use hasFeature instead of going through strings.
Commit: 54cb4059da2751758b3ab6dc5630e40b228bcda5
https://github.com/llvm/llvm-project/commit/54cb4059da2751758b3ab6dc5630e40b228bcda5
Author: Vineet Kumar <173554+vntkmr at users.noreply.github.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/combine-fma-negate.ll
Log Message:
-----------
[X86][ISel][FMA] Get a handle on operand nodes when negating FMA (#130176)
When negating an FMA opcode, a new node created for a negated FMA
operand may be deleted while recursively negating another FMA operand.
This causes the following assertion to fail:
```
llc: /root/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7686: llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags): Assertion `N1.getOpcode() != ISD::DELETED_NODE && N2.getOpcode() != ISD::DELETED_NODE && N3.getOpcode() != ISD::DELETED_NODE && "Operand is DELETED_NODE!"' failed.
```
This patch adds a temporary handle on the new negated nodes to prevent
them from being deleted.
For eg. see https://godbolt.org/z/Tq4PvnKM4 .
Co-authored-by: Vineet Kumar <vineetk at hpe.com>
Commit: 67f1c033b8ff07c2713b3cb1209a574129274cbf
https://github.com/llvm/llvm-project/commit/67f1c033b8ff07c2713b3cb1209a574129274cbf
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove createReduction. NFCI (#131336)
This is split off from #131300.
A VPReductionRecipe will never have a AnyOf or FindLastIV recurrence, so
when it calls createReduction it always calls createSimpleReduction.
If we replace the call then it leaves createReduction with one user in
VPInstruction::ComputeReductionResult, which we can inline and then
remove.
Commit: 800593a014791e3aa26f04357f580d2dcc87320a
https://github.com/llvm/llvm-project/commit/800593a014791e3aa26f04357f580d2dcc87320a
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Avoid duplicated module flags in the export (#131627)
This commit resolves an issue in the LLVMIR export that caused the
duplication of the "Debug Info Version" module flag, when it was already
in MLIR.
Commit: 561f1d0b7cbbe6f40dca40830ccb4b956bf9ecef
https://github.com/llvm/llvm-project/commit/561f1d0b7cbbe6f40dca40830ccb4b956bf9ecef
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] add test coverage for concatenation to 512-bit VPERMILPD nodes
Commit: 9a92fe0f8d34ba0b06b3f831c269d381f3944304
https://github.com/llvm/llvm-project/commit/9a92fe0f8d34ba0b06b3f831c269d381f3944304
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Add additional test coverage for #109272
Commit: b3c5031b07396959c5d4e7f62d516d63de015358
https://github.com/llvm/llvm-project/commit/b3c5031b07396959c5d4e7f62d516d63de015358
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
Log Message:
-----------
[HLSL] Remove HLSLResource attribute (#130342)
Fixes #104862
Commit: 47f7daab06e4e83f64a1b268da7ada4f50d50349
https://github.com/llvm/llvm-project/commit/47f7daab06e4e83f64a1b268da7ada4f50d50349
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/glob.yaml
Log Message:
-----------
[libc][docs] Add glob implementation status doc and include in CMakeLists (#126923)
These changes tracks `glob.h` for the implementation status of functions
and macros, with respect to the issue ( #122006 ) .
cc @nickdesaulniers
Commit: fbb8929c9d15fdc0001205ee4a7b42a78edc5213
https://github.com/llvm/llvm-project/commit/fbb8929c9d15fdc0001205ee4a7b42a78edc5213
Author: John Harrison <harjohn at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
R lldb/tools/lldb-dap/Protocol.cpp
R lldb/tools/lldb-dap/Protocol.h
A lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolBase.h
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Updating RequestHandler to encode/decode arguments and response. (#130090)
This is a work in progress refactor to add explicit types instead of
generic 'llvm::json::Value' types to the DAP protocol.
This updates RequestHandler to have take the type of the arguments and
response body for serialization for requests.
The 'source' and 'disconnect' request is updated to show how the new
flow
works and includes serialization handling for optional arguments and
'void'
responses.
This is built on top of #130026
---------
Co-authored-by: Adrian Vogelsgesang <adrian.vogelsgesang at tum.de>
Commit: 681b24132c5d8ce8eafee191a967799dd2a23960
https://github.com/llvm/llvm-project/commit/681b24132c5d8ce8eafee191a967799dd2a23960
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port fbb8929c9d15
Commit: 046041842022f12ab04403e255ceeec25d6ce11c
https://github.com/llvm/llvm-project/commit/046041842022f12ab04403e255ceeec25d6ce11c
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
Log Message:
-----------
[clang][driver][NFC] Remove else after return (#131182)
Commit: c53caae1d0baaf21d63e5f7152171699bcab0750
https://github.com/llvm/llvm-project/commit/c53caae1d0baaf21d63e5f7152171699bcab0750
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libcxx/include/__memory/unique_ptr.h
Log Message:
-----------
[libc++][NFC] Remove dead link in comment
Commit: ca1bde0b91a6129e7bacee0fa67e4331b06dd683
https://github.com/llvm/llvm-project/commit/ca1bde0b91a6129e7bacee0fa67e4331b06dd683
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Check dtor instance pointers for active-ness (#128732)
And diagnose if we're trying to destroy an inactive member of a union.
Commit: cfa07ccdfcf03cbd48086fe9988f97e3a776b02c
https://github.com/llvm/llvm-project/commit/cfa07ccdfcf03cbd48086fe9988f97e3a776b02c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix builtin_memchr with non-0 start index (#131633)
Commit: ead9d6a56d764190aa916c5259ab50986f803128
https://github.com/llvm/llvm-project/commit/ead9d6a56d764190aa916c5259ab50986f803128
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/empty-vectorizable-tree.ll
Log Message:
-----------
[SLP]Check VectorizableTree is not empty before accessing elements
Need to check VectorizableTree is not empty before accessing elements.
Fixes #131635
Commit: f6a7306beaf5ba8f62450ab91b7c89a54f6b745f
https://github.com/llvm/llvm-project/commit/f6a7306beaf5ba8f62450ab91b7c89a54f6b745f
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/FrontendTool/CMakeLists.txt
Log Message:
-----------
[clang][CIR] Add missing dependency on MLIR headers (#131057)
Commit: 279e82fca7f2fd565c8b8e99bc29e696a910b681
https://github.com/llvm/llvm-project/commit/279e82fca7f2fd565c8b8e99bc29e696a910b681
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
Revert f9146ccbe940d8b8eb15e7686a511a28eb0abc6b (#131656)
This reverts commit f9146ccbe940d8b8eb15e7686a511a28eb0abc6b
([libc][bazel] explicitly use system-provided errno in Bazel builds.
(#130663))
This change causes problems in Bazel builds where system errno is set to
non-zero before the tests even begin to run - see PR #131650 for the
disucssion on how to address this.
Commit: af5abd9a682d3a7d993f1b4fcae92efe318b835c
https://github.com/llvm/llvm-project/commit/af5abd9a682d3a7d993f1b4fcae92efe318b835c
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/hlsl.h
A clang/lib/Headers/hlsl/hlsl_compat_overloads.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
A clang/test/SemaHLSL/BuiltIns/clamp-errors-16bit.hlsl
M clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
Log Message:
-----------
[HLSL] add extra scalar vector overloads for clamp (#129939)
Add additional vector scalar overloads for clamp using templates
Add Tests
fixup tests which have changed.
Closes #128230
Commit: 2443fe537f8bf7620c26586034b12a977d14e366
https://github.com/llvm/llvm-project/commit/2443fe537f8bf7620c26586034b12a977d14e366
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port af5abd9a682d
Commit: 911b200ce339ace2d55cd2827bb10ed6a494faae
https://github.com/llvm/llvm-project/commit/911b200ce339ace2d55cd2827bb10ed6a494faae
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
A clang/test/CodeGenCXX/gnu-asm-constexpr.cpp
M clang/test/Parser/asm.cpp
A clang/test/SemaCXX/gnu-asm-constexpr.cpp
Log Message:
-----------
[Clang] Constant Expressions inside of GCC' asm strings (#131003)
Implements GCC's constexpr string ASM extension
https://gcc.gnu.org/onlinedocs/gcc/Asm-constexprs.html
Commit: 24e88b0e6bc04f16d7353ad9ef07398836adf244
https://github.com/llvm/llvm-project/commit/24e88b0e6bc04f16d7353ad9ef07398836adf244
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libcxx/include/module.modulemap
M libcxx/test/benchmarks/GenerateInput.h
R libcxx/test/benchmarks/algorithms/fill.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/fill.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/fill_n.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/generate.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/generate_n.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/move.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/move_backward.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/remove.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/remove_copy.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/replace.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/reverse.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/reverse_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/rotate.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/rotate_copy.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/sample.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shift_left.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shift_right.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shuffle.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/swap_ranges.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/transform.binary.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/transform.unary.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/unique.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/unique_copy.bench.cpp
R libcxx/test/benchmarks/algorithms/move.bench.cpp
R libcxx/test/benchmarks/algorithms/move_backward.bench.cpp
R libcxx/test/benchmarks/algorithms/reverse.bench.cpp
Log Message:
-----------
[libc++] Add remaining benchmarks from [alg.modifying.operations] (#127354)
This patch adds benchmarks for all the remaining algorithms in
[alg.modifying.operations] that we didn't already have a benchmark for.
Commit: 20cdffbd2761b2cb33e0968a78de9a427d0ef555
https://github.com/llvm/llvm-project/commit/20cdffbd2761b2cb33e0968a78de9a427d0ef555
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] combineConcatVectorOps - extend VPERMILPD handling to support 512-bit types
Commit: bbaf743c461e5e38a72f12f2b6ee6b91674a2a4d
https://github.com/llvm/llvm-project/commit/bbaf743c461e5e38a72f12f2b6ee6b91674a2a4d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Cleanup test coverage for #109272
We need to add commutated variants (to match the original bug report), some of which are still failing....
Commit: 9eb6b37e397eba7b286777f5502a08876e74d905
https://github.com/llvm/llvm-project/commit/9eb6b37e397eba7b286777f5502a08876e74d905
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Put CV_ELW back in XCV DecoderNamespace.
I messed this up in #130800.
Commit: d2e1e3034801da85c495adfffadf1de87f8b4734
https://github.com/llvm/llvm-project/commit/d2e1e3034801da85c495adfffadf1de87f8b4734
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV] Rename some DecoderNamespaces and cleanup debug messages. NFC (#131409)
Rename RISCV32GPRPair and RISCV32Only_ to RV32Only. This gives a more
natural home for the P extension RV32 conflicts.
While I was there I made some improvements to the debug messages.
Commit: 6f659b0060d615435ceec53de407a8084656bc98
https://github.com/llvm/llvm-project/commit/6f659b0060d615435ceec53de407a8084656bc98
Author: Jan Voung <jvoung at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] For bugprone-unchecked-optional-access report range (#131055)
Report the range in diagnostics, in addition to the location
in case the range helps disambiguate a little in chained `->`
expressions.
```
b->a->f->x = 1;
^~~~~~~
```
instead of just:
```
b->a->f->x = 1;
^
```
As a followup we should probably also report the location/range
of an `->` if that operator is used. Like:
```
b->a->f->x = 1;
^~
```
Commit: e3ef5f2928f4077c48aebbddd288442d6ff76b62
https://github.com/llvm/llvm-project/commit/e3ef5f2928f4077c48aebbddd288442d6ff76b62
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
Log Message:
-----------
[HLSL] Add bounds checks for the HLSL `fmod` vector arguments and return types (#131035)
Fixes #131024.
- Fixes template for scalar and vector `fmod` intrinsic overloads
- Fixes `fmod` Sema test
Commit: 4ce1d1f1d90d19fb7094f2dcca3b46fef81c1e27
https://github.com/llvm/llvm-project/commit/4ce1d1f1d90d19fb7094f2dcca3b46fef81c1e27
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseSet.h
M llvm/unittests/ADT/DenseSetTest.cpp
Log Message:
-----------
[ADT] Add DenseSet::insert_range (#131567)
This pach adds DenseSet::insert_range, named after
std::map::insert_range from C++23. The intent is to allow a heavy
operation as the argument like:
Set.insert_range(Map[Key]);
Without insert_range, we would have to do:
Set.insert(Map[Key].begin(), Map[Key].end());
or:
auto &M = Map[Key];
Set.insert(M.begin(), M.end());
Neither is elegant.
Commit: 2e6402ca2c6c33ccf41d74383a8e3afb82489410
https://github.com/llvm/llvm-project/commit/2e6402ca2c6c33ccf41d74383a8e3afb82489410
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
Log Message:
-----------
[NFC] Add explicit initializer to PGOCtxProfReader's RootEntryCount
I found that on Clang versions before 11 we suppress the defaulted
constructor because RootEntryCount would not be initialized. This patch
adds an explicit initializer which should suppress this error.
Commit: 6dbe82f061bf494bc91ed458726c8080269f64f6
https://github.com/llvm/llvm-project/commit/6dbe82f061bf494bc91ed458726c8080269f64f6
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/BTF/BTFContext.h
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/PDB/PDBContext.h
M llvm/lib/DebugInfo/BTF/BTFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/PDB/PDBContext.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/unittests/DebugInfo/BTF/BTFParserTest.cpp
Log Message:
-----------
[NFC][DebugInfo] Wrap DILineInfo return type with std::optional to handle missing debug info. (#129792)
Currently, `DIContext::getLineInfoForAddress` and
`DIContext::getLineInfoForDataAddress` returns empty DILineInfo when the
debug info is missing for the given address. This is not differentiable
with the case when debug info is found for the given address but the
debug info is default value (filename:linenum is <invalid>:0).
This change wraps the return types of `DIContext::getLineInfoForAddress`
and `DIContext::getLineInfoForDataAddress` with `std::optional`.
Commit: 4336e5edbcc243a246c3cbcefef555f1d63db4cc
https://github.com/llvm/llvm-project/commit/4336e5edbcc243a246c3cbcefef555f1d63db4cc
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/extract-ordering.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/phi-result-use-order.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP] Sort PHIs by ExtractElements when relevant (#131229)
Considering the PHIs in order of element extracted can lead to better shuffles.
Commit: 0191307bb2583c95d6ee703588c3be1686101061
https://github.com/llvm/llvm-project/commit/0191307bb2583c95d6ee703588c3be1686101061
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Attributes.td
M llvm/test/CodeGen/NVPTX/param-overalign.ll
Log Message:
-----------
[IR] Allow alignstack attribute on return values (#130439)
The PTX target allows an alignment to be specified on both return values
and parameters to allow for more efficient vectorized stores. Currently
we represent these parameter alignments via the "alignstack" attribute,
but must fall back to metadata for the return value. This PR allows
"alignstack" on return values as well.
Commit: 74d4fc0a3ef0082145735eb727eeb67c768b8fb0
https://github.com/llvm/llvm-project/commit/74d4fc0a3ef0082145735eb727eeb67c768b8fb0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
Log Message:
-----------
[flang][cuda][NFC] Use ssa value for offset in shared memory op (#131661)
Switch from attribute to a value as we need to support dynamic offset
when multiple variables are used with dynamic shared memory.
Commit: 128f381650aa7f920495334acfb5f5270d34b978
https://github.com/llvm/llvm-project/commit/128f381650aa7f920495334acfb5f5270d34b978
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-array.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-composite.ll
Log Message:
-----------
[SPIR-V] Add `OpConstantCompositeContinuedINTEL` instruction (#129086)
Specification:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html
Commit: 887cf1f8cea240cd50fb80bc9487b22f67d74263
https://github.com/llvm/llvm-project/commit/887cf1f8cea240cd50fb80bc9487b22f67d74263
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
A llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Enable vector reductions (#131413)
- Enable llvm vector reductions for AMDGPU.
fixes https://github.com/llvm/llvm-project/issues/114816
Commit: 166937b49dac0919fae362c0deecb723b03be764
https://github.com/llvm/llvm-project/commit/166937b49dac0919fae362c0deecb723b03be764
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
Log Message:
-----------
[LV] Cleanup after expanding SCEV predicate to constant.
In some cases, SCEV isn't able to prove that no wrap checks are needed,
while constant folding in SCEVExpander can. In those cases, we may leave
around IR for computing the trip count, which is unused at this point
but may be re-used later, triggering an assertion when trying to clean
up SCEVExp after vectorization.
Directly run the cleaner after expanding to a constant predicate to
prevent any generated code from being re-used.
Fixes https://github.com/llvm/llvm-project/issues/131281.
Commit: 6d2b8285b3f5f4d8f2ce184aeb14e791400a726d
https://github.com/llvm/llvm-project/commit/6d2b8285b3f5f4d8f2ce184aeb14e791400a726d
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/functionalities/alias/TestBtAliasRepeat.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/TestDataFormatterLibcxxSpan.py
M lldb/test/API/functionalities/data-formatter/root-reference-children/TestRootReferenceChildren.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/source-manager/TestSourceManager.py
Log Message:
-----------
[lldb] Support ordered patterns in lldbtest.expect (#131475)
Change `lldbtest.expect` to require the regexes in `patterns` be found in order – when the
`ordered` parameter is true. This matches the behavior of `substrs`.
The `ordered` parameter is true by default, so this change also fixes tests by either
tweaking the patterns to work in order, or by setting `ordered=False`.
I have often wanted to test with `patterns` and also verify the order. This change
allows that.
Commit: c3f750250a9bec9b37198fb5d344d742e648e32d
https://github.com/llvm/llvm-project/commit/c3f750250a9bec9b37198fb5d344d742e648e32d
Author: Johannes de Fine Licht <johannes.definelicht at nextsilicon.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVM] Handle floats in Mem2Reg of memset intrinsics (#131621)
This was lacking a bitcast from the shifted integer type into a float.
Other non-struct types than integers and floats will still not be
Mem2Reg'ed.
Also adds special handling for constants to be emitted as a constant
directly rather than relying on followup canonicalization patterns
(`memset` of zero is a case that can appear in the wild).
Commit: 5b9006550d7766f07dd1129e0f369ed28f0a8edb
https://github.com/llvm/llvm-project/commit/5b9006550d7766f07dd1129e0f369ed28f0a8edb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libcxx/test/std/containers/sequences/vector/vector.modifiers/destroy_elements.pass.cpp
M libcxx/test/std/numerics/c.math/hermite.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.local/local_info.members.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.sys/sys_info.members.pass.cpp
Log Message:
-----------
[libc++][NFC] Fix incorrect main() signatures
Commit: ccf21094713e7a080a38f30144ea77b7cacf3064
https://github.com/llvm/llvm-project/commit/ccf21094713e7a080a38f30144ea77b7cacf3064
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/CodeGenOpenCL/kernel-attributes.cl
Log Message:
-----------
[Metadata] Change placeholder from `undef` to `poison` (#131469)
Replace `undef` constant metadata uses with `poison`.
Commit: 1b31646757777c8ef68932ac61084b4bd7af2bc1
https://github.com/llvm/llvm-project/commit/1b31646757777c8ef68932ac61084b4bd7af2bc1
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
Log Message:
-----------
[DFSan] Change placeholders from `undef` to `poison` (#131534)
Use `poison` to create dummy phi nodes instead of `undef`.
Commit: 5f866666a6fb8a1a976a286d2f845809a7108f05
https://github.com/llvm/llvm-project/commit/5f866666a6fb8a1a976a286d2f845809a7108f05
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/unary-expr-or-type-trait.cpp
A clang/test/CIR/CodeGen/unary.cpp
Log Message:
-----------
[CIR] Upstream initial support for unary op (#131369)
This adds support for the cir.unary plus, minus, inc, dec, and not operations for integer, floating point, and boolean types.
Commit: 5bf3f08cc9676ad2ec9b56013f5b3627ce43da7d
https://github.com/llvm/llvm-project/commit/5bf3f08cc9676ad2ec9b56013f5b3627ce43da7d
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlxe-vsxe.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlxe-vsxe.s
Log Message:
-----------
[RISCV] Update some of the RVV memory ops in SiFive P400 & P600 sched models (#129575)
This patch updates the latencies as well as occupancies of unit stride,
strided, and indexed load/store instructions in SiFive P400 & P600
scheduling models.
Commit: 584f8cc30554c89fdd27cc9e527416a6e4e2cc45
https://github.com/llvm/llvm-project/commit/584f8cc30554c89fdd27cc9e527416a6e4e2cc45
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-in-stable-dirs.c
A clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][DependencyScanning] Track modules that resolve from "stable" locations (#130634)
That patch tracks whether all the file & module dependencies of a module
resolve to a stable location. This information will later be queried by
build systems for determining where to store the accompanying pcms.
Commit: 541b8f2e14d495e250a0eefaac4b09ce0e27348f
https://github.com/llvm/llvm-project/commit/541b8f2e14d495e250a0eefaac4b09ce0e27348f
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/test/Driver/riscv-features.c
Log Message:
-----------
[clang][driver] Use rva22u64_v as the default march for Fuchsia targets (#131183)
Fuchsia supports RVA22 + Vector as outlined in https://fuchsia.dev/fuchsia-src/contribute/governance/rfcs/0234_riscv_abi_rva22+v?hl=en
Commit: c1fabd681fed3e024879f64f2e122e667778b9be
https://github.com/llvm/llvm-project/commit/c1fabd681fed3e024879f64f2e122e667778b9be
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx10.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx11.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx12.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx11.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
Log Message:
-----------
[llvm][AMDGPU] Enable FWD_PROGRESS bit for GFX10+ (#128367)
>From GFX10 onwards it is possible to employ benevolent scheduling of
waves. This patch unconditionally enables, for the `amdhsa` OS, the bit
which controls that capability, as it is beneficial for algorithms that
rely on more complex concurrent coordination and it is generally
performance neutral otherwise.
Commit: ad8f0e27606e337d08501a3085390817d8223c0e
https://github.com/llvm/llvm-project/commit/ad8f0e27606e337d08501a3085390817d8223c0e
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][DepScan] Pass references to ModuleDeps instead of ModuleID in lookupModuleOutput callbacks, NFCI (#131688)
This allows clients to reference more read-only attributes, like IsInStableDirectories.
Commit: e5ec7bb21b3043022f0e69808b28b863570a6aad
https://github.com/llvm/llvm-project/commit/e5ec7bb21b3043022f0e69808b28b863570a6aad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Set correct offsets for multiple variables in dynamic shared memory (#131674)
Commit: 94426df66a8d7c2321f9e197e5ef9636b0d5ce70
https://github.com/llvm/llvm-project/commit/94426df66a8d7c2321f9e197e5ef9636b0d5ce70
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M compiler-rt/test/profile/instrprof-darwin-exports.c
Log Message:
-----------
[compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425)
ld64 issues a warning about section alignment which was counted as an
unexpected exported symbol and the test failed.
Fixed by disabling all linker warnings using -Wl,-w.
Commit: 092e25571c09d377d2dde835cf38c5698decadad
https://github.com/llvm/llvm-project/commit/092e25571c09d377d2dde835cf38c5698decadad
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
Log Message:
-----------
AMDGPU: Add REQUIRES: asserts to machine pass violation test
We should promote this to a proper error and not llvm_unreachable
Commit: a2fbc9a8e3d3822cea6f14299285ff0a440d1bf3
https://github.com/llvm/llvm-project/commit/a2fbc9a8e3d3822cea6f14299285ff0a440d1bf3
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/lib/Target/DirectX/DXILLegalizePass.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
A llvm/test/CodeGen/DirectX/legalize-i64-extract-insert-elements.ll
A llvm/test/CodeGen/DirectX/legalize-i8.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalarize-two-calls.ll
Log Message:
-----------
[DirectX] Start the creation of a DXIL Instruction legalizer (#131221)
- Legalize i8 truncation back to original types
- remove sext and truncs
- Legalize i64 indicies for insert\extract elements to i32 indicies
- fixes https://github.com/llvm/llvm-project/issues/126323
- fixes https://github.com/llvm/llvm-project/issues/129757
Commit: cb1d640b037b068b42bcf851cdb4b2b85e378746
https://github.com/llvm/llvm-project/commit/cb1d640b037b068b42bcf851cdb4b2b85e378746
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
Log Message:
-----------
[clang][DepScan] resolve dangling reference to lambda that goes out of
scope.
Fixes buildbots.
Commit: 50f8adb5c018d993a4d8de69970a0b627b7f2258
https://github.com/llvm/llvm-project/commit/50f8adb5c018d993a4d8de69970a0b627b7f2258
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/test/MC/RISCV/rvv/aliases.s
Log Message:
-----------
[RISCV] Accept '0(reg)' in addition to '(reg)' ifor vl1r.v/vl2r.v/vl4r.v/vl8r.v
This matches vl1re8.v, vl2re8.v, vl4re8.v, vl8re8.v.
Commit: d1156fcb56891fb1a426c3e8331a51d47f98a1b8
https://github.com/llvm/llvm-project/commit/d1156fcb56891fb1a426c3e8331a51d47f98a1b8
Author: Alexander Kornienko <alexfh at google.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/locale
M libcxx/include/module.modulemap
R libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
Log Message:
-----------
Revert "[libc++] Optimize num_put integral functions" (#131613)
Reverts llvm/llvm-project#120859
This change breaks formatting of `0` with `std::showbase` + `std::hex`
or `std::oct`, as well as `+0` with `std::showpos`. I believe the new
behavior is violating the standard. See
https://github.com/llvm/llvm-project/pull/120859#issuecomment-2723970242
and later comments for details and explanation.
Commit: d9c65af62654edfdc1e4ff5589428916e4759302
https://github.com/llvm/llvm-project/commit/d9c65af62654edfdc1e4ff5589428916e4759302
Author: William Moses <gh at wsmoses.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[MLIR][GPUToNVVM] Support 32-bit isfinite (#131699)
Co-authored-by: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Commit: 745e16753fc154ac1601ebaf0ebbcdbfd380b948
https://github.com/llvm/llvm-project/commit/745e16753fc154ac1601ebaf0ebbcdbfd380b948
Author: Nikolay Panchenko <nicholas.panchenko at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/Support/JSON.h
M llvm/lib/Support/JSON.cpp
Log Message:
-----------
[JSON][NFC] Move print method out of NDEBUG || DUMP (#131639)
Commit: 4cb1430c1cc6c6c3ecfb092d3228dd1420332a33
https://github.com/llvm/llvm-project/commit/4cb1430c1cc6c6c3ecfb092d3228dd1420332a33
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][spirv] Fix a crash in `spirv::ISubOp::fold` (#131570)
This PR fixes a crash if `spirv.ISub` is not integer type. Fixes
#131283.
Commit: a5107be0317af73a978431e9448f846974c51fca
https://github.com/llvm/llvm-project/commit/a5107be0317af73a978431e9448f846974c51fca
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
[NFC][AMDGPU][GlobalISel] Make LLTs constexpr (#131673)
- static const -> constexpr
Commit: 00cad3ed228005fa059c23c55bd35f042b624bf1
https://github.com/llvm/llvm-project/commit/00cad3ed228005fa059c23c55bd35f042b624bf1
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
Log Message:
-----------
[SDAG] Handle extract_subvector in isKnownNeverNaN (#131581)
Propagate nnan across extract_subvector.
Commit: ed19620b8c93f27f322b2f40136e5bd428827e00
https://github.com/llvm/llvm-project/commit/ed19620b8c93f27f322b2f40136e5bd428827e00
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Make VPReductionRecipe a VPRecipeWithIRFlags. NFC (#130881)
This patch change the parent of the VPReductionRecipe from
VPSingleDefRecipe to VPRecipeWithIRFlags and also print/get/drop/control
flags by the VPRecipeWithIRFlags. This will remove the dependency of the
underlying instruction.
This patch also add a new function `setFastMathFlags()` to the
VPRecipeWithIRFlags because the entire reduction chain may contains
multiple instructions. And the underlying instruction may not contains
the corresponding flags for this reduction.
Split from #113903.
Commit: 297f6d9f6b215bd7f58cf500b979b94dedbba7bb
https://github.com/llvm/llvm-project/commit/297f6d9f6b215bd7f58cf500b979b94dedbba7bb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Fix check for _LIBCPP_HAS_NO_WIDE_CHARACTERS in features.py (#131675)
The patch that added the new locale Lit features was created before we
switched to a 0-1 macro for _LIBCPP_HAS_WIDE_CHARACTERS, leading to that
patch referring to the obsolete _LIBCPP_HAS_NO_WIDE_CHARACTERS macro
that is never defined nowadays.
Commit: 3c4b9317916ccd2e18c30b1540589518a4c7c88a
https://github.com/llvm/llvm-project/commit/3c4b9317916ccd2e18c30b1540589518a4c7c88a
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
Rename RISCVMCExpr::VK_RISCV_ to VK_. NFC
They implement relocation operators and are named VK_RISCV_ probably to
avoid confusion with `MCSymbolRefExpr::VariantKind`.
`MCSymbolRefExpr::VariantKind` is discouraged
(https://discourse.llvm.org/t/error-expected-relocatable-expression-with-mctargetexpr/84926/2)
and targets are migrating away from `MCSymbolRefExpr::VariantKind`.
Therefore, there is no need to make the name long in the presence of the
clear `RISCVMCExpr::` prefix.
Pull Request: https://github.com/llvm/llvm-project/pull/131489
Commit: bedb47c8acc7d97c6dafe76e4b9cf245df01f87a
https://github.com/llvm/llvm-project/commit/bedb47c8acc7d97c6dafe76e4b9cf245df01f87a
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/AArch64/test-indirect-branch.s
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.h
M clang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
M clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/capturing-this-in-member-variable.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/capturing-this-in-member-variable.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/developer-docs.rst
A clang/docs/analyzer/developer-docs/Statistics.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugType.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/include/clang/Support/Compiler.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/FrontendTool/CMakeLists.txt
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/hlsl.h
A clang/lib/Headers/hlsl/hlsl_compat_overloads.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/Checker.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
A clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/WorkList.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/analyzer-config.c
A clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
A clang/test/Analysis/csv2json.py
A clang/test/Analysis/fixed-address-notes.c
M clang/test/CIR/CodeGen/unary-expr-or-type-trait.cpp
A clang/test/CIR/CodeGen/unary.cpp
A clang/test/ClangScanDeps/modules-in-stable-dirs.c
A clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
A clang/test/CodeCompletion/if-const.cpp
M clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
A clang/test/CodeGenCXX/gnu-asm-constexpr.cpp
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenOpenCL/kernel-attributes.cl
M clang/test/Driver/riscv-features.c
A clang/test/Modules/pr121245.cpp
A clang/test/Modules/pr129982.cpp
M clang/test/Parser/asm.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
A clang/test/SemaCXX/gnu-asm-constexpr.cpp
M clang/test/SemaCXX/unique_object_duplication.h
A clang/test/SemaCXX/unnecessary-virtual-specifier.cpp
A clang/test/SemaHLSL/BuiltIns/clamp-errors-16bit.hlsl
M clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaOpenCL/invalid-kernel-attrs.cl
M clang/test/lit.cfg.py
M clang/tools/clang-format/git-clang-format
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
A cmake/Modules/FindLibcCommonUtils.cmake
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/test/profile/instrprof-darwin-exports.c
M flang-rt/cmake/modules/GetToolchainDirs.cmake
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
A flang/test/Lower/CUDA/cuda-shared.cuf
M flang/test/Semantics/OpenMP/metadirective-common.f90
A flang/test/Semantics/OpenMP/test_taskloop_lastprivate_semantic_restrictions.f90
A flang/test/Semantics/OpenMP/test_taskloop_reduction_semantic_restrictions.f90
M libc/docs/CMakeLists.txt
M libc/docs/getting_started.rst
M libc/docs/headers/index.rst
M libc/docs/index.rst
A libc/docs/uefi/building.rst
A libc/docs/uefi/index.rst
A libc/docs/uefi/support.rst
A libc/docs/uefi/testing.rst
A libc/docs/uefi/using.rst
A libc/utils/docgen/glob.yaml
M libclc/CMakeLists.txt
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/test/benchmarks/GenerateInput.h
R libcxx/test/benchmarks/algorithms/fill.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/fill.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/fill_n.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/generate.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/generate_n.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/move.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/move_backward.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/remove.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/remove_copy.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/replace.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/reverse.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/reverse_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/rotate.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/rotate_copy.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/sample.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shift_left.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shift_right.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/shuffle.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/swap_ranges.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/transform.binary.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/transform.unary.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/unique.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/unique_copy.bench.cpp
R libcxx/test/benchmarks/algorithms/move.bench.cpp
R libcxx/test/benchmarks/algorithms/move_backward.bench.cpp
R libcxx/test/benchmarks/algorithms/reverse.bench.cpp
R libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/std/containers/sequences/vector/vector.modifiers/destroy_elements.pass.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
M libcxx/test/std/numerics/c.math/hermite.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.local/local_info.members.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.sys/sys_info.members.pass.cpp
M libcxx/utils/libcxx/test/features.py
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
M lldb/test/API/functionalities/alias/TestBtAliasRepeat.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/TestDataFormatterLibcxxSpan.py
M lldb/test/API/functionalities/data-formatter/root-reference-children/TestRootReferenceChildren.py
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
R lldb/tools/lldb-dap/Protocol.cpp
R lldb/tools/lldb-dap/Protocol.h
A lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolBase.h
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
R llvm/cmake/modules/FindLibcCommonUtils.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CIBestPractices.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/DenseSet.h
M llvm/include/llvm/ADT/SCCIterator.h
M llvm/include/llvm/ADT/STLExtras.h
A llvm/include/llvm/CodeGen/FEntryInserter.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/DebugInfo/BTF/BTFContext.h
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/PDB/PDBContext.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/MachineDebugify.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/DebugInfo/BTF/BTFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/PDB/PDBContext.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Support/JSON.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
A llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/lib/Target/DirectX/DXILLegalizePass.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVAsmBackend.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86VZeroUpper.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
R llvm/test/CodeGen/AArch64/arm64-vclz.ll
R llvm/test/CodeGen/AArch64/arm64-vpopcnt.ll
A llvm/test/CodeGen/AArch64/ctlz.ll
A llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
R llvm/test/CodeGen/AArch64/vec_cttz.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
A llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
A llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
A llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/RawBufferLoad.ll
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
M llvm/test/CodeGen/DirectX/cross.ll
A llvm/test/CodeGen/DirectX/legalize-i64-extract-insert-elements.ll
A llvm/test/CodeGen/DirectX/legalize-i8.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalarize-two-calls.ll
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue128714.mir
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/NVPTX/param-overalign.ll
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-array.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-constant-composite.ll
A llvm/test/CodeGen/X86/combine-fma-negate.ll
A llvm/test/CodeGen/X86/fentry.mir
M llvm/test/CodeGen/X86/nocf_check.ll
A llvm/test/CodeGen/X86/pr131389.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds_alias.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx10.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx11.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx12.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/RISCV/rvv/aliases.s
M llvm/test/TableGen/x86-fold-tables.inc
A llvm/test/Transforms/LoopUnroll/pr131465.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
A llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
A llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
A llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory.ll
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/extract-ordering.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/phi-result-use-order.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
A llvm/test/Transforms/SLPVectorizer/X86/empty-vectorizable-tree.ll
M llvm/test/tools/llc/new-pm/option-conflict.ll
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlxe-vsxe.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlxe-vsxe.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx11.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/unittests/ADT/DenseSetTest.cpp
M llvm/unittests/ADT/STLExtrasTest.cpp
M llvm/unittests/DebugInfo/BTF/BTFParserTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M mlir/include/mlir-c/AffineExpr.h
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/CAPI/IR/AffineExpr.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/Linalg/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/Shape/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/lib/Analysis/TestCFGLoopInfo.cpp
M mlir/test/python/ir/affine_expr.py
M openmp/runtime/src/kmp_sched.cpp
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
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Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/43d89bb6f3d3...bedb47c8acc7
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