[all-commits] [llvm/llvm-project] 50f8ad: [RISCV] Accept '0(reg)' in addition to '(reg)' ifo...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50f8adb5c018d993a4d8de69970a0b627b7f2258
      https://github.com/llvm/llvm-project/commit/50f8adb5c018d993a4d8de69970a0b627b7f2258
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-03-17 (Mon, 17 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/test/MC/RISCV/rvv/aliases.s

  Log Message:
  -----------
  [RISCV] Accept '0(reg)' in addition to '(reg)' ifor vl1r.v/vl2r.v/vl4r.v/vl8r.v

This matches vl1re8.v, vl2re8.v, vl4re8.v, vl8re8.v.



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