[all-commits] [llvm/llvm-project] 4e453d: [flang][OpenMP] Accept old FLUSH syntax in METADIR...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Mar 17 11:48:21 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/lvfiximprove-max-safe-distance-analysis
Home: https://github.com/llvm/llvm-project
Commit: 4e453d52920b1808321ec9bca28f5161165d12ee
https://github.com/llvm/llvm-project/commit/4e453d52920b1808321ec9bca28f5161165d12ee
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
A flang/test/Parser/OpenMP/metadirective-flush.f90
Log Message:
-----------
[flang][OpenMP] Accept old FLUSH syntax in METADIRECTIVE (#130122)
Accommodate it in OmpDirectiveSpecification, which may become the
primary component of the actual FLUSH construct in the future.
Commit: dffbc030e75b758e7512518abd499a0f680addbf
https://github.com/llvm/llvm-project/commit/dffbc030e75b758e7512518abd499a0f680addbf
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
M llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir
M llvm/test/CodeGen/RISCV/sextw-removal.ll
Log Message:
-----------
[MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (#129889)
This change removes 189 static instances of no-op reg-reg moves (i.e.
where src == dest) across llvm-test-suite when compiled for RISC-V
rv64gc and with SPEC included.
Commit: 754eeeaef1c9980c31e4e654d568d88a19802475
https://github.com/llvm/llvm-project/commit/754eeeaef1c9980c31e4e654d568d88a19802475
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 0d2c55cb9682
Commit: 6b3bb44227fc4d66d1a304b32566ea9263799921
https://github.com/llvm/llvm-project/commit/6b3bb44227fc4d66d1a304b32566ea9263799921
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pmadd.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert PSHUFB/PSADBW/VPMADDUBSW/VPMADDUBSW concatenation to use combineConcatVectorOps recursion (#130592)
Only concatenate nodes if at least one operand is beneficial to concatenate
Commit: cac6d431d00b054a2f1ed4d7638c1857c269c1d5
https://github.com/llvm/llvm-project/commit/cac6d431d00b054a2f1ed4d7638c1857c269c1d5
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/test/CodeGenCXX/cxx23-p2280r4.cpp
Log Message:
-----------
[clang][test] Don't require specific alignment in test case (#130589)
https://github.com/llvm/llvm-project/pull/129952 /
42d49a77241df73a17cb442973702fc460e7fb90 added this test which is
failing on 32-bit ARM because the alignment chosen is 4 not 8. Which
would make sense if this is a 32/64 bit difference
https://lab.llvm.org/buildbot/#/builders/154/builds/13059
```
<stdin>:34:30: note: scanning from here
define dso_local void @_Z1fv(ptr dead_on_unwind noalias writable sret(%struct.B) align 4 %agg.result) #0 {
^
<stdin>:38:2: note: possible intended match here
%0 = load ptr, ptr @x, align 4
^
```
The other test does not check alignment, so I'm assuming that it is not
important here.
Commit: 9d37e61fc77d3d6de891c30630f1c0227522031d
https://github.com/llvm/llvm-project/commit/9d37e61fc77d3d6de891c30630f1c0227522031d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-phi-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/addsub.ll
Log Message:
-----------
[SLP]Reduce number of alternate instruction, where possible
Previous version was reviewed here https://github.com/llvm/llvm-project/pull/123360
It is mostly the same, adjusted after graph-to-tree transformation
Patch tries to remove wide alternate operations.
Currently SLP vectorizer emits something like this:
```
%0 = add i32
%1 = sub i32
%2 = add i32
%3 = sub i32
%4 = add i32
%5 = sub i32
%6 = add i32
%7 = sub i32
transformes to
%v1 = add <8 x i32>
%v2 = sub <8 x i32>
%res = shuffle %v1, %v2, <0, 9, 2, 11, 4, 13, 6, 15>
```
i.e. half of the results are just unused. This leads to increased
register pressure and potentially doubles number of operations.
Patch introduces SplitVectorize mode, where it splits the operations by
opcodes and produces instead something like this:
```
%v1 = add <4 x i32>
%v2 = sub <4 x i32>
%res = shuffle %v1, %v2, <0, 4, 1, 5, 2, 6, 3, 7>
```
It allows to improve the performance by reducing number of ops. Also, it
turns on some other improvements, like improved graph reordering.
-O3+LTO, AVX512
Metric: size..text
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2788.00 2820.00 1.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 278168.00 280904.00 1.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 82682.00 83258.00 0.7%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 139344.00 139712.00 0.3%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 27149.00 27197.00 0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1008188.00 1009948.00 0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39226.00 39290.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39229.00 39293.00 0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 798440.00 798952.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 44123.00 44139.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 318942.00 319038.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1159880.00 1160152.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 73595.00 73611.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1146124.00 1146348.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 203831.00 203847.00 0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 207662.00 207678.00 0.0%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 589851.00 589883.00 0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2050990.00 2051006.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12559687.00 12559591.00 -0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3074157.00 3074125.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1092252.00 1092188.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 779763.00 779715.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 253517.00 253485.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 848259.00 848035.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93064.00 93016.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 383747.00 383475.00 -0.1%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 673051.00 662907.00 -1.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 673051.00 662907.00 -1.5%
Olden/tsp - small variations
Prolangs-C/TimberWolfMC - small variations, some code not inlined
FreeBench/pifft - extra store <8 x double> vectorized, some other extra
vectorizations
CFP2006/433.milc - better vector code
FreeBench/fourinarow - better vector code
Benchmarks/tramp3d-v4 - extra vector code, small variations
mediabench/gsm/toast - small variations
MiBench/telecomm-gsm - small variations
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - better vector code, small variations
CINT2006/464.h264ref - some smaller code + changes similar to x264
DOE-ProxyApps-C/miniGMG - small variations
Benchmarks/Bullet - small variations
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/miniAMR - small variations
CFP2006/453.povray - small variations
DOE-ProxyApps-C++/CLAMR - small variations
MiBench/consumer-lame - small variations
CFP2006/447.dealII - small variations
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - small variations
CFP2017rate/510.parest_r - better vector code, small variations
CFP2017rate/526.blender_r - small variations
CINT2006/403.gcc - small variations
CINT2006/400.perlbench - small variations
CFP2017rate/508.namd_r - small variations
ASCI_Purple/SMG2000 - small variations
JM/lencod - extra store <16 x i32>, small variations
DOE-ProxyApps-C++/miniFE - small variations
JM/ldecod - extra vector code, small variations, less shuffles
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - the number of instructions increased, but
looks like they are more performant. E.g., for function
x264_pixel_satd_8x8, llvm-mca reports better throughput - 84 for the
current version and 59 for the new version.
-O3+LTO, mcpu=sifive-p470
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 580768.00 581118.00 0.1%
test-suite :: MultiSource/Applications/d/make_dparser.test 78854.00 78894.00 0.1%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 633448.00 633750.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 277002.00 277080.00 0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 931938.00 931960.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 2512806.00 2512822.00 0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1602448.00 1602434.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9496664.00 9496542.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 147424.00 147422.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 1764608.00 1764578.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 1764608.00 1764578.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 841656.00 841632.00 -0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 949026.00 948962.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 946348.00 946284.00 -0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 279794.00 279764.00 -0.0%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4776.00 4772.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 29336.00 29184.00 -0.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 535390.00 510124.00 -4.7%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 535390.00 510124.00 -4.7%
test-suite :: SingleSource/Regression/C/gcc-c-torture/execute/ieee/GCC-C-execute-ieee-pr50310.test 886.00 608.00 -31.4%
CINT2006/464.h264ref - extra v16i32 reduction
d/make_dparser - better vector code
JM/lencod - extra v16i32 reduction
Benchmarks/Bullet - smaller vector code
CINT2006/400.perlbench - better vector code
CINT2006/403.gcc - small variations
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - small variations
CFP2017rate/510.parest_r - small variations
CFP2017rate/526.blender_r - small variations
MiBench/consumer-lame - small variations
CINT2017speed/600.perlbench_s
CINT2017rate/500.perlbench_r - small variations
Benchmarks/7zip - small variations
CFP2017rate/511.povray_r - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - extra vector code
mediabench/gsm - extra vector code
MiBench/telecomm-gsm - extra vector code
DOE-ProxyApps-C/miniGMG - extra vector code
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - reduced number of wide operations and
shuffles, saving the registers, similar to X86, extra code in
pixel_hadamard_ac vectorized
ieee/GCC-C-execute-ieee-pr50310 - extra code vectorized
CINT2006/464.h264ref - extra vector code in find_sad_16x16
JM/lencod - extra vector code in find_sad_16x16
d/make_dparser - smaller vector code
Benchmarks/Bullet - small variations
CINT2006/400.perlbench - smaller vector code
CFP2017rate/526.blender_r - small variations, extra store <8 x float> in
the loop, extra store <8 x i8> in loop
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - small variations
MiBench/consumer-lame - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - small variations
Reviewers: hiraditya
Reviewed By: hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/128907
Commit: f059e58702161bb22b457476f2e5c9faa2386226
https://github.com/llvm/llvm-project/commit/f059e58702161bb22b457476f2e5c9faa2386226
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libcxx/include/future
R libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
Revert "[libc++] Don't try to wait on a thread that hasn't started in std::async (#125433)"
This reverts commit 11766a40972f5cc853e296231e5d90ca3c886cc1.
Commit: c35092c7f1b3f190e88c3dd70056a1596a3a8fc6
https://github.com/llvm/llvm-project/commit/c35092c7f1b3f190e88c3dd70056a1596a3a8fc6
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-thread-pointer.c
Log Message:
-----------
[ARM] Fix HW thread pointer functionality (#130027)
- Separate check for hardware support of TLS register from check for support of Thumb2 encoding
- Base decision to auto enable TLS on both hardware support and Thumb2 encoding support
- Fix HW support check to correctly exclude M-Profile and include ARMV6K variants
reference:https://reviews.llvm.org/D114116
Commit: a619f3111eb4492a8e074cf7a714f66431d643c0
https://github.com/llvm/llvm-project/commit/a619f3111eb4492a8e074cf7a714f66431d643c0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - add missing VT/Subtarget checks for MOV*DUP concatenation folds.
Commit: 919d293176fb841dcae4a850b70a09c1307f7d59
https://github.com/llvm/llvm-project/commit/919d293176fb841dcae4a850b70a09c1307f7d59
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/UsersManual.rst
M clang/lib/Driver/ToolChains/SPIRV.cpp
M clang/lib/Driver/ToolChains/SPIRV.h
M clang/test/Driver/spirv-openmp-toolchain.c
M clang/test/Driver/spirv-toolchain.cl
Log Message:
-----------
[clang][SPIR-V] Use the SPIR-V backend by default (#129545)
The SPIR-V backend is now a supported backend, and we believe it is
ready to be used by default in Clang over the SPIR-V translator.
Some IR generated by Clang today, such as those requiring SPIR-V target
address spaces, cannot be compiled by the translator for reasons in this
[RFC](https://discourse.llvm.org/t/rfc-the-spir-v-backend-should-change-its-address-space-mappings/82640),
so we expect even more programs to work as well.
Enable it by default, but keep some of the code as it is still called by
the HIP toolchain directly.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 3a41c7b483c69256d3cf64dabdaf2353187593b1
https://github.com/llvm/llvm-project/commit/3a41c7b483c69256d3cf64dabdaf2353187593b1
Author: Omair Javaid <omair.javaid at linaro.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M openmp/runtime/test/lit.cfg
M openmp/runtime/test/lit.site.cfg.in
M openmp/runtime/test/transform/interchange/iterfor.cpp
M openmp/runtime/test/transform/tile/iterfor.cpp
M openmp/runtime/test/worksharing/for/omp_for_collapse_LowerTriangularLess.c
M openmp/runtime/test/worksharing/for/omp_for_collapse_LowerTriangularLessEqual.c
M openmp/runtime/test/worksharing/for/omp_for_collapse_UpperTriangular.c
Log Message:
-----------
[OpenMP] Mark Failing OpenMP Tests as XFAIL on Windows (#129040)
This patch marks specific OpenMP runtime tests as XFAIL on Windows due
to failures reported in #129023
Commit: aaa1adc39886cc21c9dc637a9a6667baa5aff94f
https://github.com/llvm/llvm-project/commit/aaa1adc39886cc21c9dc637a9a6667baa5aff94f
Author: A2uria <a2uria at qq.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lld/COFF/Options.td
Log Message:
-----------
[LLD][COFF] Add /noexp for link.exe compatibility (#128814)
See #107346
Commit: 8885b5c0626065274cb8f8a634d45779a0f6ff2b
https://github.com/llvm/llvm-project/commit/8885b5c0626065274cb8f8a634d45779a0f6ff2b
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Fix bazel build after f3dcc0fe228f6a1a69147ead0a76ce0fe02d316d
Commit: 967ab7e08e62a35cc65f34e21fbeb00abf3eb83f
https://github.com/llvm/llvm-project/commit/967ab7e08e62a35cc65f34e21fbeb00abf3eb83f
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
[mlir][TOSA] Fix linalg lowering of depthwise conv2d (#130293)
Current lowering for tosa.depthwise_conv2d assumes if both zero points
are zero then it's a floating-point operation by hardcoding the use of a
arith.addf in the lowered code. Fix code to check for the element type
to decide what add operation to use.
Commit: 8a8f1359ee1d47d85c5fb4d23587845baecd59c9
https://github.com/llvm/llvm-project/commit/8a8f1359ee1d47d85c5fb4d23587845baecd59c9
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/routine-construct-ast.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'bind' ast/sema for 'routine' directive
The 'bind' clause allows the renaming of a function during code
generation. There are a few rules about when this can/cannot happen,
and it takes either a string or identifier (previously mis-implemetned
as ID-expression) argument.
Note there are additional rules to this in the implicit-function routine
case, but that isn't implemented in this patch, as implicit-function
routine is not yet implemented either.
Commit: cf6a520a7a48aa82274084f0d4487381f9013fd3
https://github.com/llvm/llvm-project/commit/cf6a520a7a48aa82274084f0d4487381f9013fd3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/test/AST/ByteCode/libcxx/memcmp-pointer.cpp
Log Message:
-----------
[clang][bytecode] Fix builtin_memcmp buffer sizes for pointers (#130570)
Don't use the pointer size, but the number of elements multiplied by the
element size.
Commit: 83936f543766a74d7725df6661808d75b3f36554
https://github.com/llvm/llvm-project/commit/83936f543766a74d7725df6661808d75b3f36554
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx23Papers.csv
Log Message:
-----------
[libc++][docs] Remove mis-added entry for P2513R4 (#130581)
P2513R4 neither touched library wording nor required library
implementation to change. So it was probably a mistake to list it in
libc++'s implementation status table.
Commit: 1f05703176d43a339b41a474f51c0e8b1a83c9bb
https://github.com/llvm/llvm-project/commit/1f05703176d43a339b41a474f51c0e8b1a83c9bb
Author: Benson Chu <bensonchu457 at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/arm-interrupt-save-fp-attr-status-regs.c
A clang/test/CodeGen/arm-interrupt-save-fp-attr.c
M clang/test/Sema/arm-interrupt-attr.c
A clang/test/Sema/arm-interrupt-save-fp-attr.c
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMCallingConv.td
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMRegisterInfo.td
A llvm/test/CodeGen/ARM/interrupt-save-fp-attr-status-regs.mir
A llvm/test/CodeGen/ARM/interrupt-save-fp-attr.ll
Log Message:
-----------
[ARM][Thumb] Save FPSCR + FPEXC for save-vfp attribute
FPSCR and FPEXC will be stored in FPStatusRegs, after GPRCS2 has been
saved.
- GPRCS1
- GPRCS2
- FPStatusRegs (new)
- DPRCS
- GPRCS3
- DPRCS2
FPSCR is present on all targets with a VFP, but the FPEXC register is
not present on Cortex-M devices, so different amounts of bytes are
being pushed onto the stack depending on our target, which would
affect alignment for subsequent saves.
DPRCS1 will sum up all previous bytes that were saved, and will emit
extra instructions to ensure that its alignment is correct. My
assumption is that if DPRCS1 is able to correct its alignment to be
correct, then all subsequent saves will also have correct alignment.
Avoid annotating the saving of FPSCR and FPEXC for functions marked
with the interrupt_save_fp attribute, even though this is done as part
of frame setup. Since these are status registers, there really is no
viable way of annotating this. Since these aren't GPRs or DPRs, they
can't be used with .save or .vsave directives. Instead, just record
that the intermediate registers r4 and r5 are saved to the stack
again.
Co-authored-by: Jake Vossen <jake at vossen.dev>
Co-authored-by: Alan Phipps <a-phipps at ti.com>
Commit: 3b3356043cb42e2365dcfa6a6e52b00ce7fbde61
https://github.com/llvm/llvm-project/commit/3b3356043cb42e2365dcfa6a6e52b00ce7fbde61
Author: Benson Chu <bensonchu457 at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
R clang/test/CodeGen/arm-interrupt-save-fp-attr-status-regs.c
R clang/test/CodeGen/arm-interrupt-save-fp-attr.c
M clang/test/Sema/arm-interrupt-attr.c
R clang/test/Sema/arm-interrupt-save-fp-attr.c
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMCallingConv.td
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMRegisterInfo.td
R llvm/test/CodeGen/ARM/interrupt-save-fp-attr-status-regs.mir
R llvm/test/CodeGen/ARM/interrupt-save-fp-attr.ll
Log Message:
-----------
Revert "[ARM][Thumb] Save FPSCR + FPEXC for save-vfp attribute"
This reverts commit 1f05703176d43a339b41a474f51c0e8b1a83c9bb.
Commit: 39cf545756b358d02d9b828e5c51ebcb8ed6d19e
https://github.com/llvm/llvm-project/commit/39cf545756b358d02d9b828e5c51ebcb8ed6d19e
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/test/Driver/HLSL/metal-converter.hlsl
M clang/test/Driver/dxc_dxv_path.hlsl
Log Message:
-----------
[HLSL][Driver] Use temporary files correctly (#130436)
This updates the DXV and Metal Converter actions to properly use
temporary files created by the driver. I've abstracted away a check to
determine if an action is the last in the sequence because we may have
between 1 and 3 actions depending on the arguments and environment.
Commit: 81ca350b295c874d77c33c612da7979843b68a3e
https://github.com/llvm/llvm-project/commit/81ca350b295c874d77c33c612da7979843b68a3e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
Log Message:
-----------
AMDGPU: Rename variable from undef to poison (#130460)
Commit: 2bada417c1f06361f4b7a992224bfb8e32d55ca6
https://github.com/llvm/llvm-project/commit/2bada417c1f06361f4b7a992224bfb8e32d55ca6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
M llvm/test/Transforms/StructurizeCFG/interleaved-loop-order.ll
M llvm/test/Transforms/StructurizeCFG/loop-break-phi.ll
M llvm/test/Transforms/StructurizeCFG/loop-continue-phi.ll
M llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
M llvm/test/Transforms/StructurizeCFG/structurizer-keep-perf-md.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
M llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
Log Message:
-----------
StructurizeCFG: Use poison instead of undef (#130459)
There are a surprising number of codegen changes from this.
Commit: c40f0fe4348bb9304b95bd317665bf1cb2bdcc85
https://github.com/llvm/llvm-project/commit/c40f0fe4348bb9304b95bd317665bf1cb2bdcc85
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/aix-builtin-mapping.c
M clang/test/CodeGen/builtin-attributes.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGen/math-libcalls.c
Log Message:
-----------
Revert "Reland "[clang] Lower modf builtin using `llvm.modf` intrinsic" (#129885)"
This broke modff calls on 32-bit x86 Windows. See comment on the PR.
> This updates the existing modf[f|l] builtin to be lowered via the
> llvm.modf.* intrinsic (rather than directly to a library call).
>
> The legalization issues exposed by the original PR (#126750) should have
> been fixed in #128055 and #129264.
This reverts commit cd1d9a8fab05524a27ffdb251f6def37786b5cc1.
Commit: 257e48371546f75623482071fc39eef4b64fbd88
https://github.com/llvm/llvm-project/commit/257e48371546f75623482071fc39eef4b64fbd88
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/big_int.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/quick_sort.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FModTest.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/bcopy_test.cpp
Log Message:
-----------
[libc] Add `-Wno-sign-conversion` & re-attempt `-Wconversion` (#129811)
Relates to
https://github.com/llvm/llvm-project/issues/119281#issuecomment-2699470459
Commit: 0cc8a63d0c7acd1903aab3e9c802785b07199b4c
https://github.com/llvm/llvm-project/commit/0cc8a63d0c7acd1903aab3e9c802785b07199b4c
Author: NewSigma <46043910+NewSigma at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCoroutine.cpp
R clang/test/SemaCXX/coroutine-decltype.cpp
A clang/test/SemaCXX/coroutine-unevaluate.cpp
Log Message:
-----------
Forbid co_await and co_yield in invalid expr contexts (#130455)
Fix #78426
C++26 introduced braced initializer lists as template arguments.
However, such contexts should be considered invalid for co_await and
co_yield. This commit explicitly rules out the possibility of using
these exprs in template arguments.
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 21ff15fa1a4b9abf1c8182a1a465923bdae517a5
https://github.com/llvm/llvm-project/commit/21ff15fa1a4b9abf1c8182a1a465923bdae517a5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test cases showing its not always beneficial to fold concat(add/mul(),add/mul()) -> add/mul(concat(),concat())
Commit: e9b2eddd5be753e72010da8a4333df8195e1641c
https://github.com/llvm/llvm-project/commit/e9b2eddd5be753e72010da8a4333df8195e1641c
Author: Ebuka Ezike <57949090+da-viper at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/source/API/SBLineEntry.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBLineEntryTest.cpp
Log Message:
-----------
[lldb] fix set SBLineEntryColumn (#130435)
Calling the public API `SBLineEntry::SetColumn()` sets the row instead
of the column.
This probably should be backported as it has been since version 3.4.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 7770d8f2256ba051296fe659b62145ef53027c5a
https://github.com/llvm/llvm-project/commit/7770d8f2256ba051296fe659b62145ef53027c5a
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/IteratorTest.cpp
Log Message:
-----------
[ADT] Use `adl_begin`/`adl_end` in `make_filter_range` (#130512)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of https://github.com/llvm/llvm-project/pull/87936 but
reverted due to buildbot failures.
Also fix potential issue with double-move on the input range.
Commit: ef407df695a28c21b412e4f703b250891df92821
https://github.com/llvm/llvm-project/commit/ef407df695a28c21b412e4f703b250891df92821
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
Log Message:
-----------
[Libc] Turn implicit to explicit conversion (#130615)
This fixes a build issue on the AMDGPU libc bot after
https://github.com/llvm/llvm-project/pull/126846 landed that introduced
a warning.
---------
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 338211929ce8626aa31b542e79cb5eb7722d0aa4
https://github.com/llvm/llvm-project/commit/338211929ce8626aa31b542e79cb5eb7722d0aa4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert ADD/SUB/MUL concatenation to use combineConcatVectorOps recursion
Only concatenate ADD/SUB/MUL nodes if at least one operand is beneficial to concatenate
Commit: 497a3df6bbcdec204783b212bb590e4b5d29690a
https://github.com/llvm/llvm-project/commit/497a3df6bbcdec204783b212bb590e4b5d29690a
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Fix bazel build after f3dcc0f TD files
Commit: 3db668e0bb53958a0b6dacc11751788e3d523a86
https://github.com/llvm/llvm-project/commit/3db668e0bb53958a0b6dacc11751788e3d523a86
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
Log Message:
-----------
[mlir][SparseTensor][NFC] Migrate to OpAsmAttrInterface for ASM alias generation (#130483)
After the introduction of `OpAsmAttrInterface`, it is favorable to
migrate code using `OpAsmDialectInterface` for ASM alias generation,
which lives in `Dialect.cpp`, to use `OpAsmAttrInterface`, which lives
in `Attrs.td`. In this way, attribute behavior is placed near its
tablegen definition and people won't need to go through other files to
know what other (unexpected) hooks comes into play.
Commit: 7e292772ad810ffe14ea685e0b8f66d4f6eb1556
https://github.com/llvm/llvm-project/commit/7e292772ad810ffe14ea685e0b8f66d4f6eb1556
Author: lntue <lntue at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libc/src/__support/CPP/bit.h
M libc/src/__support/float_to_string.h
Log Message:
-----------
[libc] Fix implicit conversion warnings. (#130635)
Commit: 5ba7a3bd4c0eb736e4f1939c3a46317ef21247f2
https://github.com/llvm/llvm-project/commit/5ba7a3bd4c0eb736e4f1939c3a46317ef21247f2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/cancel.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parse cancel-directive-name as clause (#130146)
The cancellable construct names on CANCEL or CANCELLATION POINT
directives are actually clauses (with the same names as the
corresponding constructs).
Instead of parsing them into a custom structure, parse them as a clause,
which will make CANCEL/CANCELLATION POINT follow the same uniform scheme
as other constructs (<directive> [(<arguments>)] [clauses]).
Commit: 414e5c58cb5ca48e86e30150790bdcdaa2cc306e
https://github.com/llvm/llvm-project/commit/414e5c58cb5ca48e86e30150790bdcdaa2cc306e
Author: John Harrison <harjohn at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/terminated-event/TestDAP_terminatedEvent.py
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Migrating terminated statistics to the event body. (#130454)
Per the DAP spec, the event 'body' field should contain any additional
data related to the event. I updated the lldb-dap 'statistics' extension
into the terminated event's body like:
```
{
"type": "event",
"seq": 0,
"event": "terminated",
"body": {
"$__lldb_statistics": {...}
}
}
```
This allows us to more uniformly handle event messages.
Commit: d72f6204fdbeb5655ddefd840fe6d7311279ab52
https://github.com/llvm/llvm-project/commit/d72f6204fdbeb5655ddefd840fe6d7311279ab52
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
Log Message:
-----------
[RISCV] Merge DecoderNamespace for T-Head extensions. NFC (#130555)
Consistent with what has been done for Rivos, SiFive, and Qualcomm
extensions.
Commit: b4caea84661400cc4c93b1e67151b70b0c88f875
https://github.com/llvm/llvm-project/commit/b4caea84661400cc4c93b1e67151b70b0c88f875
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#130544)
Commit: 15762ea2fa687910609fd55cc3eca82c3a04b271
https://github.com/llvm/llvm-project/commit/15762ea2fa687910609fd55cc3eca82c3a04b271
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
Log Message:
-----------
[Hexagon] Avoid repeated hash lookups (NFC) (#130545)
Commit: 0b99a2a9af031ca394cf4493798389318758918b
https://github.com/llvm/llvm-project/commit/0b99a2a9af031ca394cf4493798389318758918b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#130546)
Commit: 70477d979fa52910f46db0425eac04f34074e5c3
https://github.com/llvm/llvm-project/commit/70477d979fa52910f46db0425eac04f34074e5c3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#130547)
Commit: e1bd39c1733a40d4d46d1233566d8372125676bd
https://github.com/llvm/llvm-project/commit/e1bd39c1733a40d4d46d1233566d8372125676bd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/CIR/CMakeLists.txt
M clang/tools/cir-opt/CMakeLists.txt
Log Message:
-----------
[CIR] Disable gcc partially overloaded virtual warning (#130322)
GCC, unlike clang, issues a warning when one virtual function is
overridden in a derived class but one or more other virtual functions
with the same name and different signature from a base class are not
overridden. This leads to many warnings in the MLIR and ClangIR code
when using the OpenConversionPattern<>::matchAndRewrite() function in
the ordinary way. The "hiding" behavior is what we want, so we're just
disabling the warning here.
Commit: a5763048b63b18f2c660ba14d4c3d4434689889d
https://github.com/llvm/llvm-project/commit/a5763048b63b18f2c660ba14d4c3d4434689889d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/paddus.ll
Log Message:
-----------
[x86] paddus.ll - regenerate VPTERNLOG comments
Commit: cf5aa559a8b69bc39ba134148ace4172fd6de0a8
https://github.com/llvm/llvm-project/commit/cf5aa559a8b69bc39ba134148ace4172fd6de0a8
Author: مهدي شينون (Mehdi Chinoune) <mehdi.chinoune at hotmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/command.cpp
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Runtime/command.h
Log Message:
-----------
[flang] Don't redefine pid_t on MinGW-w64. (#130288)
Commit: 74868cf0d14e59c553518d516e19937de46e23bb
https://github.com/llvm/llvm-project/commit/74868cf0d14e59c553518d516e19937de46e23bb
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
Reland Fix amdgpu-arch for dll name on Windows (#130624)
Reload aba3005a after fixing build failure.
Recently HIP runtime changed dll name to amdhip64_n.dll on Windows,
where n is ROCm major version number.
Fix amdgpu-arch to search for amdhip64_n.dll on Windows.
Commit: 1d1b20a19ecf51741f2946976ec5f44a0ed53710
https://github.com/llvm/llvm-project/commit/1d1b20a19ecf51741f2946976ec5f44a0ed53710
Author: David Peixotto <peix at meta.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Core/Module.cpp
M lldb/source/Target/Statistics.cpp
A lldb/test/Shell/Commands/command-statistics-dump.test
M lldb/unittests/Symbol/SymtabTest.cpp
Log Message:
-----------
[lldb] Avoid force loading symbol files in statistics collection (#129593)
This commit modifies the `DebuggerStats::ReportStatistics`
implementation to avoid loading symbol files for unloaded symbols. We
collect stats on debugger shutdown and without this change it can cause
the debugger to hang for a long while on shutdown if they symbols were
not previously loaded (e.g. `settings set target.preload-symbols
false`).
The implementation is done by adding an optional parameter to
`Module::GetSymtab` to control if the corresponding symbol file will be
loaded in the same way that can control it for `Module::GetSymbolFile`.
Commit: 7220ab821dd8c91dbc8e74afcdf3871605062ea0
https://github.com/llvm/llvm-project/commit/7220ab821dd8c91dbc8e74afcdf3871605062ea0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Mark getMaxVScale static (NFC) (#130598)
Commit: 809a33d7ab56f846387fc105a653d1c22c1f7a8d
https://github.com/llvm/llvm-project/commit/809a33d7ab56f846387fc105a653d1c22c1f7a8d
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Clean up unused header (NFC) (#130599)
We use VPlanPatternMatch, and not PatternMatch: clean up the
PatternMatch include to avoid confusion.
Commit: 35c030208642ddae96ed7a03b73c7d08c6997052
https://github.com/llvm/llvm-project/commit/35c030208642ddae96ed7a03b73c7d08c6997052
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Clean up unused 'using' definition (NFC) (#130597)
Commit: aa3875411746de0a24a8de0d40def711cd70153d
https://github.com/llvm/llvm-project/commit/aa3875411746de0a24a8de0d40def711cd70153d
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
A flang/docs/ArrayRepacking.md
M flang/docs/index.md
Log Message:
-----------
[RFC][flang] Add support for assumed-shape dummy arrays repacking. (#127147)
This is a document describing why and how to add support for repacking
of assumed-shape dummy arrrays to provide more efficient data cache.
It proposes adding new FIR operations and outlines the compiler flow
handling these operations.
I would like to hear feedback on all of it, but especially on:
* The possibility of detecting safeness of the repacking
in the context of OpenACC/OpenMP. If it is not possible
to do the runtime checks to determine safety, then
there is not need to add the `TempCopyIsSafe` attributes
to the instruction.
* Whether it is possible to preserve the debug information
in cases where `fir.pack_array` is sunk after `[hl]fir.declare`,
so that before the `fir.pack_array` a debugger will refer
to the values in the original array, and after `fir.pack_array`
it will refer to the copy.
Commit: 22f7897374a1d0964e36c6fefccc3e3630a89465
https://github.com/llvm/llvm-project/commit/22f7897374a1d0964e36c6fefccc3e3630a89465
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
Log Message:
-----------
[RISCV] Use vmv.v.x for any rv32 e64 splat with equal halves (#130530)
The prior logic was reasoning in terms of vsetivli immediates, but using
the vmv.v.x is strongly profitable for high LMUL cases. The key
difference is that the vmv.v.x form is rematerializeable during
register allocation, and the vsle form is not.
This change uses the vlmax form of the vsetvli for all cases where the
2 x size can't be encoded as a vsetivli. This has the effect of increasing
VL more than necessary across the vmv.v.x, which could in theory be
problematic performance-wise on some hardware. We can revisit (or
add a tune flag) if this turns out to be noteworthy.
Commit: c7f7ac759110cdcf0d9180515a414c494154d213
https://github.com/llvm/llvm-project/commit/c7f7ac759110cdcf0d9180515a414c494154d213
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/comdat.ll
Log Message:
-----------
[MergeFunc] Keep comdat on new function, not thunk. (#130583)
MergeFunc uses the original function F as Thunk and creates a new function NewF for the original function F. Preserve F's comdat info on NewF instead of the thunk.
This fixes a crash when trying to lower comdat on the thunk during codegen.
Commit: 933221e55aa1e1c1ebc16bde30c8e4a0e12836bd
https://github.com/llvm/llvm-project/commit/933221e55aa1e1c1ebc16bde30c8e4a0e12836bd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][tosa] Rename RFFT2D `input` to `input_real` (#130614)
This is to align to the input name as defined in the specification.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 934d9162e1f2712d1fcb2c9eea00959ee10546eb
https://github.com/llvm/llvm-project/commit/934d9162e1f2712d1fcb2c9eea00959ee10546eb
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
Log Message:
-----------
[NVPTX] Use ADDR operand for atomic instructions (#130438)
Commit: 431eaa8deb4ea1cbe079a29126f9559e4716f00d
https://github.com/llvm/llvm-project/commit/431eaa8deb4ea1cbe079a29126f9559e4716f00d
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Basic/Attributes.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
A clang/test/TableGen/HLSLAttribute-errors.td
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[HLSL] make semantic matching case insensitive (#129773)
Make semantic matching case insensitive
update tests to reflect semantic printed as all lower case in error
messages
add new tests to show case insensitivity
Closes #128063
Commit: deb4b206622c735450819e9cff36518997fed5c1
https://github.com/llvm/llvm-project/commit/deb4b206622c735450819e9cff36518997fed5c1
Author: AdityaK <hiraditya at msn.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search.pass.cpp
Log Message:
-----------
[NFC][libcxx][test] clang-format: search.pass.cpp (#130551)
Commit: 7016f2d6e9f84159747e7e8e01e1b49c5547bdec
https://github.com/llvm/llvm-project/commit/7016f2d6e9f84159747e7e8e01e1b49c5547bdec
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
Log Message:
-----------
[RISCV] Add coverage for vsub.vi emulation via vadd.vi
Note that we already perform the emulation for intrinsics, but not for plain IR.
Commit: 483c23f6e860c079ae2b9cceb37ebe2129ada13d
https://github.com/llvm/llvm-project/commit/483c23f6e860c079ae2b9cceb37ebe2129ada13d
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Switch zero point of negate to input variable type (#129758)
This commit changes the zero point attribute to an input to align with
the 1.0 spec.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: a7f1dc0ff5a6e76699fbb398e888a59cc929d578
https://github.com/llvm/llvm-project/commit/a7f1dc0ff5a6e76699fbb398e888a59cc929d578
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_being`/`end` in `concat` (#130520)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures.
Commit: b9cb931713ed3f05568e8a091bd47a3e865f059f
https://github.com/llvm/llvm-project/commit/b9cb931713ed3f05568e8a091bd47a3e865f059f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::VPERMV3 concatenation to use combineConcatVectorOps recursion
Only concatenate X86ISD::VPERMV3 nodes if at least one operand is beneficial to concatenate
Also add missing useAVX512Regs check
Commit: 4476f7237ee000ce3c36e359297d4ac76b2dfb5f
https://github.com/llvm/llvm-project/commit/4476f7237ee000ce3c36e359297d4ac76b2dfb5f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
Log Message:
-----------
[Github][libc++] Hash Pin Actions in Workflows (#129488)
This patch has pins actions in the libc Github workflows. Hash pinning
is a best practice as it ensures we are getting an exact action version,
which can help with reproducibility/reliability. It additionally
alleviates security concerns as an attacker can modify release assets,
potentially giving them access to tokens in privileged workflows.
Commit: 3c71f716a9a06f14212cc69df841c57ff7d47b82
https://github.com/llvm/llvm-project/commit/3c71f716a9a06f14212cc69df841c57ff7d47b82
Author: Eli Black <eliblack3 at hotmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/www/get_started.html
Log Message:
-----------
[docs] Remove Visual Studio 2017 references and bump VS 2019 to VS 2022 (#70759)
The docs say that Visual Studio 2019 16.7 or later is required to build
clang but reference VS 2017.
* Remove references to VS 2017
* Update instructions to use VS 2022, since that's the current version
available for download from MS' website
* The path to VS 2022 executables is `Program Files` instead of `Program
Files (x86)`, as VS 2022 is 64-bit
Commit: 8f0293695f783ec9dd0bd7532e1556edbbf6cfea
https://github.com/llvm/llvm-project/commit/8f0293695f783ec9dd0bd7532e1556edbbf6cfea
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Eliminate use of `ConstRecIter` from SubtargetEmitter (#130162)
- Eliminate use of `ConstRecIter` from `expandProcResources` by using `all_of()` to simplify the code.
Commit: 51850db4bf1532ed53a632454bc024b5a4352d6a
https://github.com/llvm/llvm-project/commit/51850db4bf1532ed53a632454bc024b5a4352d6a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3451.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3451
This paper allows initialization of anonymous structures and unions via
braced initializers, which is something Clang has supported since
forever.
Commit: 3fb8cb6740682b0f6f73637c603658a98006baf1
https://github.com/llvm/llvm-project/commit/3fb8cb6740682b0f6f73637c603658a98006baf1
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaUtilOps.td
M mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
A mlir/test/Conversion/TosaToArith/tosa-to-arith-invalid.mlir
M mlir/test/Conversion/TosaToArith/tosa-to-arith.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Add support for EXT-DOUBLEROUND and EXT-INEXACTROUND (#130337)
Commit: 0a1f7f0e661b48dc4470d31d95e22e95a7959adc
https://github.com/llvm/llvm-project/commit/0a1f7f0e661b48dc4470d31d95e22e95a7959adc
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
Log Message:
-----------
[ctxprof][nfc] Drop `Section` in `writeFlatSection` (#130654)
It matches `writeContextual`, and also, it's not the whole section that's being written there, just a profile, piecemeal.
Commit: 9f170e6abed4a7b393bb8abbf07ac8d6930aa3b0
https://github.com/llvm/llvm-project/commit/9f170e6abed4a7b393bb8abbf07ac8d6930aa3b0
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Convert "errno" to libc_support_library. (#130368)
This shouldn't really be a "libc_function" since it can be used as a
dependency of various other support libraries and functions, and doesn't
correspond to a well-defined endpoint that the users may want to
explicitly depend on (if they depend on it implicitly through a
libc_function whose implementation relies on errno, the dependency will
be pulled in normally). Remove special handling for "errno" in the Bazel
test rules.
This is one more cleanup step unlocking the plan outlined in #130327
Commit: 68e3c02285d79253beab92ca50e5992a59db6eb6
https://github.com/llvm/llvm-project/commit/68e3c02285d79253beab92ca50e5992a59db6eb6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Move CV_INSERTR into the XCVbitmanip DecoderNamespace instead of the default.
This uses RVInstR, while other XCVbitmanip instructions use classes
that set the DecoderNamespace.
Commit: e2733c82bd5cacfdcb97dfea44f42b70e8b0182c
https://github.com/llvm/llvm-project/commit/e2733c82bd5cacfdcb97dfea44f42b70e8b0182c
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Parser/program-parsers.cpp
A flang/test/Parser/func-label.f
Log Message:
-----------
[flang] Accept useless label on top-level FUNCTION (#129603)
The look-ahead parser for function program units didn't allow for a
useless label on the statement.
Fixes https://github.com/llvm/llvm-project/issues/129456.
Commit: 53c3a2c69aeaaf65ceedc1117648461607f0c165
https://github.com/llvm/llvm-project/commit/53c3a2c69aeaaf65ceedc1117648461607f0c165
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Semantics/expression.h
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/allocate12.f90
M flang/test/Semantics/c_f_pointer.f90
M flang/test/Semantics/expr-errors06.f90
Log Message:
-----------
[flang] Static checking for empty coarrays (#129610)
A coarray must not have a zero extent on a codimension; that would yield
an empty coarray. When cobounds are constants, verify them.
Commit: 706e7d83cfd92c9da5125c43a28832336e9bd45b
https://github.com/llvm/llvm-project/commit/706e7d83cfd92c9da5125c43a28832336e9bd45b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/pointer-assignment.cpp
M flang/test/Semantics/assign02.f90
Log Message:
-----------
[flang] Enforce C1027 (F'2023) (#129617)
The LHS of a pointer assignment statement may not be coindexed.
Commit: 6b5b0821e3d879390a262679d05ad268b62c0a19
https://github.com/llvm/llvm-project/commit/6b5b0821e3d879390a262679d05ad268b62c0a19
Author: Boaz Brickner <brickner at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/AST/Mangle.h
M clang/lib/AST/Mangle.cpp
Log Message:
-----------
[Clang] Make `MangleContext::mangleMSGuidDecl()`, `MangleContext::mangleObjCMethodName()` and `MangleContext::mangleObjCMethodNameAsSourceName()` const methods (#130613)
Unfortunately, making `MangleContext::mangleName()` would require a lot
of const escapes due to lazy initialization and id creations:
`Mangle.h`:
*
https://github.com/llvm/llvm-project/blob/dffbc030e75b758e7512518abd499a0f680addbf/clang/include/clang/AST/Mangle.h#L82-L85
*
https://github.com/llvm/llvm-project/blob/dffbc030e75b758e7512518abd499a0f680addbf/clang/include/clang/AST/Mangle.h#L97-L99
`ItaniumMangle.cpp`:
*
https://github.com/llvm/llvm-project/blob/dffbc030e75b758e7512518abd499a0f680addbf/clang/lib/AST/ItaniumMangle.cpp#L158-L161
*
https://github.com/llvm/llvm-project/blob/4508d6aa72b0f31056ae01aff0e8009a252e4683/clang/lib/AST/ItaniumMangle.cpp#L641
`MicrosoftMangle.cpp`:
*
https://github.com/llvm/llvm-project/blob/dffbc030e75b758e7512518abd499a0f680addbf/clang/lib/AST/MicrosoftMangle.cpp#L243-L245
*
https://github.com/llvm/llvm-project/blob/dffbc030e75b758e7512518abd499a0f680addbf/clang/lib/AST/MicrosoftMangle.cpp#L284
Commit: 33b061f8ea8ba1d7fa0ff29bfbf499375df9c4e7
https://github.com/llvm/llvm-project/commit/33b061f8ea8ba1d7fa0ff29bfbf499375df9c4e7
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-deallocate.cpp
M flang/test/Semantics/deallocate05.f90
Log Message:
-----------
[flang] Enforce C955 on DEALLOCATE (#129788)
Constraint C955 in F'2023 prohibits an allocate-object from being
coindexed. We catch this on ALLOCATE statements but missed it on
DEALLOCATE.
Commit: 8c535669a3717a4c3f58154b672748f82f137c11
https://github.com/llvm/llvm-project/commit/8c535669a3717a4c3f58154b672748f82f137c11
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-coarray.h
M flang/test/Semantics/lockstmt03.f90
Log Message:
-----------
[flang] Semantic checking of LOCK statement (#129806)
Add checks for the LOCK statement, and complete and enable their tests.
Commit: b7557ab34dbc79390c706812e23626747b7fe40a
https://github.com/llvm/llvm-project/commit/b7557ab34dbc79390c706812e23626747b7fe40a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Catch disallowed usage of coarrays in defined I/O (#129907)
Defined input/output subroutines must conform to documented interfaces
that do not allow for coarray dummy arguments.
Commit: d53079055ed6e9afbb8d944dadb3298e76949711
https://github.com/llvm/llvm-project/commit/d53079055ed6e9afbb8d944dadb3298e76949711
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/bindings01.f90
Log Message:
-----------
[flang] Catch coindexed procedure pointer/binding references (#129931)
A procedure designator cannot be coindexed, except for cases in which
the coindexing doesn't matter (i.e. a binding that can't be overridden).
Commit: f6fc29d3319c8cc4004235984b9b43e08881c53d
https://github.com/llvm/llvm-project/commit/f6fc29d3319c8cc4004235984b9b43e08881c53d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/move_alloc.f90
Log Message:
-----------
[flang] Check coranks on MOVE_ALLOC (#129944)
The FROM= and TO= arguments in a reference to the MOVE_ALLOC intrinsic
subroutine must have the same corank.
Commit: bbc27fbb1cb3ac6a92d9ce15f647b29114a75c91
https://github.com/llvm/llvm-project/commit/bbc27fbb1cb3ac6a92d9ce15f647b29114a75c91
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/assign11.f90
Log Message:
-----------
[flang] Refine checks on assignments to coarrays (#129966)
F'2023 10.2.1.2 paragraph 2 imposes some requirements on the left-hand
sides of assignments when they have coindices, and one was not checked
while another was inaccurately checked. In short, intrinsic assignment
to a coindexed object can't change its type, and neither can it affect
allocatable components.
Commit: fd8de7524d4f32c167aa2a75b0cd61e64b756760
https://github.com/llvm/llvm-project/commit/fd8de7524d4f32c167aa2a75b0cd61e64b756760
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call04.f90
M flang/test/Semantics/call06.f90
Log Message:
-----------
[flang] Check actual/dummy coranks in more cases (#130167)
The check for equality of actual and dummy argument coranks was taking
place only for ALLOCATABLE coarrays; perform the check for all cases,
and refine the ALLOCATABLE check to apply only to cases that don't fail
the new more general check.
Commit: 73b96cff012b27195d2f5e09395899b0421f1347
https://github.com/llvm/llvm-project/commit/73b96cff012b27195d2f5e09395899b0421f1347
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Evaluate/variable.cpp
M flang/test/Semantics/coarrays02.f90
Log Message:
-----------
[flang] Refine coarray subobjects (#130183)
A subobject of a coarray is not also a coarray if it involves an
allocatable component, pointer component, or vector-valued subscript.
Commit: 40d9096fda65dc94fc1b10c091802dcb8f3ab3a5
https://github.com/llvm/llvm-project/commit/40d9096fda65dc94fc1b10c091802dcb8f3ab3a5
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/assignment.cpp
M flang/test/Semantics/call12.f90
Log Message:
-----------
[flang] Enforce C15104(5) for coindexed values (#130203)
A object's value can't be copied from another image by means of an
intrinsic assignment statement if it has a derived type that contains a
pointer subobject ultimate component.
Commit: 8227f2a35aef0abebf0e2914795b668845a90169
https://github.com/llvm/llvm-project/commit/8227f2a35aef0abebf0e2914795b668845a90169
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/modfile74.f90
Log Message:
-----------
[flang] Fix Cray pointers in module file output (#130315)
The relationship between a Cray pointee and its pointer is not in the
symbol table entry, but instead in a per-scope map. Use this information
to ensure that if a pointee/pointer is needed in the module file, so is
its pointer/pointee.
Fixes https://github.com/llvm/llvm-project/issues/130270.
Commit: c1898522180f76376167aaab8c0f07afe9e3fef5
https://github.com/llvm/llvm-project/commit/c1898522180f76376167aaab8c0f07afe9e3fef5
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Preprocessing/bug126459.F90
Log Message:
-----------
[flang] Ignore empty keyword macros before directives (#130333)
Ignore any keyword macros with empty directives that might appear before
a compiler directive.
Fixes https://github.com/llvm/llvm-project/issues/126459.
Commit: f9146ccbe940d8b8eb15e7686a511a28eb0abc6b
https://github.com/llvm/llvm-project/commit/f9146ccbe940d8b8eb15e7686a511a28eb0abc6b
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[libc][bazel] explicitly use system-provided errno in Bazel builds. (#130663)
Addressing the comments from PR #130368 review. Since Bazel builds are
effectively overlay mode, switch to explicitly setting
-DLIBC_ERRNO_MODE=LIBC_ERRNO_MODE_SYSTEM configuration option, so that
unit tests and release builds are consistent. Verified that all the unit
tests pass with this flag specified.
Commit: f84f4e1e05f65ef9669b9dd0b1fce519240e9c60
https://github.com/llvm/llvm-project/commit/f84f4e1e05f65ef9669b9dd0b1fce519240e9c60
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
Log Message:
-----------
[LV] Don't crash on inner loops with RT checks in VPlan-native path.
Assert that we only generate runtime checks for inner loops in
emitMemRuntimeChecks, instead of returning nullptr in the VPlan-native
path, which is causing crashes and incorrect code.
Commit: e235432867e922613d86b6ee8e94234817cddce0
https://github.com/llvm/llvm-project/commit/e235432867e922613d86b6ee8e94234817cddce0
Author: Damien L-G <dalg24 at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libcxx/test/libcxx/atomics/atomics.ref/assert.compare_exchange_strong.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.compare_exchange_weak.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.ctor.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.load.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.store.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.wait.pass.cpp
A libcxx/test/libcxx/atomics/atomics.ref/compare_exchange_strong.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/compare_exchange_weak.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/load.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/store.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/wait.verify.cpp
Log Message:
-----------
[libc++] Add `-Watomic-memory-ordering` diagnostic tests for `atomic_ref` (#130206)
Fix #130053
Commit: 3f30207a230f9332b5c02a8d00ad3e9dc44e9bd3
https://github.com/llvm/llvm-project/commit/3f30207a230f9332b5c02a8d00ad3e9dc44e9bd3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Fix __ldXX function signatures (#130628)
Function are taking array reference and not array directly.
Commit: df7927626bc2e6473691ce59067797c60acc2627
https://github.com/llvm/llvm-project/commit/df7927626bc2e6473691ce59067797c60acc2627
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M .github/workflows/release-asset-audit.py
Log Message:
-----------
[Github] Add stefanp-synopsys to release uploaders
It seems stefanp-ibm got renamed to sefanp-synopsys. Renaming in the file so
that the release asset audit does not keep flagging this binary. All signs
point to this being the same account. The release is dated to June of 2024,
the name is close enough, and the new account is already in the LLVM org/
has a history of contributions.
This is a stop gap for #130650.
Commit: aeae3667bd092925795976a85a4ab1246fa3c8c8
https://github.com/llvm/llvm-project/commit/aeae3667bd092925795976a85a4ab1246fa3c8c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Make start operand non-optional for VPHeaderPHIRecipe (NFC).
The start value is always available, require it unconditionally.
Commit: 92c8dd6fc940318d03c0689fdd008914e105f055
https://github.com/llvm/llvm-project/commit/92c8dd6fc940318d03c0689fdd008914e105f055
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
A llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
[llvm] add support for mustache templating language (#105893)
Adds Support for the Mustache Templating Language. See specs here:
https://mustache.github.io/mustache.5.html
This patch implements support+tests for majority of the features of the
language including:
- Variables
- Comments
- Lambdas
- Sections
This meant as a library to support places where we have to generate
HTML, such as in clang-doc.
Commit: c88352d2e92fb28abc39f9a393bdb2f1d6729a4e
https://github.com/llvm/llvm-project/commit/c88352d2e92fb28abc39f9a393bdb2f1d6729a4e
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_begin`/`end` in `replace`. (#130523)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures.
Also clean up the implementation to adhere to the llvm coding standards.
Commit: 9bac1b63ac14ca7cbd98ef63cbc0d8b643d31403
https://github.com/llvm/llvm-project/commit/9bac1b63ac14ca7cbd98ef63cbc0d8b643d31403
Author: David Green <david.green at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
Log Message:
-----------
[GlobalISel] Add and use a m_GAddLike pattern matcher. NFC (#125435)
This adds a Flags parameter to the BinaryOp_match, allowing it to detect
different flags like Disjoint. A m_GDisjointOr is added to detect Or's
with disjoint flags, and G_AddLike is then either a m_GADD or
m_GDisjointOr.
The rest is trying to allow matching `const MachineInstr&`, as opposed
to non-const references.
Commit: 5c055cc4eb2ef610ad44e6c8202bd3dc9bce07e7
https://github.com/llvm/llvm-project/commit/5c055cc4eb2ef610ad44e6c8202bd3dc9bce07e7
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
R llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
Revert "[llvm] add support for mustache templating language (#105893)" (#130676)
This broke some build bot warnings
https://lab.llvm.org/buildbot/#/builders/160/builds/14381/steps/5/logs/stdio
reverts: https://github.com/llvm/llvm-project/pull/105893
Commit: 5757da1480691eb6e452c0aaa6036d03c1660817
https://github.com/llvm/llvm-project/commit/5757da1480691eb6e452c0aaa6036d03c1660817
Author: Julius Alexandre <juliuswoosebert at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/docs/resources/build.rst
Log Message:
-----------
[lldb][docs] Added LLDB_ENFORCE_STRICT_TEST_REQUIREMENTS for macOS configuration (#130381)
Referenced here:
https://github.com/llvm/llvm-project/issues/130171#issuecomment-2707058235
I think this will allow for issues relating towards missing modules for
test suites to be more manageable.
cc @adrian-prantl
---------
Co-authored-by: medievalghoul <61852278+medievalghoul at users.noreply.github.com>
Commit: 6657769199ad625ea0cb7f7c054d4f6a27806080
https://github.com/llvm/llvm-project/commit/6657769199ad625ea0cb7f7c054d4f6a27806080
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[hexagon] Enable --eh-frame-hdr (#130225)
The missing `PT_GNU_EH_FRAME` was causing C++ exception handling test
failures in llvm-test-suite. We should unconditionally add this argument
like the other drivers do.
Discovered-by: Alexey Karyakin <akaryaki at quicinc.com>
Fixes: #129745
Commit: 0230d63b4a8b9f420b0aaac373891df1199715a8
https://github.com/llvm/llvm-project/commit/0230d63b4a8b9f420b0aaac373891df1199715a8
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
Log Message:
-----------
[MLIR][OneShotBufferize] Fix opFilter init (#130633)
OneShotBufferizePass's opFilter definition in runOnOperation() fails to
allow operations for all dialect when the dialectFilter has an empty
array value (as opposed to no value). This happens when constructing
OneShotBufferizePass from a OneShotBufferizePassOptions parameter with
an empty dialectFilter. This commit only does filtering if filterDialect
option has a value and it is not an empty array.
Commit: 9b066f0b57fdf341e55f754fa35d49e1b35b1af3
https://github.com/llvm/llvm-project/commit/9b066f0b57fdf341e55f754fa35d49e1b35b1af3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Merge DecoderNamespace for CORE-V extensions. NFC
Similar to Qualcomm, Sifive, T-Head, and Rivos extensions.
Commit: b15ccd436aef320802635984f336fcfe5b69ff0b
https://github.com/llvm/llvm-project/commit/b15ccd436aef320802635984f336fcfe5b69ff0b
Author: Nikhil Kalra <nkalra at apple.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Bindings/Python/Diagnostics.h
M mlir/test/python/ir/diagnostic_handler.py
M mlir/test/python/lib/PythonTestCAPI.cpp
M mlir/test/python/lib/PythonTestCAPI.h
M mlir/test/python/lib/PythonTestModuleNanobind.cpp
Log Message:
-----------
[mlir] Better Python diagnostics (#128581)
Updated the Python diagnostics handler to emit notes (in addition to
errors) into the output stream so that users have more context as to
where in the IR the error is occurring.
Commit: fa315eceb7ab6106729c6b52495891c3f0f58478
https://github.com/llvm/llvm-project/commit/fa315eceb7ab6106729c6b52495891c3f0f58478
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
Log Message:
-----------
[RISCV] Convert vsub.vx to vadd.vi if possible (#130669)
We'd already had this transform for the intrinsics, but hadn't added it
for either fixed length or scalable vectors coming from normal IR.
For the record, the fact we have three different sets of patterns here
really is quite ugly.
Commit: ae23dd5d9983c07dbd32919e9fba19176a9cefb9
https://github.com/llvm/llvm-project/commit/ae23dd5d9983c07dbd32919e9fba19176a9cefb9
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
M clang/test/Sema/attr-availability-macosx.cpp
Log Message:
-----------
Reland: [clang] Fix missing diagnostic of declaration use when accessing TypeDecls through typename access (#130673)
Commit: af62a6f59aeed78e6f3eb88152397f2006b96dfd
https://github.com/llvm/llvm-project/commit/af62a6f59aeed78e6f3eb88152397f2006b96dfd
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/coarrays02.f90
Log Message:
-----------
[flang] Enforce F'2023 constraints C917 & C918 (#129962)
These are constraints that preclude the need to obtain type information
from descriptors on other images, essentially. When designating a
polymorphic component, its base may not be coindexed; nor shall a
coindexed designator have a type with a polymorphic potential subobject
component.
Commit: 016557fab24ae4d99ab6aa98433cce23f2d03ac2
https://github.com/llvm/llvm-project/commit/016557fab24ae4d99ab6aa98433cce23f2d03ac2
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Semantics/type.cpp
A flang/test/Semantics/pdt04.f90
M flang/test/Semantics/resolve105.f90
Log Message:
-----------
[flang] Better error handling for PDT constant expression (#130637)
We currently don't consider an integer division to be a constant
expression unless its divisor is known and nonzero. This produces a
weird result in the linked test; do better.
Fixes https://github.com/llvm/llvm-project/issues/130534.
Commit: 4a76c20bab1505851d54cd30d4bf7a1b161db9fd
https://github.com/llvm/llvm-project/commit/4a76c20bab1505851d54cd30d4bf7a1b161db9fd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Reduce arguments for CVStore_rr_inc and CVStore_rr clases in RISCVInstrInfoXCV.td. NFC
The ins, outs, and argstr for all instantiations of the classes
are the same so just make them part of the class.
Commit: a5a33d82931def5a2f6f4dcfca834574190b4b50
https://github.com/llvm/llvm-project/commit/a5a33d82931def5a2f6f4dcfca834574190b4b50
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Move let Constraints closer to where outs/ins are declared in RISCVInstrInfoXCV.td. NFC
The Constraint refers to the ins/outs register names so should be
as close as they can be.
Commit: 426caf1182caa40a1af8eaa6cf2d88dededa671a
https://github.com/llvm/llvm-project/commit/426caf1182caa40a1af8eaa6cf2d88dededa671a
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M libc/hdr/CMakeLists.txt
A libc/hdr/locale_macros.h
M libc/test/src/locale/CMakeLists.txt
M libc/test/src/locale/locale_test.cpp
M libc/test/src/locale/localeconv_test.cpp
Log Message:
-----------
[libc] add locale proxy header (#130621)
Address review comments in #130407.
This patch is already covered by existing locale test cases.
Commit: 9d7ca6cdf038dab24fbc5c22a91be36604decb67
https://github.com/llvm/llvm-project/commit/9d7ca6cdf038dab24fbc5c22a91be36604decb67
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M libcxx/include/regex
M libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
Log Message:
-----------
[regex] fix uncaught exception when string is like "\\_" (#129348)
`\_ `is a valid identity escape in regular expressions, but previously
libc++ incorrectly treated it as invalid. So I deleted this judgment
fixes #129062
Commit: 3226617f023d46708414f867c726695a1a2dd562
https://github.com/llvm/llvm-project/commit/3226617f023d46708414f867c726695a1a2dd562
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Remove a duplicate setOperationAction, NFC (#130664)
Commit: 1dffe8f364a4d5ed0b1efc981a1d9a30166aae05
https://github.com/llvm/llvm-project/commit/1dffe8f364a4d5ed0b1efc981a1d9a30166aae05
Author: R <rqou at berkeley.edu>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
A flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Integration/OpenMP/private-global.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/forall/character-1.f90
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
Reland [flang] In AllocMemOp lowering, convert types for calling malloc on 32-bit (#130386)
Previous PR: https://github.com/llvm/llvm-project/pull/129308
Changes:
* The alloc-32.fir test is now marked as requiring the X86 target.
* Drive-by fixes uncovered when fixing tests involving malloc
Commit: 666540cb65331970e4953891cb8525a32e7da6b8
https://github.com/llvm/llvm-project/commit/666540cb65331970e4953891cb8525a32e7da6b8
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
M llvm/unittests/ExecutionEngine/Orc/WrapperFunctionUtilsTest.cpp
Log Message:
-----------
[ORC] Swap handleAsync handler and send-result arguments.
Placing the handler argument last improves readability when passing a lambda
value (the common case for this API).
Commit: 8338fbe455883ce6395b98401fd17ee40852c3a7
https://github.com/llvm/llvm-project/commit/8338fbe455883ce6395b98401fd17ee40852c3a7
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_begin`/`end` in `hasNItems`* (#130524)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures.
Commit: 7d4d8509cbec7eecd8aaf2510015b54bc5c173e1
https://github.com/llvm/llvm-project/commit/7d4d8509cbec7eecd8aaf2510015b54bc5c173e1
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't remove parentheses separated from ellipsis by comma (#130471)
Also clean up `case tok::r_paren` in
`UnwrappedLineParser::parseParens()`.
Fix #130359
Commit: 256bde4fe426947698259c5c46bb841467e9d7ab
https://github.com/llvm/llvm-project/commit/256bde4fe426947698259c5c46bb841467e9d7ab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrBuilder.h
Log Message:
-----------
[X86] Use Register in X86InstrBuilder.h. NFC (#130514)
I had to give the X86AddressMode Base union a name and a constructor so
it would default to Register. This means the Base.Reg = 0 in the
X86AddressMode constructor is no longer needed.
Commit: 5bf048659972964912e0de88b5fcaef338b15dfc
https://github.com/llvm/llvm-project/commit/5bf048659972964912e0de88b5fcaef338b15dfc
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove unneeded deps. (#130696)
The MPFRWrapper BUILD targets don't depend directly on gmp. MPFR itself
does depend on gmp, but not the wrapper.
Commit: 205c5325b3c771d94feb0ec07e8ad89d27c2b29e
https://github.com/llvm/llvm-project/commit/205c5325b3c771d94feb0ec07e8ad89d27c2b29e
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.h
M mlir/include/mlir/Transforms/RegionUtils.h
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Transforms/Utils/RegionUtils.cpp
A mlir/test/Transforms/move-operation-deps.mlir
M mlir/test/lib/Transforms/CMakeLists.txt
A mlir/test/lib/Transforms/TestTransformsOps.cpp
A mlir/test/lib/Transforms/TestTransformsOps.td
M mlir/test/lib/Transforms/lit.local.cfg
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Add a utility method to move operation dependencies. (#129975)
The added utility method moves all SSA values that an operation depends
upon before an insertion point. This is useful during transformations
where such movements might make transformations (like fusion) more
powerful.
To test the operation add a transform dialect op that calls the move
operation. To be able to capture the `notifyMatchFailure` messages from
the transformation and to report/check these in the test modify the
`ErrorCheckingTrackingListener` to capture the last match failure
notification.
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: ab6f470675ed31e5ed1494f6521c3d477c537392
https://github.com/llvm/llvm-project/commit/ab6f470675ed31e5ed1494f6521c3d477c537392
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/aix/Host.cpp
Log Message:
-----------
[lldb][AIX] Host.cpp for AIX (#130582)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601
Added base file - aix/Host.cpp for Process info
Commit: 612e4e9d6daff61eb480b9b3d9ca47f33168772e
https://github.com/llvm/llvm-project/commit/612e4e9d6daff61eb480b9b3d9ca47f33168772e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/Sema/Sema.cpp
A clang/test/Modules/pr125999.cppm
Log Message:
-----------
[C++20] [Modules] Instantiate pending instantiations when GMF ends (#126842)
Close https://github.com/llvm/llvm-project/issues/125999
The cause of the problem is, when we instantiate the pending
instantiation, the owning module of the TU gets into 'foo' instead of
the GMF.
The concern of the patch is, I am not sure the point of 'pending'
instantiations. I mean, if there is a reason we **must** pending the
intantiations to the end of the TU.
Commit: 95e38baf24ed7509decf1b9ee362cf3e23e68e54
https://github.com/llvm/llvm-project/commit/95e38baf24ed7509decf1b9ee362cf3e23e68e54
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/Transforms/LoopDataPrefetch/RISCV/basic.ll
Log Message:
-----------
[RISCV] Enable prefetching writes (#130561)
We should prefetch writes since `Zicbop` has `prefetch.w`.
Commit: 494fe0b4145810d4e4e7b6003cabd194f76cb5d4
https://github.com/llvm/llvm-project/commit/494fe0b4145810d4e4e7b6003cabd194f76cb5d4
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Remove wasm-specific findWasmUnwindDestinations (#130374)
Unlike in Itanium EH IR, WinEH IR's unwinding instructions (e.g.
`invoke`s) can have multiple possible unwind destinations.
For example:
```ll
entry:
invoke void @foo()
to label %cont unwind label %catch.dispatch
catch.dispatch: ; preds = %entry
%0 = catchswitch within none [label %catch.start] unwind label %terminate
catch.start: ; preds = %catch.dispatch
%1 = catchpad within %0 [ptr null]
...
terminate: ; preds = %catch.dispatch
%2 = catchpad within none []
...
...
```
In this case, if an exception is not caught by `catch.dispatch` (and
thus `catch.start`), it should next unwind to `terminate`.
`findUnwindDestination` in ISel gathers the list of this unwind
destinations traversing the unwind edges:
https://github.com/llvm/llvm-project/blob/ae42f071032b29821beef6a33771258086bbbb1c/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L2089-L2150
But we don't use that, and instead use our custom
`findWasmUnwindDestinations` that only adds the first unwind
destination, `catch.start`, to the successor list of `entry`, and not
`terminate`:
https://github.com/llvm/llvm-project/blob/ae42f071032b29821beef6a33771258086bbbb1c/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L2037-L2087
The reason behind it was, as described in the comment block in the code,
it was assumed that there always would be an `invoke` that connects
`catch.start` and `terminate`. In case of `catch (type)`, there will be
`call void @llvm.wasm.rethrow()` in `catch.start`'s predecessor that
unwinds to the next destination. For example:
https://github.com/llvm/llvm-project/blob/0db702ac8e06911478615ac537f75ac778817c04/llvm/test/CodeGen/WebAssembly/exception.ll#L429-L430
In case of `catch (...)`, `__cxa_end_catch` can throw, so it becomes an
`invoke` that unwinds to the next destination. For example:
https://github.com/llvm/llvm-project/blob/0db702ac8e06911478615ac537f75ac778817c04/llvm/test/CodeGen/WebAssembly/exception.ll#L537-L538
So the unwind ordering relationship between `catch.start` and
`terminate` here would be preserved.
But turns out this assumption does not always hold. For example:
```ll
entry:
invoke void @foo()
to label %cont unwind label %catch.dispatch
catch.dispatch: ; preds = %entry
%0 = catchswitch within none [label %catch.start] unwind label %terminate
catch.start: ; preds = %catch.dispatch
%1 = catchpad within %0 [ptr null]
...
call void @_ZSt9terminatev()
unreachable
terminate: ; preds = %catch.dispatch
%2 = catchpad within none []
call void @_ZSt9terminatev()
unreachable
...
```
In this case there is no `invoke` that connects `catch.start` to
`terminate`. So after `catch.dispatch` BB is removed in ISel,
`terminate` is considered unreachable and incorrectly removed in DCE.
This makes Wasm just use the general `findUnwindDestination`. In that
case `entry`'s successor is going to be [`catch.start`, `terminate`]. We
can get the first unwind destination by just traversing the list from
the front.
---
This required another change in WinEHPrepare. WinEHPrepare demotes all
PHIs in EH pads because they are funclets in Windows and funclets can't
have PHIs. When used in Wasm they are not funclets so we don't need to
do that wholesale but we still need to demote PHIs in `catchswitch` BBs
because they are deleted during ISel. (So we created
[`-demote-catchswitch-only`](https://github.com/llvm/llvm-project/blob/a5588b6d20590a10db0f1a2046fba4d9f205ed68/llvm/lib/CodeGen/WinEHPrepare.cpp#L57-L59)
option for that)
But turns out we need to remove PHIs that have a `catchswitch` BB as an
incoming block too:
```ll
...
catch.dispatch:
%0 = catchswitch within none [label %catch.start] unwind label %terminate
catch.start:
...
somebb:
...
ehcleanup ; preds = %catch.dispatch, %somebb
%1 = phi i32 [ 10, %catch.dispatch ], [ 20, %somebb ]
...
```
In this case the `phi` in `ehcleanup` BB should be demoted too because
`catch.dispatch` BB will be removed in ISel so one if its incoming block
will be gone. This pattern didn't manifest before presumably due to how
`findWasmUnwindDestinations` worked. (In this example, in our
`findWasmUnwindDestinations`, `catch.dispatch` would have had only one
successor, `catch.start`. But now `catch.dispatch` has both
`catch.start` and `ehcleanup` as successors, revealing this bug. This
case is
[represented](https://github.com/llvm/llvm-project/blob/ab87206c4b95aa0b5047facffb5f78f7fe6ac269/llvm/test/CodeGen/WebAssembly/exception.ll#L445)
by `rethrow_terminator` function in `exception.ll` (or
`exception-legacy.ll`) and without the WinEHPrepare fix it will crash.
---
Discovered by the reproducer provided in #126916, even though the bug
reported there was not this one.
Commit: 9a5a8c9a8072d9af9cea087e506ea213bd89c0f5
https://github.com/llvm/llvm-project/commit/9a5a8c9a8072d9af9cea087e506ea213bd89c0f5
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/st_bulk.ll
Log Message:
-----------
[NVPTX] Add intrinsics for st.bulk instruction (#128856)
Adds NVVM intrinsics and NVPTX codegen for the `st.bulk` instruction
introduced in ptx8.6 for sm_100. Tests added in
`CodeGen/NVPTX/st_bulk.ll` and verified through ptxas 12.8.0.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-st-bulk
Commit: 3ce43c8b16a6aefe79ce976b1340ccd493cf533a
https://github.com/llvm/llvm-project/commit/3ce43c8b16a6aefe79ce976b1340ccd493cf533a
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
Log Message:
-----------
[WebKit checkers] Don't treat virtual functions as safe. (#129632)
Prior to this PR, WebKit checkers erroneously treated functions to be
safe if it has a trivial body even if it was marked as virtual. In the
case of a virtual function, it can have an override which does not pass
the triviality check so we must not make such an assumption.
This PR also restricts the allowed operator overloading while finding
the pointer origin to just operators on smart pointer types: Ref,
RefPtr, CheckedRef, CheckedPtr, RetainPtr, WeakPtr, WeakRef, unique_ptr,
and UniqueRef.
Commit: fd21d35178c50207cdc03f53ee16f83d22613ab0
https://github.com/llvm/llvm-project/commit/fd21d35178c50207cdc03f53ee16f83d22613ab0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Reduce the number of vectors passed to getIslands. NFC (#130402)
Combine the StartBits, EndBits, and FieldVals vectors into a single
vector of a struct that contains all 3 pieces of information.
Instead of storing EndBits, we store NumBits since that's what the users
want.
I've removed the BitNo variable as it was easy to construct calculate
from StartBit. I've also removed Num in favor of Islands.size().
Commit: 72bb0a9a9c6fdde43e1e191f2dc0d5d2d46aff4e
https://github.com/llvm/llvm-project/commit/72bb0a9a9c6fdde43e1e191f2dc0d5d2d46aff4e
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
Log Message:
-----------
[AMDGPU] Fix test failures when expensive checks are enabled (#130644)
This PR fixes test failures introduced in #127353 when expensive checks
are enabled.
For `llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll` and
`llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll`, `s59`
is no longer in live-ins because it is caller saved. Switch to `s55` in
this PR.
Commit: 1e83d975d72037567afd9d3b22bb063b442ec045
https://github.com/llvm/llvm-project/commit/1e83d975d72037567afd9d3b22bb063b442ec045
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Use inheritance to reduce duplicated code in RISCVInstrInfoXCV.td. NFC (#130703)
CVSIMDRU and CVSIMDRI were the same except for immediate type. Make it a
default argument of CVSIMDRI so that CVSIMDRU can inherit from it and
override the argument.
Similar for CVSIMDRUWb.
Commit: bb2e85f12f6a17afdb36b2ffd2dcd17bbc4dd866
https://github.com/llvm/llvm-project/commit/bb2e85f12f6a17afdb36b2ffd2dcd17bbc4dd866
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
Log Message:
-----------
[AMDGPU] Improve StructurizeCFG pass performance: avoid redundant DebugLoc map initialization. NFC. (#130568)
Previously, the TermDL (BB terminator → DebugLoc) map was initialized at
the start of processing each function's region, creating entries for the
entire function. This could be inefficient for large functions.
This patch improves performance by creating map entries only when
needed—when a terminator is being killed or when a flow block is
created. Additionally, entries are removed immediately after use,
preventing unnecessary map growth and ensuring DebugLocs are not
"retracked."
A mapless variant was also explored, but due to limited familiarity with
the structurizer, it was not pursued further.
In my cases, this change improves performance by 2-3×.
Commit: 75f76d482cc24162d5e3fdae0f0acd4c8f9cec6b
https://github.com/llvm/llvm-project/commit/75f76d482cc24162d5e3fdae0f0acd4c8f9cec6b
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A clang-tools-extra/clang-tidy/readability/AmbiguousSmartptrResetCallCheck.cpp
A clang-tools-extra/clang-tidy/readability/AmbiguousSmartptrResetCallCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/ambiguous-smartptr-reset-call-custom-pointers.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/ambiguous-smartptr-reset-call.cpp
Log Message:
-----------
[clang-tidy] Add bugprone-smartptr-reset-ambiguous-call check (#121291)
Add new clang-tidy check that finds potentially erroneous calls to
``reset()`` method on smart pointers when
the pointee type also has a ``reset()`` method.
It's easy to make typo and delete object because the difference between
``.`` and ``->`` is really small.
Sometimes IDE's autocomplete will change ``->`` to ``.`` automatically.
For example, developer wrote ``ptr->res`` but after pressing _Tab_ it
became ``ptr.reset()``.
Fixes #120908
Commit: 1fe702fdecf79121346fe5374b418bc1dbf9362c
https://github.com/llvm/llvm-project/commit/1fe702fdecf79121346fe5374b418bc1dbf9362c
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/test/ELF/loongarch-relax-emit-relocs.s
A lld/test/ELF/loongarch-relax-tls-le.s
M lld/test/ELF/loongarch-tls-gd.s
M lld/test/ELF/loongarch-tls-ld.s
M lld/test/ELF/loongarch-tls-le.s
Log Message:
-----------
[lld][LoongArch] Relax TLS LE/GD/LD (#123600)
In local-exec form, the code sequence is converted as follows:
```
From:
lu12i.w $rd, %le_hi20_r(sym)
R_LARCH_TLS_LE_HI20_R, R_LARCH_RELAX
add.w/d $rd, $rd, $tp, %le_add_r(sym)
R_LARCH_TLS_LE_ADD_R, R_LARCH_RELAX
addi/ld/st.w/d $rd, $rd, %le_lo12_r(sym)
R_LARCH_TLS_LE_LO12_R, R_LARCH_RELAX
To:
addi/ld/st.w/d $rd, $tp, %le_lo12_r(sym)
R_LARCH_TLS_LE_LO12_R
```
In global-dynamic or local-dynamic, the code sequence is converted as
follows:
```
From:
pcalau12i $a0, %ld_pc_hi20(sym) | %gd_pc_hi20(sym)
R_LARCH_TLS_GD_PC_HI20 | R_LARCH_TLS_LD_PC_HI20, R_LARCH_RELAX
addi.w/d $a0, $a0, %got_pc_lo12(sym) | %got_pc_lo12(sym)
R_LARCH_GOT_PC_LO12, R_LARCH_RELAX
To:
pcaddi $a0, %got_pc_lo12(sym) | %got_pc_lo12(sym)
R_LARCH_TLS_GD_PCREL20_S2 | R_LARCH_TLS_LD_PCREL20_S2
```
Note: For initial-exec form, since it involves the conversion from IE to
LE, we will implement it in a future patch.
Commit: 318bef91eafb7e01be707b9919c36ef424840041
https://github.com/llvm/llvm-project/commit/318bef91eafb7e01be707b9919c36ef424840041
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/OptionalValueConversionCheck.cpp
Log Message:
-----------
[clang-tidy][NFC]refactor matcher for bugprone-optional-value-conversion (#130415)
The old `constructFrom` has hidden requirement which TypeMatcher must be used before ArgumentMatcher because there are bind inside.
Inlining this function to make it more intuitive.
Commit: 5cfc37b3458b89927e76950c9498152ab729803e
https://github.com/llvm/llvm-project/commit/5cfc37b3458b89927e76950c9498152ab729803e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
Log Message:
-----------
[clang-tidy][NFC]clean ConstCorrectnessCheck (#130493)
Commit: 23d5123a08ad376d9a3cb2700fe2da1f8c1cb006
https://github.com/llvm/llvm-project/commit/23d5123a08ad376d9a3cb2700fe2da1f8c1cb006
Author: Petr Hosek <phosek at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
Log Message:
-----------
Revert "[llvm] add support for mustache templating language" (#130720)
Reverts llvm/llvm-project#105893 since it broke all builders that use
GCC as the compiler.
Commit: f120b0d6d2629e226e6fa75974fbd17f46206bca
https://github.com/llvm/llvm-project/commit/f120b0d6d2629e226e6fa75974fbd17f46206bca
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[MC] Remove MCSymbolRefExpr::VK_Invalid in favor of getVaraintKindForName returning std::optional
so that when the enum members are moved to XXXTargetExpr::VariantKind,,
they do not need to implement an invalid value.
Commit: f4218753ad93dd44b019e38bae61dceb93514aee
https://github.com/llvm/llvm-project/commit/f4218753ad93dd44b019e38bae61dceb93514aee
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/AST/ByteCode/if.cpp
A clang/test/CodeGen/p0963r3.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/Parser/decomposed-condition.cpp
M clang/test/SemaCXX/decomposed-condition.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P0963R3 "Structured binding declaration as a condition" (#130228)
This implements the R2 semantics of P0963.
The R1 semantics, as outlined in the paper, were introduced in Clang 6.
In addition to that, the paper proposes swapping the evaluation order of
condition expressions and the initialization of binding declarations
(i.e. std::tuple-like decompositions).
Commit: 4a4444c0b2f68bec1db8e2cc8d133982d5a339e3
https://github.com/llvm/llvm-project/commit/4a4444c0b2f68bec1db8e2cc8d133982d5a339e3
Author: David Green <david.green at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Analysis/CostModel.cpp
Log Message:
-----------
[CodeModel] Factor getCost out of CostModelPrinter loop. NFC
This helps in a follow-up so that it can be called multiple times with
different cost types.
Commit: 8758e5fe47b5cf2d39d94ee6dc8834755c7687d9
https://github.com/llvm/llvm-project/commit/8758e5fe47b5cf2d39d94ee6dc8834755c7687d9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstSimplify/ConstProp/inttoptr-gep-index-width.ll
Log Message:
-----------
[ConstantFolding] Fix handling of index width != pointer width (#130608)
Per LangRef:
> The offsets are then added to the low bits of the base address up to
the index type width, with silently-wrapping two’s complement
arithmetic. If the pointer size is larger than the index size, this
means that the bits outside the index type width will not be affected.
The transform as implemented was doubly wrong, because it just truncated
the original base pointer to the index width, losing the top bits
entirely. Make sure we preserve the bits and use wrapping arithmetic
within the low bits.
Commit: 7ecb0d03a4d78357adc35137a3109ee305ac4fff
https://github.com/llvm/llvm-project/commit/7ecb0d03a4d78357adc35137a3109ee305ac4fff
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lldb/source/Core/Mangled.cpp
Log Message:
-----------
[lldb][Mangled] Use early-return style in GetDemangledName (#130622)
This patch refactors `Mangled::GetDemangledName` to use LLVM's preferred
early-return style. I'm planning on introducing a way to force
re-demangling of names in a future patch, and this stylisitc cleanup
makes that easier to reason about.
Also performed small cleanups where I could:
* we can handle `eManglingSchemeNone` inside the switch instead of a
separate if-block
* removed some redundant explicit StringRef<->C-string conversions
Commit: cdd560eead457bcc6dbb28ef88d868bc68cfd7e6
https://github.com/llvm/llvm-project/commit/cdd560eead457bcc6dbb28ef88d868bc68cfd7e6
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
[lldb][XcodeSDK] Simplify logic that adjusts sysroot during XcodeSDK merging (#130640)
The `DW_AT_APPLE_sdk` should always be equal to the filename of the
`DW_AT_LLVM_sysroot`. We can use this property to simplify
`XcodeSDK::Merge` to no longer manually adjust the sysroot filename.
Instead we simply update the sysroot filename with merged SDK name.
This should be an NFC change.
Commit: cb7298f66d62a3548fcf3bd230304067ecf30d17
https://github.com/llvm/llvm-project/commit/cb7298f66d62a3548fcf3bd230304067ecf30d17
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/ASTMatchers/ASTMatchers.h
Log Message:
-----------
[AstMatcher][NFC]fix doc gen for ast matchers (#130726)
1. dump-ast-matchers.py does not depend on pwd
2. fix some warning in python3
Commit: 1ddf18057a5aa1ee7010ec262ccfc80c39b99bf6
https://github.com/llvm/llvm-project/commit/1ddf18057a5aa1ee7010ec262ccfc80c39b99bf6
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/copy-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang] introduce fir.copy to avoid load store of aggregates (#130289)
Introduce a FIR operation to do memcopy/memmove of compile time constant size types.
This is to avoid requiring derived type copies to done with load/store
which is badly supported in LLVM when the aggregate type is "big" (no
threshold can easily be defined here, better to always avoid them for
fir.type).
This was the root cause of the regressions caused by #114002 which introduced a
load/store of fir.type<> which caused hand/asserts to fire in LLVM on
several benchmarks.
See https://llvm.org/docs/Frontend/PerformanceTips.html#avoid-creating-values-of-aggregate-type
Commit: 976e41302411e511ab0e99922288185b5939bf54
https://github.com/llvm/llvm-project/commit/976e41302411e511ab0e99922288185b5939bf54
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Mangled.h
Log Message:
-----------
[lldb][Mangled][NFC] Clean up member variable doxygen comments
Commit: 148a7ae328b431f07c0d1fca9e0e9e232c054967
https://github.com/llvm/llvm-project/commit/148a7ae328b431f07c0d1fca9e0e9e232c054967
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx-shift.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/known-bits-vector.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add support for AVX1 and/or/xor/andnp concatenation (#130645)
Limit AVX1-only targets to cases where at least one operand is
beneficial to concatenate, but avoid unnecessary 256-bit NOT patterns
unless it allows further folds.
There are still a large number of regressions when limiting AVX2+
targets to beneficial concatenation - so added a TODO for now.
Commit: 1ff10fa82fff83bb2f0a5c1ffde6203b52bc9619
https://github.com/llvm/llvm-project/commit/1ff10fa82fff83bb2f0a5c1ffde6203b52bc9619
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[LV] Limits the splat operations be hoisted must not be defined by a recipe. (#117138)
Issue https://github.com/llvm/llvm-project/issues/117139
Commit: 055db3ec334221408f5187ce507c45925ceeb143
https://github.com/llvm/llvm-project/commit/055db3ec334221408f5187ce507c45925ceeb143
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
Log Message:
-----------
[LV] Optimise latch exit induction users for some early exit loops (#128880)
This is the first of two PRs that attempts to improve the IR
generated in the exit blocks of vectorised loops with uncountable
early exits. In this PR I am improving the generated code for
users of induction variables in early exit loops that have a
unique exit block, when exiting via the latch.
I have moved some of the code for calculating the exit values in
latch exit blocks from `optimizeInductionExitUsers` into a new
function `optimizeLatchExitInductionUser`.
I intend to follow this up very soon with another patch to
optimise the code for induction users in the vector.early.exit
block.
Commit: a542a083093e7013aabe921cc92f623861a7467d
https://github.com/llvm/llvm-project/commit/a542a083093e7013aabe921cc92f623861a7467d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/reduction-equivalence.f90
Log Message:
-----------
[flang][OpenMP] Support reduction of variables in EQUIVALENCE (#130607)
These previously crashed the compiler because !fir.ptr (not wrapped
inside of a box) was not supported.
Real POINTER variables are supported as !fir.box<!fir.ptr<>>. The
version for EQUIVALENCE doesn't need to do anything different to
!fir.ref<>.
Commit: f590843616d22338ca4bfd1c8623a5dc7c76b6ec
https://github.com/llvm/llvm-project/commit/f590843616d22338ca4bfd1c8623a5dc7c76b6ec
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[mlir] Fix bazel build after 205c532
Commit: cdf18331eb51ba5953182a2fb9248640f43a7d13
https://github.com/llvm/llvm-project/commit/cdf18331eb51ba5953182a2fb9248640f43a7d13
Author: David Green <david.green at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Analysis/CostModel.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[CostModel] Add -cost-kind=all costmodel output (#130490)
In order to make the different cost model kinds easier to test, and to
manage the complexity of all the different variants, this patch
introduces a -cost-kind=all option that will print the output of all
cost model kinds. It feel especially helpful for tests that already have
multiple run lines (with / without +fullfp16 for example).
It currently produces the output:
```
Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %F16 = fadd half undef, undef
```
The output is collapsed into a single value if all costs are the same.
Invalid costs print "Invalid" via the normal InstructionCost printing.
Two test files are updated to show some examples with
-intrinsic-cost-strategy=type-based-intrinsic-cost and Invalid costs.
Once we have something we are happy with I will try to use this to
update more tests, as in b021bdbb3997ef6dd13980dc44f24754f15f3652 but
for more variants.
Commit: 4d17ae7776ef6ffe2dd04c146632282ac173cae6
https://github.com/llvm/llvm-project/commit/4d17ae7776ef6ffe2dd04c146632282ac173cae6
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/test/Dialect/Affine/loop-tiling.mlir
Log Message:
-----------
[MLIR][Affine] Fix affine-loop-tile zero cache size corner case crash (#130526)
Fixes: https://github.com/llvm/llvm-project/issues/64979
Commit: 63635c174610344a47c686a9a8e5cc266f39a320
https://github.com/llvm/llvm-project/commit/63635c174610344a47c686a9a8e5cc266f39a320
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/requires_ast_print.cpp
M clang/test/OpenMP/requires_messages.cpp
M clang/test/OpenMP/target_data_ast_print.cpp
M clang/test/OpenMP/target_map_messages.cpp
M clang/tools/libclang/CIndex.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[clang] [OpenMP] New OpenMP 6.0 self_maps clause (#129888)
Initial parsing/sema support for self maps in map and requirement clause
[Sections 7.9.6 and 10.5.1.6 in OpenMP 6.0 spec]
Commit: 26ecf978951b79138b76afbba6a4adc926d28507
https://github.com/llvm/llvm-project/commit/26ecf978951b79138b76afbba6a4adc926d28507
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
Log Message:
-----------
[LoopVectorize] Further improve cost model for early exit loops (#126235)
Following on from #125058, this patch takes into account the
work done in the vector early exit block when assessing the
profitability of vectorising the loop. I have renamed
areRuntimeChecksProfitable to isOutsideLoopWorkProfitable and
we now pass in the early exit costs. As part of this, I have
added the ExtractFirstActive opcode to VPInstruction::computeCost.
It's worth pointing out that when we assess profitability of the
loop we calculate a minimum trip count and compare that against
the *maximum* trip count. However, since the loop has an early
exit the runtime trip count can still end up being less than the
minimum. Alternatively, we may never take the early exit at all
at runtime and so we have the opposite problem of over-estimating
the cost of the loop. The loop vectoriser cannot simultaneously
take two contradictory positions and so I feel the only sensible
thing to do is be conservative and assume the loop will be more
expensive than loops without early exits.
We may find in future that we need to adjust the cost according to
the probability of taking the early exit. This will become even
more important once we support multiple early exits. However, we
have to start somewhere and we can always revisit this later.
Commit: dbbadfd770b76d3917b47572af74f590c82eb632
https://github.com/llvm/llvm-project/commit/dbbadfd770b76d3917b47572af74f590c82eb632
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/llvm.modf-win32.ll
Log Message:
-----------
[SDAG][X86] Promote float FMODF to double on 32-bit Windows (#130636)
On 32-bit MSVC `modff` is not a defined symbol -- only `modf` (`modff`
is an inline function). Promoting FMODF to double in this case ensures
we end up calling `modf` -- matching the behaviour of the CRT headers.
Commit: 1b455df780ed1d578b63f969c636fe78b2eb6014
https://github.com/llvm/llvm-project/commit/1b455df780ed1d578b63f969c636fe78b2eb6014
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
A mlir/test/Integration/Dialect/MemRef/copy-runtime-verification.mlir
Log Message:
-----------
[mlir][memref] Add runtime verification for `memref.copy` (#130437)
Implement runtime op verification for `memref.copy`. Only ranked memrefs
are verified at the moment.
Commit: 29f5d5bea92f937d4e2fea7fdd16036fff528adf
https://github.com/llvm/llvm-project/commit/29f5d5bea92f937d4e2fea7fdd16036fff528adf
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/OpenMP/privatization-proc-ptr.f90
Log Message:
-----------
[flang][OpenMP] Fix privatization of procedure pointers (#130336)
Fixes #121720
Commit: 849abd8c05cf9899cd943a7b56bae57f93ea80cb
https://github.com/llvm/llvm-project/commit/849abd8c05cf9899cd943a7b56bae57f93ea80cb
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][linalg] Add transpose support for reshape as consumer fusion (#130344)
During https://github.com/llvm/llvm-project/pull/129128 adding reshape
as consumer fusion handling of linalg.transpose was missed. This PR adds
that.
Also transpose reshape as producer fusion test is updated to static
sizes as that is more likely to catch any issues with the permutation
vector in the verifier if the shapes dont match up.
---------
Signed-off-by: Nirvedh Meshram <nirvedh at gmail.com>
Commit: 5c8760b1abb677d5eb65ed9a18521d0a6d5121cc
https://github.com/llvm/llvm-project/commit/5c8760b1abb677d5eb65ed9a18521d0a6d5121cc
Author: David Green <david.green at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
Log Message:
-----------
[AArch64] Update arith-fp.ll codegen test. NFC
A run line with and without +fullfp16 is added to check the differences between
the two, and the fp16 tests are separated out to keep the other check lines
simpler. FP128 tests are added for all operations, and fmuladd tests are added
similar to fma.
Commit: 405c28bb10928a59c5647ec0768387e27a64f5d0
https://github.com/llvm/llvm-project/commit/405c28bb10928a59c5647ec0768387e27a64f5d0
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A clang/test/Analysis/builtin_assume.cpp
M clang/test/Analysis/out-of-bounds-new.cpp
Log Message:
-----------
[NFC][analyzer] Split [[assume]] tests to a separate file (#130763)
Recently commit 7e5821bae80db3f3f0fe0d5f8ce62f79e548eed5 (which is a
re-application of 89da344e5879e5347b5057520d5230e40ae24831) added some
tests to `out-of-bounds-new.cpp`, which use a very simple out of bounds
report to reveal the internal state of the analyzer, but are otherwise
completely unrelated to the checker `security.ArrayBound`, which is
tested in `out-of-bounds-new.cpp`.
(Instead, they test handling of `__builtin_assume` and `[[assume()]]`
annotations.)
This commit reverts `out-of-bounds-new.cpp` to its previous state and
moves the new tests to a separate test file.
Commit: a7d7db71db2f4b1bca2484f2039ac57b01566a0e
https://github.com/llvm/llvm-project/commit/a7d7db71db2f4b1bca2484f2039ac57b01566a0e
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A clang/test/Analysis/ArrayBound/assumption-reporting.c
A clang/test/Analysis/ArrayBound/assumptions.c
A clang/test/Analysis/ArrayBound/brief-tests.c
A clang/test/Analysis/ArrayBound/cplusplus.cpp
A clang/test/Analysis/ArrayBound/verbose-tests.c
R clang/test/Analysis/out-of-bounds-constraint-check.c
R clang/test/Analysis/out-of-bounds-diagnostics.c
R clang/test/Analysis/out-of-bounds-new.cpp
R clang/test/Analysis/out-of-bounds-notes.c
R clang/test/Analysis/out-of-bounds.c
Log Message:
-----------
[NFC][analyzer] OOB test consolidation IV: rename files (#129697)
This commit finishes the reorganization of the tests for the checker
`security.ArrayBound`.
Previously these tests were all named `out-of-bounds-*` which was only
weakly connected to the checker name; this commit moves them to a
directory named after the checker (`ArrayBound`). I decided to use a
directory instead of the more common filename prefix ("poor man's
directory") system because it seems to be a more natural use of the
filesystem and there are already a few precedents for it.
I also added (or edited) comments at the beginning of each test file to
describe their purpose; and I added a single new testcase to highlight
that the assumption note tags can be added to reports by any checker.
(Previously all tests in the file triggered out-of-bounds reports to
reveal the note tags; but that was just for convenience.)
Commit: 3df8be3ee906374b992268683b59c9dd4780aaef
https://github.com/llvm/llvm-project/commit/3df8be3ee906374b992268683b59c9dd4780aaef
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Extend metrics container to log BuildKite metrics (#129699)
The current container focuses on Github metrics. Before deprecating
BuildKite, we want to make sure the new infra quality is better, or at
least the same.
Being able to compare buildkite metrics with github metrics on grafana
will allow us to easily present the comparison.
This PR requires https://github.com/llvm/llvm-zorg/pull/400 to be merged
first.
Commit: 5d50af3f0368847ab9ce1d86cb6e46ffaf317b59
https://github.com/llvm/llvm-project/commit/5d50af3f0368847ab9ce1d86cb6e46ffaf317b59
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
Revert "[CI] Extend metrics container to log BuildKite metrics" (#130770)
Reverts llvm/llvm-project#129699
Commit: 389a705b8e7cb0d9ef460e1dc61e5fbf287ed0dc
https://github.com/llvm/llvm-project/commit/389a705b8e7cb0d9ef460e1dc61e5fbf287ed0dc
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Rework github workflow processing (#130317)
Before this patch, the job/workflow name impacted the metric name,
meaning a change in the workflow definition could break monitoring. This
patch adds a map to get a stable name on metrics from a workflow name.
In addition, it reworks a bit how we track the last processed workflow:
the github queries are broken if filtering is applied, meaning we have a
list of workflow, ordered by 'created_at', which mixes completed &
running workflows.
We have no guarantees over the order of completion, meaning we cannot
stop at the first completed job we found (even per-workflow).
This PR processed the last 1000 workflows, but allows an early stop if
the created_at time is older than 8 hours. This means we could miss
long-running workflows (>8 hours), and if the number of workflows
started before another one completes becomes high (>1000), we'll miss
it.
To detect this kind of behavior, a new metric is added "oldest workflow
processed", which should at least indicate if the depth is too small.
An alternative without arbitrary cut would be to initially parse all
workflows, and then record the last non-completed one we find and always
start from the last (moving the lower bound as they complete). But LLVM
has forever-queued workflows runs (>1 years), hence this would cause us
to iterate over a very large number of jobs.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 7341753a2e23360c84d4ae195c3778b735193253
https://github.com/llvm/llvm-project/commit/7341753a2e23360c84d4ae195c3778b735193253
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
A flang-rt/cmake/clang_gcc_root.cpp
A flang-rt/cmake/quadmath_wrapper.h.in
M flang-rt/lib/quadmath/CMakeLists.txt
M flang-rt/lib/quadmath/complex-math.h
M flang-rt/lib/quadmath/math-entries.h
Log Message:
-----------
[Flang-RT] Environment introspection for quadmath.h (#130411)
When compiling Flang-RT with Clang, query Clang for the GCC installation
it uses. If found, create `quadmath_wrapper.h` that points to the
`quadmath.h` of that GCC installation.
`quadmath.h` is only available when compiling with gcc, and Clang has no
equivalent even though gcc's version compiles fine with Clang (at least
up to and including gcc 13). It is still available into gcc's
installation resource dir (in constrast to a system-wide indirectory
such as `/usr/include` or `/usr/local/include`) and therefore not
available to any compiler other than the gcc of that installation.
quadmath may also be a different OS package than gcc itself, so it is
not necessarily presesent.
Clang actually already appropriates a GCC installation for its libraries
such that `libquadmath.a` is already found, but it does not do so for
the include paths. Because adding that directory to the header search
path may have wide-reaching consquences, we create only a wrapper header
that points to the real `quadmath.h` in the same GCC installation that
Clang uses.
Commit: 913d077f29c2870cc47a428a9a3c67e47033fe86
https://github.com/llvm/llvm-project/commit/913d077f29c2870cc47a428a9a3c67e47033fe86
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Change Rescale zero points to be inputs (#130340)
*Update RescaleOp to use zero-point as operands instead of attributes.
*Check input_zp data type against the input and output_zp data type
against the output.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Co-authored-by: Peng Sun <peng.sun at arm.com>
Commit: fcce3084cb43a12f2e6e19b8e5b655f3df8739d6
https://github.com/llvm/llvm-project/commit/fcce3084cb43a12f2e6e19b8e5b655f3df8739d6
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
Log Message:
-----------
[X86][AVX10.2] Fix unexpected larger scope (#130767)
https://godbolt.org/z/oM6bcqEnr
Commit: bfeea10460d155d9b3484bed25b5dc60a9755c90
https://github.com/llvm/llvm-project/commit/bfeea10460d155d9b3484bed25b5dc60a9755c90
Author: Maksim Sabianin <maksim.sabianin at intel.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A llvm/include/llvm/Transforms/Utils/SYCLSplitModule.h
A llvm/include/llvm/Transforms/Utils/SYCLUtils.h
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/SYCLSplitModule.cpp
A llvm/lib/Transforms/Utils/SYCLUtils.cpp
A llvm/test/tools/llvm-split/SYCL/device-code-split/amd-kernel-split.ll
A llvm/test/tools/llvm-split/SYCL/device-code-split/complex-indirect-call-chain.ll
A llvm/test/tools/llvm-split/SYCL/device-code-split/module-split-func-ptr.ll
A llvm/test/tools/llvm-split/SYCL/device-code-split/one-kernel-per-module.ll
A llvm/test/tools/llvm-split/SYCL/device-code-split/split-by-source.ll
A llvm/test/tools/llvm-split/SYCL/device-code-split/split-with-kernel-declarations.ll
M llvm/tools/llvm-split/llvm-split.cpp
Log Message:
-----------
[offload][SYCL] Add SYCL Module splitting (#119713)
This patch adds SYCL Module splitting - the necessary step in the SYCL
compilation pipeline. Only 2 splitting modes are being added in this
patch: by kernel and by source.
Commit: e3bef37971ae117f49a503e6a9f4dffd3a9a4d80
https://github.com/llvm/llvm-project/commit/e3bef37971ae117f49a503e6a9f4dffd3a9a4d80
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
R llvm/include/llvm/Transforms/Utils/SYCLSplitModule.h
R llvm/include/llvm/Transforms/Utils/SYCLUtils.h
M llvm/lib/Transforms/Utils/CMakeLists.txt
R llvm/lib/Transforms/Utils/SYCLSplitModule.cpp
R llvm/lib/Transforms/Utils/SYCLUtils.cpp
R llvm/test/tools/llvm-split/SYCL/device-code-split/amd-kernel-split.ll
R llvm/test/tools/llvm-split/SYCL/device-code-split/complex-indirect-call-chain.ll
R llvm/test/tools/llvm-split/SYCL/device-code-split/module-split-func-ptr.ll
R llvm/test/tools/llvm-split/SYCL/device-code-split/one-kernel-per-module.ll
R llvm/test/tools/llvm-split/SYCL/device-code-split/split-by-source.ll
R llvm/test/tools/llvm-split/SYCL/device-code-split/split-with-kernel-declarations.ll
M llvm/tools/llvm-split/llvm-split.cpp
Log Message:
-----------
Revert "[offload][SYCL] Add SYCL Module splitting (#119713)"
This reverts commit bfeea10460d155d9b3484bed25b5dc60a9755c90.
Commit: da0f9e75d8588bf0adb54060ee77656edfdc1207
https://github.com/llvm/llvm-project/commit/da0f9e75d8588bf0adb54060ee77656edfdc1207
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/XCore/dwarf_debug.ll
M llvm/test/DebugInfo/X86/inline-seldag-test.ll
Log Message:
-----------
Reland: [MC] output inlined-at debug info (#106230) (#130306)
Reland https://github.com/llvm/llvm-project/pull/106230
The original PR was reverted due to compilation time regression.
This PR fixed that by adding a condition OutStreamer->isVerboseAsm() to
the generation of extra inlined-at debug info, so that it does not
affect normal compilation time.
Currently MC print source location of instructions in comments in
assembly when debug info is available, however, it does not include
inlined-at locations when a function is inlined.
For example, function foo is defined in header file a.h and is called
multiple times in b.cpp. If foo is inlined, current assembly will only
show its instructions with their line numbers in a.h. With inlined-at
locations, the assembly will also show where foo is called in b.cpp.
This patch adds inlined-at locations to the comments by using
DebugLoc::print. It makes the printed source location info consistent
with those printed by machine passes.
Commit: 9cc477be6ea1a4f7dd55e3dfa66a59c2dc59da25
https://github.com/llvm/llvm-project/commit/9cc477be6ea1a4f7dd55e3dfa66a59c2dc59da25
Author: lakshayk-nv <lakshayk at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[llvm-exegesis][AArch64] Handle register classes FPR8/16/32 and FPCR (#130595)
Current implementation (for AArch64) only supports the GRP32, GPR64,
FPR64/128, PPR16 and ZPR128 register classes. This adds support for
the other floating point register classes to initialize registers and avoid
the "setReg is not implemented" warning for these cases.
Commit: 9f30815b1c3ee0a20954ea596ea2aa5612bf5ec3
https://github.com/llvm/llvm-project/commit/9f30815b1c3ee0a20954ea596ea2aa5612bf5ec3
Author: Nikolay Panchenko <npanchen at modular.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/Support/JSON.h
M llvm/lib/Support/JSON.cpp
Log Message:
-----------
[JSON][NFC] Support `print` and `dump` methods in `json::Value` (#129302)
Commit: b9d6b62721036c5cf4e019dcad8314d4efe54035
https://github.com/llvm/llvm-project/commit/b9d6b62721036c5cf4e019dcad8314d4efe54035
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Fix [mlir] Fix bazel build after 205c532 round 2. (#130765)
Commit: e858b10917046b83234bf1931485df414fcded3c
https://github.com/llvm/llvm-project/commit/e858b10917046b83234bf1931485df414fcded3c
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-phi-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/addsub.ll
Log Message:
-----------
Revert "[SLP]Reduce number of alternate instruction, where possible"
This caused failures such as:
Instruction does not dominate all uses!
%29 = insertelement <8 x i64> %28, i64 %xor6.i.5, i64 6
%17 = shufflevector <8 x i64> %29, <8 x i64> poison, <6 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
see comment on https://github.com/llvm/llvm-project/pull/123360
> Previous version was reviewed here https://github.com/llvm/llvm-project/pull/123360
> It is mostly the same, adjusted after graph-to-tree transformation
>
> Patch tries to remove wide alternate operations.
> Currently SLP vectorizer emits something like this:
> ```
> %0 = add i32
> %1 = sub i32
> %2 = add i32
> %3 = sub i32
> %4 = add i32
> %5 = sub i32
> %6 = add i32
> %7 = sub i32
>
> transformes to
>
> %v1 = add <8 x i32>
> %v2 = sub <8 x i32>
> %res = shuffle %v1, %v2, <0, 9, 2, 11, 4, 13, 6, 15>
> ```
> i.e. half of the results are just unused. This leads to increased
> register pressure and potentially doubles number of operations.
>
> Patch introduces SplitVectorize mode, where it splits the operations by
> opcodes and produces instead something like this:
> ```
> %v1 = add <4 x i32>
> %v2 = sub <4 x i32>
> %res = shuffle %v1, %v2, <0, 4, 1, 5, 2, 6, 3, 7>
> ```
> It allows to improve the performance by reducing number of ops. Also, it
> turns on some other improvements, like improved graph reordering.
>
> [...]
This reverts commit 9d37e61fc77d3d6de891c30630f1c0227522031d as well as
the follow-up commit 72bb0a9a9c6fdde43e1e191f2dc0d5d2d46aff4e.
Commit: f1e36759d2e6c26d2d5825f955c51fd595909b52
https://github.com/llvm/llvm-project/commit/f1e36759d2e6c26d2d5825f955c51fd595909b52
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGenCXX/x86_64-arguments.cpp
A clang/test/SemaHLSL/Language/VectorOutOfRange-errors.hlsl
Log Message:
-----------
[HLSL] error on out of bounds vector accesses (#128952)
Add Sema checking and diagnostics to error on out of bounds vector
accesses
Add tests
Closes #91640
---------
Co-authored-by: Chris B <beanz at abolishcrlf.org>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 5038e2f81445c46b94a1f219a0f4e10606f04cd2
https://github.com/llvm/llvm-project/commit/5038e2f81445c46b94a1f219a0f4e10606f04cd2
Author: lntue <lntue at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M libc/src/__support/FPUtil/FMA.h
M libc/src/__support/FPUtil/double_double.h
M libc/src/__support/FPUtil/multiply_add.h
M libc/src/__support/macros/properties/cpu_features.h
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/cbrt.cpp
M libc/src/math/generic/cos.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/cospif.cpp
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/exp2m1f16.cpp
M libc/src/math/generic/expm1f.cpp
M libc/src/math/generic/expm1f16.cpp
M libc/src/math/generic/fmul.cpp
M libc/src/math/generic/hypotf.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log10f16.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log2f16.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/logf16.cpp
M libc/src/math/generic/pow.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction_double_common.h
M libc/src/math/generic/sin.cpp
M libc/src/math/generic/sincos.cpp
M libc/src/math/generic/sincos_eval.h
M libc/src/math/generic/sincosf.cpp
M libc/src/math/generic/sincosf16_utils.h
M libc/src/math/generic/sincosf_utils.h
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/tan.cpp
M libc/src/math/generic/tanf.cpp
Log Message:
-----------
[libc] Provide more fine-grained control of FMA instruction for ARM targets. (#130700)
Commit: 356bf3fa2dddb3cb8c4e72a3978d1179e5aaa3c2
https://github.com/llvm/llvm-project/commit/356bf3fa2dddb3cb8c4e72a3978d1179e5aaa3c2
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/pointer-default-init.f90
Log Message:
-----------
Reland " [flang] Rely on global initialization for simpler derived types" (#130290)
Currently, all derived types are initialized through `_FortranAInitialize`, which is functionally correct, but bears poor runtime performance. This patch falls back on global initialization for "simpler" derived types to speed up the initialization.
Note: this relands #114002 with the fix for the LLVM timeout regressions that have been seen. The fix is to use the added fir.copy to avoid aggregate load/store.
Co-authored-by: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Commit: d48a36f5833aa076402f733216bae6aef6be666c
https://github.com/llvm/llvm-project/commit/d48a36f5833aa076402f733216bae6aef6be666c
Author: Eric Astor <epastor at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/test/tools/llvm-ml/macro.asm
Log Message:
-----------
[ms] [llvm-ml] Allow optional parenthesized arguments for macros (#129905)
We match ML64.EXE, which allows optional parentheses around a macro's arguments.
Commit: 21f1ef330f22faddef0c820fb4c1fa912bc05323
https://github.com/llvm/llvm-project/commit/21f1ef330f22faddef0c820fb4c1fa912bc05323
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#130706)
Commit: 8c2714e44802cb36eb556a3f2940bbc2e512f6be
https://github.com/llvm/llvm-project/commit/8c2714e44802cb36eb556a3f2940bbc2e512f6be
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#130707)
Commit: 3339632e9c68ff71071b5ad72b33f7a8ac5658f6
https://github.com/llvm/llvm-project/commit/3339632e9c68ff71071b5ad72b33f7a8ac5658f6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LCSSA.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#130709)
Commit: f33dca41a3a0c4cea90b7c476b1cff9cade430e7
https://github.com/llvm/llvm-project/commit/f33dca41a3a0c4cea90b7c476b1cff9cade430e7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
Log Message:
-----------
[llvm-rtdyld] Avoid repeated hash lookups (NFC) (#130711)
Commit: 7c77a4655ca56eab7e1a4419f0013b514ab42473
https://github.com/llvm/llvm-project/commit/7c77a4655ca56eab7e1a4419f0013b514ab42473
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/known-bits-vector.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/mulvi32.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)
Only concatenate ISD::VECTOR_SHUFFLE nodes if at least one operand is beneficial to concatenate.
Commit: fb397ab1e5f32e179094580174f42115961b7790
https://github.com/llvm/llvm-project/commit/fb397ab1e5f32e179094580174f42115961b7790
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/aix-builtin-mapping.c
M clang/test/CodeGen/builtin-attributes.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGen/math-libcalls.c
Log Message:
-----------
Reland "[clang] Lower modf builtin using `llvm.modf` intrinsic" (#130761)
Reverts
https://github.com/llvm/llvm-project/commit/c40f0fe4348bb9304b95bd317665bf1cb2bdcc85
Original description:
This updates the existing modf[f|l] builtin to be lowered via the
llvm.modf.* intrinsic (rather than directly to a library call).
The Windows 32-bit x86 missing `modff` symbol issue should have been
solved in: https://github.com/llvm/llvm-project/pull/130636.
Commit: 7129205816ca8c7929ab0b44168830ce54287dd3
https://github.com/llvm/llvm-project/commit/7129205816ca8c7929ab0b44168830ce54287dd3
Author: John Brawn <john.brawn at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize] Move checking for OptForSize into the cost model (NFC) (#130752)
Move OptForSizeBasedOnProfile into the cost model and rename it to
OptForSize, as shouldOptimizeForSize checks both the function attribute
and profile. This being done in preparation for OptForSize being used in
the cost model.
Commit: 222b99d3aac577a561592f160b9ac39f8740d3e5
https://github.com/llvm/llvm-project/commit/222b99d3aac577a561592f160b9ac39f8740d3e5
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/spillv16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] update waitcnt for true16 (#128927)
update waitcnt pass to check hi16 and lo16 in true16 mode
---------
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: b334321678d4df2d8b1572301c827cae4d4097e2
https://github.com/llvm/llvm-project/commit/b334321678d4df2d8b1572301c827cae4d4097e2
Author: Valentin Churavy <v.churavy at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/atomic-unordered.ll
M llvm/test/CodeGen/X86/implicit-null-check.ll
M llvm/test/CodeGen/X86/membarrier.ll
M llvm/test/CodeGen/X86/mfence.ll
Log Message:
-----------
[X86] Prefer `lock or` over mfence (#106555)
Originally discussed in https://reviews.llvm.org/D129947
LLVM currently emits `mfence` for `__atomic_thread_fence(seq_cst)`. On
modern CPUs lock or is more efficient and provides the same sequential
consistency. GCC 11 made this switch as well (see
https://gcc.gnu.org/pipermail/gcc-cvs/2020-July/314418.html)
and https://reviews.llvm.org/D61863 and https://reviews.llvm.org/D58632
moved into this direction as well, but didn't touch fence seq_cst.
This switches to `lock or` on all x64 systems, and leaves `__builtin_ia32_mfence` for folks who
want this precise instruction.
Commit: f3e55944a9468842746467494dd89724a66fc533
https://github.com/llvm/llvm-project/commit/f3e55944a9468842746467494dd89724a66fc533
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A mlir/test/mlir-tblgen/rewriter-attributes-properties.td
M mlir/tools/mlir-tblgen/RewriterGen.cpp
Log Message:
-----------
[mlir][ODS] Switch declarative rewrite rules to properties structs (#124876)
Now that we have collective builders that take
`const [RelevantOp]::Properties &` arguments, we don't need to serialize
all the attributes that'll be set during an output pattern into a
dictionary attribute. Similarly, we can use the properties struct to get
the attributes instead of needing to go through the big if statement in
getAttrOfType<>().
This also enables us to have declarative rewrite rules that match
non-attribute properties in a future PR.
This commit also adds a basic test for the generated matchers since
there didn't seem to already be one.
Commit: c542f425796d751fcd44ad1899691cfa1a1e444a
https://github.com/llvm/llvm-project/commit/c542f425796d751fcd44ad1899691cfa1a1e444a
Author: David Green <david.green at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/abs.ll
M llvm/test/Analysis/CostModel/AArch64/arith-overflow.ll
M llvm/test/Analysis/CostModel/AArch64/arith-ssat.ll
M llvm/test/Analysis/CostModel/AArch64/arith-usat.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Update cost test to use -cost-kind=all. NFC
This is essentially the tests from b021bdbb3997 re-done with the new cost-model
output format from #130490, to add cost-model coverage for all the cost kinds.
More to come..
Commit: a71c9d8438622013eddf04cf4c81ab0f22a83055
https://github.com/llvm/llvm-project/commit/a71c9d8438622013eddf04cf4c81ab0f22a83055
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ValistChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/Checker.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Remove CheckerNameRef::getName() (#130780)
`CheckerNameRef` is a trivial wrapper around a `StringRef` which is
guaranteed to be owned by the `CheckerRegistry` (the only `friend` of
the class) because other code can't call the private constructor.
This class had offered two ways to recover the plain `StringRef`: an an
`operator StringRef()` for implicit conversion and a method `StringRef
getName()` which could be called explicitly.
However this method name was really confusing, because it implies "get
the name of this object" instead of "get this name as a plain
`StringRef`"; so I removed it from the codebase and used
`static_cast<StringRef>` in the two locations where the cast wasn't
performed implicitly.
This commit "prepares the ground" for planned improvements in checker
name handling.
Commit: d8d2e0779a4020aa72b39ab2baf8c4c504877a2a
https://github.com/llvm/llvm-project/commit/d8d2e0779a4020aa72b39ab2baf8c4c504877a2a
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Even more BUILD.bazel fixes for commit 205c532. (#130784)
Commit: 1fe463182cead6e7c6119ab410eae9e9d969325a
https://github.com/llvm/llvm-project/commit/1fe463182cead6e7c6119ab410eae9e9d969325a
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
A llvm/test/MC/Hexagon/align-leb128.s
M llvm/test/MC/Hexagon/align.s
Log Message:
-----------
[hexagon] Prevent alignment search beyond a label (#130631)
When searching for packets to .align, don't consider ones which would
require padding beyond a label.
There are two problems with padding beyond a label:
- the distance between labels may increase for some offsets to become
too large;
- u/sleb128 values that encode a difference will not be updated because
they are computed before the align command is handled.
This is more a short-term fix/hack. The proper solution would be to
unify `.align` and `.falign` handling and move it to the layout loop.
Commit: 93d41d814816d2933735e3d238e6eebb91dfdc30
https://github.com/llvm/llvm-project/commit/93d41d814816d2933735e3d238e6eebb91dfdc30
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use ElementCount::isKnownLT to factor code (NFC) (#130596)
Commit: f90aa418978748c0613036b0285bb80af40570b7
https://github.com/llvm/llvm-project/commit/f90aa418978748c0613036b0285bb80af40570b7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M llvm/include/llvm/Support/LockFileManager.h
M llvm/lib/Support/LockFileManager.cpp
Log Message:
-----------
[Support] Remove output file checks from `LockFileManager` (#130395)
Currently, `LockFileManager` assumes the owner of the lock file creates
an output file. This is problematic for at least three reasons:
1. It is orthogonal to the main purpose of this class - mutual
exclusion. This makes creating an alternative implementation more
complicated than it needs to be.
2. Some clients (like the upstream `AMDGPUSplitModule.cpp` file) assume
the output file is not necessary. The owner of the lock file does not
write the file expected by `LockFileManager` and the processes waiting
for the non-owned lock file to be unlocked therefore assume the owner
has died. This means that the work gets repeated by each waiting
process, serially.
3. The documentation makes it sound like successfully waiting for a
non-owned lock file guarantees the output file to be present on the file
system. Implicitly-built modules rely on this. However, the module file
may disappear between `LockFileManager` performing the check and the
compiler loading the module (for example due to module cache pruning
with short intervals, or intervention from outside of Clang). The
compiler assumes this cannot happen, and fails the build if it does.
This PR solves this situation by removing the check, reflecting that in
the `LockFileManager` documentation, and fixing the time-of-check
time-of-use bug in implicit modules.
Commit: ae985267d0a107119038e1a1e62b3aed6523f28c
https://github.com/llvm/llvm-project/commit/ae985267d0a107119038e1a1e62b3aed6523f28c
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update to Xqciint v0.4 (#130219)
The Xqci 0.7.0 spec just came out, with some updates to Xqciint,
bringing it to v0.4. The main update of any relevance is that
`qc.c.mienter` and `qc.c.mienter.nest` now update both the stack pointer
and the frame pointer (before, they only updated the stack pointer).
They both remain compatible with the frame pointer convention.
This change bumps the Xqciint version, and ensures that we don't emit
the unneeded frame pointer adjustment instruction after
`qc.c.mienter(.nest)`.
Commit: 83ec179fc8b44ae23a0bfe51073d5ce75155639e
https://github.com/llvm/llvm-project/commit/83ec179fc8b44ae23a0bfe51073d5ce75155639e
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A clang/test/CodeGen/strictfp-elementwise-builtins.cpp
R clang/test/CodeGen/strictfp-elementwise-bulitins.cpp
Log Message:
-----------
[Clang][NFC] Rename and update_cc_test_checks over strictfp-elementwise-builtins.cpp (#130747)
Commit: 146ef7a5f44af68e969dfb66918ae49810864aec
https://github.com/llvm/llvm-project/commit/146ef7a5f44af68e969dfb66918ae49810864aec
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[TableGen] Remove unnecessary const_cast and use range-based for loops. NFC (#130717)
In order to use a range-based loop, I reduced a needed const_cast to
only the one line that needed it.
Commit: 34647667aa022fba4c6520c8283ded1012aaa59e
https://github.com/llvm/llvm-project/commit/34647667aa022fba4c6520c8283ded1012aaa59e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Sink hasSideEffects, mayLoad, mayStore from defs to classes in RISCVInstrInfoXCV.td. NFC (#130714)
This is consistent with how RISCVInstrInfo.td is generally structured.
Commit: 90c11ad46f429d8acddd378bd4c2c98223fce2a7
https://github.com/llvm/llvm-project/commit/90c11ad46f429d8acddd378bd4c2c98223fce2a7
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Introduce ReportPolicy to handle -z *-report options. NFC
Use an enum to replace string comparison.
Pull Request: https://github.com/llvm/llvm-project/pull/130715
Commit: 2bf7018bb03eb93b56ad86caac40ced8b5c6744b
https://github.com/llvm/llvm-project/commit/2bf7018bb03eb93b56ad86caac40ced8b5c6744b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Move let statement for hasSideEffects, mayLoad, mayStore into BranchCC_rri. NFC (#130721)
This is consistent with the isBranch and isTerminator flags already in
the class.
Addresses feedback given on #130714 where I copied the inconsistent
split into RISCVInstrInfoXCV.td.
Commit: 1324dfe3e177fcfcb116bfc4371d8dd8730f2439
https://github.com/llvm/llvm-project/commit/1324dfe3e177fcfcb116bfc4371d8dd8730f2439
Author: Mark Danial <mark.danial at ibm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[AIX] Add -pthread to build on AIX (#129108)
When building in tree clang without having `-pthread` we get a bunch of
`Assertion failed: FD != kInvalidFile && "Invalid or inactive file
descriptor"` when testing check-clang.
Commit: f1598367b661e46c4ecc7dd8ea35f9eac79a654c
https://github.com/llvm/llvm-project/commit/f1598367b661e46c4ecc7dd8ea35f9eac79a654c
Author: John Harrison <harjohn at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
A lldb/tools/lldb-dap/DAPLog.h
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adding logging helpers. (#130653)
Improving logging by defining new helpers for more uniform log handling.
This should help us clearly identify log messages and helps abstract the
underlying log type within the macro in case we want to update the log
handler in the future.
Commit: 4f60f45130c6bd96c79e468fe9927a29af760f56
https://github.com/llvm/llvm-project/commit/4f60f45130c6bd96c79e468fe9927a29af760f56
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/ilist_node.h
Log Message:
-----------
[llvm] replace static_assert with std::enable_if_t in ilist_node_impl (#127722)
## Purpose
Remove `static_assert` in `ilist_node_impl::isSentinel` and
conditionally include the functino using `std::enable_if_t` instead.
## Background
This fix is necessary to support building LLVM as a Windows DLL, tracked
by #109483.
The `static_assert` in `ilist_node_impl::isSentinel` fails when
compiling LLVM as a Windows DLL with the options `-D
LLVM_BUILD_LLVM_DYLIB=ON -D LLVM_BUILD_LLVM_DYLIB_VIS=ON -D
LLVM_LINK_LLVM_DYLIB=ON`:
```
S:\llvm\llvm-project\llvm\include\llvm/ADT/ilist_node.h(151): error C2338: static_assert failed: 'Use ilist_sentinel_tracking<true> to enable isSentinel()'
S:\llvm\llvm-project\llvm\include\llvm/ADT/ilist_node.h(151): note: the template instantiation context (the oldest one first) is
S:\llvm\llvm-project\llvm\include\llvm/IR/SymbolTableListTraits.h(113): note: see reference to class template instantiation 'llvm::SymbolTableListTraits<llvm::Function>' being compiled
S:\llvm\llvm-project\llvm\include\llvm/IR/SymbolTableListTraits.h(69): note: see reference to class template instantiation 'llvm::simple_ilist<ValueSubClass>' being compiled
with
[
ValueSubClass=llvm::Function
]
S:\llvm\llvm-project\llvm\include\llvm/ADT/simple_ilist.h(87): note: see reference to class template instantiation 'llvm::ilist_sentinel<llvm::ilist_detail::node_options<T,true,false,llvm::ilist_detail::extract_tag<>::type,false,llvm::ilist_detail::extract_parent<>::type>>' being compiled
with
[
T=llvm::Function
]
S:\llvm\llvm-project\llvm\include\llvm/ADT/ilist_node.h(301): note: see reference to class template instantiation 'llvm::ilist_node_impl<OptionsT>' being compiled
with
[
OptionsT=llvm::ilist_detail::node_options<llvm::Function,true,false,llvm::ilist_detail::extract_tag<>::type,false,llvm::ilist_detail::extract_parent<>::type>
]
S:\llvm\llvm-project\llvm\include\llvm/ADT/ilist_node.h(150): note: while compiling class template member function 'bool llvm::ilist_node_impl<OptionsT>::isSentinel(void) const'
with
[
OptionsT=llvm::ilist_detail::node_options<llvm::Function,true,false,llvm::ilist_detail::extract_tag<>::type,false,llvm::ilist_detail::extract_parent<>::type>
]
```
Conditionally including the function using `std::enable_if_t` has the
same effect of preventing the function's use when
`is_sentinel_tracking_explicit=false`, but avoids the issue when
DLL-exporting downstream classes.
## Validation
Verified I no longer fail compilation due to the `static_assert` when
building LLVM on Windows 11 with the options `-D
LLVM_BUILD_LLVM_DYLIB=ON -D LLVM_BUILD_LLVM_DYLIB_VIS=ON -D
LLVM_LINK_LLVM_DYLIB=ON`.
Commit: 517c6778ead6e7c476e0f4482763060c679ee80b
https://github.com/llvm/llvm-project/commit/517c6778ead6e7c476e0f4482763060c679ee80b
Author: David Rivera <davidriverg at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseDefaultMemberInitCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-default-member-init.cpp
Log Message:
-----------
[clang-tidy] Add check on constexpr & static values in modernize-use-default-member-init (#129425)
This aims to fix a portion of #122480. Simply added a check to look for
either compile time initialized variables or static stored variables.
Commit: d22d14375d4410cdb441e04016531962e3abb44e
https://github.com/llvm/llvm-project/commit/d22d14375d4410cdb441e04016531962e3abb44e
Author: Tommy Chen <gcchen at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdNumbersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-numbers.cpp
Log Message:
-----------
[clang-tidy] support different precisions (#130540)
Support float and long double versions of the math functions for
UseStdNumbersCheck.
For example, after this commit the check is able to catch `sqrtf(2)` and
`expl(1)`.
Fixes: #130325
Commit: f10a8706a1443dec834929dadcce837082df64b7
https://github.com/llvm/llvm-project/commit/f10a8706a1443dec834929dadcce837082df64b7
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
A clang/lib/StaticAnalyzer/Checkers/AssumeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/cxx23-assume-attribute.cpp
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[analyzer] Sink false [[assume]] execution paths (#130418)
This PR splits the existing modeling of builtin assume from the
BuiltinFunctionChecker.
We just sink the execution path if we are about to leave the assume
expression with a false assumption.
Assumptions with side-effects are skipped, and ignored. Their values are
"UnknownVal" anyway.
Commit: 65016475084f6435dbf252997d53853c2bfdf9be
https://github.com/llvm/llvm-project/commit/65016475084f6435dbf252997d53853c2bfdf9be
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/std-c-library-functions-POSIX.c
Log Message:
-----------
[StaticAnalyzer] Relax the pre-condition of 'setsockopt' (#130683)
For the unix function
`int setsockopt(int, int, int, const void *, socklen_t);`, the last two
parameters represent a buffer and a size.
In case the size is zero, buffer can be null. Previously, the hard-coded
pre-condition requires the buffer to never be null, which can cause
false positives.
(rdar://146678142)
Commit: eaca60d1a9a54ae0aa8626719decef4b11eb939d
https://github.com/llvm/llvm-project/commit/eaca60d1a9a54ae0aa8626719decef4b11eb939d
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/Preamble.cpp
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Frontend/CompilerInvocation.h
Log Message:
-----------
[clang] Hide the `DiagnosticOptions` pointer from `CompilerInvocation` (#106274)
This PR hides the reference-counter pointer that holds
`DiagnosticOptions` from the public API of `CompilerInvocation`. This
gives `CompilerInvocation` an exclusive control over the lifetime of
this member, which will eventually be leveraged to implement a
copy-on-write behavior.
The only client that currently accesses that pointer is
`clangd::buildPreamble()` which takes care to reset it so that it's not
reset concurrently. This code is made redundant by making the reference
count of `DiagnosticOptions` atomic.
Commit: 5f21ee20f84ac56377178770a7439e406c6d9b16
https://github.com/llvm/llvm-project/commit/5f21ee20f84ac56377178770a7439e406c6d9b16
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/linkerscript/section-class.test
Log Message:
-----------
[LLD][ELF] Don't spill to same memory region (#129795)
This prevents useless spills to the same memory region from causing
spilling to take too many passes to converge.
Handling this at spilling time allows us to relax the generation of
spill sections; specifically, multiple spills can now be generated per
output section. This should be fairly benign for performance, and it
would eventually allow linker scripts to express things like holes or
minimum addresses for parts of output sections. The linker could then
spill within an output section whenever address constraints are
violated.
Commit: c4280db3a0fea6b772fb33bb85dfc14b8e43821a
https://github.com/llvm/llvm-project/commit/c4280db3a0fea6b772fb33bb85dfc14b8e43821a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Add getBLENDIBlendMask helper to extract X86ISD::BLENDI blend mask. NFC.
Handles extension/truncation to the correct number of elements (including MVT::v16i16 repeated masks).
Commit: 9f2bd97a5dcbfda161add4efc26f7f64d2989575
https://github.com/llvm/llvm-project/commit/9f2bd97a5dcbfda161add4efc26f7f64d2989575
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::PACKSS/US concatenation to use combineConcatVectorOps recursion (#130575)
Only concatenate X86ISD::PACKSS/US nodes if at least one operand is beneficial to concatenate
Commit: 313e2ef93eb2cb257e643c87916df8471ff01fd8
https://github.com/llvm/llvm-project/commit/313e2ef93eb2cb257e643c87916df8471ff01fd8
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M libc/docs/headers/stdfix.rst
Log Message:
-----------
[libc] Mark fixed point type generic macros as complete (#130805)
These were added in https://github.com/llvm/llvm-project/pull/129371.
Commit: 5686786c550c6da6d1169b9bffc31cece1161902
https://github.com/llvm/llvm-project/commit/5686786c550c6da6d1169b9bffc31cece1161902
Author: yonghong-song <yhs at fb.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
A llvm/test/CodeGen/BPF/CORE/arena_bitcast.ll
Log Message:
-----------
[BPF] Fix BitCast Assertion with NonZero AddrSpace (#130722)
Alexei reported a bpf selftest failure with recent llvm for bpf prog
file progs/arena_spin_lock.c. The failure only happens when clang is
built with cmake option LLVM_ENABLE_ASSERTIONS=ON.
The error message looks like:
```
clang: /home/yhs/work/yhs/llvm-project/llvm/lib/IR/Instructions.cpp:3460:
llvm::BitCastInst::BitCastInst(Value *, Type *, const Twine &, InsertPosition):
Assertion `castIsValid(getOpcode(), S, Ty) && "Illegal BitCast"' failed.
```
Further investigation shows that the problem is triggered in
BPF/BPFAbstractMemberAccess.cpp
for code
```
auto *BCInst =
new BitCastInst(Base, PointerType::getUnqual(BB->getContext()));
```
For the above BitCastInst, Since 'Base' has non-zero AddrSapce, the
compiler expects the type also has the same AddrSpace. But the above
PointerType::getUnqual(...) does not have AddrSpace and hence causes the
assertion failure.
Providing the proper AddrSpace for the BitCast type fixed the issue.
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: ba11e1e5222cb5bdcd8d63f23fb994cc0a8ffb3c
https://github.com/llvm/llvm-project/commit/ba11e1e5222cb5bdcd8d63f23fb994cc0a8ffb3c
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/docs/HowToCrossCompileLLVM.rst
Log Message:
-----------
[docs] Rewrite HowToCrossCompileLLVM (#129451)
The document has had a few minor tweaks over the years, but the last
major piece of work on it was 2016, after first being introduced in
2013. My aim is to provide a clear and clean recipe for cross-compiling
LLVM that:
* Should be achievable for anyone on common variants of Linux
(_including_ the step of acquiring a working sysroot).
* I think I've kept the coverage of setting up acquiring a Debian
sysroot minimal enough that it can reasonably be included. `debootstrap`
is packaged for most common Linux distributions including non-Debian
derived distributions like Arch Linux and Fedora.
* Describes a setup that we can reasonably support within the community.
* I realise with the ninja symlink canonicalisation issue I haven't
completely avoided hacks, but I look particularly to point 2 under hacks
in the current docs which talks about libraries on the host being found
by CMake and adding `-L` and `-I` to try to hack around this. We've all
been there and made these kind of temporary workarounds to see if we can
get further, but it's very hard to support someone who has problems with
a setup that's improperly leaking between the host and target like this.
The approach I describe with a clean sysroot and setting appropriate
`CMAKE_FIND_ROOT_PATH_MODE_*` settings doesn't have this issue.
* Cuts down on extraneous / outdated information, especially where it is
better covered elsewhere (e.g. detailed descriptions of CMake options
not directly relevant to cross compilation).
I've run through the instructions for AArch64, RISC-V (64-bit), and
armhf.
Commit: 7de895ff1146c17ec78877900c01c09f4140e692
https://github.com/llvm/llvm-project/commit/7de895ff1146c17ec78877900c01c09f4140e692
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-phi-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/addsub.ll
Log Message:
-----------
[SLP]Reduce number of alternate instruction, where possible
Previous version was reviewed here https://github.com/llvm/llvm-project/pull/123360
It is mostly the same, adjusted after graph-to-tree transformation
Patch tries to remove wide alternate operations.
Currently SLP vectorizer emits something like this:
```
%0 = add i32
%1 = sub i32
%2 = add i32
%3 = sub i32
%4 = add i32
%5 = sub i32
%6 = add i32
%7 = sub i32
transformes to
%v1 = add <8 x i32>
%v2 = sub <8 x i32>
%res = shuffle %v1, %v2, <0, 9, 2, 11, 4, 13, 6, 15>
```
i.e. half of the results are just unused. This leads to increased
register pressure and potentially doubles number of operations.
Patch introduces SplitVectorize mode, where it splits the operations by
opcodes and produces instead something like this:
```
%v1 = add <4 x i32>
%v2 = sub <4 x i32>
%res = shuffle %v1, %v2, <0, 4, 1, 5, 2, 6, 3, 7>
```
It allows to improve the performance by reducing number of ops. Also, it
turns on some other improvements, like improved graph reordering.
-O3+LTO, AVX512
Metric: size..text
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2788.00 2820.00 1.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 278168.00 280904.00 1.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 82682.00 83258.00 0.7%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 139344.00 139712.00 0.3%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 27149.00 27197.00 0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1008188.00 1009948.00 0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39226.00 39290.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39229.00 39293.00 0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 798440.00 798952.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 44123.00 44139.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 318942.00 319038.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1159880.00 1160152.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 73595.00 73611.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1146124.00 1146348.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 203831.00 203847.00 0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 207662.00 207678.00 0.0%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 589851.00 589883.00 0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2050990.00 2051006.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12559687.00 12559591.00 -0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3074157.00 3074125.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1092252.00 1092188.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 779763.00 779715.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 253517.00 253485.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 848259.00 848035.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93064.00 93016.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 383747.00 383475.00 -0.1%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 673051.00 662907.00 -1.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 673051.00 662907.00 -1.5%
Olden/tsp - small variations
Prolangs-C/TimberWolfMC - small variations, some code not inlined
FreeBench/pifft - extra store <8 x double> vectorized, some other extra
vectorizations
CFP2006/433.milc - better vector code
FreeBench/fourinarow - better vector code
Benchmarks/tramp3d-v4 - extra vector code, small variations
mediabench/gsm/toast - small variations
MiBench/telecomm-gsm - small variations
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - better vector code, small variations
CINT2006/464.h264ref - some smaller code + changes similar to x264
DOE-ProxyApps-C/miniGMG - small variations
Benchmarks/Bullet - small variations
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/miniAMR - small variations
CFP2006/453.povray - small variations
DOE-ProxyApps-C++/CLAMR - small variations
MiBench/consumer-lame - small variations
CFP2006/447.dealII - small variations
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - small variations
CFP2017rate/510.parest_r - better vector code, small variations
CFP2017rate/526.blender_r - small variations
CINT2006/403.gcc - small variations
CINT2006/400.perlbench - small variations
CFP2017rate/508.namd_r - small variations
ASCI_Purple/SMG2000 - small variations
JM/lencod - extra store <16 x i32>, small variations
DOE-ProxyApps-C++/miniFE - small variations
JM/ldecod - extra vector code, small variations, less shuffles
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - the number of instructions increased, but
looks like they are more performant. E.g., for function
x264_pixel_satd_8x8, llvm-mca reports better throughput - 84 for the
current version and 59 for the new version.
-O3+LTO, mcpu=sifive-p470
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 580768.00 581118.00 0.1%
test-suite :: MultiSource/Applications/d/make_dparser.test 78854.00 78894.00 0.1%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 633448.00 633750.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 277002.00 277080.00 0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 931938.00 931960.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 2512806.00 2512822.00 0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1602448.00 1602434.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9496664.00 9496542.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 147424.00 147422.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 1764608.00 1764578.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 1764608.00 1764578.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 841656.00 841632.00 -0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 949026.00 948962.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 946348.00 946284.00 -0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 279794.00 279764.00 -0.0%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4776.00 4772.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 29336.00 29184.00 -0.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 535390.00 510124.00 -4.7%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 535390.00 510124.00 -4.7%
test-suite :: SingleSource/Regression/C/gcc-c-torture/execute/ieee/GCC-C-execute-ieee-pr50310.test 886.00 608.00 -31.4%
CINT2006/464.h264ref - extra v16i32 reduction
d/make_dparser - better vector code
JM/lencod - extra v16i32 reduction
Benchmarks/Bullet - smaller vector code
CINT2006/400.perlbench - better vector code
CINT2006/403.gcc - small variations
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - small variations
CFP2017rate/510.parest_r - small variations
CFP2017rate/526.blender_r - small variations
MiBench/consumer-lame - small variations
CINT2017speed/600.perlbench_s
CINT2017rate/500.perlbench_r - small variations
Benchmarks/7zip - small variations
CFP2017rate/511.povray_r - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - extra vector code
mediabench/gsm - extra vector code
MiBench/telecomm-gsm - extra vector code
DOE-ProxyApps-C/miniGMG - extra vector code
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - reduced number of wide operations and
shuffles, saving the registers, similar to X86, extra code in
pixel_hadamard_ac vectorized
ieee/GCC-C-execute-ieee-pr50310 - extra code vectorized
CINT2006/464.h264ref - extra vector code in find_sad_16x16
JM/lencod - extra vector code in find_sad_16x16
d/make_dparser - smaller vector code
Benchmarks/Bullet - small variations
CINT2006/400.perlbench - smaller vector code
CFP2017rate/526.blender_r - small variations, extra store <8 x float> in
the loop, extra store <8 x i8> in loop
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - small variations
MiBench/consumer-lame - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - small variations
Reviewers: hiraditya
Reviewed By: hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/128907
Commit: 14176d10842dcb8697bc7bbce3a4e252d6f11986
https://github.com/llvm/llvm-project/commit/14176d10842dcb8697bc7bbce3a4e252d6f11986
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C2y] Remove WG14 N3459 from the C status page
Only changes 1 and 2 were adopted in Graz and those are both editorial
changes which don't impact the behavior of compilers, so there's no
need to track this paper.
Commit: 381599f1fe973afad3094e55ec99b1620dba7d8c
https://github.com/llvm/llvm-project/commit/381599f1fe973afad3094e55ec99b1620dba7d8c
Author: Nathan Chancellor <nathan at kernel.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/ScriptParser.cpp
A lld/test/ELF/linkerscript/overlay-keep.test
Log Message:
-----------
[ELF] Allow KEEP within OVERLAY (#130661)
When attempting to add KEEP within an OVERLAY description, which the
Linux kernel would like to do for ARCH=arm to avoid dropping the
.vectors sections with '--gc-sections' [1], ld.lld errors with:
ld.lld: error: ./arch/arm/kernel/vmlinux.lds:37: section pattern is expected
>>> __vectors_lma = .; OVERLAY 0xffff0000 : AT(__vectors_lma) { .vectors { KEEP(*(.vectors)) } ...
>>> ^
readOverlaySectionDescription() does not handle all input section
description keywords, despite GNU ld's documentation stating that "The
section definitions within the OVERLAY construct are identical to those
within the general SECTIONS construct, except that no addresses and no
memory regions may be defined for sections within an OVERLAY."
Reuse the existing parsing in readInputSectionDescription(), which
handles KEEP, allowing the Linux kernel's use case to work properly.
[1]: https://lore.kernel.org/20250221125520.14035-1-ceggers@arri.de/
Commit: 456fa47bab479f0ef1136d07687bd1b2635b1a26
https://github.com/llvm/llvm-project/commit/456fa47bab479f0ef1136d07687bd1b2635b1a26
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3505.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3505
This paper clarified that conditional inclusion in the preprocessor
requires the integer constant expression to be comprised only of
integer and character literals, punctuators, or implementation-defined
tokens.
This is something Clang has always required.
Commit: 1cb14078658f9ac573ec4102354106e29d62c46d
https://github.com/llvm/llvm-project/commit/1cb14078658f9ac573ec4102354106e29d62c46d
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
Log Message:
-----------
[HLSL] Add bounds checks for the hlsl vector arguments and return types (#130724)
fixes #129003
- fix up sema tests
- fix up templates for scalar and vector HLSL intrinsic overloads
Commit: c2ed840ed94d3412c7c0bdd9ed84cac6fe0afb57
https://github.com/llvm/llvm-project/commit/c2ed840ed94d3412c7c0bdd9ed84cac6fe0afb57
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/linkerscript/section-class.test
Log Message:
-----------
Revert "[LLD][ELF] Don't spill to same memory region" (#130815)
Reverts llvm/llvm-project#129795
Breaks buildbots
Commit: 9e64fc6fb7d9a1ea9fe59d82380219508aee649f
https://github.com/llvm/llvm-project/commit/9e64fc6fb7d9a1ea9fe59d82380219508aee649f
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[alpha.webkit.UnretainedCallArgsChecker] Add a checker for NS or CF type call arguments. (#130729)
This PR adds alpha.webkit.UnretainedCallArgsChecker by generalizing
RawPtrRefCallArgsChecker. It checks call arguments of NS or CF types are
backed by a RetainPtr or not. The new checker emits warnings for CF
types in Objective-C++ code regardless of ARC and it emits warning for
NS types when ARC is disabled.
Hard-code a few cases as safe: class and superclass properties on class
interfaces and constant dictionary or array literals as well as the
return value of NSClassFromString.
Finally, add the support for variadic function calls and selector
invocations.
Commit: 69f59285ea27c7eb26015e396d44491c24c392e2
https://github.com/llvm/llvm-project/commit/69f59285ea27c7eb26015e396d44491c24c392e2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::PCMPEQ/PCMPGT concatenation to use combineConcatVectorOps recursion instead of IsConcatFree (#130814)
Only concatenate X86ISD::PCMPEQ/PCMPGT nodes (or convert to CMPPS on AVX1) if at least one operand is beneficial to concatenate
Commit: 2f403ee4871465aa7fbb5e540bdc791466704f24
https://github.com/llvm/llvm-project/commit/2f403ee4871465aa7fbb5e540bdc791466704f24
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][modules] NFC: Remove unused function parameter
Commit: 10a6a349d66a5f4d73ab53af114aec1a49a97f03
https://github.com/llvm/llvm-project/commit/10a6a349d66a5f4d73ab53af114aec1a49a97f03
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/BUILD.bazel
Log Message:
-----------
[libc][bazel] Create libc_release_library for release configurations. (#130694)
See PR #130327 for background and motivation. This change expands the
libc_support_library and libc_function rules to create filegroups that
allow building a collection of llvm-libc functions together, from
sources, as a part of a single cc_library that can then be used by the
downstream clients.
This change also adds an example use of this macro under
libc/test/BUILD.bazel to confirm that this macro works as expected.
Commit: d84755b10d09c8972074927ffbf8805e210f3525
https://github.com/llvm/llvm-project/commit/d84755b10d09c8972074927ffbf8805e210f3525
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/docs/HowToCrossCompileLLVM.rst
Log Message:
-----------
[docs] Fix broken formatting for link in HowToCrossCompileLLVM
The usual `_ vs _` problem.
Commit: 7573ee17813b266fdca4dc3041d07bbe616df458
https://github.com/llvm/llvm-project/commit/7573ee17813b266fdca4dc3041d07bbe616df458
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
R clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
R clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
Revert "[alpha.webkit.UnretainedCallArgsChecker] Add a checker for NS or CF type call arguments." (#130828)
Reverts llvm/llvm-project#130729
Commit: dafb566710cd03b7fbb4b187a91f32be9452fd8c
https://github.com/llvm/llvm-project/commit/dafb566710cd03b7fbb4b187a91f32be9452fd8c
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M llvm/include/llvm/Support/LockFileManager.h
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/unittests/Support/LockFileManagerTest.cpp
Log Message:
-----------
[Support] Return `LockFileManager` errors right away (#130627)
This patch removes some internal state out of `LockFileManager` by
moving the locking code from the constructor into new member function
`tryLock()` which returns the errors right away. This simplifies and
modernizes the interface.
Commit: f9568e8d23b7f38bf60f46adac65b98f9e2b6e4e
https://github.com/llvm/llvm-project/commit/f9568e8d23b7f38bf60f46adac65b98f9e2b6e4e
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
A clang/test/CodeGenHLSL/BoolVector.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
A clang/test/SemaHLSL/Types/BuiltinVector/BooleanVectorConstantExpr.hlsl
Log Message:
-----------
[HLSL] Make memory representation of boolean vectors in HLSL, vectors of i32. Add support for boolean swizzling. (#123977)
Make the memory representation of boolean vectors in HLSL, vectors of
i32.
Allow boolean swizzling for boolean vectors in HLSL.
Add tests for boolean vectors and boolean vector swizzling.
Closes #91639
Commit: 3189402466d3354a16bef0fb666aafe9e8729efb
https://github.com/llvm/llvm-project/commit/3189402466d3354a16bef0fb666aafe9e8729efb
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
Log Message:
-----------
[NFC][AMDGPU] Auto generate check lines for some assembler tests (#130797)
Commit: c337e2d250a924d7115de0b833a48cd15761d78a
https://github.com/llvm/llvm-project/commit/c337e2d250a924d7115de0b833a48cd15761d78a
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
Log Message:
-----------
[NFC][AMDGPU] Auto generate check lines for some disassembler tests (#130799)
Commit: d578148b7d526154f953a8a154b31b2d44c018b0
https://github.com/llvm/llvm-project/commit/d578148b7d526154f953a8a154b31b2d44c018b0
Author: lntue <lntue at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/acosf16.cpp
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/cosf16.cpp
M libc/src/math/generic/coshf16.cpp
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp10m1f.cpp
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/exp2f16.cpp
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/exp2m1f.cpp
M libc/src/math/generic/exp2m1f16.cpp
M libc/src/math/generic/expf.cpp
M libc/src/math/generic/expf16.cpp
M libc/src/math/generic/expm1f16.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log10f16.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2f16.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/logf16.cpp
M libc/src/math/generic/sincosf.cpp
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinf16.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/math/generic/sinhf16.cpp
M libc/src/math/generic/tanf.cpp
M libc/src/math/generic/tanf16.cpp
M libc/src/math/generic/tanhf16.cpp
M libc/src/math/generic/tanpif16.cpp
Log Message:
-----------
[libc][math] Skip checking for exceptional values when LIBC_MATH_SKIP_ACCURATE_PASS is set. (#130811)
Commit: 74eba972ca38b9ae181de296a3b4d966b0691676
https://github.com/llvm/llvm-project/commit/74eba972ca38b9ae181de296a3b4d966b0691676
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang] Definitions of fir.pack/unpack_array operations. (#130698)
As defined in #127147.
Commit: 8132c4f55474d4af599b6e7e0753bc374b762fff
https://github.com/llvm/llvm-project/commit/8132c4f55474d4af599b6e7e0753bc374b762fff
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
Log Message:
-----------
[VPlan] Also introduce broadcasts for live-ins used in vec preheader.
Slightly generalize materializeLiveInBroadcasts to also introduce
broadcasts for live-ins used in the vector preheader. This should cover
all live-ins.
If the live-in is used in the vector preheader, insert the broadcast at
the beginning of the block.
Commit: dad0a4e886368880d1ebd04ce2f6fd6457029073
https://github.com/llvm/llvm-project/commit/dad0a4e886368880d1ebd04ce2f6fd6457029073
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_being`/`adl_end` in `make_early_inc_range` (#130518)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures.
Also fix potential issue with double-move on the input range.
Commit: 8c97ddff53180236617458368f6179c0fac1ad93
https://github.com/llvm/llvm-project/commit/8c97ddff53180236617458368f6179c0fac1ad93
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/DLTIAttrs.td
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/Ptr/IR/PtrTypes.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/Dialect/Ptr/layout.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
Log Message:
-----------
[mlir][DataLayout] Add a default memory space entry to the data layout. (#127416)
This patch adds a default memory space attribute to the DL and adds
methods to query the attribute. This is required as MLIR has no well
defined default memory space unlike LLVM which has 0. While `nullptr` is
a candidate for default memory space, the `ptr` dialect will remove the
possibility for `nullptr` memory spaces to avoid undefined semantics.
This patch also modifies the `DataLayoutTypeInterface::areCompatible` to
include the new DL spec and merged entries, as it is needed to query the default memory
space.
---------
Co-authored-by: Christian Ulmann <christianulmann at gmail.com>
Commit: dc23234a6613d304014f7bfc9f36b55739401270
https://github.com/llvm/llvm-project/commit/dc23234a6613d304014f7bfc9f36b55739401270
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove dead code in VPWidenPHIRecipe::print (NFC).
All incoming models for VPWidenPHIRecipe are modled in VPlan, remove
code trying to print the orignial phi.
Commit: 34a3c2302ba59722df4656f3d3514d51206ec516
https://github.com/llvm/llvm-project/commit/34a3c2302ba59722df4656f3d3514d51206ec516
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
Log Message:
-----------
[AArch64][SVE] Change placeholder from `undef` to `poison` (#130519)
Default to a `poison` vector when calling `@llvm.vector.insert`.
Commit: 89fa592b68c76b78f9e7733575c4813e5d7eece0
https://github.com/llvm/llvm-project/commit/89fa592b68c76b78f9e7733575c4813e5d7eece0
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update Matmul description to align with spec (#130835)
Align description with the spec.
https://www.mlplatform.org/tosa/tosa_spec.html#_matmul
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 009dfb435f3e6fc4f8d68703b27ca0eb1ba18174
https://github.com/llvm/llvm-project/commit/009dfb435f3e6fc4f8d68703b27ca0eb1ba18174
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/linkerscript/section-class.test
Log Message:
-----------
Reland "[LLD][ELF] Don't spill to same memory region" (#130851)
Relands #129795
Remove skipped potential spills from their parent input section
descriptions to prevent undefined behavior.
Commit: 4d6ca116221a0f49232999c60a986ede987f7b46
https://github.com/llvm/llvm-project/commit/4d6ca116221a0f49232999c60a986ede987f7b46
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
[AstMatcher]`templateArgumentCountIs` support `FunctionDecl` (#130416)
`hasTemplateArgument` and `templateArgumentCountIs` are always used together. It is more convenient to make then support `FunctionDecl`.
Commit: 0e4ba47ca827f96319ff9c5f2f9f7ee5c607f6ea
https://github.com/llvm/llvm-project/commit/0e4ba47ca827f96319ff9c5f2f9f7ee5c607f6ea
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/OptionalValueConversionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/optional-value-conversion-construct-from-std.cpp
Log Message:
-----------
[clang-tidy] support to detect conversion in `make_optional` for `bugprone-optional-value-conversion` (#130417)
Add support for std::make_optional.
Fixes #119554
Commit: 6dbb5319ce3e6855aa46a511600fe901021e2e94
https://github.com/llvm/llvm-project/commit/6dbb5319ce3e6855aa46a511600fe901021e2e94
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Set HAVE_LDBL_MANT_DIG_113. (#130836)
This check enables flang_rt.quadmath build on aarch64.
Commit: 701148f05a7b90ed6b8c4fc38db4c2b0c9241ffc
https://github.com/llvm/llvm-project/commit/701148f05a7b90ed6b8c4fc38db4c2b0c9241ffc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/CMakeLists.txt
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/Passes.h
A clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/lib/CIR/Dialect/Transforms/PassDetail.h
A clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/test/CIR/Lowering/func-simple.cpp
Log Message:
-----------
[CIR] Upstream initial support for CIR flattening (#130648)
The ClangIR CFG has to be flat before it can be lowered to LLVM IR. That
is, there can be no nested regions and all blocks in a region must
belong to the parent region. Currently only cir.scope operations violate
these rules, so the initial implementation of the cir-flatten-cfg pass
only has to transform scope operations.
Commit: 634e25319e0e99affcb61cc9fba639c4d40cc420
https://github.com/llvm/llvm-project/commit/634e25319e0e99affcb61cc9fba639c4d40cc420
Author: Evan Liu <liuyievan at gmail.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/test/Dialect/Tensor/bubble-reshapes.mlir
Log Message:
-----------
[mlir] Add special case for 0-D tensor when fusing expand from collapse (#130838)
One fusion pattern for collapse_shape -> expand_shape was added in
https://github.com/llvm/llvm-project/commit/a95ad2da36b6a996b05c79df6b385cd98bac286d,
however if the intermediate tensor between a collapse and expand is a
0-D tensor, then the `reassociation_map` for these two are special cases
and can't be generally fused in this function
`BubbleUpExpandThroughParallelCollapse`.
Commit: 76d5a79bed007769745d44a5e298c09614cad423
https://github.com/llvm/llvm-project/commit/76d5a79bed007769745d44a5e298c09614cad423
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/EHFrameSupport.h
M llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCEHFrameRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.h
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
R llvm/lib/ExecutionEngine/Orc/EPCEHFrameRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC] Drop EHFrameRegistrar, register eh-frames with AllocActions (#130719)
This simplifies resource management, and should improve performance for most use
cases.
Commit: d547005f6c2bf6fbee9fe0f4f99bb6ac2d5b04ab
https://github.com/llvm/llvm-project/commit/d547005f6c2bf6fbee9fe0f4f99bb6ac2d5b04ab
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[flang-rt] Enable -funwind-tables so that backtrace works. (#130848)
`backtrace` will not show anything unless it can unwind from
Fortran runtime, so it is useful to have this ability even
in the release build.
Commit: 3692fb6ba58ab2f6836df1cf1f28ecd20450a7f3
https://github.com/llvm/llvm-project/commit/3692fb6ba58ab2f6836df1cf1f28ecd20450a7f3
Author: Emilio Cota <ecg at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
Log Message:
-----------
[mlir][math] add benefit arg to populate math approximations/expansions (#130782)
This is a follow-up to #127291, which added the benefit arg to lowerings
to intrinsics and libm.
In this change we add the benefit arg to the math approximation and
expansion lowerings, which allows users to establish a preferred order
among all three math lowerings, namely approximations, intrinsics and
libm.
Note that we're only updating the new API added in #126103. The legacy
one (`mlir::populateMathPolynomialApproximationPatterns`) is left
unmodified to encourage users to move out of it.
Commit: 72aec1dfcae4d1b50278dbedf164437dee29598b
https://github.com/llvm/llvm-project/commit/72aec1dfcae4d1b50278dbedf164437dee29598b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#130708)
Commit: da478df563583924d0cb25b561b4171e6fe6013c
https://github.com/llvm/llvm-project/commit/da478df563583924d0cb25b561b4171e6fe6013c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86PreTileConfig.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#130710)
Commit: da708814beeeecd19844e53a6e1bbb88d748b26e
https://github.com/llvm/llvm-project/commit/da708814beeeecd19844e53a6e1bbb88d748b26e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV] Move DecoderNamespace in RISCVInstrInfoXCV.td to the Instruction defs. NFC (#130800)
This puts them in the same place as the Predicates. I'd like to have a
single DecoderNamespace scope for all the instruction defs, but we need
to reorder the classes and InstAliases away from the defs to do that.
Commit: b6f502ddb0d1159723744ce01e75bde67fdb01cc
https://github.com/llvm/llvm-project/commit/b6f502ddb0d1159723744ce01e75bde67fdb01cc
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
Log Message:
-----------
AMDGPU: Implement i1 to bfloat conversion (#130831)
We are using the same approach as the conversion of other integer type
to bfloat: i1 --> f32 and f32 --> bf16. Refer to LowerUINT_TO_FP and
LowerSINT_TO_FP in AMDGPUTargetLowering.cpp for details.
Fixes: SWDEV-511605
Commit: 8f05f253601618a2a9c7203cf9e7b9de4f9e22de
https://github.com/llvm/llvm-project/commit/8f05f253601618a2a9c7203cf9e7b9de4f9e22de
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
A llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
reapply [llvm] add support for mustache templating language (#130732)
Reapply https://github.com/llvm/llvm-project/pull/105893
Fixes errors which broke build bot that uses GCC as a compiler
https://lab.llvm.org/buildbot/#/builders/136/builds/3100
The issue here was that using Accessor defined in the anonymous
namespace introduces Accessor as a type alias. Which is, later redeclare
as members in classes Token and ASTNode with the same name which causes
error in GCC. The patch fixes it by renaming the Accesor to
AccessorValue. It also fixes warnings caused by the compile due to
initialization
Adds Support for the Mustache Templating Language. See specs here:
https://mustache.github.io/mustache.5.html
This patch implements support+tests for majority of the features of the
language including:
- Variables
- Comments
- Lambdas
- Sections
This meant as a library to support places where we have to generate
HTML, such as in clang-doc.
Commit: 9415b7d97fc38d0b8f3de63f7ba6ff6a5072158e
https://github.com/llvm/llvm-project/commit/9415b7d97fc38d0b8f3de63f7ba6ff6a5072158e
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Support/Mustache.cpp
Log Message:
-----------
[Support] Fix -Wpessimizing-move in Mustache.cpp (NFC)
/llvm-project/llvm/lib/Support/Mustache.cpp:299:27:
error: moving a temporary object prevents copy elision [-Werror,-Wpessimizing-move]
PrevToken.TokenBody = std::move(Unindented.str());
^
/llvm-project/llvm/lib/Support/Mustache.cpp:299:27: note: remove std::move call here
PrevToken.TokenBody = std::move(Unindented.str());
^~~~~~~~~~ ~
1 error generated.
Commit: 7ae75851b2e1570662261c97c13cfc65357c283d
https://github.com/llvm/llvm-project/commit/7ae75851b2e1570662261c97c13cfc65357c283d
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrConditionalCompare.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/ccmp.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-ccmp.mir
M llvm/test/CodeGen/X86/optimize-compare.mir
Log Message:
-----------
[X86][APX] Support peephole optimization with CCMP instruction (#129994)
This extends `opitimizeCompareInstr` to re-use previous CCMP results if
the
previous comparison was with an immediates that was 1 bigger or smaller.
Example:
```
CCMP x, 13, 2, 5
...
CCMP x, 12, 2, 5 ; can be removed if we change the SETg
SETg ... ; x > 12 changed to SETge (x >= 13) & remove the 2nd
CCMP
```
Commit: 554347ba45b506c86d0025b1e0e7ab1753c63c6a
https://github.com/llvm/llvm-project/commit/554347ba45b506c86d0025b1e0e7ab1753c63c6a
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
R llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
Revert "[llvm] add support for mustache templating language (#105893)" (#130873)
This patch caused certain GCC buildbots to failed
errors: https://lab.llvm.org/buildbot/#/builders/66/builds/11049
Commit: 6981f7e92a051fcc7cd2688bbb0230275b7d2360
https://github.com/llvm/llvm-project/commit/6981f7e92a051fcc7cd2688bbb0230275b7d2360
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/test/Dialect/Affine/parallelize.mlir
Log Message:
-----------
[mlir] account for explicit affine.parallel in parallelization (#130812)
Affine parallelization should take explicitly parallel loops into
account when computing loop depth for dependency analysis purposes. This
was previously not the case, potentially leading to loops incorrectly
being marked as parallel due to depth mismatch.
Commit: 30fdeec0f8f962380a729e6689e098d5875fda04
https://github.com/llvm/llvm-project/commit/30fdeec0f8f962380a729e6689e098d5875fda04
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_being`/`end` in `map_range` (#130508)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures.
Also add `map_range` unit tests -- there were no pre-existing tests
AFAICT.
Commit: c12761858c72419051225a06c6511ad0cced08b1
https://github.com/llvm/llvm-project/commit/c12761858c72419051225a06c6511ad0cced08b1
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/StmtPrinter.cpp
M clang/test/CodeGen/p0963r3.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
Log Message:
-----------
[Clang] Fix the printout of CXXParenListInitExpr involving default arguments (#130731)
The parantheses are unnecessary IMO because they should have been
handled in the parents of such expressions, e.g. in CXXFunctionalCastExpr.
Moreover, we shouldn't join CXXDefaultInitExpr either because they are
not printed at all.
Commit: ab22f652a4dfcaf5b6884a85e498d7ca077937ca
https://github.com/llvm/llvm-project/commit/ab22f652a4dfcaf5b6884a85e498d7ca077937ca
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/strings.yaml
M libc/src/strings/CMakeLists.txt
A libc/src/strings/strcasecmp_l.cpp
A libc/src/strings/strcasecmp_l.h
A libc/src/strings/strncasecmp_l.cpp
A libc/src/strings/strncasecmp_l.h
M libc/test/src/strings/CMakeLists.txt
A libc/test/src/strings/strcasecmp_l_test.cpp
A libc/test/src/strings/strncasecmp_l_test.cpp
Log Message:
-----------
[libc] implement `strings/str{n}casecmp_l` (#130407)
ref:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/strcasecmp_l.html
This patch introduces the `strcasecmp_l` function. At present, the
locale parameter is ignored, making it a stub implementation. This is
consistent with how other locale-related functions, such as `islower_l`,
are treated in our codebase as well as in
[musl](https://github.com/bminor/musl/blob/master/src/string/strcasecmp.c)
and
[bionic](https://cs.android.com/android/platform/superproject/main/+/main:bionic/libc/bionic/strings_l.cpp).
---------
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 9ef7287d42526014abb0cf2aa53ac2c3087198be
https://github.com/llvm/llvm-project/commit/9ef7287d42526014abb0cf2aa53ac2c3087198be
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/fprofile-continuous.c
Log Message:
-----------
[profile] runtime counter relocation needed on all windows targets (#127858)
See PR comments for the discussion that led to this commit.
Commit: e427f0694ed0030d3a0c90689b39c23f0037d4d6
https://github.com/llvm/llvm-project/commit/e427f0694ed0030d3a0c90689b39c23f0037d4d6
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use adl_begin in make_first_range and make_second_range (#130521)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of https://github.com/llvm/llvm-project/pull/87936 but
reverted due to buildbot failures.
Commit: adae90ee35ca6f60e99189dea95cb719b4969860
https://github.com/llvm/llvm-project/commit/adae90ee35ca6f60e99189dea95cb719b4969860
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
Log Message:
-----------
AMDGPU: Add baseline test for coalescing vgpr to agpr subreg inserts (#130877)
Commit: 725726171240afa76166392d105900040a00c5b4
https://github.com/llvm/llvm-project/commit/725726171240afa76166392d105900040a00c5b4
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/test/CodeGen/NVPTX/st_bulk.ll
Log Message:
-----------
[NVPTX] Fix generic address in st.bulk intrinsic (#130740)
This PR fixes an oversight from the previous change (PR #128856) that
introduced the `st.bulk` intrinsic where `llvm_global_ptr_ty` was used
instead of `llvm_ptr_ty` for generic addressing.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-st-bulk
Commit: d898761ca24acd62448993b369a1c1b95354707d
https://github.com/llvm/llvm-project/commit/d898761ca24acd62448993b369a1c1b95354707d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] FeatureVendorXwchc should imply FeatureStdExtZca. (#130817)
If we don't do this the binary emission won't set the compressed flag in
the ELF header and won't emit alignment NOPs for R_RISCV_ALIGN correctly
to support the existence of 2 byte instructions in the stream.
Commit: bf2d1c46072a0461cb3ddcaefcafeccc2637995e
https://github.com/llvm/llvm-project/commit/bf2d1c46072a0461cb3ddcaefcafeccc2637995e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
Log Message:
-----------
AMDGPU: Disable machine verifier in failing test
Commit: 1585db458f040b5861d449a3a882388f8dcb6e62
https://github.com/llvm/llvm-project/commit/1585db458f040b5861d449a3a882388f8dcb6e62
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[IR] Optimize CFI in `writeCombinedGlobalValueSummary` (#130382)
Before the patch,
`writeCombinedGlobalValueSummary` traversed entire
`cfiFunction*` for each module, just to pick a few
symbols from `DefOrUseGUIDs`.
Now we change internals of `cfiFunctionDefs` and
`cfiFunctionDecls` to maintain a map from GUID to StringSet.
So now we iterate `DefOrUseGUIDs`, usually small,
and pick exact subset of symbols.
Sorting is not strictly necessary, but it
preserves the order of emitted values.
Commit: 7a66a26658f40d00ad4c298260d9c3b8f91e1368
https://github.com/llvm/llvm-project/commit/7a66a26658f40d00ad4c298260d9c3b8f91e1368
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/discard-all.test
R llvm/test/tools/llvm-objcopy/ELF/discard-locals-rel.test
M llvm/test/tools/llvm-objcopy/ELF/discard-locals.test
Log Message:
-----------
[llvm-objcopy,ELF] --discard-locals/--discard-all: allow and keep symbols referenced by relocations
In GNU objcopy, symbols referenced by relocations are retained. Our COFF
(https://reviews.llvm.org/D56480) and Mach-O
(https://reviews.llvm.org/D75104) ports port the behavior, but the ELF
port doesn't.
This PR implements the behavior for ELF.
Close #47468 (tcl has a use case that requires `strip -x tclStubLib.o`
to strip local symbols not referenced by relocations.)
Pull Request: https://github.com/llvm/llvm-project/pull/130704
Commit: 606e9fa444559923a9e03cbdffc1abd9e2582d60
https://github.com/llvm/llvm-project/commit/606e9fa444559923a9e03cbdffc1abd9e2582d60
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M llvm/lib/WindowsDriver/MSVCPaths.cpp
Log Message:
-----------
[WindowsDriver] Always consider `WinSdkVersion` (#130377)
Currently, the `-Xmicrosoft-windows-sdk-version` is only used if
`-Xmicrosoft-windows-sdk-root` is also provided. This is a surprising
behavior since the argument should still be taking effect if LLVM uses
the Windows SDK root from the registry.
Tested locally in a simple Hello World program including `Windows.h` and
compiled with `-Xmicrosoft-windows-sdk-version 10.0.18362.0` on a system
where the SDK 10.0.22621.0 is also installed and verified that the
correct header was included.
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Commit: 5f20f9a0126165ed64c39b9a23559136691d9f97
https://github.com/llvm/llvm-project/commit/5f20f9a0126165ed64c39b9a23559136691d9f97
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Expr.cpp
M clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
Log Message:
-----------
[clang][AST] Remove HasFirstArg assertion in CallExpr::getBeginLoc() (#130725)
There are cases where the assertion legitimately does not hold (e.g.
CallExpr::CreateTemporary()), and there's no readily available way to
tell such cases apart.
Fixes https://github.com/llvm/llvm-project/issues/130272
Commit: bde140c47fe04c57f507af9476f2735daffb4e22
https://github.com/llvm/llvm-project/commit/bde140c47fe04c57f507af9476f2735daffb4e22
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll
Log Message:
-----------
AMDGPU: Remove a FileCheck from an XFAILed test
In case the assert ever stops, we don't want to hit the FileCheck error
from there being no checks.
Commit: 8d7cb5d05b1278d96a8811581d3b0baf0753e0e3
https://github.com/llvm/llvm-project/commit/8d7cb5d05b1278d96a8811581d3b0baf0753e0e3
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-11 (Tue, 11 Mar 2025)
Changed paths:
M clang/test/CodeGenHLSL/cbuffer.hlsl
A llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
A llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
A llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
R llvm/test/CodeGen/DirectX/UAVMetadata.ll
R llvm/test/CodeGen/DirectX/cbuf.ll
R llvm/test/CodeGen/DirectX/legacy_cb_layout_0.ll
R llvm/test/CodeGen/DirectX/legacy_cb_layout_1.ll
R llvm/test/CodeGen/DirectX/legacy_cb_layout_2.ll
R llvm/test/CodeGen/DirectX/legacy_cb_layout_3.ll
Log Message:
-----------
[HLSL][NFC] Update resource metadata tests to not use obsolete annotations (#130222)
Update resource metadata tests to generate metadata based on
`llvm.dx.resource.handlefrombinding` data collected in
`DXILResourceBindingAnalysis`.
- `UAVMetadata.ll` is updated, renamed to `uav_metadata.ll`, and placed
under `Metadata` directory in `llvm/test/CodeGen/DirectX`
- `srv_metadata.ll` is a new test for SRV resource metadata
- `cbuf.ll` and `legacy_cb_layout_{0|1}.ll` tests were merged into
`cbuffer_metadata.ll`
- `legacy_cb_layout_{2|3}.ll` tests we moved to `cbuffer.hlsl` in Clang
CodeGen because there were more of a layout than metadata tests
Related to [#114126](https://github.com/llvm/llvm-project/issues/114126)
Commit: 57a90883ca541a90a7a4a22d715832ec0ceb0599
https://github.com/llvm/llvm-project/commit/57a90883ca541a90a7a4a22d715832ec0ceb0599
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/DetectDeadLanes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
Log Message:
-----------
[CodeGen][NPM] Port DetectDeadLanes to NPM (#130567)
Commit: d921bf233c4fd3840953b1a4b5bb35ad594da773
https://github.com/llvm/llvm-project/commit/d921bf233c4fd3840953b1a4b5bb35ad594da773
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-max-regs.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-subvecs.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
Log Message:
-----------
[AMDGPU] Extend promotion of alloca to vectors (#127973)
* Add multi dimensional array support
* Make maximum vector size tunable
* Make ratio of VGPRs used for vector promotion tunable
* Maximum array size now based on VGPR count (32b) instead of element count
Commit: 90a08fb4b7e79e79121a563ac9cd8138cfedeb3c
https://github.com/llvm/llvm-project/commit/90a08fb4b7e79e79121a563ac9cd8138cfedeb3c
Author: A2uria <a2uria at qq.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
A lld/test/COFF/Inputs/defaultlib.yaml
M lld/test/COFF/nodefaultlib.test
Log Message:
-----------
[LLD][COFF] Update nodefaultlibs after updating search paths (#128813)
Fix #107346
Commit: c86d88484709a54fc50d4a8e1d2dc336721feef1
https://github.com/llvm/llvm-project/commit/c86d88484709a54fc50d4a8e1d2dc336721feef1
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
Log Message:
-----------
AMDGPU: Update LIT tests for i1-to-bf16 conversions (NFC) (#130916)
Add tests for a few other targets, and with SGPR input/output, based on requests from PR:
https://github.com/llvm/llvm-project/pull/130831
Commit: 418e07b7e679246a3a4ab9a5a8c119eb4ba4623d
https://github.com/llvm/llvm-project/commit/418e07b7e679246a3a4ab9a5a8c119eb4ba4623d
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/bubble-up-extract-slice-op.mlir
M mlir/test/Dialect/Tensor/drop-redundant-insert-slice-rank-expansion.mlir
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][Tensor] Check for out-of-bounds slice in `insert/extract_slice` verifier (#130487)
Also fix test cases that had invalid ops.
Commit: 7decd046260d855c41a25990aee5398929ea29f8
https://github.com/llvm/llvm-project/commit/7decd046260d855c41a25990aee5398929ea29f8
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/strictfp-elementwise-builtins.cpp
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/SemaCXX/builtins-elementwise-math.cpp
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
Log Message:
-----------
[Clang] Add __builtin_elementwise_exp10 in the same fashion as exp/exp2 (#130746)
Clang has __builtin_elementwise_exp and __builtin_elementwise_exp2
intrinsics, but no __builtin_elementwise_exp10.
There doesn't seem to be a good reason not to expose the exp10 flavour
of this intrinsic too.
This commit introduces this intrinsic following the same pattern as the
exp and exp2 versions.
Fixes: SWDEV-519541
Commit: 525d412cae53032e561f6426fc0c07e6a50d6f54
https://github.com/llvm/llvm-project/commit/525d412cae53032e561f6426fc0c07e6a50d6f54
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
Log Message:
-----------
[AMDGPU] Fix typing error introduce in promote alloca change
Fix type error when GEP uses i64 offset introduced in #127973.
Commit: 369c0a7483a4ffe9af9027f73e5f04dd1d75d312
https://github.com/llvm/llvm-project/commit/369c0a7483a4ffe9af9027f73e5f04dd1d75d312
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang-repl] Fix target creation in Wasm.cpp (#130909)
Convert the Triple to a string to account for the change from #129868.
Commit: c9563a422cea44f0b00fdcd5085666442f8f24f8
https://github.com/llvm/llvm-project/commit/c9563a422cea44f0b00fdcd5085666442f8f24f8
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Expr.cpp
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Clang][NFC] Remove CallExpr::CreateTemporary (#130919)
`CallExpr::CreateTemporary` was only used to deduce a conversion
sequence from a conversion operator.
We only need a type/value category for that,
so we can use a dummy Expression such as a
`OpaqueValueExpr`.
This simplify the code and avoid partially-formed
`CallExpr` with incorrect invariants (see #130725)
Fixes #130824
Commit: 15e335f04fba3d16e195c055952649f8852e3b35
https://github.com/llvm/llvm-project/commit/15e335f04fba3d16e195c055952649f8852e3b35
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/test/Fir/CUDA/cuda-target-rewrite.mlir
M flang/test/Fir/struct-passing-return-loongarch64-bystack.fir
M flang/test/Fir/struct-passing-x86-64-byval.fir
M flang/test/Fir/struct-passing-x86-64-one-field-inreg.fir
M flang/test/Fir/struct-passing-x86-64-several-fields-inreg.fir
M flang/test/Fir/struct-return-aarch64.fir
M flang/test/Fir/struct-return-loongarch64-byreg.fir
M flang/test/Fir/struct-return-powerpc64-aix.fir
M flang/test/Fir/struct-return-ppc64le.fir
M flang/test/Fir/struct-return-x86-64.fir
M flang/test/Fir/target-rewrite-complex-10-x86.fir
M flang/test/Fir/target-rewrite-complex.fir
M flang/test/Fir/target-rewrite-complex16.fir
M flang/test/Fir/target-rewrite-indirect-calls.fir
M flang/test/Fir/target-rewrite-integer-loongarch64.fir
M flang/test/Fir/target.fir
Log Message:
-----------
[flang] also set llvm ABI argument attributes on direct calls (#130736)
So far, flang was not setting argument attributes on direct calls
assuming that putting them on the function operation was enough.
It was clarified in
https://github.com/llvm/llvm-project/commit/38565da5259729898c2a552d54b72f3314241734
that they must be set on both call and functions, even for direct calls.
Crashes have been observed because of the lack of the attribute when
compiling `abs(x)` at `O2` and above on X86-64 for complex(16).
Commit: a6089a949fefc4bada79bdd5d76a6df4daa9b0cf
https://github.com/llvm/llvm-project/commit/a6089a949fefc4bada79bdd5d76a6df4daa9b0cf
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
Log Message:
-----------
[AMDGPU] Ignore RegMask operands when folding operands to SALU insts (#130813)
Otherwise we hit an assert in isInlineConstant.
Commit: c22c5643db68d70871965fc42dfcfd1b89999325
https://github.com/llvm/llvm-project/commit/c22c5643db68d70871965fc42dfcfd1b89999325
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[AMDGPU][NPM] Port SIMemoryLegalizer to NPM (#130060)
Commit: 5daba3dfd9273ab1d4266f7d029abd17c85cae9a
https://github.com/llvm/llvm-project/commit/5daba3dfd9273ab1d4266f7d029abd17c85cae9a
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
Log Message:
-----------
[AMDGPU][NFC] Format GCNCreateVOPD.cpp (#130548)
Commit: 5a0a2f8239d34332000009a05e7972f0303ac746
https://github.com/llvm/llvm-project/commit/5a0a2f8239d34332000009a05e7972f0303ac746
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
Log Message:
-----------
AMDGPU: Replace undef with poison in tests using insertvalue (#130895)
perl -p -i -e 's/insertvalue (.*) undef/insertvalue \1 poison/g'
Commit: 6f89c1ff6b885c0bb12279dbf6c3aed32d93d084
https://github.com/llvm/llvm-project/commit/6f89c1ff6b885c0bb12279dbf6c3aed32d93d084
Author: David Green <david.green at arm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/insert-extract.ll
Log Message:
-----------
[AArch64] Remove Kyro run lines from insert-extract.ll. NFC
They are expected to match the other CHECK lines now.
Commit: adb44ed2b864a62da03f3405b39593914e9631f7
https://github.com/llvm/llvm-project/commit/adb44ed2b864a62da03f3405b39593914e9631f7
Author: David Green <david.green at arm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
Log Message:
-----------
[AArch64] Add -cost-kind=all coverage for insert-extract.ll and shuffle-load.ll. NFC
Commit: 65ade6d2ebbedca0d349ab2270a3979a51fad8bf
https://github.com/llvm/llvm-project/commit/65ade6d2ebbedca0d349ab2270a3979a51fad8bf
Author: Ana Mihajlovic <Ana.Mihajlovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/merge-consecutive-wait-alus.mir
Log Message:
-----------
[AMDGPU] Merge consecutive wait_alu instruction (#128916)
Commit: ad704ff62b4a1abc08dbe3f21f6126745cbe3f95
https://github.com/llvm/llvm-project/commit/ad704ff62b4a1abc08dbe3f21f6126745cbe3f95
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
Log Message:
-----------
[X86][NF] Switch the order of Inst and &Target.getInstruction(NewRec) (#130739)
Because Inst is ordered by Instruction ID.
Commit: 9f617161aa8db76baa4426e3c461c9ca91ea8103
https://github.com/llvm/llvm-project/commit/9f617161aa8db76baa4426e3c461c9ca91ea8103
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/PatchableFunction.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/PatchableFunction.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir
Log Message:
-----------
[CodeGen][NPM] Port PatchableFunction to NPM (#129866)
Commit: 3ad810ea9a97bb3399d8590372a6d3a0eb40d236
https://github.com/llvm/llvm-project/commit/3ad810ea9a97bb3399d8590372a6d3a0eb40d236
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
AMDGPU/GlobalISel: Disable LCSSA pass (#124297)
Disable LCSSA pass in preparation for implementing temporal divergence
lowering in amdgpu divergence lowering. Breaks all cases where sgpr or
i1 values are used outside of the cycle with divergent exit.
Regenerate regression tests for amdgpu divergence lowering with LCSSA
disabled.
Update IntrinsicLaneMaskAnalyzer to stop tracking lcssa phis that are
lane masks.
Commit: 5ec884e5d8a17f5764b09b66f28248b1dc403d4b
https://github.com/llvm/llvm-project/commit/5ec884e5d8a17f5764b09b66f28248b1dc403d4b
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-phi-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
R llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/addsub.ll
Log Message:
-----------
Revert "[SLP]Reduce number of alternate instruction, where possible"
This caused assertion failures:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:16237:
Value *llvm::slpvectorizer::BoUpSLP::vectorizeTree(TreeEntry *):
Assertion `OpTE1.isSame( ArrayRef(E->Scalars).take_front(OpTE1.getVectorFactor())) && "Expected same first part of scalars."' failed.
See comment on the PR.
> Previous version was reviewed here https://github.com/llvm/llvm-project/pull/123360
> It is mostly the same, adjusted after graph-to-tree transformation
This reverts commit 7de895ff1146c17ec78877900c01c09f4140e692.
Commit: fef0b8a0ba58b56fc7ab54143e8d2f4c02938777
https://github.com/llvm/llvm-project/commit/fef0b8a0ba58b56fc7ab54143e8d2f4c02938777
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Breakpoint/BreakpointResolver.cpp
Log Message:
-----------
[lldb] Let languages see all SymbolContexts at once when filtering breakpoints (#129937)
This allows languages to make decisions based on the whole set of symbol
contexts, giving them strictly more power than when they are only
allowed to see one at a time.
Commit: 553da9634dc4bae215e6c850d2de3186d09f9da5
https://github.com/llvm/llvm-project/commit/553da9634dc4bae215e6c850d2de3186d09f9da5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
Log Message:
-----------
AMDGPU/GlobalISel: Update divergence lowering tests (#128702)
In preparations for implementing temporal divergence lowering for
global-isel, switch llvm-ir tests for amdgpu divergence lowering
to new reg bank select. Requires adding few simple regbanklegalize
rules for these tests to work.
Commit: c07e1e390ccb4854351ef42058c076cc4a542745
https://github.com/llvm/llvm-project/commit/c07e1e390ccb4854351ef42058c076cc4a542745
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
Log Message:
-----------
AMDGPU/GlobalISel: Temporal divergence lowering (non i1) (#124298)
Record all uses outside cycle with divergent exit during
propagateTemporalDivergence in Uniformity analysis.
With this list of candidates for temporal divergence lowering,
excluding known lane masks from control flow intrinsics,
find sources from inside the cycle that are not i1 and uniform.
Temporal divergence lowering (non i1):
create copy(v_mov) to vgpr, with implicit exec (to stop other
passes from moving this copy outside of the cycle) and use this
vgpr outside of the cycle instead of original uniform source.
Commit: 014bf63c2e7fabd8b49db2b9df02b90c2a726c64
https://github.com/llvm/llvm-project/commit/014bf63c2e7fabd8b49db2b9df02b90c2a726c64
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
Log Message:
-----------
AMDGPU/GlobalISel: Temporal divergence lowering i1 (#124299)
Use of i1 outside of the cycle, both uniform and divergent,
is lane mask(in sgpr) that contains i1 at iteration that lane
exited the cycle.
Create phi that merges lane mask across all iterations.
Commit: 77b55c76acebf30d3951788d1651607d5276380e
https://github.com/llvm/llvm-project/commit/77b55c76acebf30d3951788d1651607d5276380e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/docs/CodeReview.rst
Log Message:
-----------
[llvm][docs] Add notes on upstreaming code from downstream projects (#129743)
For context, see:
* https://discourse.llvm.org/t/code-review-process-when-upstreaming-patches
Commit: 30fa7a231def5a688608a9ae7ec3d8f831b210a0
https://github.com/llvm/llvm-project/commit/30fa7a231def5a688608a9ae7ec3d8f831b210a0
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Make DifferentModule case more obvious in CollectDebugInfoForCloning (#129146)
Summary:
This should be behaviorally equivalent. DIFinder is only used when
cloning into a DifferentModule as part of llvm.dbg.cu update in
CloneFunctionInto.
Test Plan:
ninja check-llvm-unit check-llvm
Commit: 76cf895717e9eba4d2a158d5bc3e48f2f7794181
https://github.com/llvm/llvm-project/commit/76cf895717e9eba4d2a158d5bc3e48f2f7794181
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGenCXX/x86_64-arguments.cpp
R clang/test/SemaHLSL/Language/VectorOutOfRange-errors.hlsl
Log Message:
-----------
Revert "[HLSL] error on out of bounds vector accesses (#128952)"
This caused false-positive errors, see comment on the PR.
> Add Sema checking and diagnostics to error on out of bounds vector
> accesses
> Add tests
> Closes #91640
This reverts commit f1e36759d2e6c26d2d5825f955c51fd595909b52.
Commit: 0165ca3a093897d505f2ec8f55beeea84de76540
https://github.com/llvm/llvm-project/commit/0165ca3a093897d505f2ec8f55beeea84de76540
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
BUILD.bazel fix due to c07e1e3
Commit: c851ee38ad457a98c2c3cd1e88ec74b2eb7f8582
https://github.com/llvm/llvm-project/commit/c851ee38ad457a98c2c3cd1e88ec74b2eb7f8582
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/equivalence-namelist.f90
Log Message:
-----------
[flang][OpenMP] catch namelist access through equivalence (#130804)
The standard prohibits privatising namelist variables. We also decided
in #110671 to prohibit reductions of namelist variables.
This commit prevents this rule from being circumvented through the use
of equivalence statements.
Fixes #122824
Commit: 032f83b743b7783483b380f422dbc2f10fab71ee
https://github.com/llvm/llvm-project/commit/032f83b743b7783483b380f422dbc2f10fab71ee
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR][OpenMP] Enable BlockArgOpenMPOpInterface accessing operands (#130769)
This patch makes additions to the `BlockArgOpenMPOpInterface` to
simplify its use by letting it handle the matching between operands and
their associated entry block arguments. Most significantly, the
following is now possible:
```c++
SmallVector<std::pair<Value, BlockArgument>> pairs;
cast<BlockArgOpenMPOpInterface>(op).getBlockArgsPairs(pairs);
for (auto [var, arg] : pairs) {
// var points to the operand (outside value) and arg points to the entry
// block argument associated to that value.
}
```
This is achieved by making the interface define and use `getXyzVars()`
methods, which by default return empty `OperandRange`s and are overriden
by getters automatically produced for the `Variadic<...> $xyz_vars`
tablegen argument of the corresponding clause. These definitions can
then be simplified, since they no longer need to manually define
`numXyzBlockArgs` functions as a result.
A side-effect of this is that all ops implementing this interface will
now publicly define `getXyzVars()` functions for all entry block
argument-generating clauses, even if they don't actually accept all
clauses. However, these would just return empty ranges, so it shouldn't
cause issues.
This change uncovered some incorrect definitions of class declarations
related to the `ReductionClauseInterface`, and the `OpenMP_DetachClause`
incorrectly implementing the `BlockArgOpenMPOpInterface`, so these
issues are also addressed.
Commit: cf68c9378b0c935a1fe0ba2b3b3276d16cf2b09a
https://github.com/llvm/llvm-project/commit/cf68c9378b0c935a1fe0ba2b3b3276d16cf2b09a
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
Log Message:
-----------
[Flang][OpenMP] Move declare mapper sym creation outside loop, NFC (#130794)
This patch simplifies the definition of
`ClauseProcessor::processMapObjects` by hoisting the creation of the
MLIR symbol associated to an existing `omp.declare_mapper` operation
outside of the loop processing all mapped objects.
That change removes some inter-iteration dependencies that made the
implementation more difficult to follow.
Commit: 6bf0c4648eeac4f4fda57b6be76e2741c2506478
https://github.com/llvm/llvm-project/commit/6bf0c4648eeac4f4fda57b6be76e2741c2506478
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
reapply [llvm] add support for mustache templating language (#130876)
Reapply https://github.com/llvm/llvm-project/pull/130732
Fixes errors which broke build bot that uses GCC as a compiler
https://lab.llvm.org/buildbot/#/builders/66/builds/11049
GCC threw an warning due to an issue std::move with a temporary object
which prevents copy elision. Fixes the issue by removing the std::move
Adds Support for the Mustache Templating Language. See specs here:
https://mustache.github.io/mustache.5.html
This patch implements support+tests for majority of the features of the
language including:
- Variables
- Comments
- Lambdas
- Sections
This meant as a library to support places where we have to generate
HTML, such as in clang-doc.
Commit: 1d89d7d5d76e391b035f50343e2a4890506c6f2b
https://github.com/llvm/llvm-project/commit/1d89d7d5d76e391b035f50343e2a4890506c6f2b
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A clang/AreaTeamMembers.txt
M clang/www/get_involved.html
Log Message:
-----------
[Docs] Explain how to propose an extension in Clang (#130803)
We have a list of criteria for proposing an extension in Clang, but we
do not have any documentation about how to propose an extension. This
adds some basic documentation about how we run RFCs in Clang, as well as
adds a list of Clang Area Team members in support of the process.
It could be argued that this should be documented for the entire LLVM
Project, however, other parts of the project have different rules for
proposing extensions. (Extending libc++ is a different proposition than
extending LLVM, than extending MLIR, than extending Clang, etc.) We may
want to introduce high-level documentation for the LLVM Project, but
that is a bigger project and we already have the documentation in Clang
about criteria for extensions. So it seems reasonable to add some
lightweight documentation specific to Clang until we determine what to
do at the whole project level.
Commit: 059ada405c1ebb9dc8a9c370d97ff0f447ba8b6c
https://github.com/llvm/llvm-project/commit/059ada405c1ebb9dc8a9c370d97ff0f447ba8b6c
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
Log Message:
-----------
[PreISelintrinsicLowering] getTypeSizeInBits/8 => getTypeAllocSize in memset.pattern lowering
As noted during review of #129329.
Commit: 5073b5fdfaf90f5d94640cf9031c73d27a91e394
https://github.com/llvm/llvm-project/commit/5073b5fdfaf90f5d94640cf9031c73d27a91e394
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/test/CodeGen/attr-counted-by.c
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
M llvm/test/Transforms/CorrelatedValuePropagation/range.ll
M llvm/test/Transforms/CorrelatedValuePropagation/sext.ll
A llvm/test/Transforms/CorrelatedValuePropagation/trunc.ll
M llvm/test/Transforms/CorrelatedValuePropagation/zext.ll
Log Message:
-----------
[CVP] Infer `nuw`/`nsw` flags for TruncInst (#130504)
Proof: https://alive2.llvm.org/ce/z/U-G7yV
Helps: https://github.com/rust-lang/rust/issues/72646 and
https://github.com/rust-lang/rust/issues/122734
Rust compiler's current output: https://godbolt.org/z/7E3fET6Md
IPSCCP can do this transform but it does not help the motivating issue
since it runs only once early in the optimization pipeline.
Reimplementing this in CVP folds the motivating issue into a simple
`icmp eq` instruction.
Fixes #130100
Commit: 15136f1c09d9e5aef0266937d3d7135616436cd2
https://github.com/llvm/llvm-project/commit/15136f1c09d9e5aef0266937d3d7135616436cd2
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
Log Message:
-----------
[AMDGPU] Change placeholder from `undef` to `poison` (#130853)
Call `insertelement` with `poison` instead of `undef`.
Commit: 73e23f899f2a2e582c6d905a94d0a22581f011eb
https://github.com/llvm/llvm-project/commit/73e23f899f2a2e582c6d905a94d0a22581f011eb
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
Log Message:
-----------
[AMDGPU] Change placeholder from `undef` to `poison` (#130858)
Replace `undef` debug info with `poison`.
Commit: 6717a38bb5fd004c347d1b68953007596d738d9b
https://github.com/llvm/llvm-project/commit/6717a38bb5fd004c347d1b68953007596d738d9b
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn] port 3a7a9c928671 better
Commit: de34213a67c23e090095526a2a79797a617a3f39
https://github.com/llvm/llvm-project/commit/de34213a67c23e090095526a2a79797a617a3f39
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn] port ab6f470675ed
Commit: cd043e4fbe6125df4cb4993c625fa5e46194e478
https://github.com/llvm/llvm-project/commit/cd043e4fbe6125df4cb4993c625fa5e46194e478
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[Docs] Add a link to Clang Area Team members
This adds a link to the Clang Area Team members from the Maintainers
documentation, as another way to find folks working on decision-making.
Commit: 1e58bdcc73c530757288eac975e681c03fc6a6ca
https://github.com/llvm/llvm-project/commit/1e58bdcc73c530757288eac975e681c03fc6a6ca
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port 75f76d482cc2
Commit: 6af9fd9430d5dcbe5994a0e758db255de00b5367
https://github.com/llvm/llvm-project/commit/6af9fd9430d5dcbe5994a0e758db255de00b5367
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 76d5a79bed00
Commit: 2c8e154ce8e8af4be0243f3ac295b49df01a9867
https://github.com/llvm/llvm-project/commit/2c8e154ce8e8af4be0243f3ac295b49df01a9867
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port f10a8706a144
Commit: ab557afa40af11ab2a1276dd9ccb8e072f1c7492
https://github.com/llvm/llvm-project/commit/ab557afa40af11ab2a1276dd9ccb8e072f1c7492
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/test/Headers/gpuintrin.c
Log Message:
-----------
[libc][nfc] Include instantiations of gpuintrin.h in IR test case (#130956)
Regenerated existing test case with include-generated-funcs to show the
lowered IR for each instantiation.
Commit: da42b2f67da603d19be4ab0ee33ae79e20c12c6c
https://github.com/llvm/llvm-project/commit/da42b2f67da603d19be4ab0ee33ae79e20c12c6c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/big_alu.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector-r600.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/complex-folding.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/floor.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmad.ll
M llvm/test/CodeGen/AMDGPU/fmax.ll
M llvm/test/CodeGen/AMDGPU/fmin.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/input-mods.r600.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/jump-address.ll
M llvm/test/CodeGen/AMDGPU/kcache-fold.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.cube.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-input-fold.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/max-literals.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/predicate-dp4.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/pv-packing.ll
M llvm/test/CodeGen/AMDGPU/pv.ll
M llvm/test/CodeGen/AMDGPU/r600-encoding.ll
M llvm/test/CodeGen/AMDGPU/r600-export-fix.ll
M llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
M llvm/test/CodeGen/AMDGPU/r600cfg.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
M llvm/test/CodeGen/AMDGPU/swizzle-export.ll
M llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll
M llvm/test/CodeGen/AMDGPU/texture-input-merge.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
Log Message:
-----------
AMDGPU: Replace insertelement poison with insertelement undef (#130896)
This is the bulk update with perl, with cases which require additional
update left for later.
Commit: 1d0dd76eec05ff6774a76f79088968c7f58f3167
https://github.com/llvm/llvm-project/commit/1d0dd76eec05ff6774a76f79088968c7f58f3167
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-loadstores.ll
Log Message:
-----------
AMDGPU: Replace insertelement undef with poison in cases with manual updates (#130898)
I had to manually intervene in a few tests. fcanonicalize.f16.ll is directly sensitive
to undef vs. poison.
Commit: c6e88b21894214aa5698033eba95d5bafc6f70ee
https://github.com/llvm/llvm-project/commit/c6e88b21894214aa5698033eba95d5bafc6f70ee
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Proper BUILD.bazel fix due to c07e1e3 (#130962)
Commit: 2fbddfbdc014fe73e8167f4d17589e49f9a51043
https://github.com/llvm/llvm-project/commit/2fbddfbdc014fe73e8167f4d17589e49f9a51043
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - remove unused DAGCombinerInfo argument. NFC. (#130951)
Commit: b76e396990ef63fa6deb97ae88a6e1c076fc6717
https://github.com/llvm/llvm-project/commit/b76e396990ef63fa6deb97ae88a6e1c076fc6717
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis-heuristics.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/combine_vloads.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
Log Message:
-----------
AMDGPU: Replace tests using undef in shufflevector with poison (#130899)
Commit: 72ee9b82151f17d6bd37abc501124d46c1cb63c3
https://github.com/llvm/llvm-project/commit/72ee9b82151f17d6bd37abc501124d46c1cb63c3
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugType.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnValueChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/Checker.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Rename `CheckerBase::getCheckerName` to `getName` (#130953)
The method name `getCheckerName` would imply "get the name of the
checker associated with `this`", so it's suitable for e.g.
`BugType::getCheckerName` -- but a method that just "gets the name of
`this`" should be simply called `getName`.
This change eliminates the redundant and ugly pattern
`Checker->getCheckerName()` and helps to visually distinguish this
method from `BugType::getCheckerName`.
In the constructor of `BugType` the call of this method was completely
removed (instead of just changing the name) because that call was dead
code (when the data member `Checker` is non-null, the string stored in
`CheckerName` is irrelevant) and was often querying the name of the
checker before it was properly initialized.
Moreover, in `ReturnValueChecker.cpp` the static helper function
`getName` (which gets a function name from a `CallEvent`) was renamed to
the more specific `getFunctionName` to avoid the name collision.
This change is yet another cleanup commit before my planned changes that
would add support for multi-part checkers to this method.
Commit: 5da9044c40840187330526ca888290a95927a629
https://github.com/llvm/llvm-project/commit/5da9044c40840187330526ca888290a95927a629
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/fca2memcpy.ll
Log Message:
-----------
[MemCpyOpt] Fix clobber check in fca2memcpy optimization
This effectively reverts #108535. The old AA code was looking for
the *first* clobber between the load and store and then trying to
move all the way up there. The new MSSA based code instead found
the *last* clobber. There might still be an earlier clobber that
has not been accounted for.
Fixes #130632.
Commit: cbeae3e117b8fb78e61ad7b49702a7d8033a529d
https://github.com/llvm/llvm-project/commit/cbeae3e117b8fb78e61ad7b49702a7d8033a529d
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/runtime/CMakeLists.txt
Log Message:
-----------
[Flang] Fix libquadmath in non-LLVM_ENABLE_RUNTIMES build.
The LLVM_ENABLE_RUNTIMES build introduced a new configure-time header
quadmath_wrapper.h. Also create the header in non-LLVM_ENABLE_RUNTIMES
builds.
Commit: 190063464e12d730eef27873ce985e15a5eeee0b
https://github.com/llvm/llvm-project/commit/190063464e12d730eef27873ce985e15a5eeee0b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/MC/MCSubtargetInfo.cpp
Log Message:
-----------
[MC] Speed up checkFeatures() (NFCI) (#130936)
checkFeatures() currently goes through ApplyFeatureFlag(), which will
also handle implied features. This is very slow -- just querying every
feature once takes up 10% of a Rust hello world compile.
However, if we only want to query whether certain features are
set/unset, we can do so directly -- implied features have already been
handled when the FeatureBitset was constructed.
Commit: a502c656881c8bc28b49a08c29421059d00aca26
https://github.com/llvm/llvm-project/commit/a502c656881c8bc28b49a08c29421059d00aca26
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
Log Message:
-----------
[BuildLibCalls] Add helper for setting memory effects (NFC)
Remove reliance on having dedicated setters and getters on Function
for every possible memory effect combination.
Commit: 07d86d25c9bca0ae4ee5999f8215a5375f56ef5f
https://github.com/llvm/llvm-project/commit/07d86d25c9bca0ae4ee5999f8215a5375f56ef5f
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
Log Message:
-----------
[ctxprof] Flat profile collection (#130655)
Collect flat profiles. We only do this for function activations that aren't otherwise collectible under a context root are encountered.
This allows us to reason about the full profile without concerning ourselves wether we are double-counting. For example we can combine (during profile use) flattened contextual profiles with flat profiles.
Commit: c56514f75b0744f79d29b5b07298e2aad6803730
https://github.com/llvm/llvm-project/commit/c56514f75b0744f79d29b5b07298e2aad6803730
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/mfence.ll
Log Message:
-----------
[X86] mfence.ll - remove dead X32 check prefix
Commit: 8be1d1235d58d5b2711295dbd9b36abe4b2401d0
https://github.com/llvm/llvm-project/commit/8be1d1235d58d5b2711295dbd9b36abe4b2401d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShufflesRecursively/combineX86ShuffleChain - pass down SDLoc instead of relying on Root node every recursion. NFC.
Don't reconstruct the SDLoc every recursion during shuffle combining.
Noticed while investigating how to reduce the dependency on the Root node.
Commit: 982527eef0f284161dd5e09a9b4fc952b332ec92
https://github.com/llvm/llvm-project/commit/982527eef0f284161dd5e09a9b4fc952b332ec92
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/convert-to-llvm.fir
Log Message:
-----------
[flang] Use saturated intrinsics for floating point to integer conversions (#130686)
The saturated floating point conversion intrinsics match the semantics in the standard more closely than the fptosi/fptoui instructions.
Case 2 of 16.9.100 is
> INT (A [, KIND])
> If A is of type real, there are two cases: if |A| < 1, INT (A) has the
value 0; if |A| ≥ 1, INT (A) is the integer whose magnitude is the
largest integer that does not exceed the magnitude of A and whose sign
is the same as the sign of A.
Currently, converting a floating point value into an integer type too
small to hold the constant will be converted to poison in opt, leaving
us with garbage:
```
> cat t.f90
program main
real(kind=16) :: f
integer(kind=4) :: i
f=huge(f)
i=f
print *, i
end program main
# current upstream
> for i in `seq 10`; do; ./a.out; done
-862156992
-1497393344
-739096768
-1649494208
1761228608
-1959270592
-746244288
-1629194432
-231217344
382322496
```
With the saturated fptoui/fptosi intrinsics, we get the appropriate
values
```
# mine
> flang -O2 ./t.f90 && ./a.out
2147483647
> perl -e 'printf "%d\n", (2 ** 31) - 1'
2147483647
```
One notable difference: NaNs being converted to ints will become zero, unlike current flang (and some other compilers). Newer versions of GCC have this behavior.
Commit: 9820248e0aaaffbee87edeb6a73ced54b4e25be4
https://github.com/llvm/llvm-project/commit/9820248e0aaaffbee87edeb6a73ced54b4e25be4
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
Log Message:
-----------
AddressSanitizer: Add use-after-scope to pass options (#130924)
Commit: 10085390c6d4d0df04bf412f4c9ce7ebaaa5e3f3
https://github.com/llvm/llvm-project/commit/10085390c6d4d0df04bf412f4c9ce7ebaaa5e3f3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-phi-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
M llvm/test/Transforms/SLPVectorizer/X86/splat-score-adjustment.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/addsub.ll
Log Message:
-----------
[SLP]Reduce number of alternate instruction, where possible
Previous version was reviewed here https://github.com/llvm/llvm-project/pull/123360
It is mostly the same, adjusted after graph-to-tree transformation
Patch tries to remove wide alternate operations.
Currently SLP vectorizer emits something like this:
```
%0 = add i32
%1 = sub i32
%2 = add i32
%3 = sub i32
%4 = add i32
%5 = sub i32
%6 = add i32
%7 = sub i32
transformes to
%v1 = add <8 x i32>
%v2 = sub <8 x i32>
%res = shuffle %v1, %v2, <0, 9, 2, 11, 4, 13, 6, 15>
```
i.e. half of the results are just unused. This leads to increased
register pressure and potentially doubles number of operations.
Patch introduces SplitVectorize mode, where it splits the operations by
opcodes and produces instead something like this:
```
%v1 = add <4 x i32>
%v2 = sub <4 x i32>
%res = shuffle %v1, %v2, <0, 4, 1, 5, 2, 6, 3, 7>
```
It allows to improve the performance by reducing number of ops. Also, it
turns on some other improvements, like improved graph reordering.
-O3+LTO, AVX512
Metric: size..text
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2788.00 2820.00 1.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 278168.00 280904.00 1.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 82682.00 83258.00 0.7%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 139344.00 139712.00 0.3%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 27149.00 27197.00 0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1008188.00 1009948.00 0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39226.00 39290.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39229.00 39293.00 0.2%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 2074533.00 2076549.00 0.1%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 798440.00 798952.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 44123.00 44139.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 318942.00 319038.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1159880.00 1160152.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 73595.00 73611.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1146124.00 1146348.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 203831.00 203847.00 0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 207662.00 207678.00 0.0%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 589851.00 589883.00 0.0%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1398543.00 1398559.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2050990.00 2051006.00 0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12559687.00 12559591.00 -0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3074157.00 3074125.00 -0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 1092252.00 1092188.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 779763.00 779715.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 253517.00 253485.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 848259.00 848035.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93064.00 93016.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 383747.00 383475.00 -0.1%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 673051.00 662907.00 -1.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 673051.00 662907.00 -1.5%
Olden/tsp - small variations
Prolangs-C/TimberWolfMC - small variations, some code not inlined
FreeBench/pifft - extra store <8 x double> vectorized, some other extra
vectorizations
CFP2006/433.milc - better vector code
FreeBench/fourinarow - better vector code
Benchmarks/tramp3d-v4 - extra vector code, small variations
mediabench/gsm/toast - small variations
MiBench/telecomm-gsm - small variations
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - better vector code, small variations
CINT2006/464.h264ref - some smaller code + changes similar to x264
DOE-ProxyApps-C/miniGMG - small variations
Benchmarks/Bullet - small variations
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/miniAMR - small variations
CFP2006/453.povray - small variations
DOE-ProxyApps-C++/CLAMR - small variations
MiBench/consumer-lame - small variations
CFP2006/447.dealII - small variations
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - small variations
CFP2017rate/510.parest_r - better vector code, small variations
CFP2017rate/526.blender_r - small variations
CINT2006/403.gcc - small variations
CINT2006/400.perlbench - small variations
CFP2017rate/508.namd_r - small variations
ASCI_Purple/SMG2000 - small variations
JM/lencod - extra store <16 x i32>, small variations
DOE-ProxyApps-C++/miniFE - small variations
JM/ldecod - extra vector code, small variations, less shuffles
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - the number of instructions increased, but
looks like they are more performant. E.g., for function
x264_pixel_satd_8x8, llvm-mca reports better throughput - 84 for the
current version and 59 for the new version.
-O3+LTO, mcpu=sifive-p470
Metric: size..text
results results0 diff
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 580768.00 581118.00 0.1%
test-suite :: MultiSource/Applications/d/make_dparser.test 78854.00 78894.00 0.1%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 633448.00 633750.00 0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 277002.00 277080.00 0.0%
test-suite :: External/SPEC/CINT2006/400.perlbench/400.perlbench.test 931938.00 931960.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 2512806.00 2512822.00 0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7659880.00 7659876.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1602448.00 1602434.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9496664.00 9496542.00 -0.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 147424.00 147422.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 1764608.00 1764578.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 1764608.00 1764578.00 -0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 841656.00 841632.00 -0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 949026.00 948962.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 946348.00 946284.00 -0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 279794.00 279764.00 -0.0%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4776.00 4772.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 25074.00 25028.00 -0.2%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 29336.00 29184.00 -0.5%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 535390.00 510124.00 -4.7%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 535390.00 510124.00 -4.7%
test-suite :: SingleSource/Regression/C/gcc-c-torture/execute/ieee/GCC-C-execute-ieee-pr50310.test 886.00 608.00 -31.4%
CINT2006/464.h264ref - extra v16i32 reduction
d/make_dparser - better vector code
JM/lencod - extra v16i32 reduction
Benchmarks/Bullet - smaller vector code
CINT2006/400.perlbench - better vector code
CINT2006/403.gcc - small variations
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - small variations
CFP2017rate/510.parest_r - small variations
CFP2017rate/526.blender_r - small variations
MiBench/consumer-lame - small variations
CINT2017speed/600.perlbench_s
CINT2017rate/500.perlbench_r - small variations
Benchmarks/7zip - small variations
CFP2017rate/511.povray_r - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - extra vector code
mediabench/gsm - extra vector code
MiBench/telecomm-gsm - extra vector code
DOE-ProxyApps-C/miniGMG - extra vector code
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - reduced number of wide operations and
shuffles, saving the registers, similar to X86, extra code in
pixel_hadamard_ac vectorized
ieee/GCC-C-execute-ieee-pr50310 - extra code vectorized
CINT2006/464.h264ref - extra vector code in find_sad_16x16
JM/lencod - extra vector code in find_sad_16x16
d/make_dparser - smaller vector code
Benchmarks/Bullet - small variations
CINT2006/400.perlbench - smaller vector code
CFP2017rate/526.blender_r - small variations, extra store <8 x float> in
the loop, extra store <8 x i8> in loop
CINT2017rate/500.perlbench_r
CINT2017speed/600.perlbench_s - small variations
MiBench/consumer-lame - small variations
JM/ldecod - extra vector code
mediabench/g721/g721encode - small variations
Reviewers: hiraditya
Reviewed By: hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/128907
Commit: 5c02e74d21fdec44fa9c3a8b45ef60e5b433bf71
https://github.com/llvm/llvm-project/commit/5c02e74d21fdec44fa9c3a8b45ef60e5b433bf71
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
Log Message:
-----------
Fix use of CXXThisScopeRAII
Seemingly I managed to not give this a name, and not notice that it
didn't properly introduce the scope it was supposed to! This patch
gives it a name which should hopefully/presumably fix any cases where we
don't properly introduce the 'this' scope. I presume that previous
callers to this might also do this in most cases so that this is a
redundant scope, but we have to make sure it happens.
FIXES: #130846
Commit: 7a25c725abc52284eeab5529ef6264dc0a57277c
https://github.com/llvm/llvm-project/commit/7a25c725abc52284eeab5529ef6264dc0a57277c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Log Message:
-----------
[X86] Use Register in X86SpeculativeLoadHardening.cpp. NFC (#130905)
Commit: d71b3debc966c123350d38bdf4448083d5e0681d
https://github.com/llvm/llvm-project/commit/d71b3debc966c123350d38bdf4448083d5e0681d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
Log Message:
-----------
[X86][GISel] Use Register and MCRegister. NFC (#130907)
Commit: 90a8322399c7beb021cfe704003d36fafb1a7d29
https://github.com/llvm/llvm-project/commit/90a8322399c7beb021cfe704003d36fafb1a7d29
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add an error that Xqccmp, Xqciac, and Xqcicm are not compatible with C+D or Zcd. (#130816)
I was reviewing encodings to put the disassembling of vendor
instructions after after standard instructions and found that these
overlap with c.fldsp and c.fsdsp.
Commit: e11ede5e90ee193dde179fe1a9ac9af718ede3db
https://github.com/llvm/llvm-project/commit/e11ede5e90ee193dde179fe1a9ac9af718ede3db
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Basic/ABI.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
R clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
Log Message:
-----------
Revert "[MS][clang] Add support for vector deleting destructors (#126240)"
This caused link errors when building with sancov. See comment on the PR.
> Whereas it is UB in terms of the standard to delete an array of objects
> via pointer whose static type doesn't match its dynamic type, MSVC
> supports an extension allowing to do it.
> Aside from array deletion not working correctly in the mentioned case,
> currently not having this extension implemented causes clang to generate
> code that is not compatible with the code generated by MSVC, because
> clang always puts scalar deleting destructor to the vftable. This PR
> aims to resolve these problems.
>
> Fixes https://github.com/llvm/llvm-project/issues/19772
This reverts commit d6942d54f677000cf713d2b0eba57b641452beb4.
Commit: 665299eb3e7a142199e2c22eb294c5e01ef1655d
https://github.com/llvm/llvm-project/commit/665299eb3e7a142199e2c22eb294c5e01ef1655d
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/include/mlir/Transforms/RegionUtils.h
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/test/Transforms/move-operation-deps.mlir
M mlir/test/lib/Transforms/TestTransformsOps.cpp
M mlir/test/lib/Transforms/TestTransformsOps.td
Log Message:
-----------
[mlir][Transforms] Add a utility method to move value definitions. (#130874)
https://github.com/llvm/llvm-project/commit/205c5325b3c771d94feb0ec07e8ad89d27c2b29e
added a transform utility that moved all SSA dependences of an operation
before an insertion point. Similar to that, this PR adds a transform
utility function, `moveValueDefinitions` to move the slice of operations
that define all values in a `ValueRange` before the insertion point.
While very similar to `moveOperationDependencies`, this method differs
in a few ways
1. When computing the backward slice since the start of the slice is
value, the slice computed needs to be inclusive.
2. The combined backward slice needs to be sorted topologically before
moving them to avoid SSA use-def violations while moving individual ops.
The PR also adds a new transform op to test this new utility function.
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 1db978cd781314a15277ea23a11ebd58604685d7
https://github.com/llvm/llvm-project/commit/1db978cd781314a15277ea23a11ebd58604685d7
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILDataScalarization.h
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
R llvm/lib/Target/DirectX/DXILResource.cpp
R llvm/lib/Target/DirectX/DXILResource.h
R llvm/lib/Target/DirectX/DXILResourceAnalysis.cpp
R llvm/lib/Target/DirectX/DXILResourceAnalysis.h
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
Log Message:
-----------
[DirectX] Remove DXILResourceMDAnalysis (#130323)
Removing `DXILResourceMDAnalysis` that gathers information about
resources for the `DXILTranslateMetadata` pass. It collects the info
based on obsolete resource metadata annotations that are going to be
removed soon.
Part 1/2 of #114126
Commit: bdbe8fa1f3dcde77f7e0741ea7fa757ce092a420
https://github.com/llvm/llvm-project/commit/bdbe8fa1f3dcde77f7e0741ea7fa757ce092a420
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/dash-x-f95-cpp-input.f
A flang/test/Driver/dash-x-f95-do-not-assume-fixed-form.f90
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
Log Message:
-----------
[flang] Align `-x` language modes with `gfortran` (#130268)
This PR addresses some of the issues described in
https://github.com/llvm/llvm-project/issues/127617. Key changes:
- Stop assuming fixed-form for `-x f95` unless the input is a `.i` file.
This change ensures compatibility with `-save-temps` workflows while
preventing unintended fixed-form assumptions.
- Ensure `-x f95-cpp-input` enables `-cpp` by default, aligning Flang's
behavior with `gfortran`.
Commit: e5aac528fede69ecc90958fefcfa1f26b97c9e94
https://github.com/llvm/llvm-project/commit/e5aac528fede69ecc90958fefcfa1f26b97c9e94
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#130887)
Commit: 0359677695a741dcf8e26adee692a0dd285fcb91
https://github.com/llvm/llvm-project/commit/0359677695a741dcf8e26adee692a0dd285fcb91
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Driver] Avoid repeated hash lookups (NFC) (#130888)
Commit: db3fdbc84beb9b1f60290880e87a0c7050ac814e
https://github.com/llvm/llvm-project/commit/db3fdbc84beb9b1f60290880e87a0c7050ac814e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/LiveRangeShrink.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#130889)
Commit: a3b0189f6daa7074a6560609b2ac0c2c1fd509f9
https://github.com/llvm/llvm-project/commit/a3b0189f6daa7074a6560609b2ac0c2c1fd509f9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#130890)
Commit: 2620742bf61e8ad5fdc6b245bee31ec341ef46b4
https://github.com/llvm/llvm-project/commit/2620742bf61e8ad5fdc6b245bee31ec341ef46b4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#130892)
Commit: f4d599cda90aa06d1e1a95474a0ee3a4053e77dd
https://github.com/llvm/llvm-project/commit/f4d599cda90aa06d1e1a95474a0ee3a4053e77dd
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[Support] Do not remove lock file on failure (#130834)
Clients of `LockFileManager` call `unsafeRemoveLockFile()` whenever
`tryLock()` fails. However looking at the code, there are no scenarios
where this actually does something useful. This PR removes such calls.
Commit: 48b19912ca58b62aed0112e0a87dc559c877b9e7
https://github.com/llvm/llvm-project/commit/48b19912ca58b62aed0112e0a87dc559c877b9e7
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/gvar-init.ll
Log Message:
-----------
[NVPTX][test] Use 'not' to switch an XFAIL test to PASS (#130839)
Use 'not' to confirm the test has the desired behavior and move it to
passing.
Commit: ec941a4a045106430bc643ea094f33eb03603090
https://github.com/llvm/llvm-project/commit/ec941a4a045106430bc643ea094f33eb03603090
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/ctlz.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
Log Message:
-----------
[NVPTX] Legalize ctpop and ctlz in operation legalization (#130668)
By pulling the truncates and extensions out of operations during
operation legalization we enable more optimization via DAGCombiner.
While the test cases show only cosmetic improvements (unlikely to impact
the final SASS) in real programs the exposure of these truncates can
allow for more optimization.
Commit: 71582c6667a6334c688734cae628e906b3c1ac1d
https://github.com/llvm/llvm-project/commit/71582c6667a6334c688734cae628e906b3c1ac1d
Author: Ana Mihajlovic <Ana.Mihajlovic at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
Log Message:
-----------
[AMDGPU] Remove s_delay_alu for VALU->SGPR->SALU (#127212)
We have a VALU->SGPR->SALU (VALU writing to SGPR and SALU reading from
it). When VALU is issued, it increments internal counter VA_SDST used to
track use of this SGPR. SALU will not issue until VA_SDST is zero, that
is when VALU is finished writing. Therefore, delays added by s_delay_alu
are not needed in this situation.
Commit: f137c3d592e96330e450a8fd63ef7e8877fc1908
https://github.com/llvm/llvm-project/commit/f137c3d592e96330e450a8fd63ef7e8877fc1908
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M bolt/lib/Passes/AsmDump.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/driver/cc1_main.cpp
M flang/tools/bbc/bbc.cpp
M flang/tools/flang-driver/fc1_main.cpp
M llvm/examples/Kaleidoscope/Chapter8/toy.cpp
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/TargetSelect.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/TargetMachineC.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-split/llvm-split.cpp
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/MachineDomTreeUpdaterTest.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/CodeGen/TargetOptionsTest.cpp
M llvm/unittests/CodeGen/TestAsmPrinter.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/MIR/MachineStableHashTest.cpp
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp
M llvm/unittests/Target/AArch64/AddressingModes.cpp
M llvm/unittests/Target/AArch64/Immediates.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/AArch64/MatrixRegisterAliasing.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
M llvm/unittests/Target/AMDGPU/PALMetadata.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/ARM/MachineInstrTest.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/PowerPC/AIXRelocModelTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/VE/MachineInstrTest.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Target/X86/TernlogTest.cpp
M llvm/unittests/tools/llvm-exegesis/Common/AssemblerUtils.h
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
[TargetRegistry] Accept Triple in createTargetMachine() (NFC) (#130940)
This avoids doing a Triple -> std::string -> Triple round trip in lots
of places, now that the Module stores a Triple.
Commit: dd181af9506d515186ce510ce2f0e5dc291563f6
https://github.com/llvm/llvm-project/commit/dd181af9506d515186ce510ce2f0e5dc291563f6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Add isMaskableNode helper to determine if a node could potentially fold into a AVX512 predicated instruction. NFC.
Commit: ea2e66aa8b6e363b89df66dc44275a0d7ecd70ce
https://github.com/llvm/llvm-project/commit/ea2e66aa8b6e363b89df66dc44275a0d7ecd70ce
Author: Kees Cook <kees at kernel.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/LowerConstantIntrinsics/constant-intrinsics.ll
Log Message:
-----------
[LLVM][ConstantFold] Undefined values are not constant (#130713)
llvm.is.constant (and therefore Clang's __builtin_constant_p()) need to
report undefined values as non-constant or future DCE choices end up
making no sense. This was encountered while building the Linux kernel
which uses __builtin_constant_p() while trying to evaluate if it is safe
to use a compile-time constant resolution for string lengths or if it
must kick over to a full runtime call to strlen(). Obviously an
undefined variable cannot be known at compile-time, so
__builtin_constant_p() needs to return false. This change will also mean
that Clang will match GCC's behavior under the same conditions.
Fixes #130649
Commit: 4518780c3cffbb34b24c5edc6a73b9f17826156a
https://github.com/llvm/llvm-project/commit/4518780c3cffbb34b24c5edc6a73b9f17826156a
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
A llvm/test/CodeGen/PowerPC/dmr-enable.ll
Log Message:
-----------
[PowerPC] Add intrinsics and tests for basic Dense Math enablement instructions (#129913)
Add intrinsics and tests for Dense Math basic enablement instructions
dmsetdmrz, dmmr, dmxor.
Commit: e1ac57d53a18c3acd12fff44ef45010a08179674
https://github.com/llvm/llvm-project/commit/e1ac57d53a18c3acd12fff44ef45010a08179674
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfYAML.h
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/test/Transforms/PGOProfile/memprof-call-site-at-alloc-site.ll
M llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
M llvm/test/Transforms/PGOProfile/memprof-undrift.test
M llvm/test/tools/llvm-profdata/memprof-yaml.test
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[MemProf] Extend CallSite information to include potential callees. (#130441)
* Added YAML traits for `CallSiteInfo`
* Updated the `MemProfReader` to pass `Frames` instead of the entire
`CallSiteInfo`
* Updated test cases to use `testing::Field`
* Add YAML sequence traits for CallSiteInfo in MemProfYAML
* Also extend IndexedMemProfRecord
* XFAIL the MemProfYaml round trip test until we update the profile
format
For now we only read and write the additional information from the YAML
format. The YAML round trip test will be enabled when the serialized format is updated.
Commit: 1a626e63b5a009075eea87c01f0661144b1ec010
https://github.com/llvm/llvm-project/commit/1a626e63b5a009075eea87c01f0661144b1ec010
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Frontend/CompilerInstance.cpp
Log Message:
-----------
[flang] Fix deprecation warning
Adjust for #130940.
Commit: fc127ff53d0c816e9e9a64ef55868479e0b84ebd
https://github.com/llvm/llvm-project/commit/fc127ff53d0c816e9e9a64ef55868479e0b84ebd
Author: Artemiy Bulavin <artemiyb at graphcore.ai>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/test/Dialect/Vector/vector-contract-to-dot-transforms.mlir
Log Message:
-----------
[mlir] Extract RHS rows once when lowering vector.contract to dot (#130130)
The `vector.contract` op on two matrices A and B will be lowered to
individual dot products of each row and column of A and B respectively.
The existing lowering will extract each column of B for each row of A,
which leads to multiple values in the IR representing the same columns
of B.
This PR makes changes to the `ContractOpToDotLowering` to make sure that
the columns of B are only ever extracted once, so then the SSA values
representing the extracted columns are then re-used in the IR for later
dot products.
I have updated the existing vector-contract-to-dot-transforms test.
Commit: 6030936ec82a5eb6f4cf7a60f00a8fcc4b6b16cd
https://github.com/llvm/llvm-project/commit/6030936ec82a5eb6f4cf7a60f00a8fcc4b6b16cd
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/test/CodeGen/NVPTX/bfe.ll
Log Message:
-----------
[NVPTX] Fix bug in sign of bfe folding (#130862)
This change fixes an edge case where the unsigned variant of bfe was
incorrectly used instead of the signed variant.
Commit: 78c9fa3a380eb2af32d4856be6d6cba36b776516
https://github.com/llvm/llvm-project/commit/78c9fa3a380eb2af32d4856be6d6cba36b776516
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/unittests/Utility/AnsiTerminalTest.cpp
Log Message:
-----------
[lldb] Implement ANSI & Unicode aware string stripping & padding (#130878)
This PR implements a unicode and ANSI escape code aware function to trim
and pad strings. This is a break-out from #121860.
Commit: 184f9449572b498a612246771d2feabda75f0800
https://github.com/llvm/llvm-project/commit/184f9449572b498a612246771d2feabda75f0800
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
A clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
Log Message:
-----------
Implement the `fmod` intrinsic (#130320)
Replaced the current `fmod` definition with a templatized version,
implemented `fmod` algorithm for DirectX targets that matches the DXC
implementation, added corresponding tests in
`clang/test/CodeGenHLSL/builtins/fmod.hlsl` and
`clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl`.
Closes #99118.
Commit: 8b093e5e1752b3899b4c66f084c33ad1a3d0e8d6
https://github.com/llvm/llvm-project/commit/8b093e5e1752b3899b4c66f084c33ad1a3d0e8d6
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Recognize std::move(protectedThis) (#130925)
In WebKit, it's a common pattern for a lambda to capture "this" along
with "protectedThis" of Ref/RefPtr type, and re-capture "this" and
"std::move(protectedThis)" for a nested inner lambda. Recognize this
pattern and treat it as safe.
Commit: e619073f030239ff15fb134d13423733bb072239
https://github.com/llvm/llvm-project/commit/e619073f030239ff15fb134d13423733bb072239
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/NullPass.h
Log Message:
-----------
[SandboxVec][NullPass][NFC] Add missing banner comment at top of file
Commit: 378739f18208165f9831571a57f34d82f6663bc6
https://github.com/llvm/llvm-project/commit/378739f18208165f9831571a57f34d82f6663bc6
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Move disabling of arg verification to before isFullyInternal(). (#130693)
It has found to be quite a slowdown to traverse the users of a
function from each call site when it is called many (~70k)
times. This patch fixes this for now as long as this verification
is disabled by default, but there is still a need to eventually
cache the results to avoid recomputation.
Fixes #130541
Commit: caf301891a1034e604bceacc84ec244537c31ab6
https://github.com/llvm/llvm-project/commit/caf301891a1034e604bceacc84ec244537c31ab6
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
Add unretained call args checker (#130901)
Reland https://github.com/llvm/llvm-project/pull/130729
Commit: f62e168d3f1ddbeff408d8f7ff1dd0fc0cd70029
https://github.com/llvm/llvm-project/commit/f62e168d3f1ddbeff408d8f7ff1dd0fc0cd70029
Author: John Harrison <harjohn at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
Log Message:
-----------
[lldb-dap] Validate server mode support prior to invoking lldb-dap. (#130855)
This should ensure the extension only uses server mode if the binary
supports the feature, otherwise it will fallback to the existing
behavior.
Fixes #130854
Commit: c44c9051747eda8a62c720202b16d858e7dc7b3d
https://github.com/llvm/llvm-project/commit/c44c9051747eda8a62c720202b16d858e7dc7b3d
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Add error if verification to pooling operators (#130052)
This commit adds the following checks to avg_pool2d and max_pool2d TOSA
operations:
- check kernel values are >= 1
- check stride values are >= 1
- check padding values are >= 0
- check padding values are less than kernel sizes
- check output shape matches the expected output shape
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 96be34e595bbee9a526b602376a3b63cdea357fe
https://github.com/llvm/llvm-project/commit/96be34e595bbee9a526b602376a3b63cdea357fe
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
Log Message:
-----------
[SandboxVec][SeedCollector][NFC] Fix typo in banner
Commit: e27fe2e07c040719075da79d6880bf57b2dc5dbc
https://github.com/llvm/llvm-project/commit/e27fe2e07c040719075da79d6880bf57b2dc5dbc
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/test/SemaOpenACC/atomic-construct-ast.cpp
M clang/test/SemaOpenACC/cache-construct-ast.cpp
M clang/test/SemaOpenACC/combined-construct-ast.cpp
M clang/test/SemaOpenACC/compute-construct-ast.cpp
M clang/test/SemaOpenACC/data-construct-default-ast.cpp
M clang/test/SemaOpenACC/declare-construct-ast.cpp
M clang/test/SemaOpenACC/init-construct-ast.cpp
M clang/test/SemaOpenACC/loop-ast.cpp
M clang/test/SemaOpenACC/shutdown-construct-ast.cpp
Log Message:
-----------
[OpenACC][NFC] Add the _Pragma spelling to a bunch of the tests
OpenACC PR 475(targetting OpenACC3.4) added support for the _Pragma
spelling of an OpenACC pragma. We already implemented this, as clang
doesn't really differentiate between the spellings (so we did it as an
inadvertent extension).
This patch adds a few spot-check tests to make sure we support this
spelling and that it results in the same AST as the traditional
spelling.
Commit: 7f415e444197025180d786c5e212f13b738179cb
https://github.com/llvm/llvm-project/commit/7f415e444197025180d786c5e212f13b738179cb
Author: Nicolas Miller <nicolas.miller at codeplay.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaSYCL/float128.cpp
Log Message:
-----------
[clang][SYCL] Disable float128 device mode diagnostic (#128513)
This diagnostic is disabled for device compilation as float128 is not
supported on the device side.
Other diagnostics are already covering the cases where float128 is
actually used in the kernel code, and it's already tested for in the
existing test.
This is expanding on the patch 318bff6 that handled this for cuda
compilation.
Commit: ab53e1c8e52388377ba50c05979b03a691513cfd
https://github.com/llvm/llvm-project/commit/ab53e1c8e52388377ba50c05979b03a691513cfd
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3363.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3363 (#130980)
This paper clarifies two things:
* a call to va_start must be within the body of a variadic function,
* the va_list arguments must be lvalues
Clang has correctly diagnosed the first point since Clang 5.0. Clang
generally diagnoses the second point, except for va_copy. However, the
second point is not a constraint violation, so a diagnostic is not
strictly required. That said, it would be good for us to properly
diagnose va_copy.
Commit: 3aa96f52cff3dfedba428d70fb2c55798b39e1b3
https://github.com/llvm/llvm-project/commit/3aa96f52cff3dfedba428d70fb2c55798b39e1b3
Author: Rémy Neveu <95233708+rneveu at users.noreply.github.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_taskdeps.h
M openmp/runtime/src/kmp_tasking.cpp
Log Message:
-----------
[OpenMP] [Taskgraph] Differentiating task ids from the taskgraph and from the debugger (#130660)
This PR creates a new member for task data, which is used to identify
the task in its taskgraph (when ompx taskgraph is enabled).
It aims to remove the overloading of the td_task_id member, which was
used both by the debugger and the taskgraph. This resulted in the
identifier's non-unicity in the case of multiple taskgraphs.
Co-authored-by: Rémy Neveu <rem2007 at free.fr>
Commit: 598e882ee88a1e3349fb6d8dcd68f6d3b1c6334f
https://github.com/llvm/llvm-project/commit/598e882ee88a1e3349fb6d8dcd68f6d3b1c6334f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M libc/config/config.json
M libc/config/gpu/amdgpu/config.json
M libc/config/gpu/nvptx/config.json
M libc/docs/configure.rst
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.cpp
M libc/src/stdio/printf_core/converter.h
M libc/src/stdio/printf_core/fixed_converter.h
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdio/printf_core/float_inf_nan_converter.h
M libc/src/stdio/printf_core/int_converter.h
R libc/src/stdio/printf_core/printf_main.cpp
M libc/src/stdio/printf_core/printf_main.h
M libc/src/stdio/printf_core/ptr_converter.h
M libc/src/stdio/printf_core/strerror_converter.h
M libc/src/stdio/printf_core/string_converter.h
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/src/stdio/printf_core/vfprintf_internal.h
M libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/writer.cpp
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
R libc/src/time/strftime_core/converter.cpp
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
R libc/src/time/strftime_core/strftime_main.cpp
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/printf_core/writer_test.cpp
M libc/utils/gpu/server/CMakeLists.txt
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Template the writing mode for the writer class (#111559)
Summary:
Currently we dispatch the writing mode off of a runtime enum passed in
by the constructor. This causes very unfortunate codegen for the GPU
targets where we get worst-case codegen because of the unused function
pointer for `sprintf`. Instead, this patch moves all of this to a
template so it can be masked out. This results in no dynamic stack and
uses 60 VGPRs instead of 117. It also compiles about 5x as fast.
Commit: aa008e00085a260b2ed130b3430cc4640144ab30
https://github.com/llvm/llvm-project/commit/aa008e00085a260b2ed130b3430cc4640144ab30
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
Log Message:
-----------
Revert "[AMDGPU] Remove s_delay_alu for VALU->SGPR->SALU (#127212)"
This reverts commit 71582c6667a6334c688734cae628e906b3c1ac1d.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/127212
Commit: 4d79e9892c482978ba07690e275ea9f7e983a703
https://github.com/llvm/llvm-project/commit/4d79e9892c482978ba07690e275ea9f7e983a703
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Support/DebugCounter.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#130891)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 7790d69cce048d7c81fceaf979fd2ec60e37476b
https://github.com/llvm/llvm-project/commit/7790d69cce048d7c81fceaf979fd2ec60e37476b
Author: John Harrison <harjohn at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
R lldb/tools/lldb-dap/IOStream.cpp
R lldb/tools/lldb-dap/IOStream.h
A lldb/tools/lldb-dap/Transport.cpp
A lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactoring IOStream into Transport handler. (#130026)
Instead of having two discrete InputStream and OutputStream helpers,
this merges the two into a unifed 'Transport' handler.
This handler is responsible for reading the DAP message headers, parsing
the resulting JSON and converting the messages into
`lldb_dap::protocol::Message`s for both input and output.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 5929de8c7731748bf58ad9b1fedfed75e7aae455
https://github.com/llvm/llvm-project/commit/5929de8c7731748bf58ad9b1fedfed75e7aae455
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 7790d69cce04
Commit: 9d7e1d92dbef5aa4d11deed360685a86935953d2
https://github.com/llvm/llvm-project/commit/9d7e1d92dbef5aa4d11deed360685a86935953d2
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/usubsat.ll
Log Message:
-----------
[AMDGPU][True16] added Pre-RA hint to improve copy elimination (#103366)
The allocation order of 16 bit registers is vgpr0lo16, vgpr0hi16,
vgpr1lo16, vgpr1hi16, vgpr2lo16.... We prefer (essentially require) that
allocation order, because it uses the minimum number of registers. But
when you have 16 bit data passing between 16 and 32 bit instructions you
get lots of COPY.
This patch teach the compiler that a COPY of a 16-bit value from a 32
bit register to a lo-half 16 bit register is free, to a hi-half 16 bit
register is not.
This might get improved to coalescing with additional cases, and perhaps
as an alternative to the RA hints. For now upstreaming this solution
first.
Commit: 15e6bb6224177805d8b6a8268f08a2b88ae4dd70
https://github.com/llvm/llvm-project/commit/15e6bb6224177805d8b6a8268f08a2b88ae4dd70
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
Log Message:
-----------
[ORC] Rename wrapper arguments to match conventions. NFCI.
Commit: c8047c6dbcb59ff8273c925c320ff59901dd60e9
https://github.com/llvm/llvm-project/commit/c8047c6dbcb59ff8273c925c320ff59901dd60e9
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] update test for buildbot failure (#131028)
This is a NFC patch
https://github.com/llvm/llvm-project/pull/103366 hit a buildbot failure
with i1-to-bf16.ll. Update the test to fix the build.
Also remove duplicated comments added in
https://github.com/llvm/llvm-project/pull/103366
Commit: c476a4a907a51371f051fd83987aaeb2c4a011af
https://github.com/llvm/llvm-project/commit/c476a4a907a51371f051fd83987aaeb2c4a011af
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Driver/Types.cpp
A clang/test/Driver/opencl-aot-compilation.cl
Log Message:
-----------
[Clang][OpenCL] Fix Missing `-fdeclare-opencl-builtins` When Using `--save-temps` (#131017)
When compiling an OpenCL program directly with `clang` using
`--save-temps`, an
error may occur if the program contains OpenCL builtins:
```
test.cl:3:21: error: use of undeclared identifier 'get_global_id'
3 | unsigned int id = get_global_id(0);
| ^
```
This happens because the driver does not add `-fdeclare-opencl-builtins`
when
the input type is `TY_PP_CL`. This PR fixes the issue.
Commit: cba9dc6e9d0455a0c4897c9acf61961b448b9d60
https://github.com/llvm/llvm-project/commit/cba9dc6e9d0455a0c4897c9acf61961b448b9d60
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/test/Headers/gpuintrin.c
Log Message:
-----------
[libc][nfc] Use common implementation of read_first_lane_u64 (#131027)
No codegen regression on either target. The two builtin_ffs implied on
nvptx CSE away.
```
define internal i64 @__gpu_read_first_lane_u64(i64 noundef %__lane_mask, i64 noundef %__x) #2 {
entry:
%shr = lshr i64 %__x, 32
%conv = trunc nuw i64 %shr to i32
%conv1 = trunc i64 %__x to i32
%conv2 = trunc i64 %__lane_mask to i32
%0 = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %conv2, i1 true)
%iszero = icmp eq i32 %conv2, 0
%sub = select i1 %iszero, i32 -1, i32 %0
%1 = tail call i32 @llvm.nvvm.shfl.sync.idx.i32(i32 %conv2, i32 %conv, i32 %sub, i32 31)
%conv4 = sext i32 %1 to i64
%shl = shl nsw i64 %conv4, 32
%2 = tail call i32 @llvm.nvvm.shfl.sync.idx.i32(i32 %conv2, i32 %conv1, i32 %sub, i32 31)
%conv7 = zext i32 %2 to i64
%or = or disjoint i64 %shl, %conv7
ret i64 %or
}
; becomes
define internal i64 @__gpu_competing_read_first_lane_u64(i64 noundef %__lane_mask, i64 noundef %__x) #2 {
entry:
%shr = lshr i64 %__x, 32
%conv = trunc nuw i64 %shr to i32
%conv1 = trunc i64 %__x to i32
%conv.i = trunc i64 %__lane_mask to i32
%0 = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %conv.i, i1 true)
%iszero = icmp eq i32 %conv.i, 0
%sub.i = select i1 %iszero, i32 -1, i32 %0
%1 = tail call i32 @llvm.nvvm.shfl.sync.idx.i32(i32 %conv.i, i32 %conv, i32 %sub.i, i32 31)
%conv4 = zext i32 %1 to i64
%shl = shl nuw i64 %conv4, 32
%2 = tail call i32 @llvm.nvvm.shfl.sync.idx.i32(i32 %conv.i, i32 %conv1, i32 %sub.i, i32 31)
%conv7 = zext i32 %2 to i64
%or = or disjoint i64 %shl, %conv7
ret i64 %or
}
```
The sext vs zext difference is vaguely interesting but since the bits
are immediately discarded in either case it make no odds. The amdgcn one
doesn't need CSE, the readfirstlane function is a single call to an
intrinsic.
Drive by fix to __gpu_match_all_u32, it was calling first_lane_u64 and
could use first_lane_u32 instead. Added the missing call to gpuintrin.c
test case and a stray missing static as well.
Commit: 64b94105d5c7a1a578dc2fb846747411686b666b
https://github.com/llvm/llvm-project/commit/64b94105d5c7a1a578dc2fb846747411686b666b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/test/CIR/CodeGen/basic.c
Log Message:
-----------
[CIR] Upstream support for emitting ignored statements (#130869)
This adds support for emitting ClangIR for statements whose value is
ignored. The test case being added (CIR/CodeGen/basic.c) tests a few
more things. The "f1" test case is the only part that's immediately
relevant to this change, but the other cases were part of the same test
in the incubator and they are supported so I brought in the entire test.
Commit: 202137dbead88004c956595106ab6d80d597508c
https://github.com/llvm/llvm-project/commit/202137dbead88004c956595106ab6d80d597508c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
A llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll
Log Message:
-----------
[SLP]Fix a crash on matching gather operands of phi nodes in loops
If the gather operands in phi nodes are matching and phi nodes may build
up a loop, it may cause a compiler crash with the incorrect def-use
chain. Patch fixes this crash.
Commit: 9c65e6ac115a7d8566c874537791125c3ace7c1a
https://github.com/llvm/llvm-project/commit/9c65e6ac115a7d8566c874537791125c3ace7c1a
Author: Abinaya Saravanan <quic_asaravan at quicinc.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/fp16-promote.ll
Log Message:
-----------
[HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977)
Commit: 62994c3291239f3d11f958d002319b2bd6eddbc9
https://github.com/llvm/llvm-project/commit/62994c3291239f3d11f958d002319b2bd6eddbc9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
A llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
Log Message:
-----------
[VPlan] Also introduce explicit broadcasts for values from entry VPBB.
Update and generalize materializeBroadcasts to also introduce explicit
broadcasts for VPValues defined in the Plans Entry block.
This fixes a crash when trying to insert the broadcasts generated by
VPTransformState::get after the generating instruction, which isn't
possible after invoke instructions.
Fixes https://github.com/llvm/llvm-project/issues/128838.
Commit: be0215d7456f85e7df6c07b982704c7bfa943278
https://github.com/llvm/llvm-project/commit/be0215d7456f85e7df6c07b982704c7bfa943278
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
A clang/test/CIR/Transforms/scope.cir
M clang/tools/cir-opt/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Add transform test for cir-flatten-cfg (#130861)
A previous change added the cir-flatten-cfg transform and tested it by
lowering a function with nested scopes to LLVM IR. This change adds
support for invoking the cir-flatten-cfg pass from the cir-opt tool and
adds a new test to verify that functionality in isolation.
Commit: ecf4d995f689a30bb5a2b79c27998a7e7a0a08b0
https://github.com/llvm/llvm-project/commit/ecf4d995f689a30bb5a2b79c27998a7e7a0a08b0
Author: Javed Absar <javed.absar at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Linalg/Transforms/FoldIntoElementwise.cpp
A mlir/test/Dialect/Linalg/elementwise/fold.mlir
Log Message:
-----------
[mlir][linalg][elementwise] Fold transpose into new elementwise (#130207)
Fold transpose into new elementwise Op which has affine-map attached.
Will add broadcast folding in next diff.
Commit: c14e459ef8bd8b0cf1d2b135f570f39868b6fee6
https://github.com/llvm/llvm-project/commit/c14e459ef8bd8b0cf1d2b135f570f39868b6fee6
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A clang/test/Sema/shift-bool.c
M clang/test/Sema/shift-bool.cpp
Log Message:
-----------
[Clang] add additional tests for -Wshift-bool (#130339)
Fixes
https://github.com/llvm/llvm-project/pull/127336#pullrequestreview-2665950553
Commit: 1cfca53b9f2eadbf864b85995ec7f819d7f29b5e
https://github.com/llvm/llvm-project/commit/1cfca53b9f2eadbf864b85995ec7f819d7f29b5e
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Support/Timer.cpp
M llvm/unittests/Support/TimerTest.cpp
Log Message:
-----------
[llvm][Timer] Don't print timers in TimerGroup when all Timers are removed (#131026)
Only print them on TimerGroup destruction (or eagerly when
TimerGroup::printAll() is called).
We should be able to destroy all Timers in a TimerGroup while delaying
printing the stored TimeRecords.
Commit: 98c279a3ed202aecae79227317e8a243109c66e6
https://github.com/llvm/llvm-project/commit/98c279a3ed202aecae79227317e8a243109c66e6
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
Log Message:
-----------
[lldb] Add missing optional conversion
Commit: 726ffd361cd932ff3b44e6a6b68bf1dbfd7802e1
https://github.com/llvm/llvm-project/commit/726ffd361cd932ff3b44e6a6b68bf1dbfd7802e1
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
Log Message:
-----------
[NFC][Cloning] Replace IdentityMD set with a predicate in ValueMapper (#129147)
Summary:
We used the set only to check if it contains certain metadata nodes.
Replacing the set with a predicate makes the intention clearer and the
API more general.
Test Plan:
ninja check-all
Commit: c542991703956bdc42ad6ab07b1d47e5db06fb2b
https://github.com/llvm/llvm-project/commit/c542991703956bdc42ad6ab07b1d47e5db06fb2b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang/cmake/modules/FlangCommon.cmake
Log Message:
-----------
[flang-rt] Fixed HAVE_LDBL_MANT_DIG_113 detection. (#131010)
I thought I guessed a fix in #130836, but I was wrong.
We actually had the same code in
`flang/cmake/modules/FlangCommon.cmake`.
The check does not pass in flang-rt bootstrap build, because
`-nostdinc++` is added for all `runtimes` checks.
I decided to make the check with the C header, though, I am still
unsure whether it is reliable with a clang that has not been
installed (it is taken from the build structure during flang-rt
configure step).
I verified that this PR enables REAL(16) math entries on aarch64.
Commit: f4fc2d731c1b351d5f684f7ec53a0e1ca549df43
https://github.com/llvm/llvm-project/commit/f4fc2d731c1b351d5f684f7ec53a0e1ca549df43
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/target-map-complex.f90
A offload/test/offloading/fortran/target-map-literal-write.f90
Log Message:
-----------
[flang][OpenMP] Map ByRef if size/alignment exceed that of a pointer (#130832)
Improve the check for whether a type can be passed by copy. Currently,
passing by copy is done via the OMP_MAP_LITERAL mapping, which can only
transfer as much data as can be contained in a pointer representation.
Commit: cb73271be12a40c7d885813733e11fd90eb3ed10
https://github.com/llvm/llvm-project/commit/cb73271be12a40c7d885813733e11fd90eb3ed10
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU][CodeGen] use vt in VGPRimm pattern (#131016)
There seems to be a typo error introduced by
https://github.com/llvm/llvm-project/commit/2033767d68ed9aabcf1ad5d2bdd7541b272a05fd
Correct this pattern to use vt.
Commit: 44ff94e99e0380d520d7e9803100044867ab08db
https://github.com/llvm/llvm-project/commit/44ff94e99e0380d520d7e9803100044867ab08db
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/OptimizationRemarkEmitter.h
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/lib/Analysis/InlineAdvisor.cpp
Log Message:
-----------
[Diagnostics] Return rvalue reference from temporary argument (#127400)
This fixes compilation issues with GCC and C++23:
```
error: cannot bind non-const lvalue reference of type
'llvm::OptimizationRemarkMissed&' to an rvalue of type
'llvm::OptimizationRemarkMissed'
```
Closes #105778
Commit: 6705d812b8563ae02cad3f7125de7193c0128c20
https://github.com/llvm/llvm-project/commit/6705d812b8563ae02cad3f7125de7193c0128c20
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.r600.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/early-inline.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-on-function-argument.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/mmo-target-flags-folding.ll
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-strip-abi-opt-attributes.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/visit-physreg-vgpr-imm-folding-bug.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor-r600.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900)
Many tests use store to undef as a placeholder use, so just replace
all of these with poison.
Commit: c182f4042adae606a6312cc63e305a9fad5fd603
https://github.com/llvm/llvm-project/commit/c182f4042adae606a6312cc63e305a9fad5fd603
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Replace <4 x i32> undef uses in tests with poison (#130902)
Most of these are from resource descriptors.
Commit: e1e44dfcad00aa3f90252578bd9e86314db021ef
https://github.com/llvm/llvm-project/commit/e1e44dfcad00aa3f90252578bd9e86314db021ef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Replace <8 x i32> undef uses in tests with poison (#130903)
Commit: 27d83184c4cacbe15cf3c3921145086b9cebac56
https://github.com/llvm/llvm-project/commit/27d83184c4cacbe15cf3c3921145086b9cebac56
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Treat an explicit construction of Ref from a Ref return value safe. (#130911)
Fix a bug that an explicit construction of Ref out of a Ref return value
would not be treated as safe. It is definitely safe albit redundant.
Commit: 12fe5ae88cce0e3a8de47ed766425cbf8505ab87
https://github.com/llvm/llvm-project/commit/12fe5ae88cce0e3a8de47ed766425cbf8505ab87
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/required-export-priority.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Replace ptr addrspace(8) undef uses with poison (#130904)
Commit: be9ca85d64eb5b2d7b13d7c6154055ae97092d1e
https://github.com/llvm/llvm-project/commit/be9ca85d64eb5b2d7b13d7c6154055ae97092d1e
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
A clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
Log Message:
-----------
[alpha.webkit.webkit.RetainPtrCtorAdoptChecker] Add a new WebKit checker for correct use of RetainPtr, adoptNS, and adoptCF (#128679)
Add a new WebKit checker to validate the correct use of RetainPtr
constructor as well as adoptNS and adoptCF functions. adoptNS and
adoptCf are used for +1 semantics and RetainPtr constructor is used for
+0 semantics.
Commit: e4a0fd5416a3061c2bfe1241642149a779a9d866
https://github.com/llvm/llvm-project/commit/e4a0fd5416a3061c2bfe1241642149a779a9d866
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port be9ca85d64eb
Commit: eea7d32bd262bb5f61790c42ebaa147aa26c3979
https://github.com/llvm/llvm-project/commit/eea7d32bd262bb5f61790c42ebaa147aa26c3979
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCELFStreamer.cpp
Log Message:
-----------
[MC] Move fixSymbolsInTLSFixups to ELFObjectWriter
so that we only need to do it once during recordRelocation. In the
future, we should change fixSymbolsInTLSFixups to apply to MCValue
instead of MCExpr, similar to GNU assembler.
Commit: 95ab95fd10b2593afedcd53ba653381f35852ebc
https://github.com/llvm/llvm-project/commit/95ab95fd10b2593afedcd53ba653381f35852ebc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make rcp intrinsic propagate poison (#130913)
Commit: d8f17b3de1ca64b6ac8eb383bcb267078bbfea56
https://github.com/llvm/llvm-project/commit/d8f17b3de1ca64b6ac8eb383bcb267078bbfea56
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make sqrt and rsq intrinsics propagate poison (#130914)
Commit: 4d8070e9560269494654bd21a2b0c342f4bdae48
https://github.com/llvm/llvm-project/commit/4d8070e9560269494654bd21a2b0c342f4bdae48
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/Modules/external-but-not-type-external.cppm
Log Message:
-----------
[C++20] [Modules] Don't add decls from other units to undefinedButUsed set
It is still better to elide the declaration if possible. To overcome the
false positive undefinedButUsed diagnostic, it seems better to not add
declaration from other units to the set actually.
Commit: 0a78bd67b311e418d44f3975b9fd9f62cdbe56c6
https://github.com/llvm/llvm-project/commit/0a78bd67b311e418d44f3975b9fd9f62cdbe56c6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make frexp_exp and frexp_mant intrinsics propagate poison (#130915)
Commit: 853849a984dd7d47b86ab50ef74b9820a538c999
https://github.com/llvm/llvm-project/commit/853849a984dd7d47b86ab50ef74b9820a538c999
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericMemoryAccessTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/MapperJITLinkMemoryManagerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/MemoryMapperTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
M llvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Remove some unnecessary namespace qualifications. NFCI.
Commit: 62e37a8a0ae882c3ae1c994aa22953d6279458d4
https://github.com/llvm/llvm-project/commit/62e37a8a0ae882c3ae1c994aa22953d6279458d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV][Disassembler] Use a table to store all the decoder tables and their associated features. NFC (#130883)
Replace the macros with a table that we can iterate over. Use a
different table for each possible instruction bitwidth.
Commit: 4dcba5e08dc9cf2e5ec3f0df682f8ecc88e815be
https://github.com/llvm/llvm-project/commit/4dcba5e08dc9cf2e5ec3f0df682f8ecc88e815be
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
A clang/test/Analysis/Checkers/WebKit/forward-decl-checker.mm
M clang/test/Analysis/Checkers/WebKit/mock-system-header.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
Log Message:
-----------
[alpha.webkit.ForwardDeclChecker] Add a new WebKit checker for forward declarations (#130554)
Add a new static analyzer which emits warnings for function call
arguments, local variables, and member variables that are only forward
declared. These forward declaration prevents other WebKit checkers from
checking the safety of code.
Commit: 79a5974294eb35a811e54e31f6f97978a9b42a41
https://github.com/llvm/llvm-project/commit/79a5974294eb35a811e54e31f6f97978a9b42a41
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port 4dcba5e08dc9
Commit: f291ec692e889f8cdfe17810c138a31f701e4db3
https://github.com/llvm/llvm-project/commit/f291ec692e889f8cdfe17810c138a31f701e4db3
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/src/locale/CMakeLists.txt
M libc/src/locale/duplocale.cpp
M libc/src/locale/freelocale.cpp
M libc/src/locale/locale.cpp
M libc/src/locale/newlocale.cpp
M libc/src/locale/newlocale.h
M libc/src/locale/setlocale.cpp
M libc/src/locale/setlocale.h
Log Message:
-----------
[libc] Use proxy header in the `locale` implementation. (#130982)
Address review comments in
https://github.com/llvm/llvm-project/pull/130621#pullrequestreview-2671843932.
Some unused headers are also removed.
Commit: 376e3b62cd36cabf4235e085cd13df05c2bd754b
https://github.com/llvm/llvm-project/commit/376e3b62cd36cabf4235e085cd13df05c2bd754b
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
A llvm/test/TableGen/match.td
Log Message:
-----------
[TableGen] Add `!match` operator to do regex matching (#130759)
The grammar is `!match(str, regex)` and this operator produces 1
if the `str` matches the regular expression `regex`.
The format of `regex` is ERE (Extended POSIX Regular Expressions).
Commit: 3438dfc7ff8863bdd8c34e41d0cade5ca4581891
https://github.com/llvm/llvm-project/commit/3438dfc7ff8863bdd8c34e41d0cade5ca4581891
Author: Christopher Bate <cbate at nvidia.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Tensor/one-shot-bufferize.mlir
Log Message:
-----------
[mlir][tensor] Fix bufferization interface for 'tensor.reshape' (#128590)
Previously, the BufferizableOpInterface implementation for
'tensor.reshape'
listed the 'shape' operand as an alias for the result tensor, causing
unnecessary conflicts with ops that "write" to the shape operand.
Commit: 08a3c532255d2af8722c32a7484a8648ac0ae2f5
https://github.com/llvm/llvm-project/commit/08a3c532255d2af8722c32a7484a8648ac0ae2f5
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RegAlloc] Scale the spill weight by target factor (#113675)
Currently, the spill weight is only determined by isDef/isUse and
block frequency. However, for registers with different register
classes, the costs of spilling them are different.
For example, for `LMUL>1` registers (in which, several physical
registers compound a bigger logical register), the costs are larger
than `LMUL=1` case (in which, there is only one physical register).
To solve this problem, a new target hook `getSpillWeightScaleFactor`
is added. Targets can override the default factor (which is `1.0`)
according to the register class.
For RISC-V, the factors are set to the `RegClassWeight` which is
used to track register pressure. The values of `RegClassWeight`
happen to be the number of register units.
I believe all of the targets with compounded registers can benefit
from this change, but only RISC-V is customized in this patch since
it has widely been agreed to do so. The other targets need more
performance data to go further.
Partially fixes #113489.
Commit: 646a6e7f1088355d979be4fd58d8a56a96d1fea2
https://github.com/llvm/llvm-project/commit/646a6e7f1088355d979be4fd58d8a56a96d1fea2
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
Log Message:
-----------
[PowerPC] Simplify PPCMCExpr::printImpl
Commit: fe0d3e3764961b62f43f1b129f30aaec5f30bc16
https://github.com/llvm/llvm-project/commit/fe0d3e3764961b62f43f1b129f30aaec5f30bc16
Author: Kuo, Mei-Chun <94007620+Megan0704-1 at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/copy-ctor-template.cpp
M clang/test/SemaTemplate/constructor-template.cpp
Log Message:
-----------
[Sema] Diagnose by-value copy constructors in template instantiations (#130866)
Fixes #80963
This PR ensures Clang diagnoses by-value copy constructors in implicitly
instantiated class templates (e.g., `A<int, int>(A<int, int>)`), per
[class.copy.ctor].
Changes:
- Remove `TSK_ImplicitInstantiation` check in `SemaDeclCXX.cpp`.
- Add `!isFunctionTemplateSpecialization()` to skip templated
constructors.
- Add regression tests.
Commit: 642a4763dfaa46dab151e68f0272ab2b4c8c31b0
https://github.com/llvm/llvm-project/commit/642a4763dfaa46dab151e68f0272ab2b4c8c31b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[PowerPC] Rename PPCMCExpr's VK_PPC_ to VK_. NFC
Make the name conciser. PPC-specific MCSymbolRefExpr::VariantKind
members will be moved to PPCMCExpr and we will not ue
MCSymbolRefExpr::VariantKind's "generic" members, so there won't be
mix-and-match.
Commit: bc4b2c74fe4eae40652e0f79ee9e0397110c0423
https://github.com/llvm/llvm-project/commit/bc4b2c74fe4eae40652e0f79ee9e0397110c0423
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/nf-regressions.ll
Log Message:
-----------
[X86][APX] Add NF instructions to convertToThreeAddress functions (#130969)
Since #130488, we have NF instructions when converting to three address
instructions.
Commit: 73e12de062c17eddfa08f61ba8f44a20fa912f1b
https://github.com/llvm/llvm-project/commit/73e12de062c17eddfa08f61ba8f44a20fa912f1b
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/cbuffer_with_packoffset.hlsl
A clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
Log Message:
-----------
[HLSL] Implement explicit layout for default constant buffer ($Globals) (#128991)
Processes `HLSLResourceBindingAttr` attributes that represent
`register(c#)` annotations on default constant buffer declarations and
applies its value to the buffer layout. Any default buffer declarations
without an explicit `register(c#)` annotation are placed after the
elements with explicit layout.
This PR also adds a test case for a `cbuffer` that does not have
`packoffset` on all declarations. Same layout rules apply here as well.
Fixes #126791
Commit: 95e186cadfc880ba5f7a1d90c075cf097e33ff62
https://github.com/llvm/llvm-project/commit/95e186cadfc880ba5f7a1d90c075cf097e33ff62
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
A llvm/test/CodeGen/X86/narrow-load-metadata.ll
Log Message:
-----------
Reland "DAG: Preserve range metadata when load is narrowed" (#128144) (#130609)
Changes: Add guard to ensure truncation is strictly smaller than
original size.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 5d5f16204f17eae903d5cead75f31a41e7e960d4
https://github.com/llvm/llvm-project/commit/5d5f16204f17eae903d5cead75f31a41e7e960d4
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCTargetStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
Log Message:
-----------
Move PowerPC-specific MCSymbolRefExpr::VariantKind to PPCMCExpr
Most changes are mechanic, except:
* ELFObjectWriter::shouldRelocateWithSymbol: .TOC. at tocbase does not
register the undefined symbol. Move the handling into the
Sym->isUndefined() code path.
* ELFObjectWriter::fixSymbolsInTLSFixups's VK_PPC* cases are moved to
PPCELFObjectWriter::getRelocType. We should do similar refactoring
for other targets and eventually remove fixSymbolsInTLSFixups.
In the future, we should classify PPCMCExpr similar to AArch64MCExpr.
Commit: 6abe19ac587d36edf202830cbbceecfd1a55f191
https://github.com/llvm/llvm-project/commit/6abe19ac587d36edf202830cbbceecfd1a55f191
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/OSTargets.cpp
A clang/test/Sema/offsetof-ucrt.c
A clang/test/SemaCXX/offsetof-ucrt.cpp
Log Message:
-----------
[clang] Predefine `_CRT_USE_BUILTIN_OFFSETOF` in MS-compatible modes (#127568)
This patch makes Clang predefine `_CRT_USE_BUILTIN_OFFSETOF` in
MS-compatible modes. The macro can make the `offsetof` provided by MS
UCRT's `<stddef.h>` to select the `__builtin_offsetof` version, so with
it Clang (Clang-cl) can directly consume UCRT's `offsetof`.
MSVC predefines the macro as `1` since at least VS 2017 19.14, but I
think it's also OK to define it in "older" compatible modes.
Fixes #59689.
Commit: 1d1f2e8c5be319c91fa696e19a6394fca4e16bea
https://github.com/llvm/llvm-project/commit/1d1f2e8c5be319c91fa696e19a6394fca4e16bea
Author: Min Hsu <min at myhsu.dev>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.h
Log Message:
-----------
[M68k] Implement TLI::convertSelectOfConstantsToMath
This TLI callback shows the preference of other operations over
ISD::SELECT on constant operands. It's essential for M68k because
ISD::SELECT tends to lower into M68kISD::CMOV which is not always ideal.
This fixes #130754, which showed up after 352c48f278c89ac4c65642d3fadf52032e7fe734.
Commit: 34f4ee7c0d98cfbee2bfc5cfee72b8090da68dc2
https://github.com/llvm/llvm-project/commit/34f4ee7c0d98cfbee2bfc5cfee72b8090da68dc2
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/Modules/external-but-not-type-external.cppm
Log Message:
-----------
[C++20] [Modules] Merge codes to decide if we should generate decl
There are two piece of codes in ASTWriterDecl to decide whether or not
we should generate a function or a variable in current module unit (or
PCH with object file extension, which is rarely used). One is in
Visit*Decl and One is in `CanElideDef`. Since they are similar it should
be better to merge them.
This was meant to be a NFC patch. But it seems it helped me to find an
existing bug.
Commit: 331250c6fac8cc362d72ae338a9f149efc10e748
https://github.com/llvm/llvm-project/commit/331250c6fac8cc362d72ae338a9f149efc10e748
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-flat.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
AMDGPU: Replace ptr addrspace(3) undef in tests with poison (#131049)
Commit: f81531c38be09c4b45bac047b9839c8d148a8c81
https://github.com/llvm/llvm-project/commit/f81531c38be09c4b45bac047b9839c8d148a8c81
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-12 (Wed, 12 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
Log Message:
-----------
Move VE-specific MCSymbolRefExpr::VariantKind to VEMCExpr
Close #130003
Commit: 7811075b6f667d9a92038fce48262c55327c10d0
https://github.com/llvm/llvm-project/commit/7811075b6f667d9a92038fce48262c55327c10d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.r600.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-and-hostcall.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll
M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
M llvm/test/CodeGen/AMDGPU/swdev282079.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
Log Message:
-----------
AMDGPU: Replace ptr undef in tests with poison (#131050)
Commit: 21cef8aa1c95c67732b6fa6878c26e193e5798b3
https://github.com/llvm/llvm-project/commit/21cef8aa1c95c67732b6fa6878c26e193e5798b3
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-ld.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-st.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for tcgen05.{ld, st} (#130728)
This commit adds support for tcgen05.{ld, st} to the NVVM Dialect with
tests under tcgen05-ld.mlir and tcgen05-st.mlir respectively
Commit: 26ae98c4d73d13f973eeb8450e0f5c7d1cd25993
https://github.com/llvm/llvm-project/commit/26ae98c4d73d13f973eeb8450e0f5c7d1cd25993
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-anonymous-kernels.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-mixed-absolute-addresses.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice-absolute-md.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-memory.r600.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-check-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr-phi.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-inactive.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-ambiguous.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-unambiguous.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-globals.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-padding-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll
M llvm/test/CodeGen/AMDGPU/promote-kernel-arguments.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
Log Message:
-----------
AMDGPU: Replace undef global initializers in tests with poison (#131051)
Commit: 9e91725fd4d4ee30e98ab2682f93b423590a4ade
https://github.com/llvm/llvm-project/commit/9e91725fd4d4ee30e98ab2682f93b423590a4ade
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
Log Message:
-----------
AMDGPU: Replace some undef uses in test metadata with poison (#131052)
Commit: 6345b009c3e58a6cd0eca835d5a935f8784cfda6
https://github.com/llvm/llvm-project/commit/6345b009c3e58a6cd0eca835d5a935f8784cfda6
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaLambda.cpp
A clang/test/Modules/lambda-in-module-purview-2.cppm
A clang/test/Modules/lambda-in-module-purview.cppm
Log Message:
-----------
[C++20] [Modules] Add mangling number for lambda in non-internal module unit context
Close https://github.com/llvm/llvm-project/issues/59513
Close https://github.com/llvm/llvm-project/issues/110146
As we discussed, this is related to ABI:
https://github.com/itanium-cxx-abi/cxx-abi/issues/186
I was intending to fix this after it gets merged into the ItaniumC++ABI
formally. But it looks like ItaniumC++ABI doesn't update it yet and
there are more issue reports for it.
Luckily Richard had a clear direction guide here though. So I think it
should be good to do this without a formal ItaniumC++ABI wording.
The diff of the patch is slightly larger than it was by a simple
refacoration to simple the control flow a little bit.
Commit: bd748b33958f8889d280afd4396b189edd0745bf
https://github.com/llvm/llvm-project/commit/bd748b33958f8889d280afd4396b189edd0745bf
Author: Hank Chang <hank.chang at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
A llvm/test/CodeGen/RISCV/rvv/vsetvl-cross-inline-asm.ll
Log Message:
-----------
[RISCV] Add implicit operand {VL, VTYPE} in RISCVInsertVSETVLI when u… (#130733)
…sing inline assembly.
Fixing [#128636](https://github.com/llvm/llvm-project/pull/128636).
This patch has RISCVInsertVSETVLI to add implicit use operand to inline
assembly, this approach is suggested by @preames and the implementation
I referenced is from @topperc . The purpose of adding vl, vtype implicit
operand is to prevent Post-RA scheduler moving vsetvl across inline
assembly.
Commit: 43ab4228d00abcb08b5d75d154deeca9c42ca795
https://github.com/llvm/llvm-project/commit/43ab4228d00abcb08b5d75d154deeca9c42ca795
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
Log Message:
-----------
[LoongArch] Pre-commit test for vector trunc (#131082)
Commit: 5952972c9164216be7c22292c52c131f1d0a8030
https://github.com/llvm/llvm-project/commit/5952972c9164216be7c22292c52c131f1d0a8030
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/BranchFoldingPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/branch-folder-oneinst.mir
M llvm/test/CodeGen/AMDGPU/branch-folder-requires-no-phis.mir
M llvm/test/CodeGen/Hexagon/branchfolder-insert-impdef.mir
M llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
M llvm/test/CodeGen/X86/branchfolding-ehpad.mir
Log Message:
-----------
[CodeGen][NPM] Port BranchFolder to NPM (#128858)
EnableTailMerge is false by default and is handled by the pass builder.
Passes are independent of target pipeline options.
This completes the generic `MachineLateOptimization` passes for the NPM
pipeline.
Commit: 08de320aa2f46f3f9abcaf93d5382a8d0279d655
https://github.com/llvm/llvm-project/commit/08de320aa2f46f3f9abcaf93d5382a8d0279d655
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/source/Core/IOHandlerCursesGUI.cpp
Log Message:
-----------
[lldb] Remove Function::GetAddressRange usage from the gui (#130991)
m_disassembly_range was used only to prune the list of breakpoints to
those that are in the current function. This isn't really necessary, as
the list is only used to highlight instructions with breakpoints on
them, and an unpruned list works just as well for that.
The shouldn't make things slower, since we still needed through iterate
through all breakpoints to create the list, and I doubt anyone will
notice the memory used to store the extra breakpoints.
Commit: cb28ec6cccf9e27eb74f8dc2e7b69c006c1e3544
https://github.com/llvm/llvm-project/commit/cb28ec6cccf9e27eb74f8dc2e7b69c006c1e3544
Author: Maurice Heumann <MauriceHeumann at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx0x-nontrivial-union.cpp
A clang/test/SemaCXX/union-member-destructor.cpp
Log Message:
-----------
[Sema] Instantiate destructors for initialized members (#128866)
Initializing fields, that are part of an anonymous union, in a
constructor, requires their destructors to be instantiated.
In general, initialized members within non-delegating constructors, need
their destructor instantiated.
This fixes #93251
Commit: 59fd2878fce470f02058f43d4b818ed68ce04094
https://github.com/llvm/llvm-project/commit/59fd2878fce470f02058f43d4b818ed68ce04094
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
Log Message:
-----------
[mlir][memref] Clean up `load`/`store` documentation (#130569)
Remove references to the Affine dialect. The documentation is outdated.
Separate `affine.load/store` ops have been added.
Also add documentation for `nontemporal`.
Commit: 55b480ec3c870b08b4eb028f9a5eade4d2deeca9
https://github.com/llvm/llvm-project/commit/55b480ec3c870b08b4eb028f9a5eade4d2deeca9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/readonlynocapture.ll
Log Message:
-----------
[SROA] Allow load-only promotion with read-only captures (#130735)
It's okay if the address or read-provenance of the pointer is captured.
We only have to make sure that there are no unanalyzable writes to the
pointer.
Commit: de895751d2a250fb4127e1c7ea0863dd8e234325
https://github.com/llvm/llvm-project/commit/de895751d2a250fb4127e1c7ea0863dd8e234325
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
A llvm/test/Analysis/BasicAA/captures.ll
R llvm/test/Transforms/DeadStoreElimination/captures-ret-only.ll
A llvm/test/Transforms/DeadStoreElimination/captures.ll
Log Message:
-----------
[CaptureTracking][AA] Only consider provenance captures (#130777)
For the purposes of alias analysis, we should only consider provenance
captures, not address captures. To support this, change (or add)
CaptureTracking APIs to accept a Mask and StopFn argument. The Mask
determines which components we are interested in (for AA that would be
Provenance).
The StopFn determines when we can abort the walk early. Currently, we
want to do this as soon as any of the components in the Mask is
captured. The purpose of making this a separate predicate is that in the
future we will also want to distinguish between capturing full
provenance and read-only provenance. In that case, we can only stop
early once full provenance is captured. The earliest escape analysis
does not get a StopFn, because it must always inspect all captures.
Commit: d77ef140e66dda44a40ac2f316d3b8a42fb7bf07
https://github.com/llvm/llvm-project/commit/d77ef140e66dda44a40ac2f316d3b8a42fb7bf07
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
Log Message:
-----------
[LoongArch] fix vec-trunc.ll test error (#131104)
Commit: 1282878c52cb116093c6e3e8cde0c2623b624802
https://github.com/llvm/llvm-project/commit/1282878c52cb116093c6e3e8cde0c2623b624802
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Fix bad timestamps being reported (#130941)
Yesterday, the monitoring reported a job queued for 23h59. After some
checks, it appears no such job existed: the age of the workflows on
completion was at most 5 hours during the last 48 hours.
After some digging, I found out GitHub could return a job with a start
date slightly before the creation date, or completion date before start
date.
This would cause python to compute a negative timedelta, which would
then be reported in grafana as a full 24h delta due to the conversions.
Adding code to ignore negative delta, but logging them.
Commit: 459b4e3fe10805b110bc89aa857532715bfe54e0
https://github.com/llvm/llvm-project/commit/459b4e3fe10805b110bc89aa857532715bfe54e0
Author: Ana Mihajlovic <Ana.Mihajlovic at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
Log Message:
-----------
Reland "[AMDGPU] Remove s_delay_alu for VALU->SGPR->SALU (#127212)" (#131111)
We have a VALU->SGPR->SALU (VALU writing to SGPR and SALU reading from
it). When VALU is issued, it increments internal counter VA_SDST used to
track use of this SGPR. SALU will not issue until VA_SDST is zero, that
is when VALU is finished writing. Therefore, delays added by s_delay_alu
are not needed in this situation.
Commit: d0188ebcc206e334d5a415992e2b226c216b4083
https://github.com/llvm/llvm-project/commit/d0188ebcc206e334d5a415992e2b226c216b4083
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
Log Message:
-----------
[flang][OpenMP]Add symbls omp_in, omp_out and omp_priv in DECLARE RED… (#129908)
…UCTION
This patch allows better parsing of the reduction and initializer
components, including supporting derived types in both those places.
There is more work needed here, but this is a definite improvement in
what can be handled through parser and semantics.
Note that declare reduction is still not supported in lowering, so any
attempt to compile DECLARE REDUCTION code will end with a TODO aka "Not
yet implemented" abort in the compiler.
Note that this version of the code does not cover declaring multiple
reductions using the same name with different types. This is will be
fixed in a future patch. [This was also the case before this change].
One existing test modified to actually compile (as it didn't in the
original form).
Commit: 139add531a5533a7591527a3e6cee7dca0f795c3
https://github.com/llvm/llvm-project/commit/139add531a5533a7591527a3e6cee7dca0f795c3
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/IR/Function.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
Log Message:
-----------
[InferAttrs] Mark floating-point libcalls as `errno`-writing
Floating-point libcalls are currently conservatively marked as
may write any memory. Restrict these to clobber only `errno`.
Commit: abdbaff5441e35a6e26f770145b62d73f4a55f48
https://github.com/llvm/llvm-project/commit/abdbaff5441e35a6e26f770145b62d73f4a55f48
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
A llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
A llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.exe
A llvm/test/tools/dsymutil/Inputs/private/tmp/stmt_seq/stmt_seq_macho.o
Log Message:
-----------
[DWARFLinker] Adjust DW_AT_LLVM_stmt_sequence for rewritten line tables (#128953)
**Summary:**
This update adds handling for `DW_AT_LLVM_stmt_sequence` attributes in
the DWARF linker. These attributes point to rows in the line table,
which gets rewritten during linking. Since the row positions change, the
offsets in these attributes need to be updated to match the new layout
in the output `.debug_line` section. The changes add new data structures
and tweak existing functions to track and fix these attributes.
**Background**
In https://github.com/llvm/llvm-project/pull/110192 we added support to
clang to generate the `DW_AT_LLVM_stmt_sequence` attribute for
`DW_TAG_subprogram`'s. Corresponding RFC: [New DWARF Attribute for
Symbolication of Merged
Functions](https://discourse.llvm.org/t/rfc-new-dwarf-attribute-for-symbolication-of-merged-functions/79434).
This attribute holds a label pointing to the offset in the line table
where the function's line entries begin.
**Implementation details:**
Here’s what’s changed in the code:
- **New Tracking in `CompileUnit`:** A `StmtSeqListAttributes` vector is
added to the `CompileUnit` class. It stores the locations where
`DW_AT_LLVM_stmt_sequence` attributes need to be patched, recorded when
cloning DIEs (debug info entries).
- **Updated `emitLineTableForUnit` Function:** This function now has an
optional `RowOffsets` parameter. It collects the byte offsets of each
row in the output line table. We only need to use this functionality if
`DW_AT_LLVM_stmt_sequence` attributes are present in the unit.
- **Row Tracking with `TrackedRow`:** A `TrackedRow` struct keeps track
of each input row’s original index and whether it starts a sequence in
the output table. This links old rows to their new positions in the
rewritten line table. Several implementations were considered and
prototyped here, but so far this has proven the simplest and cleanest
approach.
- **Patching Step:** After the line table is written, the linker uses
the data in `TrackedRow`'s objects and `RowOffsets` array to update the
`DW_AT_LLVM_stmt_sequence` attributes with the correct offsets.
Commit: 481a55a3d9645a6bc1540d326319b78ad8ed8db1
https://github.com/llvm/llvm-project/commit/481a55a3d9645a6bc1540d326319b78ad8ed8db1
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan][Apple] Add interceptor for _os_nospin_lock_lock (#131034)
Follows the discussion here:
https://github.com/llvm/llvm-project/pull/129309
Recently, the test
`TestRtsan.AccessingALargeAtomicVariableDiesWhenRealtime` has been
failing on newer MacOS versions, because the internal locking mechanism
in `std::atomic<T>::load` (for types `T` that are larger than the
hardware lock-free limit), has changed to a function that wasn't being
intercepted by rtsan.
This PR introduces an interceptor for `_os_nospin_lock_lock`, which is
the new internal locking mechanism.
_Note: we'd probably do well to introduce interceptors for
`_os_nospin_lock_unlock` (and `os_unfair_lock_unlock`) too, which also
appear to have blocking implementations. This can follow in a separate
PR._
Commit: 0c5eb4d68b0992f6934fead1af3474aac672f5e4
https://github.com/llvm/llvm-project/commit/0c5eb4d68b0992f6934fead1af3474aac672f5e4
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/lib/Frontend/CMakeLists.txt
Log Message:
-----------
[flang] Use precompiled parsing headers (#130600)
Most of the high memory usage and compilation time in the frontend units
is due to including large parsing headers.
This commit moves out several of the largest parsing headers into a new
precompiled header linked to flangFrontend.
The new compilation metrics for FrontendActions.cpp are as follows:
User time (seconds): 38.40
System time (seconds): 2.00
Maximum resident set size (kbytes): 2710964 (2.58 GB) (vs 3.78 GB)
ParserActions.cpp:
User time (seconds): 69.37
System time (seconds): 1.81
Maximum resident set size (kbytes): 2599456 (2.47 GB) (vs 4 GB)
Alongside the new precompiled header compilation unit
User time (seconds): 41.61
System time (seconds): 2.72
Maximum resident set size (kbytes): 3107644 (2.96 GB)
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: a5a162cd713d73f76605c9f395b3c6087c03f793
https://github.com/llvm/llvm-project/commit/a5a162cd713d73f76605c9f395b3c6087c03f793
Author: Benjamin Maxwell <samsungsmile at hotmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SDAG] Pass pointer type to libcall expansion for SoftenFloatRes stack slots (#130647)
Solution for:
https://github.com/llvm/llvm-project/pull/129264#issuecomment-2710079843
Commit: 55b806c2afb113aa36efbf7eb979236951971695
https://github.com/llvm/llvm-project/commit/55b806c2afb113aa36efbf7eb979236951971695
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
Log Message:
-----------
[MLIR][Affine] Fix affine data copy generation copy placement for missing memref definition check (#130750)
This was exposed with the test case previously added but when performing
generation with limited memory capacity.
Commit: 46739be7bcfc2d3eb5c83e589229d27a63978d07
https://github.com/llvm/llvm-project/commit/46739be7bcfc2d3eb5c83e589229d27a63978d07
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Preserve original flags of output instructions in matchtable (#130937)
We don't have any combine in trunk that uses output MIFlags when using
MIR patterns, but I tried writing one and noticed that the flags were
lost.
The reason is that the MatchTableExecutor was overwriting the flags.
Commit: 13261e856aa54e6c86b500c6d0bb329f08ad5eb7
https://github.com/llvm/llvm-project/commit/13261e856aa54e6c86b500c6d0bb329f08ad5eb7
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/GetToolchainDirs.cmake
Log Message:
-----------
[Flang-RT][NFC] Fix comment
The cases of LLVM_ENABLE_PER_TARGET_RUNTIME_DIR were swapped.
Noticed by @DanielCChen in #130875. Thanks!
Commit: 786e70ff104fdecaa246bbe98f7ff1e220455a58
https://github.com/llvm/llvm-project/commit/786e70ff104fdecaa246bbe98f7ff1e220455a58
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir] Change `TypeOrValueSemanticsContainer` base from `TypeConstraint` to `Type` (#129433)
`Type` is derived from `TypeConstraint`. Using `Type` as base allows to
use `SignlessIntegerLike` and friends in `Variadic<>`.
Commit: 95d28fe503cc3d2bc0bb980442d3defaf199ea5a
https://github.com/llvm/llvm-project/commit/95d28fe503cc3d2bc0bb980442d3defaf199ea5a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M .ci/compute-projects.sh
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-linux.sh
M flang-rt/README.md
Log Message:
-----------
[Premerge] Add flang-rt (#128678)
Flang's runtime can now be built using LLVM's LLVM_ENABLE_RUNTIMES
mechanism, with the intent to remove the old mechanism in #124126.
Update the pre-merge builders to use the new mechanism.
In the current form, #124126 actually will add
LLVM_ENABLE_RUNTIMES=flang-rt implicitly, so no change is strictly
needed. I still think it is a good idea to do it explicitly and in
advance.
On Windows, flang-rt also requires compiler-rt, but which is not
building on Windows anyway.
Commit: 02fae68a45fdd752e3ad5ee767c378a45b77744d
https://github.com/llvm/llvm-project/commit/02fae68a45fdd752e3ad5ee767c378a45b77744d
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
Log Message:
-----------
[mlir][vector] VectorLinearize: `ub.poison` support (#128612)
Unify `arith.constant` and `up.poison` using
`OpTraitConversionPattern<OpTrait::ConstantLike>`.
Commit: b910610eeaf14edc1b09e84d29930bd3459a02cc
https://github.com/llvm/llvm-project/commit/b910610eeaf14edc1b09e84d29930bd3459a02cc
Author: Tejas Vipin <alissxlace at proton.me>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/src/math/generic/asinhf.cpp
Log Message:
-----------
[libc][math] Fix Sollya command (#131091)
Fix a minor syntax error in the Sollya command in the comments of
asinhf.
Commit: f613bc57c6389eb38f97a26126e5542839e69c48
https://github.com/llvm/llvm-project/commit/f613bc57c6389eb38f97a26126e5542839e69c48
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
Log Message:
-----------
AMDGPU: Replace half undef uses with poison in tests (#131083)
Commit: 1eb5588457c39a924902971b7d883e319a499c17
https://github.com/llvm/llvm-project/commit/1eb5588457c39a924902971b7d883e319a499c17
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
Log Message:
-----------
AMDGPU: Replace i16 undefs with poison in tests (#131084)
Commit: da69147a1619813679cef7ee39ec68cf2c8a2732
https://github.com/llvm/llvm-project/commit/da69147a1619813679cef7ee39ec68cf2c8a2732
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
Log Message:
-----------
[InferAttrs] Refine attributes for a few libc routines
Attributes inference has been improved for a few functions.
Particularly, ldexp and variants, as well as abort, may be
marked as `nounwind`, as they do not propagate any exceptions
to the caller, neither they unwind the stack. Besides, fwrite
and fread first argument should be respectively readonly and
writeonly.
Commit: 0735537ec8954d185cda3c6fd126431f16cea133
https://github.com/llvm/llvm-project/commit/0735537ec8954d185cda3c6fd126431f16cea133
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/GetToolchainDirs.cmake
Log Message:
-----------
[Flang-RT] Append to library subdir
The code intended to append more directories as required, instead of
discarding the previous steps.
NFCI accept on Apple.
Commit: d3255474be3ea24d876eadb6e97a6424c132b23d
https://github.com/llvm/llvm-project/commit/d3255474be3ea24d876eadb6e97a6424c132b23d
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
Reapply "[Offload][AMDGPU] LLVM_ENABLE_RUNTIMES=flang-rt for amdgpu-offload-*" (#130274)
Enable the LLVM_ENABLE_RUNTIMES=flang-rt build of the Fortran runtime
for the amdgpu-offload-* buildbots. This pre-population cmake cache
files is referred to by the llvm-zorg annotated builder factory
[script](https://github.com/llvm/llvm-zorg/blob/872f477610d83821c9f1368c969006789b21011b/zorg/buildbot/builders/annotated/amdgpu-offload-cmake.py#L26).
The corresponding change in llvm-zorg is
llvm/llvm-zorg#402
This reverts commit e296fb8ff6255b97db9ff6cd941acc730164b38f.
The worker of amdgpu-offload-rhel-8-cmake-build-only has been updated
with a newer version of Ninja that supports Fortran.
Commit: a413ef83a16b1069ca953613f1ff495f702970b4
https://github.com/llvm/llvm-project/commit/a413ef83a16b1069ca953613f1ff495f702970b4
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb] Use Function::GetAddressRange*s* in "frame diagnose" (#130949)
No test because generating discontinous functions is tedious and there's
nothing particularly interesting happening in here. As long as the
analyzer stays within a single basic block. it doesn't really care
whether the function is discontinous or not. I could create cases where
the algorithm breaks when going across basic blocks, but that's more of
inherent limitation of the algorithm (the inability to follow jumps
"backwards") than something specific to discontinous functions.
At this point, I'm more interested in cleaning up the last few remaining
uses of the deprecated function that I'm about improving "frame
diagnose".
Commit: dff22a0c1173f9d1ec0830b1c039749b6c2241d6
https://github.com/llvm/llvm-project/commit/dff22a0c1173f9d1ec0830b1c039749b6c2241d6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::BLENDI concatenation to use combineConcatVectorOps recursion (#131121)
Only concatenate X86ISD::BLENDI nodes if at least one operand is beneficial to concatenate
Add AVX1/AVX2 handling to 256-bit BLENDI nodes (accounting for AVX2 v16i16 repeated mask requirements).
Extend existing AVX512BW (which still always concats until I get get rid of the remaining regressions) to handle AVX512F for 32/64-bit scalar types.
Commit: d507b3d7ce3432c051cdfb9e66031623644b9de9
https://github.com/llvm/llvm-project/commit/d507b3d7ce3432c051cdfb9e66031623644b9de9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineGatherScatter - pull out repeated index value type. NFC.
Commit: 024df9c9dc163f8815a6d57efa46e4f21c003ba1
https://github.com/llvm/llvm-project/commit/024df9c9dc163f8815a6d57efa46e4f21c003ba1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
Log Message:
-----------
AMDGPU: Replace some float undef test uses with poison (#131090)
Commit: 94c8fa61d6972192a43d8bf82b7022ed3cd56dea
https://github.com/llvm/llvm-project/commit/94c8fa61d6972192a43d8bf82b7022ed3cd56dea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
M llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Replace some test i32 undef uses with poison (#131092)
Commit: 7e9802f348e36bf826d9fe83d0d187478e0e9639
https://github.com/llvm/llvm-project/commit/7e9802f348e36bf826d9fe83d0d187478e0e9639
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Headers][NFC] Steps to allow sharing code between gpu intrin.h headers (#131134)
Adds macro guards to error if the implementation headers are included
directly as part of dropping the need for them to be standalone. Lifts
the bool macro into gpuintrin.h.
Moves shuffle_idx_u64 into gpuintrin in passing, was the same
implementation in each architecture file.
Commit: b67379c35be765995496170a1b41ecf1d952a021
https://github.com/llvm/llvm-project/commit/b67379c35be765995496170a1b41ecf1d952a021
Author: Bertik23 <39457484+Bertik23 at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/tools/llvm-diff/lib/DiffConsumer.cpp
Log Message:
-----------
[llvm-diff] Add colorful output to diff (#131012)
Adds colorful output when when possible to the diff. Adds a use to the
`--color` option llvm-diff has.
Commit: b990c815029c2d5ca6bf57f2f33482adad9b6d8a
https://github.com/llvm/llvm-project/commit/b990c815029c2d5ca6bf57f2f33482adad9b6d8a
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Partial fix of BUILD.bazel after 598e882. (#131140)
Commit: c26ec7ea2add1e9ca78d7a2c03350447671bfc1b
https://github.com/llvm/llvm-project/commit/c26ec7ea2add1e9ca78d7a2c03350447671bfc1b
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/utils/lit/lit/reports.py
Log Message:
-----------
[llvm][lit] fix writing results to --time-trace-output file (#130845)
This patch fixes an issue introduced with commit:
https://github.com/llvm/llvm-project/commit/8507dbaec3f644b8a0c6291f097800d82a4f4b16
Commit: 0aa5ba43a0d11ce8e7f143380ae75fea516b6841
https://github.com/llvm/llvm-project/commit/0aa5ba43a0d11ce8e7f143380ae75fea516b6841
Author: Artemiy Bulavin <artemiyb at graphcore.ai>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/MLIRContext.h
M mlir/lib/IR/AttributeDetail.h
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Pass/PassCrashRecovery.cpp
A mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope-with-crash-reproduction.mlir
A mlir/test/IR/test-builtin-distinct-attrs-with-crash-reproduction.mlir
Log Message:
-----------
[mlir] Fix DistinctAttributeUniquer deleting attribute storage when crash reproduction is enabled (#128566)
Currently, `DistinctAttr` uses an allocator wrapped in a
`ThreadLocalCache` to manage attribute storage allocations. This ensures
all allocations are freed when the allocator is destroyed.
However, this setup can cause use-after-free errors when
`mlir::PassManager` runs its passes on a separate thread as a result of
crash reproduction being enabled. Distinct attribute storages are
created in the child thread's local storage and freed once the thread
joins. Attempting to access these attributes after this can result in
segmentation faults, such as during printing or alias analysis.
Example: This invocation of `mlir-opt` demonstrates the segfault issue
due to distinct attributes being created in a child thread and their
storage being freed once the thread joins:
```
mlir-opt --mlir-pass-pipeline-crash-reproducer=. --test-distinct-attrs mlir/test/IR/test-builtin-distinct-attrs.mlir
```
This pull request changes the distinct attribute allocator to use
different allocators depending on whether or not threading is enabled
and whether or not the pass manager is running its passes in a separate
thread. If multithreading is disabled, a non thread-local allocator is
used. If threading remains enabled and the pass manager invokes its pass
pipelines in a child thread, then a non-thread local but synchronised
allocator is used. This ensures that the lifetime of allocated storage
persists beyond the lifetime of the child thread.
I have added two tests for the `-test-distinct-attrs` pass and the
`-enable-debug-info-on-llvm-scope` passes that run them with crash
reproduction enabled.
Commit: d4baf611c1cc477b938ffa74a1e127577c0dc1d7
https://github.com/llvm/llvm-project/commit/d4baf611c1cc477b938ffa74a1e127577c0dc1d7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - add outstanding TODOs for missing op concatenation cases. NFC.
Keep track of the remaining issues - many of these are inter-related making them difficult to deal with one at a time.
Commit: ffe202ca0053cbdc27a90cc4fd652c6bab6bca38
https://github.com/llvm/llvm-project/commit/ffe202ca0053cbdc27a90cc4fd652c6bab6bca38
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
Revert "[LV] Limits the splat operations be hoisted must not be defined by a recipe. (#117138)"
This reverts commit 1ff10fa82fff83bb2f0a5c1ffde6203b52bc9619.
Commit: 5d5e706691c6d811820598a73694d3430c1d11b0
https://github.com/llvm/llvm-project/commit/5d5e706691c6d811820598a73694d3430c1d11b0
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[VPlan] Restrict hoisting of broadcast operations using VPDominatorTree (#117138)
This patch restricts broadcast operations from being hoisted to the vector
preheader unless the basic block that defines the broadcasted value properly
dominates the vector preheader.
This prevents potential use-before-definition issues when the broadcasted
value is defined within the plan. VPDominatorTree is used to confirm this
restriction while still allowing safe hoisting for broadcasted values defined
outside the plan.
Issue https://github.com/llvm/llvm-project/issues/117139
Commit: 7a5e4f540580d8f7e292292dc960178d8d8ba1d7
https://github.com/llvm/llvm-project/commit/7a5e4f540580d8f7e292292dc960178d8d8ba1d7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/SPIR.h
Log Message:
-----------
[clang][NFCI] Fix getGridValues for unsupported targets (#131023)
I broke this in
https://github.com/llvm/llvm-project/commit/f3cd2238383f695c719e7eab6aebec828781ec91,
I should have added this to the `SPIRV64` subclass, but I accidentally
added it to base `TargetInfo`.
Using an unsupported target should error in the driver way before this
though.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: e3c80d4496d109397e3c6403df434513fcd50bc6
https://github.com/llvm/llvm-project/commit/e3c80d4496d109397e3c6403df434513fcd50bc6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
Log Message:
-----------
AMDGPU: Fix broken negative test from ancient times (#131106)
Before the dawn of civilization, instructions were printed in all
caps using the raw tablegen pseudo-names. This -NOT check was looking
for that, instead of the actual ISA output. Just switch to using generated
checks. Also replace a use of undef.
Commit: 6ff33edf4d59803b4329a50361f94b7fd17bbdf8
https://github.com/llvm/llvm-project/commit/6ff33edf4d59803b4329a50361f94b7fd17bbdf8
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Minor improvements to BlockArgOpenMPOpInterface, NFC (#130789)
This patch introduces a use for the new `getBlockArgsPairs` to avoid
having to manually list each applicable clause.
Also, the `numClauseBlockArgs()` function is introduced, which
simplifies the implementation of the interface's verifier and enables
better memory handling within `getBlockArgsPairs`.
Commit: c3c97eab12746f206e695846d327ffba132afa49
https://github.com/llvm/llvm-project/commit/c3c97eab12746f206e695846d327ffba132afa49
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
Log Message:
-----------
PeepholeOpt: Do not skip reg_sequence sources with subregs (#125667)
Contrary to the comment, this particular code is not responsible
for handling any composes that may be required, and unhandled cases
are already rejected later. Lift this restriction to permit composes
and reg_sequence subregisters later.
Commit: 237a9108190dbdd172175f914b28757345dbed76
https://github.com/llvm/llvm-project/commit/237a9108190dbdd172175f914b28757345dbed76
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR][OpenMP] Remove the ReductionClauseInterface, NFC (#130978)
This patch removes the `ReductionClauseInterface` and all definitions of
its associated `getAllReductionVars` method.
The method mandated by this interface is not used anywhere and the
conflicts its definition produces when multiple reduction clauses are
present in an operation result in a more convoluted operation
definition, so it seems better to remove it and only add something like
this if there's a clear advantage to it.
Commit: 28ffa7f6a4d609e097a4861090f42c35459e9303
https://github.com/llvm/llvm-project/commit/28ffa7f6a4d609e097a4861090f42c35459e9303
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A flang/test/Lower/OpenMP/missing-inode.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[flang][OpenMP] Fix missing missing inode issue (#130798)
When outlining an offload region, Flang creates a unique name by
querying an inode ID. However, when the name of the actual source file
does not match the logical file in a `#line` preprocessor directive,
code-gen was failing as it could not determine the inode ID. This PR
checks for this condition and if the logical file name does not exist,
the inode is replaced with a hash value created from the source code
itself.
Commit: 85318bae285e9103acbc75ad3bdf78db1ce56f21
https://github.com/llvm/llvm-project/commit/85318bae285e9103acbc75ad3bdf78db1ce56f21
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
A llvm/test/CodeGen/SystemZ/machine-latecleanup-kills.mir
Log Message:
-----------
[MachineLateInstrsCleanup] Handle multiple kills for a preceding definition. (#119132)
When removing a redundant definition in order to reuse an earlier
identical one it is necessary to remove any earlier kill flag as well.
Previously, the assumption has been that any register that kills the
defined Reg is enough to handle for this purpose, but this is actually
not quite enough. A kill of a super-register does not necessarily imply
that all of its subregs (including Reg) is defined at that point: a
partial definition of a register is legal. This means Reg may have been
killed earlier and is not live at that point.
This patch changes the tracking of kill flags to allow for multiple
flags to be removed: instead of remembering just the single / latest
kill flag, a vector is now used to track and remove them all.
TinyPtrVector seems ideal for this as there are only very rarely more
than one kill flag, and it doesn't seem to give much difference in
compile time.
The kill flags handling here is making this pass much more complicated
than it would have to be. This pass does not depend on kill flags for
its own use, so an interesting alternative to all this handling would be
to just remove them all. If there actually is a serious user, maybe that pass
could instead recompute them.
Also adding an assertion which is unrelated to kill flags, but it seems
to make sense (according to liberal assertion policy), to verify that
the preceding definition is in fact identical in clearKillsForDef().
Fixes #117783
Commit: 57e22f515e7a41719c7516a1c21fd990478354a0
https://github.com/llvm/llvm-project/commit/57e22f515e7a41719c7516a1c21fd990478354a0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
Log Message:
-----------
[X86] Add tests showing failure to concat matching VPSHUFLW/HW ymm shuffles.
Commit: 7661526fdf74b589e16b4066d217c180c9bd936e
https://github.com/llvm/llvm-project/commit/7661526fdf74b589e16b4066d217c180c9bd936e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
Log Message:
-----------
[X86] combineConcatVectorOps - extend PSHUFD/LW/HW handling to support 512-bit types
VPSHUFD was already getting converted via the VPERMILPS AVX1 fallback
Commit: b003face11fadc526a6f816243441f486ffc958d
https://github.com/llvm/llvm-project/commit/b003face11fadc526a6f816243441f486ffc958d
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A flang/test/Fir/omp-teams.fir
M flang/test/Transforms/stack-arrays-hlfir.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[flang][OpenMP] Add `OutlineableOpenMPOpInterface` to `omp.teams` (#131109)
Given the following input:
```fortran
program rep_loopbind
implicit none
integer :: i
real :: priv_val
!$omp teams private(priv_val)
!$omp distribute
do i=1,1000
end do
!$omp end teams
end program
```
the `AllocaOpConversion` pattern in `FIRToLLVMLowering` would **move**
the private allocations that belong to the `teams` directive (i.e. the
allocations needed for the private copies of `priv_val` and the loop's
iteration variable) from the the `omp.teams` op to the outside scope.
This is not correct since these allocations should be eventually emitted
inside the outlined region for the `teams` directive. Without this fix,
these allocation would be emitted in the parent function (or the parent
scope whatever it is).
Commit: 143bf95d41f427bb91335198d5eccd624b5b47d4
https://github.com/llvm/llvm-project/commit/143bf95d41f427bb91335198d5eccd624b5b47d4
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_globals.cpp
Log Message:
-----------
[hwasan] Don't check code model if there are no globals (#131152)
Currently, the code model check is always performed even if there are no
globals, because:
1) the HWASan compiler pass always leaves a note
2) the HWASan runtime always performs the check if there is a HWASan
globals note.
This unnecessarily adds a 2**32 byte size limit.
This patch elides the check if the globals note doesn't actually contain
globals, thus allowing larger libraries to be successfully instrumented
without globals.
Sent from my iPhone
Commit: 01aca42363ac18f29580d21f6a30af677c2581b9
https://github.com/llvm/llvm-project/commit/01aca42363ac18f29580d21f6a30af677c2581b9
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/TargetOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/verbose-asm.f90
Log Message:
-----------
[flang] Add support for -f[no-]verbose-asm (#130788)
This flag provides extra commentary in the assembly output.
Commit: 0ed5f9b22bcbda9aa4f251fd1377ec77b5ca2a39
https://github.com/llvm/llvm-project/commit/0ed5f9b22bcbda9aa4f251fd1377ec77b5ca2a39
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR] NFC. Fix unused warning in affine loop utils
Commit: 2044dd07da99714bbeb801bafe6dd5179493fd48
https://github.com/llvm/llvm-project/commit/2044dd07da99714bbeb801bafe6dd5179493fd48
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/test/Driver/clang_f_opts.c
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/lib/profile/InstrProfilingPlatformDarwin.c
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/lib/profile/InstrProfilingPlatformWindows.c
R compiler-rt/test/profile/Inputs/instrprof-order-file.c
R compiler-rt/test/profile/instrprof-order-file.test
M lld/test/MachO/start-end.s
M llvm/include/llvm/ProfileData/InstrProfData.inc
R llvm/include/llvm/Transforms/Instrumentation/InstrOrderFile.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
R llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
R llvm/test/Instrumentation/InstrOrderFile/basic.ll
M llvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn
Log Message:
-----------
[InstrProf] Remove -forder-file-instrumentation (#130192)
Commit: c9d7f707c101896294d2f4ccbf26329894295dc9
https://github.com/llvm/llvm-project/commit/c9d7f707c101896294d2f4ccbf26329894295dc9
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Headers][NFC] Deduplicate gpu_match_ between targets via inlining (#131141)
Declare a few functions before including the target specific headers
then define a fallback_match_{any,all} used by amdgpu and by older
nvptx.
Fixes a minor bug on pre-volta where one of the four fallback paths was
missing a sync_lane.
Commit: 15a5b3a192165bb1372c89bfc841067dd26170eb
https://github.com/llvm/llvm-project/commit/15a5b3a192165bb1372c89bfc841067dd26170eb
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] gisel true16 for ICMP (#128913)
GlobalIsel true16 selection for ICMP
Commit: 96637b46f156ddae28b89db2df16f06ef3067627
https://github.com/llvm/llvm-project/commit/96637b46f156ddae28b89db2df16f06ef3067627
Author: Boaz Brickner <brickner at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[Clang] Improve `getReplacedTemplateParameterList()` const correctness (#131165)
Commit: d2d052b3e665542a3ef1b8d4dad43fe18dcbde14
https://github.com/llvm/llvm-project/commit/d2d052b3e665542a3ef1b8d4dad43fe18dcbde14
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Use "texture" not "SRV" when pretty printing resources (#130230)
We're printing "SRV" here when DXC would print "texture". Fix this to be
consistent.
Fixes #130227.
Commit: b3b00707821276deef812d8cccb228dd42c044d7
https://github.com/llvm/llvm-project/commit/b3b00707821276deef812d8cccb228dd42c044d7
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
Log Message:
-----------
Follow up to #130230 - update missed test
Commit: cb0d9fcd72be45141c74598e2f609dd06462dd8d
https://github.com/llvm/llvm-project/commit/cb0d9fcd72be45141c74598e2f609dd06462dd8d
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
M clang/test/AST/HLSL/vector-constructors.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
Log Message:
-----------
[HLSL][NFC] Update HLSL AST tests to be more readable (#130910)
Replacing all occurences of
- `0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc>`
- `0x{{[0-9A-Fa-f]+}} <<invalid sloc>>`
- `0x{{[0-9A-Fa-f]+}}`
- `0x{{[0-9a-fA-F]+}} <line:#:#, col:#>`
- `0x{{[0-9a-fA-F]+}} <col:#, col:#> col:#`
with
- `{{.*}}`
to improve readability and conciseness of the HLSL AST tests.
Commit: d06937aea38a4f4999c579d34ca9403ac9b91772
https://github.com/llvm/llvm-project/commit/d06937aea38a4f4999c579d34ca9403ac9b91772
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/docs/F202X.md
Log Message:
-----------
[Flang][NFC] Fix typo (#130960)
This was mainly a test of the pre-merge CI, but merging it since it fixes an actual typo.
Commit: 65220fc5aec92ff7df2b38cc4900fe6f1855c25a
https://github.com/llvm/llvm-project/commit/65220fc5aec92ff7df2b38cc4900fe6f1855c25a
Author: Kostas <konstantinos.alvertis at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Log Message:
-----------
[PPC] Fix coding style violations in PPCTargetTransformInfo.cpp (#130666)
Fixing violations of the coding conventions. Applying clang-tidy
recommendations.
Commit: 09a36c82793ba32b87faf11fbfc2e7624f25e92e
https://github.com/llvm/llvm-project/commit/09a36c82793ba32b87faf11fbfc2e7624f25e92e
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
Log Message:
-----------
[lldb][NFC] Correct whitespace in SearchForKernelWithDebugHints
Commit: 09d8e442ac2884aabe4cdfb01d1444b54cff7147
https://github.com/llvm/llvm-project/commit/09d8e442ac2884aabe4cdfb01d1444b54cff7147
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/Misc/time-passes.c
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/Support/Timer.h
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/Support/Timer.cpp
M llvm/unittests/IR/TimePassesTest.cpp
Log Message:
-----------
[llvm][Timer] Use global TimerGroups for both new pass manager and old pass manager timers (#130375)
Additionally, remove the behavior for both pass manager's timer manager
classes (`PassTimingInfo` for the old pass manager and
`TimePassesHandler` for the new pass manager) where these classes would
print the values of their timers upon destruction.
Currently, each pass manager manages their own `TimerGroup`s. This is
problematic because of duplicate `TimerGroup`s (both pass managers have
a `TimerGroup` for pass times with identical names and descriptions).
The result is that in Clang, `-ftime-report` has two "Pass execution
timing report" sections (one for the new pass manager which manages
optimization passes, and one for the old pass manager which manages the
backend). The result of this change is that Clang's `-ftime-report` now
prints both optimization and backend pass timing info in a unified "Pass
execution timing report" section.
Moving the ownership of the `TimerGroups` to globals also makes it
easier to implement JSON-formatted `-ftime-report`. This was not
possible with the old structure because the two pass managers were
created and destroyed in far parts of the codebase and outputting JSON
requires the printing logic to be at the same place because of
formatting.
Previous discourse discussion:
https://discourse.llvm.org/t/difficulties-with-implementing-json-formatted-ftime-report/84353
Commit: aa612f3ade66b5dd3e95d028c0345a94c38e1ff8
https://github.com/llvm/llvm-project/commit/aa612f3ade66b5dd3e95d028c0345a94c38e1ff8
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Replace DIFinder usage in CloneFunctionInto with a MetadataPredicate (#129148)
Summary:
The new code should be functionally identical to the old one (but
faster). The reasoning is as follows.
In the old code when cloning within the module:
1. DIFinder traverses and collects *all* debug info reachable from a
function, its instructions, and its owning compile unit.
2. Then "compile units, types, other subprograms, and lexical blocks of
other subprograms" are saved in a set.
3. Then when we MapMetadata, we traverse the function's debug info
_again_ and those nodes that are in the set from p.2 are identity
mapped.
This looks equivalent to just doing step 3 with identity mapping based
on a predicate that says to identity map "compile units, types, other
subprograms, and lexical blocks of other subprograms" (same as in step
2). This is what the new code does.
Test Plan:
ninja check-all
There's a bunch of tests around cloning and all of them pass.
Commit: 31ebe6647b7f1fc7f6778a5438175b12f82357ae
https://github.com/llvm/llvm-project/commit/31ebe6647b7f1fc7f6778a5438175b12f82357ae
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/Misc/time-passes.c
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/Support/Timer.h
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/Support/Timer.cpp
M llvm/unittests/IR/TimePassesTest.cpp
Log Message:
-----------
Revert "Use global TimerGroups for both new pass manager and old pass manager timers" (#131173)
Reverts llvm/llvm-project#130375
Causes breakages, e.g.
https://lab.llvm.org/buildbot/#/builders/160/builds/14607
Commit: bd0d28ac257d4df68ea7148e7a7c03910c22c1f3
https://github.com/llvm/llvm-project/commit/bd0d28ac257d4df68ea7148e7a7c03910c22c1f3
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/IR/array.cir
A clang/test/CIR/Lowering/array.cpp
Log Message:
-----------
[CIR] Upstream basic support for ArrayType (#130502)
This change adds the basic support for ArrayType
Issue #130197
Commit: d8dfdafc1d75ab17f742d40ab93240a10c216507
https://github.com/llvm/llvm-project/commit/d8dfdafc1d75ab17f742d40ab93240a10c216507
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
A llvm/include/llvm/Support/AdvisoryLock.h
M llvm/include/llvm/Support/LockFileManager.h
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[Support] Introduce new `AdvisoryLock` interface (#130989)
This PR abstracts the `LockFileManager` API into new `AdvisoryLock`
interface. This is so that we can create an alternative implementation
for Clang implicitly-built modules that is optimized for single-process
environment.
Commit: 5af5fb055527f3145af08cf7f1fbacd97701ff36
https://github.com/llvm/llvm-project/commit/5af5fb055527f3145af08cf7f1fbacd97701ff36
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3482.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3482
This paper makes it a constraint violation (instead of UB) to call
va_start from a function with a fixed (non-variadic) parameter list.
This is something Clang has always diagnosed as an error.
Commit: e93e0dd10cdab03941a363e53aaee925a9d2c0c1
https://github.com/llvm/llvm-project/commit/e93e0dd10cdab03941a363e53aaee925a9d2c0c1
Author: Kuo, Mei-Chun <94007620+Megan0704-1 at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
Log Message:
-----------
[NFC] Fix formatting for #80963 (#131100)
This PR fixes formatting issues in `constructor-template.cpp` introduced
in #130866.
Changes:
- Ran `clang-format` to adhere to LLVM style guidelines.
- No functional changes.
CC: @cor3ntin @shafik
Thanks
Commit: 369da8421c2f70df3391b97a117b83961687b70d
https://github.com/llvm/llvm-project/commit/369da8421c2f70df3391b97a117b83961687b70d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/include/flang/Lower/BoxAnalyzer.h
M flang/include/flang/Semantics/tools.h
A flang/test/Lower/CUDA/cuda-shared01.cuf
Log Message:
-----------
[flang][cuda] Allow assumed-size declaration for SHARED variable (#130833)
Avoid triggering an assertion for shared variable using the assumed-size
syntax.
```
attributes(global) subroutine sharedstar()
real, shared :: s(*) ! ok. dynamic shared memory.
end subroutine
```
Commit: 4baf1c03fa949c0e6fd0a96f8b312cc5c152db5c
https://github.com/llvm/llvm-project/commit/4baf1c03fa949c0e6fd0a96f8b312cc5c152db5c
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/rotate.h
M libcxx/include/__bit_reference
M libcxx/include/__fwd/bit_reference.h
M libcxx/include/__vector/vector_bool.h
A libcxx/test/benchmarks/algorithms/modifying/rotate.bench.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::rotate for vector<bool>::iterator (#121168)
This PR optimizes the performance of `std::ranges::rotate` for
`vector<bool>::iterator`. The optimization yields a performance
improvement of up to 2096x.
Closes #64038.
Commit: c2b66ce655e5168b15b619386e7197039b74fe26
https://github.com/llvm/llvm-project/commit/c2b66ce655e5168b15b619386e7197039b74fe26
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
Log Message:
-----------
[flang][OpenMP] Silence unused-but-set-variable message (NFC) (#130979)
Commit: e61859f14ddd4a1c816518676a2a6dc19ef92206
https://github.com/llvm/llvm-project/commit/e61859f14ddd4a1c816518676a2a6dc19ef92206
Author: u4f3 <ricoafoat at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcili-invalid.s
A llvm/test/MC/RISCV/xqcili-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcili (load large immediates) extension (#130012)
The Xqcili extension includes a two instructions that load large
immediates than is available with the base RISC-V ISA.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0
This patch adds assembler only support.
Commit: 3bd71cbec75292f188bee3aaba2dc94c8955ad66
https://github.com/llvm/llvm-project/commit/3bd71cbec75292f188bee3aaba2dc94c8955ad66
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/find.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit_reference
M libcxx/include/__fwd/bit_reference.h
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.members/left_shift_eq.pass.cpp
Log Message:
-----------
[libc++] Fix ambiguous call in {ranges, std}::find (#122641)
This PR fixes an ambiguous call encountered when using the `std::ranges::find` or `std::find`
algorithms with `vector<bool>` with small `allocator_traits::size_type`s, an issue reported
in #122528. The ambiguity arises from integral promotions during the internal bitwise
arithmetic of the `find` algorithms when applied to `vector<bool>` with small integral
`size_type`s. This leads to multiple viable candidates for small integral types:
__libcpp_ctz(unsigned), __libcpp_ctz(unsigned long), and __libcpp_ctz(unsigned long long),
none of which represent a single best viable match, resulting in an ambiguous call error.
To resolve this, we propose invoking an internal function __countr_zero as a dispatcher
that directs the call to the appropriate overload of __libcpp_ctz. Necessary amendments
have also been made to __countr_zero.
Commit: e8e267ec42edf7e2c955f72ae649e1298521845b
https://github.com/llvm/llvm-project/commit/e8e267ec42edf7e2c955f72ae649e1298521845b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Remove use of C++ STL features from `rpc_server.cpp` (#131169)
Summary:
This is done in preparation for making this header only so we can use it
without an object library. This will be a transient interface that
internal LLVM stuff with use. External people can use it too if they go
through the LLVM libc interface for shared stuff but there's no backward
compatibility guarantees.
Patch just cleans it up prior to the move.
Commit: 02575f887bc7b76c57a5ee3f75d9b416c0b158c8
https://github.com/llvm/llvm-project/commit/02575f887bc7b76c57a5ee3f75d9b416c0b158c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-select-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
Log Message:
-----------
[VPlan] Use VPInstruction for VPScalarPHIRecipe. (NFCI) (#129767)
Now that all phi nodes manage their incoming blocks through the
VPlan-predecessors, there should be no need for having a dedicate
recipe, it should be sufficient to allow PHI opcodes in VPInstruction.
Follow-ups will also migrate VPWidenPHIRecipe and possibly others,
building on top of https://github.com/llvm/llvm-project/pull/129388.
PR: https://github.com/llvm/llvm-project/pull/129767
Commit: 6fea340023af6ccbaed2d7fe790df565bcf75170
https://github.com/llvm/llvm-project/commit/6fea340023af6ccbaed2d7fe790df565bcf75170
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/vprintf.cpp
M libc/src/stdio/printf_core/float_dec_converter_limited.h
Log Message:
-----------
[libc] Fix non-templated uses of `printf_core::Writer` (#131149)
Commit 598e882ee88a1e3 turned `Writer` into a template, and updated most
of the call sites that use it. But not all. The alternative FP printf
system in `float_dec_converter_limited.h` wasn't updated, and neither
was `baremetal/printf.cpp` or `baremetal/vprintf.cpp`.
This patch updates `float_dec_converter_limited.h` in the same way that
the previous commit updated `float_dec_converter.h`: propagate the
templatedness through everything in the header, so that anything using a
`Writer` at all has a `write_mode` template parameter to pass on to it.
`printf.cpp` and `vprintf.cpp` are updated in the same way that the
previous commit updated `printf_core/vfprintf_internal.h`: the
`WriteBuffer` has parameter `WriteMode::FLUSH_TO_STREAM`, and `Writer`
picks it up implicitly from that.
Commit: a16c225b407924d6f8b9926c481e7e9c5135483a
https://github.com/llvm/llvm-project/commit/a16c225b407924d6f8b9926c481e7e9c5135483a
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
A mlir/test/Conversion/VectorToXeGPU/contract-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Convert Vector contraction to XeGPU (#122115)
Adds pattern to lower vector.contract to XeGPU operation.
Commit: 933ecf5f30f1471bc8548e7829d710c1ac6cec67
https://github.com/llvm/llvm-project/commit/933ecf5f30f1471bc8548e7829d710c1ac6cec67
Author: Christopher Di Bella <cjdb at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/tools/mlir-tblgen/RewriterGen.cpp
Log Message:
-----------
[mlir] adds `[[maybe_unused]]` to variables that might not be used (#131184)
This should suppress an unused variable warning that was seemingly
pervasive.
Commit: f13d58303f8ba07218333570c321c285f27e7496
https://github.com/llvm/llvm-project/commit/f13d58303f8ba07218333570c321c285f27e7496
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Pass some functions directly to all_of (NFC).
Remove some unneeded lambdas.
Commit: ca4399036f591fa2b55fa21bfa5980e02926be32
https://github.com/llvm/llvm-project/commit/ca4399036f591fa2b55fa21bfa5980e02926be32
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
Log Message:
-----------
[mlir][linalg] Add FoldReshapeWithGenericOpByCollapsing pattern (#131029)
This pattern to bubble up collapse shapes was missing in
`populateFoldReshapeOpsByCollapsingPatterns` .
Signed-off-by: Nirvedh Meshram <nirvedh at gmail.com>
Commit: b36bf47b25087a9c3c6e2d5ef85d8007eddd4e81
https://github.com/llvm/llvm-project/commit/b36bf47b25087a9c3c6e2d5ef85d8007eddd4e81
Author: Vy Nguyen <vyng at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Telemetry.h
Log Message:
-----------
[LLDB][Telemetry]Init field to nullptr. (#131191)
The field is currently un-initialised and can cause a crash in some
build configs (where it got random values)
Commit: 64f67f870d6eb866bef6b49a8388915c73db40bc
https://github.com/llvm/llvm-project/commit/64f67f870d6eb866bef6b49a8388915c73db40bc
Author: Daniel Hernandez-Juarez <dhernandez0 at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
Log Message:
-----------
[mlir][AMDGPU] Enable emulating vector buffer_atomic_fadd for bf16 on gfx942 (#129029)
- Change to make sure architectures < gfx950 emulate bf16
buffer_atomic_fadd
- Add tests for bf16 buffer_atomic_fadd and architectures: gfx12, gfx942
and gfx950
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: d642eec78fc94ef3c5266dc0b10b8c51ea046e7a
https://github.com/llvm/llvm-project/commit/d642eec78fc94ef3c5266dc0b10b8c51ea046e7a
Author: aankit-ca <quic_aankit at quicinc.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/fcmp-nan.ll
Log Message:
-----------
[HEXAGON] Fix semantics of ordered FP compares (#131089)
For the ordered FP compare bitcode instructions, the Hexagon backend was
assuming that no operand could be a NaN. This assumption is flawed. This
patch fixes the code-generation to produce fpcmp.uo and and appropriate
bit comparison operators to account for the case when an operand to a FP
compare is a NaN.
Fix for https://github.com/llvm/llvm-project/issues/129391
Co-authored-by: aankit-quic <aankit at quicinc.com>
Commit: 8aa835c2b5a9fd7d643257a4acd84e8fa99e391c
https://github.com/llvm/llvm-project/commit/8aa835c2b5a9fd7d643257a4acd84e8fa99e391c
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
Log Message:
-----------
[ctxprof] Fix warnings post PR #130655 (#131198)
Commit: 8c7f0eaa6ee3f84e3d8260535cced234bed4fa28
https://github.com/llvm/llvm-project/commit/8c7f0eaa6ee3f84e3d8260535cced234bed4fa28
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/AST/ParentMapContext.cpp
Log Message:
-----------
Reduce memory usage in AST parent map generation by lazily checking if nodes have been seen (#129934)
This mitigates a regression introduced in #87824.
The mitigation here is to store pointers the deduplicated AST nodes, rather than copies of the nodes themselves. This allows a pointer-optimized set to be used and saves a lot of memory because `clang::DynTypedNode` is ~5 times larger than a pointer.
Fixes #129808.
Commit: c30ff922caba4f96a1d1bf1c0eaf11ded7c64075
https://github.com/llvm/llvm-project/commit/c30ff922caba4f96a1d1bf1c0eaf11ded7c64075
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
Log Message:
-----------
[msan] Handle llvm.x86.vcvtps2ph.128/256 explicitly (#130705)
Check whether each lane is fully initialized, and propagate the shadow
per lane instead of using the strict handling of visitInstruction.
Updates the tests from https://github.com/llvm/llvm-project/pull/129807
Commit: 1c45514748474903a5704749539deeac2dc1413c
https://github.com/llvm/llvm-project/commit/1c45514748474903a5704749539deeac2dc1413c
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
Log Message:
-----------
[mlir][tosa] Fix bug causing quantized pad const creation crash (#131125)
This commit ensures the storage type is retrieved correctly which fixes
a crash when creating a quantized pad const tensor.
Testing is completed via the `tosa-optional-decompositions` pass which
makes use of the `createPadConstTensor` function.
Also includes some cleanup.
Commit: 4bcf1e61eb840dd02b1f73d9e0e7604fcc1051d9
https://github.com/llvm/llvm-project/commit/4bcf1e61eb840dd02b1f73d9e0e7604fcc1051d9
Author: Brian Ledger <bpl29 at cornell.edu>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Update the libc BUILD.bazel file with selects for Windows builds. (#131172)
The Windows toolchain needs to build libc targets in order to support
libc++. Currently, some targets fail to resolve, due to non-exhaustive
select statements, not accounting for Windows builds.
This change adds clauses to select statements so that Windows builds can
proceed.
Additionally, `__support_osutil_exit`, is configured to pass nothing to
`srcs` for non-Linux builds. `__support_osutil_exit `is unconditionally
included in the transitive dependencies of `extern_libc_shared`.
---------
Co-authored-by: Brian Ledger <brianpl at google.com>
Commit: 688d7a5d0ade65147fd48bc9bb14ade4c48f9a77
https://github.com/llvm/llvm-project/commit/688d7a5d0ade65147fd48bc9bb14ade4c48f9a77
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] combineConcatVectorOps - extend ISD::VECTOR_SHUFFLE handling to support 512-bit types (#131189)
Limit cases to AVX512 targets that support two-operand crosslane
shuffles
Commit: bbb244c0fdd35ab98a9fee71e3b4960f5790d9bc
https://github.com/llvm/llvm-project/commit/bbb244c0fdd35ab98a9fee71e3b4960f5790d9bc
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Set CopyCost on register classes [NFC] (#131185)
This change sets up CopyCost to reflect the cost of copying a vector
register group, a vector segment, or a register pair.
This is NFC because the only actual usage of this field in tree is
simply checking that cost is not negative. That heuristic is around ABI
copy elimination during instruction emission + scheduling, and doesn't
immediately seem like it should apply for us.
Commit: e823449f66acb39ce5a11dde6283ffd11731fe6a
https://github.com/llvm/llvm-project/commit/e823449f66acb39ce5a11dde6283ffd11731fe6a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb][debugserver] Synchronize interrupt and resume signals (#131073)
This PR fixes a race condition in debugserver where the main thread
calls MachProcess::Interrupt, setting `m_sent_interrupt_signo` while the
exception monitoring thread is checking the value of the variable.
I was on the fence between introducing a new mutex and reusing the
existing exception mutex. With the notable exception of
MachProcess::Interrupt, all the other places where we were already
locking this mutex before accessing the variable. I renamed the mutex to
make it clear that it's now protecting more than the exception messages.
Jason, while investigating a real issue, had a suspicion there was race
condition related to interrupts and I was able to narrow it down by
building debugserver with TSan.
Commit: 37d99e9c6e501c15f1169d35154c11e9a7fec782
https://github.com/llvm/llvm-project/commit/37d99e9c6e501c15f1169d35154c11e9a7fec782
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/MC/GOFFObjectWriter.cpp
Log Message:
-----------
[GOFF] Refactor GOFFOstream (#131143)
GOFFOstream writes the physical 80 byte records. The records are
connected by flags indicating if there is a successor or a predecessor.
Using the length of the logical record is prone to errors. The new
implementation buffers the last physical record, and writes it out when
new data is written. In this way, the flags can be easily determined.
No obversable change in functionality, therefore no tests.
Commit: 57d87ed7f09773a328f352b1d632f9e476e1c013
https://github.com/llvm/llvm-project/commit/57d87ed7f09773a328f352b1d632f9e476e1c013
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M flang/include/flang/Lower/BoxAnalyzer.h
Log Message:
-----------
[flang][NFC] Add parenthesis to avoid warning (#131219)
Remove warning introduced in 369da8421c2f7
Commit: c59c3874179f2ed30268fc8bd68fde37d5832639
https://github.com/llvm/llvm-project/commit/c59c3874179f2ed30268fc8bd68fde37d5832639
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
Log Message:
-----------
[RISCV] Improve Disassembler test xqci-invalid.txt (#130039)
Some test lines were added in #129504 for Qualcomm uC Xqcibm extension.
This patch improves those test lines.
Commit: dfb661cd1c5f9c765f9d6722953d032e5421dd07
https://github.com/llvm/llvm-project/commit/dfb661cd1c5f9c765f9d6722953d032e5421dd07
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
Log Message:
-----------
[LAA] Add extra tests for #128061.
Extend test coverage for
https://github.com/llvm/llvm-project/pull/128061.
Commit: 0f8c075f7c2c29384d37974b3ad32786559482c6
https://github.com/llvm/llvm-project/commit/0f8c075f7c2c29384d37974b3ad32786559482c6
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/Transforms/WholeProgramDevirt/devirt-single-impl-check-relative.ll
M llvm/test/Transforms/WholeProgramDevirt/expand-check-relative.ll
Log Message:
-----------
[llvm] Match llvm.type.checked.load.relative semantics to llvm.load.r… (#129583)
…elative
The semantics of `llvm.type.checked.load.relative` seem to be a little
different from that of `llvm.load.relative`. It looks like the semantics
for `llvm.type.checked.load.relative` is `ptr + offset + *(ptr +
offset)` whereas the semantics for `llvm.load.relative` is `ptr + *(ptr
+ offset)`. That is, the offset for the former is added to the offset
address whereas the later has the offset added to the original pointer.
It really feels like the checked intrinsic was meant to match the
semantics of the non-checked intrinsic, but I think for all cases the
checked intrinsic is used (swift being the only use I know of), the
calculation just happens to be the same because swift always uses an
offset of zero. Likewise, all llvm tests for this intrinsic happen to
use an offset of zero.
Relative vtables in clang happens to be the first time where we're using
this intrinsic and using it with non-zero values. This updates the
semantics of the checked intrinsic to match the non-checked one.
Effectively this shouldn't change any codegen by any users of this since
all current users seem to use a zero offset.
This PR also updates some tests with non-zero offsets.
Commit: 0ab9f78957b2da155998de340625e3da1968c4dc
https://github.com/llvm/llvm-project/commit/0ab9f78957b2da155998de340625e3da1968c4dc
Author: Nicolas van Kempen <nvankemp at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[docs] Fix link appearing improperly (#131225)
See current live website:
https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access
Building locally, it appears correctly:
Feel free to merge immediately.
Commit: 08d15e3f64e3a5ec0adeae0df7969c81ab61d44b
https://github.com/llvm/llvm-project/commit/08d15e3f64e3a5ec0adeae0df7969c81ab61d44b
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
R llvm/include/llvm/Support/Mustache.h
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
Revert "reapply [llvm] add support for mustache templating language" (#131228)
This broke:
https://lab.llvm.org/buildbot/#/builders/64/builds/2486
https://lab.llvm.org/buildbot/#/builders/146/builds/2476
Commit: 998511c8ef577f330c90bf32db37d5f8305c53f3
https://github.com/llvm/llvm-project/commit/998511c8ef577f330c90bf32db37d5f8305c53f3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[debugserver] Fix mutex scope in RNBRemote::CommDataReceived (#131077)
The mutex in RNBRemote::CommDataReceived protects m_rx_packets and
should extend to the end of the function to cover the read where we
check if the list is empty.
Commit: e0e80dbe432008b280b3b77ac142cc915bd42472
https://github.com/llvm/llvm-project/commit/e0e80dbe432008b280b3b77ac142cc915bd42472
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
A clang/test/Driver/aix-shared-lib-tls-model-opt.c
M clang/test/Driver/aix-small-local-exec-dynamic-tls.c
Log Message:
-----------
[Clang codegen][PPC] Produce AIX-specific "target features" only for AIX (#130864)
Listing AIX-specific "target features" in the IR are a source of
confusion on PPC Linux. Generate them only for AIX (at least by
default).
Commit: 662bd4ca4714f0754e9abbc088da9d4a57171e2a
https://github.com/llvm/llvm-project/commit/662bd4ca4714f0754e9abbc088da9d4a57171e2a
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/vprintf.cpp
Log Message:
-----------
[stdio][baremetal] Fix templating for print functions (#131232)
This addresses build errors from https://github.com/llvm/llvm-project/pull/111559.
Commit: 2a244bb839e32921dac74ceb461319a673be6b65
https://github.com/llvm/llvm-project/commit/2a244bb839e32921dac74ceb461319a673be6b65
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
Log Message:
-----------
Simplify Target::RunStopHooks() (#129578)
Introduce `StopHookResult::NoPreference` and
simplify control flow in `Target::RunStopHooks()`.
The algorithm is (in order):
1. "Auto continue" set on any hook -> continue
2. "Stop demanded" by any hook -> stop
3. "Continue requested" by any hook -> continue
4. No hooks, or "no preference" only (default
stance) -> stop
The new `NoPreference` lets us keep the default
stance, distinguishing case 3. and 4.
Commit: 8b9031f245a268c6acb331de5ea68da20be37051
https://github.com/llvm/llvm-project/commit/8b9031f245a268c6acb331de5ea68da20be37051
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/uri-launch-handler.ts
Log Message:
-----------
[lldb-dap] Support vscode launch URLs (#125843)
This commit adds support for starting debug sessions through special
`vscode://llvm-vs-code-extensions.lldb-dap/start?config={launch-config}`
URIs. This allows tighter integration with custom scripts. One potential
use case is providing similar functionality to `xcdebug`, see #125777
for some discussion on that use case.
The functionality was inspired by @vadimcn's CodeLLDB extension, which
[provides similar
functionality](https://github.com/vadimcn/codelldb/blob/master/MANUAL.md#debugging-externally-launched-code).
Commit: d1deaed0d284f16870f3236ec2efe7d29308a56a
https://github.com/llvm/llvm-project/commit/d1deaed0d284f16870f3236ec2efe7d29308a56a
Author: David Peixotto <peix at meta.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-server/TestGdbRemoteFork.py
A lldb/test/API/tools/lldb-server/TestGdbRemoteForkResume.py
A lldb/test/API/tools/lldb-server/TestGdbRemote_qMemoryRegion.py
A lldb/test/API/tools/lldb-server/TestGdbRemote_qRegisterInfo.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
A lldb/test/API/tools/lldb-server/qSupported/Makefile
A lldb/test/API/tools/lldb-server/qSupported/TestGdbRemote_qSupported.py
A lldb/test/API/tools/lldb-server/qSupported/main.c
Log Message:
-----------
[lldb] Split some lldb-server tests to avoid timeout (#129614)
Split test cases out of TestLldbGdbServer.py and TestGdbRemoteFork.py
into separate files to avoid hitting the 600s timeout limit. The
inferior used by these tests (main.cpp) takes approximately 20s to
compile with a Debug build of clang, causing timeouts when a single test
file contains many tests. By grouping similar tests into separate files,
we can prevent timeouts and improve overall test efficiency.
Commit: 55e5e749ce0c4724ba5dd44575a404b170a120de
https://github.com/llvm/llvm-project/commit/55e5e749ce0c4724ba5dd44575a404b170a120de
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Remove some unnecessary hasSideEffects = 0 and sink some to their base class. NFC (#131044)
Some of these were already present in their base class and therefore
redundant. Others were missing from their base classes. Maybe leftover
from when VXRM was modeled with side effects?
Commit: ab58a3c35b6fc6a4b513d75c38881134f5b2c9b9
https://github.com/llvm/llvm-project/commit/ab58a3c35b6fc6a4b513d75c38881134f5b2c9b9
Author: Mariusz Borsa <wrotki at msn.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Darwin/malloc_zone.cpp
Log Message:
-----------
XFAIL malloc_zone.cpp for darwin/lsan (#131234)
Silence darwin bot while we investigate the problem
rdar://145873843
Co-authored-by: Mariusz Borsa <m_borsa at apple.com>
Commit: fc28f83bf5faac44afa4147344e9e22c22cd0164
https://github.com/llvm/llvm-project/commit/fc28f83bf5faac44afa4147344e9e22c22cd0164
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/extract-ordering.ll
Log Message:
-----------
[SLP] Precommit test (#131236)
Precommit test for https://github.com/llvm/llvm-project/pull/131229
Commit: befa037c135cb0314b82e17d1dc06513d266dbe4
https://github.com/llvm/llvm-project/commit/befa037c135cb0314b82e17d1dc06513d266dbe4
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
A mlir/test/Dialect/Affine/invalid-reify-bound-dim.mlir
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
Log Message:
-----------
[mlir][affine] Guard invalid dim attribute in the test-reify-bound pass (#129013)
Computing the bound of affine op
(ValueBoundsConstraintSet::computeBound) crashes due to the invalid dim
value given to the op. It is necessary for the pass to check the dim
attribute not to be greater than the rank of the input type.
Fixes https://github.com/llvm/llvm-project/issues/128807
Commit: e26bcf1627cc09068bd3c9d26984c36cbae07565
https://github.com/llvm/llvm-project/commit/e26bcf1627cc09068bd3c9d26984c36cbae07565
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SplitKit.cpp
Log Message:
-----------
[CodeGen] Use early return to simplify SplitEditor::defFromParent [NFC]
Commit: d0c869521ce0b15d0d5d152d4fbfcc0f75377e91
https://github.com/llvm/llvm-project/commit/d0c869521ce0b15d0d5d152d4fbfcc0f75377e91
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Support/LockFileManager.cpp
Log Message:
-----------
[Support] Prevent leaking unique lock files (#130984)
Prior to this PR, failing to get the host ID would leave the unique lock
file on the file system. This is now fixed by constructing
`RemoveUniqueLockFileOnSignal` earlier. This PR also removes one call to
`sys::fs::remove()` that is now redundant and another that was redundant
even before this patch.
Commit: 864a53b4a414d2da9b90712af196d5e4733b0eee
https://github.com/llvm/llvm-project/commit/864a53b4a414d2da9b90712af196d5e4733b0eee
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/Misc/time-passes.c
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/Support/Timer.h
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/Support/Timer.cpp
M llvm/unittests/IR/TimePassesTest.cpp
Log Message:
-----------
Reapply "Use global TimerGroups for both new pass manager and old pass manager timers" (#131173) (#131217)
This reverts commit 31ebe6647b7f1fc7f6778a5438175b12f82357ae.
The reason for the test failure is likely due to
`Name2PairMap::getTimerGroup(...)` not holding a lock.
Commit: 3b5842c9c41a441280100045ef62bb8a0fe7200f
https://github.com/llvm/llvm-project/commit/3b5842c9c41a441280100045ef62bb8a0fe7200f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/AllocationActions.h
M llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/AllocationActions.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
Log Message:
-----------
[ORC] Make runAllocActions and runDeallocActions asynchorous.
Part of ongoing work to make core ORC operations asynchronous.
This only affects the runner utilities, not the AllocationActions themselves.
The AllocationActions will be made asynchronous in a future patch.
Commit: dcec224240d6e23107577e27b42f398026d284db
https://github.com/llvm/llvm-project/commit/dcec224240d6e23107577e27b42f398026d284db
Author: Saleem Abdulrasool <compnerd at compnerd.org>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Lex/LiteralSupport.h
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Lexer/ms-extensions.c
Log Message:
-----------
Lex: add support for `i128` and `ui128` suffixes (#130993)
Microsoft's compiler supports an extension for 128-bit literals. This is
referenced in `intsafe.h` which is included transitievly. When building
with modules, the literal parsing causes a failure due to the missing
support for the extension. To alleviate this issue, support parsing this
literal, especially now that there is the BitInt extension.
Take the opportunity to tighten up the code slightly by ensuring that we
do not access out-of-bounds characters when lexing the token.
Commit: 299cb5d88fad89dbcb2bb10e5c60e97e3a4931cb
https://github.com/llvm/llvm-project/commit/299cb5d88fad89dbcb2bb10e5c60e97e3a4931cb
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update llvm-mca / MCA maintainers (#131187)
Adding myself as a co-maintainer alongside @adibiagio , who invited me
to take on this role.
Commit: 214d47af9bf9d4ad2f1a886b326f33a01c22cc61
https://github.com/llvm/llvm-project/commit/214d47af9bf9d4ad2f1a886b326f33a01c22cc61
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/unittests/SandboxIR/PassTest.cpp
Log Message:
-----------
[SandboxVec][PassManager][NFC] Fix PM printing
It currently prints '(' instead of '<'. This patch fixes it.
Commit: 8437b7f5584765ad4f7885500647657714930fbb
https://github.com/llvm/llvm-project/commit/8437b7f5584765ad4f7885500647657714930fbb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M libc/docs/gpu/rpc.rst
M libc/shared/rpc_opcodes.h
A libc/shared/rpc_server.h
A libc/src/__support/RPC/rpc_server.h
M libc/utils/gpu/CMakeLists.txt
M libc/utils/gpu/loader/CMakeLists.txt
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
M libc/utils/gpu/loader/nvptx/CMakeLists.txt
R libc/utils/gpu/server/CMakeLists.txt
R libc/utils/gpu/server/rpc_server.cpp
A llvm/cmake/modules/FindLibcCommonUtils.cmake
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/src/RPC.cpp
R runtimes/cmake/Modules/FindLibcCommonUtils.cmake
Log Message:
-----------
[libc] Make RPC server handling header only (#131205)
Summary:
This patch moves the RPC server handling to be a header only utility
stored in the `shared/` directory. This is intended to be shared within
LLVM for the loaders and `offload/` handling.
Generally, this makes it easier to share code without weird
cross-project binaries being plucked out of the build system. It also
allows us to soon move the loader interface out of the `libc` project so
that we don't need to bootstrap those and can build them in LLVM.
Commit: dec5589d90f0a80312f864bc61770243136345ec
https://github.com/llvm/llvm-project/commit/dec5589d90f0a80312f864bc61770243136345ec
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#131064)
Commit: 7714df909054c8fa9f5bda6ce738e9eee093e966
https://github.com/llvm/llvm-project/commit/7714df909054c8fa9f5bda6ce738e9eee093e966
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
Log Message:
-----------
[Sema] Avoid repeated hash lookups (NFC) (#131065)
Commit: ca641b29190fc712f070426e0fe40bb54338f97c
https://github.com/llvm/llvm-project/commit/ca641b29190fc712f070426e0fe40bb54338f97c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#131066)
Commit: e838ca1f49c2aaf879e2aab986b3b77c88298160
https://github.com/llvm/llvm-project/commit/e838ca1f49c2aaf879e2aab986b3b77c88298160
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RDFLiveness.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131067)
Commit: f4ee62c7c3acb067843ab8e62ef1b201689e8d84
https://github.com/llvm/llvm-project/commit/f4ee62c7c3acb067843ab8e62ef1b201689e8d84
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/IROutliner.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#131068)
Commit: f23bbf69f6ac7ec8bcd0435419c1998f4683cc13
https://github.com/llvm/llvm-project/commit/f23bbf69f6ac7ec8bcd0435419c1998f4683cc13
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86PreTileConfig.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#131069)
Commit: 315c02aa023e369e571f995c82974813638caf3c
https://github.com/llvm/llvm-project/commit/315c02aa023e369e571f995c82974813638caf3c
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
Log Message:
-----------
[VPlan] Fix crash with inloop fmuladd reductions with blend (#131154)
When visiting in-loop reduction links, we previously crashed if we had
an fmuladd with a blend after it in the chain. This fixes it by lifting
the existing blend folding to also handle fmuladd.
This also simplifies the code structure slightly for an upcoming patch I
want to post to handle in-loop AnyOf reductions.
I removed the PhiR->isInLoop() check since it's already guarded at the
top of the parent Header->Phis() loop.
Commit: ad993687b1a624b0ee9326aa2e88c4efe165e5fc
https://github.com/llvm/llvm-project/commit/ad993687b1a624b0ee9326aa2e88c4efe165e5fc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-dlc.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
M llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
M llvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt.mir
Log Message:
-----------
AMDGPU: Replace ptr addrspace(4) undef uses with poison in tests (#131095)
Commit: 37c8792e53c71cb12f1dd1509ba5d4ef7d973099
https://github.com/llvm/llvm-project/commit/37c8792e53c71cb12f1dd1509ba5d4ef7d973099
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-select.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
Log Message:
-----------
AMDGPU: Replace test uses of ptr addrspace(5) undef with poison (#131101)
Commit: 06c379a3498ce79a2038d5ab56901bd8ad4d49a6
https://github.com/llvm/llvm-project/commit/06c379a3498ce79a2038d5ab56901bd8ad4d49a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
Log Message:
-----------
AMDGPU: Replace more undef test pointer uses with poison (#131102)
Commit: 910514c6ab32d36edaa7082f9b67cd191e97aa4e
https://github.com/llvm/llvm-project/commit/910514c6ab32d36edaa7082f9b67cd191e97aa4e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Replace some test undef uses with poison (#131103)
Commit: bde2636fb5fb73fa522ab9e69b898b07dfda6eb0
https://github.com/llvm/llvm-project/commit/bde2636fb5fb73fa522ab9e69b898b07dfda6eb0
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/hdr/wchar_overlay.h
Log Message:
-----------
[libc][NFC] Add the missing angle bracket in `wchar.h` (#131161)
Commit: a6463f41135d7d96e92cefeeffa84d0955f934f9
https://github.com/llvm/llvm-project/commit/a6463f41135d7d96e92cefeeffa84d0955f934f9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Shrink the size of the VLMul field in RegisterClass target flags. Use uint8_t for TSFlags. NFC (#131227)
There are only 4 possible LMULs corresponding to log2 of 1, 2, 4, and 8.
Those fit in 2 bits.
Use uint8_t for the flag bits to match the size in TargetRegisterClass.
Commit: 03614b9a8a2fea6add824df284e1bb678769c15c
https://github.com/llvm/llvm-project/commit/03614b9a8a2fea6add824df284e1bb678769c15c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M bolt/test/X86/icf-safe-icp.test
M bolt/test/X86/icf-safe-process-rela-data.test
M bolt/test/X86/icf-safe-test1.test
M bolt/test/X86/icf-safe-test2GlobalConstPtrNoPic.test
Log Message:
-----------
[BOLT] Workaround failures (#131245)
These tests have been failing since:
commit 1cfca53b9f2eadbf864b85995ec7f819d7f29b5e
Author: Arthur Eubanks <aeubanks at google.com>
Date: Wed Mar 12 16:20:13 2025 -0700
This patch works around the failures by removing some FileCheck
directives. Hopefully, BOLT folks can chime in and commit a right
fix.
Commit: 61adca7c97089907b2c077f05d19274ae0c29e37
https://github.com/llvm/llvm-project/commit/61adca7c97089907b2c077f05d19274ae0c29e37
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
Log Message:
-----------
[ctxprof] Fix initializer in PGOCtxProfLowering (#131269)
It needs to match the structure of `FunctionData` in compiler-rt, but
missed a field in PR #130655.
Commit: 9b887f5277ec768e17b37176ce6deea67a20ef50
https://github.com/llvm/llvm-project/commit/9b887f5277ec768e17b37176ce6deea67a20ef50
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make cvt_pknorm and cvt_pk intrinsics propagate poison (#131059)
Commit: 0d8a22d6ad5dc72413d7a5d35412c3f3ab16fea6
https://github.com/llvm/llvm-project/commit/0d8a22d6ad5dc72413d7a5d35412c3f3ab16fea6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make fmed3 intrinsic propagate poison (#131060)
Commit: 75349d7ca4c673ee3cb41eaa8c9190d599ff958a
https://github.com/llvm/llvm-project/commit/75349d7ca4c673ee3cb41eaa8c9190d599ff958a
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
Skip unretained-call-args.mm on platforms where builtin is not supported. (#131252)
Commit: a716459f2d0e32538b946a00d18ed8848431724f
https://github.com/llvm/llvm-project/commit/a716459f2d0e32538b946a00d18ed8848431724f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make ballot intrinsic propagate poison (#131061)
Commit: 37706894f8bd6f23da38d26614cfc4a0025fb48d
https://github.com/llvm/llvm-project/commit/37706894f8bd6f23da38d26614cfc4a0025fb48d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/fmul_legacy.ll
Log Message:
-----------
AMDGPU: Make fmul_legacy intrinsic propagate poison (#131062)
Commit: 4a3ee4f72dcd147ef3fefabe9649731b228d1a57
https://github.com/llvm/llvm-project/commit/4a3ee4f72dcd147ef3fefabe9649731b228d1a57
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/fma_legacy.ll
Log Message:
-----------
AMDGPU: Make fma_legacy intrinsic propagate poison (#131063)
Commit: a5b95487d634750292ba2db1acd4fc1cb46746f7
https://github.com/llvm/llvm-project/commit/a5b95487d634750292ba2db1acd4fc1cb46746f7
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
Log Message:
-----------
[ctxprof] Missing test for #131269 (#131271)
Commit: f34385dd1bac66004f4a1c8eb53688e7075bb220
https://github.com/llvm/llvm-project/commit/f34385dd1bac66004f4a1c8eb53688e7075bb220
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
Log Message:
-----------
[AMDGPU][NPM] Port GCNCreateVOPD to NPM (#130059)
Commit: 42748a454fc9d9a42504e8290234aaf9407437ce
https://github.com/llvm/llvm-project/commit/42748a454fc9d9a42504e8290234aaf9407437ce
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/PPC.cpp
M clang/test/Driver/aix-shared-lib-tls-model-opt.c
Log Message:
-----------
[Clang driver] Diagnose `-maix-shared-lib-tls-model-opt` on wrong targets (#130865)
Commit: 87916f8c32ebd8e284091db9b70339df57fd1e90
https://github.com/llvm/llvm-project/commit/87916f8c32ebd8e284091db9b70339df57fd1e90
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/pauthlr-prologue-duplication.mir
M llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir
M llvm/test/CodeGen/X86/block-placement.mir
A llvm/test/tools/llc/new-pm/option-parsing.mir
Log Message:
-----------
[CodeGen][NPM] Port MachineBlockPlacement to NPM (#129828)
Commit: 8727097ffd017ce55f39a3b7bc3788c6073e853d
https://github.com/llvm/llvm-project/commit/8727097ffd017ce55f39a3b7bc3788c6073e853d
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/lib/Sema/SemaRISCV.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
Log Message:
-----------
[RISCV][Sema] Add feature check for target attribute to VSETVL intrinsics (#126064)
This fixes the target attribute issue for vsetvl and vsetvlmax
intrinsics.
Fixes #125154
Commit: 2a48995a03ca5a615161565f24411dc11288bb3c
https://github.com/llvm/llvm-project/commit/2a48995a03ca5a615161565f24411dc11288bb3c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
[ARM] Pass ArrayRef by value instead of const reference. NFC
Commit: 6b7daf224933d60a7ef8acc399da8388b90bf318
https://github.com/llvm/llvm-project/commit/6b7daf224933d60a7ef8acc399da8388b90bf318
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-13 (Thu, 13 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[MachineCombiner][Targets] Use Register in TII genAlternativeCodeSequence interface. NFC (#131272)
Commit: 467ad6a03583ba0566ec4f7c8ca4e2dabc60c8f6
https://github.com/llvm/llvm-project/commit/467ad6a03583ba0566ec4f7c8ca4e2dabc60c8f6
Author: Jan Voung <jvoung at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Add support for absl nullability macros (#130346)
Add support for formatting w/ absl nullability macros
(https://github.com/abseil/abseil-cpp/blob/c52afac4f87ef76e6293b84874e5126a62be1f15/absl/base/nullability.h#L237).
Example at https://godbolt.org/z/PYv19M1Gj
input:
```
std::vector<int* _Nonnull> x;
std::vector<int* absl_nonnull> y;
```
orig output:
```
std::vector<int* _Nonnull> x;
std::vector<int * absl_nonnull> y;
```
new output:
```
std::vector<int* _Nonnull> x;
std::vector<int* absl_nonnull> y;
```
credit to @ymand for the original patch
Commit: 77ad061923418ba0f4c8fd4a0710a5ace825bf8e
https://github.com/llvm/llvm-project/commit/77ad061923418ba0f4c8fd4a0710a5ace825bf8e
Author: Josep Pinot <josep.pinot at bsc.es>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_tasking.cpp
A openmp/runtime/test/tasking/omp_record_replay_random_id.cpp
A openmp/runtime/test/tasking/omp_record_replay_reset.cpp
Log Message:
-----------
[OpenMP] Update OpenMP runtime to adopt taskgraph clause from 6.0 Specs (#130751)
Updating OpenMP runtime taskgraph support(record/replay mechanism):
- Adds a `graph_reset` bit in `kmp_taskgraph_flags_t` to discard
existing TDG records.
- Switches from a strict index-based TDG ID/IDX to a more flexible
integer-based, which can be any integer (e.g. hashed).
- Adds helper functions like `__kmp_find_tdg`, `__kmp_alloc_tdg`, and
`__kmp_free_tdg` to manage TDGs by their IDs.
These changes pave the way for the integration of OpenMP taskgraph (spec
6.0). Taskgraphs are still recorded in an array with a lookup efficiency
reduced to O(n), where n ≤ `__kmp_max_tdgs`. This can be optimized by
moving the TDGs to a hashtable, making lookups more efficient. The
provided helper routines facilitate easier future optimizations.
Commit: f2e10278efe7a54544bf1a1d34cf55fe80d92316
https://github.com/llvm/llvm-project/commit/f2e10278efe7a54544bf1a1d34cf55fe80d92316
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lldb/source/Core/Disassembler.cpp
Log Message:
-----------
[lldb] Support discontinuous functions in another Disasembler overload (#130987)
This overload is taking a StackFrame, so we just need to change how we
obtain the ranges out of it. A slightly fiddly aspect is the code which
tries to provide a default dissassembly range for the case where we
don't have a real one. I believe this case is only relevant for
symbol-based stack frames as debug info always has size/range for the
functions (if it didn't we wouldn't even resolve the stack frame to a
function), which is why I've split the handling of the two cases.
We already have a test case for disassembly of discontinuous functions
(in test/Shell/Commands/command-disassemble.s), so I'm not creating
another one as this is just a slightly different entry point into the
same code.
Commit: 26324bc1bf397453ce966f56a88245263f7beec5
https://github.com/llvm/llvm-project/commit/26324bc1bf397453ce966f56a88245263f7beec5
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
Log Message:
-----------
[VPlan] Move FOR splice cost into VPInstruction::FirstOrderRecurrenceSplice (#129645)
After #124093 we now support fixed-order recurrences with EVL tail
folding by replacing VPInstruction::FirstOrderRecurrenceSplice with a VP
splice intrinsic.
However the costing for the splice is currently done in
VPFirstOrderRecurrencePHIRecipe, so when we add the VP splice intrinsic
we end up costing it twice.
This fixes it by splitting out the cost for the splice into
FirstOrderRecurrenceSplice so that it's not duplicated when we replace
it.
We still have to keep the VF=1 checks in VPFirstOrderRecurrencePHIRecipe
since the splice might end up dead and discarded, e.g. in the test
@pr97452_scalable_vf1_for.
Commit: 17eb7777c0ff653b84ea03125461f1ead82d95c2
https://github.com/llvm/llvm-project/commit/17eb7777c0ff653b84ea03125461f1ead82d95c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
Log Message:
-----------
AMDGPU: Use generated checks in test missing checks (#131110)
Commit: ac94ccd56499d5a814011256bcbaa5c8cd9b33e4
https://github.com/llvm/llvm-project/commit/ac94ccd56499d5a814011256bcbaa5c8cd9b33e4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
Log Message:
-----------
AMDGPU: Replace undef references with poison in some MIR tests (#131254)
Commit: 3529c64dbc99ddd237d23a284150c41d687ee41e
https://github.com/llvm/llvm-project/commit/3529c64dbc99ddd237d23a284150c41d687ee41e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
Log Message:
-----------
AMDGPU: Switch a test with only function label checks to generated (#131255)
I suspect the first function at least is not usefully testing
the original failure.
Commit: 8d0205f6ddaeb31f1989f65ed53f0a15881bba09
https://github.com/llvm/llvm-project/commit/8d0205f6ddaeb31f1989f65ed53f0a15881bba09
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
Log Message:
-----------
AMDGPU: Remove undef in subreg-coalescer-crash.ll (#131256)
Commit: 9b83ffb5c609290b5b457a2038ee663beaf795ab
https://github.com/llvm/llvm-project/commit/9b83ffb5c609290b5b457a2038ee663beaf795ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
Log Message:
-----------
AMDGPU: Switch a test to generated checks which only tested labels (#131257)
Also remove an undef use
Commit: bddf24ddbdb2220949d242664fa0879d4475b07e
https://github.com/llvm/llvm-project/commit/bddf24ddbdb2220949d242664fa0879d4475b07e
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/test/CMakeLists.txt
M flang/tools/f18/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[Flang] Add omp_lib dependency to check-flang (#130975)
With `LLVM_ENABLE_RUNTIMES=openmp`, flang enables the OpenMP regression
tests, but `check-flang` was not ensuring that the OpenMP requirements
are built first. Fix by adding a `libomp-mod` to `flang-test-depends`.
Adding `libomp-mod` to extra_targets is necessary because there is no
target from openmp/ that is reachable from the parent
bootstrapping-build. `ninja openmp` fails because openmp/ has no
`openmp` target. `check-openmp` would also run the OpenMP tests and does
not even build `omp_lib.mod`. `runtimes` would build all the runtimes,
not just OpenMP.
Also fix the misleading CMake configure status messages that suggest the
only way to build omp_lib.mod/.h is `LLVM_ENABLE_PROJECTS=openmp`.
Commit: fc8b2bf2f8595a05368f92afae340b4a22c846d1
https://github.com/llvm/llvm-project/commit/fc8b2bf2f8595a05368f92afae340b4a22c846d1
Author: mihailo-stojanovic <139685949+mihailo-stojanovic at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/metadata-dereferenceable.ll
A mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
Log Message:
-----------
[MLIR][LLVM] Import dereferenceable metadata from LLVM IR (#130974)
Add support for importing `dereferenceable` and `dereferenceable_or_null` metadata into LLVM dialect. Add a new attribute which models these two metadata nodes and a new OpInterface.
Commit: 75cf046f0306c41c711a5dc21755f6c723ef39ac
https://github.com/llvm/llvm-project/commit/75cf046f0306c41c711a5dc21755f6c723ef39ac
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
Log Message:
-----------
Re-apply "[AMDGPU] Fix test failures when expensive checks are enabled (#130644)"
As suggested on
https://github.com/llvm/llvm-project/commit/5ec884e5d8a17f5764b09b66f28248b1dc403d4b#commitcomment-153707488
this seems to fix the following tests when building with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON:
LLVM :: CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
LLVM :: CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
LLVM :: CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
> This PR fixes test failures introduced in #127353 when expensive checks
> are enabled.
>
> For `llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll` and
> `llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll`, `s59`
> is no longer in live-ins because it is caller saved. Switch to `s55` in
> this PR.
Commit: 4c1a1a5bf3b983042e55f2d2f12248b0f33bca1f
https://github.com/llvm/llvm-project/commit/4c1a1a5bf3b983042e55f2d2f12248b0f33bca1f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/swdev282079.ll
Log Message:
-----------
AMDGPU: Add generated checks to compile only test (#131258)
Also replace an undef use
Commit: 7bae61370d613c7fc0d2e315eecf19755b6f2a71
https://github.com/llvm/llvm-project/commit/7bae61370d613c7fc0d2e315eecf19755b6f2a71
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
Log Message:
-----------
AMDGPU: Use generated tests in reg-coalescer-sched-crash.ll test (#131259)
This wasn't checking anything. Also remove undef uses.
Commit: 3ff3b29dd62436e34d7e6551398c3a09fb590c07
https://github.com/llvm/llvm-project/commit/3ff3b29dd62436e34d7e6551398c3a09fb590c07
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling-bounds.f90
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling-polymorphic.f90
M flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
Log Message:
-----------
[flang] lower remaining cases of pointer assignments inside forall (#130772)
Implement handling of `NULL()` RHS, polymorphic pointers, as well as
lower bounds or bounds remapping in pointer assignment inside FORALL.
These cases eventually do not require updating hlfir.region_assign,
lowering can simply prepare the new descriptor for the LHS inside the
RHS region.
Looking more closely at the polymorphic cases, there is not need to call
the runtime, fir.rebox and fir.embox do handle the dynamic type setting
correctly.
After this patch, the last remaining TODO is the allocatable assignment
inside FORALL, which like some cases here, is more likely an accidental
feature given FORALL was deprecated in F2003 at the same time than
allocatable components where added.
Commit: 0a5847f1c1445bfe55c9f9241c4d6d89609a7dc0
https://github.com/llvm/llvm-project/commit/0a5847f1c1445bfe55c9f9241c4d6d89609a7dc0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - pull out repeated getOpcode() calls. NFC.
Commit: 44f4e43b4fbbcc877436be6ae894d594c210fa59
https://github.com/llvm/llvm-project/commit/44f4e43b4fbbcc877436be6ae894d594c210fa59
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Extend metrics container to log BuildKite metrics (#130996)
The current container focuses on Github metrics. Before deprecating
BuildKite, we want to make sure the new infra quality is better, or at
least the same.
Being able to compare buildkite metrics with github metrics on grafana
will allow us to easily present the comparison.
BuildKite API allows filtering, but doesn't allow changing the result
ordering. Meaning we are left with builds ordered by IDs. This means a
completed job can appear before a running job in the list. 2 solutions
from there:
- keep the cursor on the oldest running workflow
- keep a list of running workflows to compare.
Because there is no guarantees in workflow ordering, waiting for the
oldest build to complete before reporting any newer build could mean
delaying the more recent build completion reporting by a few hours. And
because grafana cannot ingest metrics older than 2 hours, this is not an
option.
Thus we leave with the second solution: remember what jobs were running
during the last iteration, and record them as soon as they are
completed. Buildkite has at most ~100 pending jobs, so keeping all those
IDs should be OK.
Commit: 9af538420aca1e762f6ace41b93422b9f97f86a7
https://github.com/llvm/llvm-project/commit/9af538420aca1e762f6ace41b93422b9f97f86a7
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
Log Message:
-----------
[AArch64][GISel] Fix lowering of fp16 intrinsics (#130156)
This addresses the issue described in
https://github.com/llvm/llvm-project/issues/128843
Commit: a58a6a95b0783f775121fac8b02b44e40b638927
https://github.com/llvm/llvm-project/commit/a58a6a95b0783f775121fac8b02b44e40b638927
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_fp_max_error/IntelFPMaxErrorFPMath.ll
Log Message:
-----------
[SPIR-V] Support SPV_INTEL_fp_max_error extension for `!fpmath` metadata (#130619)
Specification:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_fp_max_error.html
Commit: 3b6d0093aa82a24fb2233cae6cfd549a540a4535
https://github.com/llvm/llvm-project/commit/3b6d0093aa82a24fb2233cae6cfd549a540a4535
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
Log Message:
-----------
[LV][NFC] Refactor code for extracting first active element (#131118)
Refactor the code to extract the first active element of a
vector in the early exit block, in preparation for PR #130766.
I've replaced the VPInstruction::ExtractFirstActive nodes with
a combination of a new VPInstruction::FirstActiveLane node and
a Instruction::ExtractElement node.
Commit: a9843ac285408564d2955b5daafe542f1ae70afa
https://github.com/llvm/llvm-project/commit/a9843ac285408564d2955b5daafe542f1ae70afa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
Log Message:
-----------
AMDGPU: Use generated checks in unchecked test (#131275)
Also replace undef uses
Commit: 11d35a0a94cf9dd12b6b08565a856ecd18410a69
https://github.com/llvm/llvm-project/commit/11d35a0a94cf9dd12b6b08565a856ecd18410a69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
Log Message:
-----------
AMDGPU: Use generated checks in coalescer_distribute.ll (#131276)
Also replace the undef with poison.
Commit: ec95ce358c88f1ad8c5c77f07bd556668ece66df
https://github.com/llvm/llvm-project/commit/ec95ce358c88f1ad8c5c77f07bd556668ece66df
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
A lldb/source/Plugins/Process/AIX/CMakeLists.txt
A lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
A lldb/source/Plugins/Process/AIX/NativeProcessAIX.h
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/tools/lldb-server/CMakeLists.txt
Log Message:
-----------
[lldb][AIX] Added base files for NativeProcess Support for AIX (#118160)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601
Added base files for NativeProcess Support for AIX.
Will be adding further support in consequent incremental PR.
Commit: a54f75b46b1024c5cb81e7a089dfbbfb5bdb71b3
https://github.com/llvm/llvm-project/commit/a54f75b46b1024c5cb81e7a089dfbbfb5bdb71b3
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
Log Message:
-----------
[AArch64][GISel] Silence warning caused by #130156
This caused build failures with -Werror
Commit: e45090e5f0bf7743fe0b00d510a903a659354ce1
https://github.com/llvm/llvm-project/commit/e45090e5f0bf7743fe0b00d510a903a659354ce1
Author: Bart Chrzaszcz <bartchr at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix BUILD.bazel due to a16c225
Commit: 80079c9c2f55ddfc5b1d5235d5ed6a2981fa6a97
https://github.com/llvm/llvm-project/commit/80079c9c2f55ddfc5b1d5235d5ed6a2981fa6a97
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/src/__support/FPUtil/dyadic_float.h
Log Message:
-----------
[libc] Fix new warning in DyadicFloat::as_mantissa_type_rounded (#131148)
The affected line of code converts a float's exponent from `int` to
`size_t`, negating it in the process. Following clang commit
773e88f9d61399c, this provokes a warning, presumably because the
conversion goes wrong if `size_t` is wider than `int` and the input
value is `INT_MIN`: negating it within the `int` type is undefined
behavior, with the likely (though not guaranteed) effect of leaving it
still at `INT_MIN` and then sign-extending that on promotion to
`size_t`.
This fix adds a cast so that the promotion to `size_t` happens _before_
the negation, so that the negative input value will _always_ be
sign-extended, and then the negation will make it positive again.
(I don't believe this case will actually come up. `DyadicFloat` is a
helper system used in processing ordinary float formats, so nothing is
expected to generate an exponent with even a 16-bit absolute value, let
alone 31. But it's as easy to fix it to be robust as it is to just
suppress the warning!)
Commit: 73e93ec3a2ab33050337b3f9daffaea689e99bbc
https://github.com/llvm/llvm-project/commit/73e93ec3a2ab33050337b3f9daffaea689e99bbc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
Log Message:
-----------
[X86] combineConcatVectorOps - attempt to recursively call combineConcatVectorOps from inside ConcatSubOperand. (#131303)
Before falling back to creating a generic ISD::CONCAT_VECTORS node, see if we can directly concat the subvectors if we peek through any bitcasts.
Commit: 6962cf1700c28d76882e188d8e401486fe051bd4
https://github.com/llvm/llvm-project/commit/6962cf1700c28d76882e188d8e401486fe051bd4
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/docs/WritingAnLLVMPass.rst
A llvm/include/llvm/CodeGen/ExpandFp.h
R llvm/include/llvm/CodeGen/ExpandLargeFpConvert.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
A llvm/lib/CodeGen/ExpandFp.cpp
R llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/X86/O0-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/tools/opt/optdriver.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
This is meant as a preparation for PR #130988 "[AMDGPU] Implement IR
expansion for frem instruction" which implements the expansion of
another instruction in this pass. The more general name seems more
appropriate given this change and quite reasonable even without it.
Commit: e4a8969e56572371201863594b3a549de2e23f32
https://github.com/llvm/llvm-project/commit/e4a8969e56572371201863594b3a549de2e23f32
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/cert/DontModifyStdNamespaceCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-anon-record-fields.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/file-filter.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/system-headers.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/unittests/ASTMatchers/ASTMatchersInternalTest.cpp
Log Message:
-----------
[clang-tidy] Avoid processing declarations in system headers (#128150)
[clang-tidy] Avoid processing declarations in system headers
Currently, clang-tidy processes the entire TranslationUnit, including
declarations in system headers. However, the work done in system
headers is discarded at the very end when presenting results, unless
the SystemHeaders option is active.
This is a lot of wasted work, and makes clang-tidy very slow.
In comparison, clangd only processes declarations in the main file,
and it's claimed to be 10x faster than clang-tidy:
https://github.com/lljbash/clangd-tidy
To solve this problem, we can apply a similar solution done in clangd
into clang-tidy. We do this by changing the traversal scope from the
default TranslationUnitDecl, to only contain the top-level declarations
that are _not_ part of system headers. We do this in the
MatchASTConsumer class, so the logic can be reused by other tools.
This behavior is currently off by default, and only clang-tidy
enables skipping system headers. If wanted, this behavior can be
activated by other tools in follow-up patches.
I had to move MatchFinderOptions out of the MatchFinder class,
because otherwise I could not set a default value for the
"bool SkipSystemHeaders" member otherwise. The compiler error message
was "default member initializer required before the end of its
enclosing class".
Note: this behavior is not active if the user requests warnings from
system headers via the SystemHeaders option.
Note2: out of all the unit tests, only one of them fails:
readability/identifier-naming-anon-record-fields.cpp
This is because the limited traversal scope no longer includes the
"CXXRecordDecl" of the global anonymous union, see:
https://github.com/llvm/llvm-project/issues/130618
I have not found a way to make this work. For now, document the
technical debt introduced.
Note3: I have purposely decided to make this new feature enabled by
default, instead of adding a new "opt-in/opt-out" flag. Having a new
flag would mean duplicating all our tests to ensure they work in both
modes, which would be infeasible. Having it enabled by default allow
people to get the benefits immediately. Given that all unit tests pass,
the risk for regressions is low. Even if that's the case, the only
issue would be false negatives (fewer things are detected), which
are much more tolerable than false positives.
Credits: original implementation by @njames93, here:
https://reviews.llvm.org/D150126
This implementation is simpler in the sense that it does not consider
HeaderFilterRegex to filter even further. A follow-up patch could
include the functionality if wanted.
Fixes #52959
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: c979ce7e362908a361cee721d2a6db4bcd65be1f
https://github.com/llvm/llvm-project/commit/c979ce7e362908a361cee721d2a6db4bcd65be1f
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
Add IRBuilder::CreateFMA (#131112)
This commit adds a function for creating fma intrinsic calls to the IRBuilder. If the "IsFPConstrained" flag of the builder is set,
the function creates a call to "experimental.constrained.fma" instead of "llvm.fma" .
To support the creation of the constrained intrinsic, a function "CreateConstrainedFPIntrinsic" is introduced.
Commit: 20b7f5982622f1314129fbb9f3c520e789c69bb8
https://github.com/llvm/llvm-project/commit/20b7f5982622f1314129fbb9f3c520e789c69bb8
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/test/Sema/for.c
Log Message:
-----------
[Clang] [Tests] Add some more tests around non-local/non-variable declarations in C for loops (#131199)
As requested by @shafik in
https://github.com/llvm/llvm-project/pull/129737#discussion_r1984337334.
I also added a test for `thread_local` because why not.
Commit: 1a68269e280503650299805412fdbc52be25c6bb
https://github.com/llvm/llvm-project/commit/1a68269e280503650299805412fdbc52be25c6bb
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-allowed-types.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers-values.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values-before-cxx23.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-wrong-config.cpp
Log Message:
-----------
[clang-tidy] support pointee mutation check in misc-const-correctness (#130494)
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: a0b175cb348bf86630276077ebda4adbd8ffd84e
https://github.com/llvm/llvm-project/commit/a0b175cb348bf86630276077ebda4adbd8ffd84e
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/PhaseOrdering/X86/unsigned-multiply-overflow-check.ll
A llvm/test/Transforms/SimplifyCFG/RISCV/umul-extract-pattern.ll
Log Message:
-----------
[SimplifyCFG] Treat `extract oneuse(op.with.overflow),1` pattern as a single instruction (#128021)
Closes #115683 .
Overflow arithmetic instruction plus extract value are usually generated
when a division is being replaced, but the zero check may still be
there. In that case hoist these two instructions out of this basic
block, and let later optimizations take care of the unnecessary zero
checks.
Commit: 737a0aeb6b4ec5bee87af6b5b1cb987427aef5f8
https://github.com/llvm/llvm-project/commit/737a0aeb6b4ec5bee87af6b5b1cb987427aef5f8
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
Log Message:
-----------
[NFC][PowerPC] cleaned dead code of PPC.cpp and PPC.h (#130994)
There are some variables in the PPC.h which are defined and assigned a
value to them,
but never be used, remove the code related to the variables.
Commit: 05df923b0e8affb62245685b4957eefac7722967
https://github.com/llvm/llvm-project/commit/05df923b0e8affb62245685b4957eefac7722967
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M .ci/metrics/requirements.lock.txt
M .ci/metrics/requirements.txt
Log Message:
-----------
[CI] Add dateutil dependency to the metrics container (#131333)
Commit: b43620661d16c78c9fc5d4c1cfdb5340157c13e1
https://github.com/llvm/llvm-project/commit/b43620661d16c78c9fc5d4c1cfdb5340157c13e1
Author: Imad Aldij <mail at imadij.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/C/C23/n2975.c
M clang/test/Sema/varargs-x86-64.c
M clang/test/Sema/varargs.c
M clang/test/SemaCXX/vararg-non-pod.cpp
M clang/test/SemaCXX/varargs.cpp
Log Message:
-----------
[clang] Fix inaccurate wording of warn_second_arg_of_va_start_not_last_named_param (#131238)
Rename and update the wording of
`warn_second_arg_of_va_start_not_last_named_param` to best indicate that
it's actually the last non-variadic parameter instead.
Fixes #131171
Commit: 9387281b6e989832d01db352e6e9068d0b4ce8c2
https://github.com/llvm/llvm-project/commit/9387281b6e989832d01db352e6e9068d0b4ce8c2
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics-upgrade.ll
Log Message:
-----------
[msan][NFCI] Add test for llvm.x86.vcvtph2ps.{128,256} (#131244)
Forked from llvm/test/CodeGen/X86/f16c-intrinsics-upgrade.ll
Handled by visitFPExtInst, because the intrinsic is upgraded by LLVM to fpext:
- llvm.x86.vcvtph2ps.{128,256}
Commit: bbd1bb40573dd5a36dc04af4ad307d6e16456f89
https://github.com/llvm/llvm-project/commit/bbd1bb40573dd5a36dc04af4ad307d6e16456f89
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-split-node.ll
Log Message:
-----------
[SLP]Set insert point for split node with non-scheulable instructions after the last instruction
Need to set the insert point for non-schedulable instructions in
SplitVectorize node after the last instruction, not before, to avoid
a crash in case of buildvector subvector node.
Commit: 8f011e2c7f003f3e9823c057109d603ca698a4be
https://github.com/llvm/llvm-project/commit/8f011e2c7f003f3e9823c057109d603ca698a4be
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[Sema] Avoid repeated hash lookups (NFC) (#131263)
Commit: 0f98d1b9fa56c19dcbf1b002608e51047ac56d60
https://github.com/llvm/llvm-project/commit/0f98d1b9fa56c19dcbf1b002608e51047ac56d60
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
Log Message:
-----------
[CIR] Don't generate ClangIR after an unrecoverable error occured (#130971)
Co-authored-by: Morris Hafner <mhafner at nvidia.com>
Commit: 4acfeafd8fa46f22e449b24a49c128a312f900fb
https://github.com/llvm/llvm-project/commit/4acfeafd8fa46f22e449b24a49c128a312f900fb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Tooling/RefactoringCallbacks.cpp
Log Message:
-----------
[Tooling] Avoid repeated hash lookups (NFC) (#131264)
Commit: 8d333e167503e7ca17ab9e54b8a07cc3b55f96ca
https://github.com/llvm/llvm-project/commit/8d333e167503e7ca17ab9e54b8a07cc3b55f96ca
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
Log Message:
-----------
[SelectionDAG] Avoid repeated hash lookups (NFC) (#131266)
Commit: 1b42be6fe8b850703e0f8e807234e3cb3332ebe0
https://github.com/llvm/llvm-project/commit/1b42be6fe8b850703e0f8e807234e3cb3332ebe0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#131267)
It's safe to use try_emplace instead of operator[] here because:
- PhiPredIVs is empty at the beginning of the loop, and
- The elements we are inserting into PhiPredIVs are unique.
Commit: 19b25a45243948d0d55e0b42d82bb7705c775b77
https://github.com/llvm/llvm-project/commit/19b25a45243948d0d55e0b42d82bb7705c775b77
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/tools/dsymutil/BinaryHolder.cpp
Log Message:
-----------
[dsymutil] Avoid repeated hash lookups (NFC) (#131268)
Commit: 2a09523480fc8320c4039e91592d99120e9ae6e7
https://github.com/llvm/llvm-project/commit/2a09523480fc8320c4039e91592d99120e9ae6e7
Author: NewSigma <46043910+NewSigma at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/Parser/cxx-template-decl.cpp
Log Message:
-----------
[clang] Add diagnostic for unresolved using declaration that shadows template parameters (#131328)
Fix #129411
Commit: 2198f546b167b442ce4c229352922f62d716bf79
https://github.com/llvm/llvm-project/commit/2198f546b167b442ce4c229352922f62d716bf79
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
Log Message:
-----------
[BPF] Avoid repeated hash lookups (NFC) (#131265)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 389ed474e81f402294a1dc03a5ea7b039a523965
https://github.com/llvm/llvm-project/commit/389ed474e81f402294a1dc03a5ea7b039a523965
Author: yonghong-song <yhs at fb.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
Log Message:
-----------
[BPF] Remove unnecessary BitCast operations (#131260)
In [1], Nikita Popov spotted that two BitCast operations are not needed
with opaque pointers. So remove these two BitCast operations and adjust
corresponding comments as well.
[1] https://github.com/llvm/llvm-project/pull/130722
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: 841f4637a078ce9adc5ef45f533a43bf7fbc7fc7
https://github.com/llvm/llvm-project/commit/841f4637a078ce9adc5ef45f533a43bf7fbc7fc7
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coro] Use CloneFunctionInto for coroutine cloning instead of CloneFunction<Part> (#129149)
Summary:
CloneFunctionInto now is fast on its own and we don't need to use
CloneFunctionAttributes/Metadata/Body separately.
CommonDebugInfo in CoroClone is now unused and is cleaned up separately
in the next diff in the stack.
Test Plan:
ninja check-all
Commit: 244cf89f143a4fa09494280dba4a49d4cff007f6
https://github.com/llvm/llvm-project/commit/244cf89f143a4fa09494280dba4a49d4cff007f6
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
Log Message:
-----------
[mlir][python] Small optimization to mlirApiObjectToCapsule. (#131160)
Call nb::getattr(...) rather than using nb::hasattr() and .attr(). Saves
a Python string allocation and a dictionary lookup when using a recent
nanobind.
Optimization only, no changes in behavior expected.
Commit: e8117026a9796fa3f60b61073c18c3467a037bee
https://github.com/llvm/llvm-project/commit/e8117026a9796fa3f60b61073c18c3467a037bee
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/src/string/memory_utils/inline_bcmp.h
M libc/src/string/memory_utils/inline_memcmp.h
M libc/src/string/memory_utils/inline_memcpy.h
M libc/src/string/memory_utils/inline_memmove.h
M libc/src/string/memory_utils/inline_memset.h
Log Message:
-----------
[libc] Default to `byte_per_byte` instead of erroring (#131340)
Summary:
Right now a lot of the memory functions error if we don't have specific
handling for them. This is weird because we have a generic
implementation that should just be used whenever someone hasn't written
a more optimized version. This allows us to use the `libc` headers with
more architectures from the `shared/` directory without worrying about
it breaking.
Commit: f2541cee44edca653326895f51bea4561394d6c7
https://github.com/llvm/llvm-project/commit/f2541cee44edca653326895f51bea4561394d6c7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/test/Tooling/clang-linker-wrapper-spirv-elf.cpp
M clang/test/Tooling/lit.local.cfg
Log Message:
-----------
[clang] Remove usage of llvm-spirv in clang LIT tests (#131158)
We use the backend now, so remove the requirement from the only test
that actually executes the translator and remove the LIT requirement
variable.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 72b8744aa530b53d94ae556c40ef703c3bd8d115
https://github.com/llvm/llvm-project/commit/72b8744aa530b53d94ae556c40ef703c3bd8d115
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Reduce overhead of target compilation (#130945)
This patch avoids calling `TargetOp::getInnermostCapturedOmpOp` multiple
times during initialization of default and runtime target attributes in
MLIR to LLVM IR translation of `omp.target` operations. This is a
potentially expensive operation, so this change should help keep compile
times lower.
Commit: 52cd27e60b2421feeee5afa9269c53fb0cb366a7
https://github.com/llvm/llvm-project/commit/52cd27e60b2421feeee5afa9269c53fb0cb366a7
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
M llvm/test/CodeGen/AArch64/alloca.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
Log Message:
-----------
Revert "[Aarch64] [ISel] Don't save vaargs registers if vaargs are unused (#126780)"
This caused miscompiles on windows arm64, see comment on the PR.
This reverts commit e122483762b44c7f4386165099ff2a404705d7d4.
Commit: 00f9c855fb3b21fac62f70e22825a5599cfe8b8b
https://github.com/llvm/llvm-project/commit/00f9c855fb3b21fac62f70e22825a5599cfe8b8b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/Runtime/Inquiry.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/support.h
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
A flang/test/Fir/box-total-elements-fold.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
A flang/test/Fir/is-contiguous-box-fold.fir
A flang/test/Transforms/simplify-fir-operations.fir
Log Message:
-----------
[flang] Added fir.is_contiguous_box and fir.box_total_elements ops. (#131047)
These are helper operations to aid with expanding of fir.pack_array.
Commit: fdb4b89bc0e52ef769ee8ac4d40c0c7b5b62db25
https://github.com/llvm/llvm-project/commit/fdb4b89bc0e52ef769ee8ac4d40c0c7b5b62db25
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/src/string/memory_utils/inline_memmove.h
Log Message:
-----------
[libc] Fix memmove macros for unreocognized targets
Commit: eeb27331dce40068705354643ce91a39f4ff1b64
https://github.com/llvm/llvm-project/commit/eeb27331dce40068705354643ce91a39f4ff1b64
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[flang-rt] Use --as-needed for linking flang-rt libraries. (#130856)
This change makes sure that there is no unnecessary library
dependencies like libc++/libstdc++.
Commit: 42ddb550174887359fa1393cb76843475c283159
https://github.com/llvm/llvm-project/commit/42ddb550174887359fa1393cb76843475c283159
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - peek through bitcasts to find a concatenation of subvector shuffles (#131331)
Extend existing concat(shuffle(),shuffle(),..) shuffle combining to handle mixed bitcasts such as concat(shuffle(),bitcast(shuffle()),...)
Commit: 792a6f81198842352fa5213faf7ecad4b1d27ddd
https://github.com/llvm/llvm-project/commit/792a6f81198842352fa5213faf7ecad4b1d27ddd
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
M llvm/test/CodeGen/AArch64/dbg-assign-tag-offset-mix-loc.ll
M llvm/test/CodeGen/AArch64/dbg-assign-tag-offset.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/CodeGen/AArch64/fast-isel-dbg.ll
M llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll
M llvm/test/CodeGen/AArch64/stack-tagging-dbg-assign-tag-offset.ll
M llvm/test/CodeGen/AArch64/stack-tagging-dbg-declare-tag-offset.ll
M llvm/test/CodeGen/AArch64/stack-tagging-dbg.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
M llvm/test/CodeGen/ARM/debug-info-blocks.ll
M llvm/test/CodeGen/Generic/csw-debug-assert.ll
M llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
M llvm/test/CodeGen/X86/DbgValueOtherTargets.test
M llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
M llvm/test/CodeGen/X86/fold-sext-trunc.ll
M llvm/test/CodeGen/X86/fold-zext-trunc.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
M llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
M llvm/test/CodeGen/X86/select-optimize.ll
M llvm/test/CodeGen/X86/selectiondag-order.ll
M llvm/test/CodeGen/X86/sink-local-value.ll
M llvm/test/DebugInfo/AArch64/cfi-eof-prologue.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/AArch64/select-optimize-trailing-dbg-records.ll
M llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
M llvm/test/DebugInfo/ARM/split-complex.ll
M llvm/test/DebugInfo/ARM/sroa-complex.ll
M llvm/test/DebugInfo/COFF/class-options-common.ll
M llvm/test/DebugInfo/COFF/cpp-mangling.ll
M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lines-bb-start.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/numeric-leaves.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-integer-old.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll
M llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/adce/no-delete.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/codegenprepare/sunk-addr.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/hwasan.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/long-double-x87.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/nullptr-declare.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/scalable-vector.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/set-flag-only-if-modified.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/structured-bindings.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/var-not-alloca-sized.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/vla.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/shared-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/use-before-def.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/do-not-remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/store-new-type.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-vectorize/remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/store-to-part-of-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/optnone.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/instruction-type.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/roundtrip.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/verify.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/salvage-value.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/speculated-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/alloca-single-slice.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/arglist.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/fail-fragment.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memmove-to-from-same-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/split-pre-fragmented-store-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/split-pre-fragmented-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/var-sized-fragment.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/block-asan.ll
M llvm/test/DebugInfo/Generic/dbg-value-lower-linenos.ll
M llvm/test/DebugInfo/Generic/dead-argument-order.ll
M llvm/test/DebugInfo/Generic/discriminated-union.ll
M llvm/test/DebugInfo/Generic/disubrange_vla.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/enum.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
M llvm/test/DebugInfo/Generic/inline-alloca-ordering.ll
M llvm/test/DebugInfo/Generic/inline-dbg-values.ll
M llvm/test/DebugInfo/Generic/inline-debug-loc.ll
M llvm/test/DebugInfo/Generic/inlined-vars.ll
M llvm/test/DebugInfo/Generic/ipsccp-remap-assign-id.ll
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-2.ll
M llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-3.ll
M llvm/test/DebugInfo/Generic/recursive_inlining.ll
M llvm/test/DebugInfo/Generic/sroa-larger.ll
M llvm/test/DebugInfo/Generic/sroa-samesize.ll
M llvm/test/DebugInfo/Generic/univariant-discriminated-union.ll
M llvm/test/DebugInfo/Generic/volatile-alloca.ll
M llvm/test/DebugInfo/Mips/InlinedFnLocalVar.ll
M llvm/test/DebugInfo/Mips/delay-slot.ll
M llvm/test/DebugInfo/X86/DW_AT_const_value.ll
M llvm/test/DebugInfo/X86/InlinedFnLocalVar.ll
M llvm/test/DebugInfo/X86/aligned_stack_var.ll
M llvm/test/DebugInfo/X86/arg-dbg-value-list.ll
M llvm/test/DebugInfo/X86/arguments.ll
M llvm/test/DebugInfo/X86/array2.ll
M llvm/test/DebugInfo/X86/asan_debug_info.ll
M llvm/test/DebugInfo/X86/block-capture.ll
M llvm/test/DebugInfo/X86/byvalstruct.ll
M llvm/test/DebugInfo/X86/codegenprep-addrsink.ll
M llvm/test/DebugInfo/X86/codegenprepare-rollback.ll
M llvm/test/DebugInfo/X86/convert-linked.ll
M llvm/test/DebugInfo/X86/dbg-declare-arg.ll
M llvm/test/DebugInfo/X86/dbg-declare-inalloca.ll
M llvm/test/DebugInfo/X86/dbg-declare.ll
M llvm/test/DebugInfo/X86/dbg-empty-metadata-lowering.ll
M llvm/test/DebugInfo/X86/dbg-val-list-dangling.ll
M llvm/test/DebugInfo/X86/dbg-val-list-undef.ll
M llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
M llvm/test/DebugInfo/X86/dbg_value_direct.ll
M llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/debug-info-template-parameter.ll
M llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
M llvm/test/DebugInfo/X86/dont-drop-dbg-assigns-in-isels.ll
M llvm/test/DebugInfo/X86/double-declare.ll
M llvm/test/DebugInfo/X86/empty-metadata-dbg-declare.ll
M llvm/test/DebugInfo/X86/fi-piece.ll
M llvm/test/DebugInfo/X86/formal_parameter.ll
M llvm/test/DebugInfo/X86/implicit_value-double.ll
M llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
M llvm/test/DebugInfo/X86/instr-ref-opt-levels.ll
M llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
M llvm/test/DebugInfo/X86/licm-undef-dbg-value.ll
M llvm/test/DebugInfo/X86/mem2reg_fp80.ll
M llvm/test/DebugInfo/X86/missing-abstract-variable.ll
M llvm/test/DebugInfo/X86/parameters.ll
M llvm/test/DebugInfo/X86/pieces-1.ll
M llvm/test/DebugInfo/X86/pieces-3.ll
M llvm/test/DebugInfo/X86/pieces-4.ll
M llvm/test/DebugInfo/X86/reference-argument.ll
M llvm/test/DebugInfo/X86/safestack-byval.ll
M llvm/test/DebugInfo/X86/salvage-add-node-indirect.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
M llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
M llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
M llvm/test/DebugInfo/X86/spill-nontrivial-param.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/sroa-after-inlining.ll
M llvm/test/DebugInfo/X86/sroasplit-1.ll
M llvm/test/DebugInfo/X86/sroasplit-2.ll
M llvm/test/DebugInfo/X86/sroasplit-3.ll
M llvm/test/DebugInfo/X86/sroasplit-4.ll
M llvm/test/DebugInfo/X86/sroasplit-5.ll
M llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll
M llvm/test/DebugInfo/X86/subreg.ll
M llvm/test/DebugInfo/X86/subregisters.ll
M llvm/test/DebugInfo/X86/union-const.ll
M llvm/test/DebugInfo/X86/vla-global.ll
M llvm/test/DebugInfo/X86/vla-multi.ll
M llvm/test/DebugInfo/X86/vla.ll
M llvm/test/DebugInfo/assignment-tracking/AArch64/scalable-vectors.ll
M llvm/test/DebugInfo/assignment-tracking/X86/DSE.ll
M llvm/test/DebugInfo/assignment-tracking/X86/assignment-tracking-not-enabled.ll
M llvm/test/DebugInfo/assignment-tracking/X86/coalesce-cfg.ll
M llvm/test/DebugInfo/assignment-tracking/X86/coalesce-options.ll
M llvm/test/DebugInfo/assignment-tracking/X86/coalesce-simple.ll
M llvm/test/DebugInfo/assignment-tracking/X86/dbg-phi-produces-undef.ll
M llvm/test/DebugInfo/assignment-tracking/X86/diamond-1.ll
M llvm/test/DebugInfo/assignment-tracking/X86/diamond-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/diamond-3.ll
M llvm/test/DebugInfo/assignment-tracking/X86/frag-size-zero.ll
M llvm/test/DebugInfo/assignment-tracking/X86/global-storage.ll
M llvm/test/DebugInfo/assignment-tracking/X86/large-type.ll
M llvm/test/DebugInfo/assignment-tracking/X86/loop-hoist.ll
M llvm/test/DebugInfo/assignment-tracking/X86/loop-sink.ll
M llvm/test/DebugInfo/assignment-tracking/X86/loop-unroll.ll
M llvm/test/DebugInfo/assignment-tracking/X86/lower-offset-expression.ll
M llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill-cfg.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill.ll
M llvm/test/DebugInfo/assignment-tracking/X86/negative-offset.ll
M llvm/test/DebugInfo/assignment-tracking/X86/nested-loop-frags.ll
M llvm/test/DebugInfo/assignment-tracking/X86/nested-loop-sroa.ll
M llvm/test/DebugInfo/assignment-tracking/X86/nested-loop.ll
M llvm/test/DebugInfo/assignment-tracking/X86/no-redundant-def-after-alloca.ll
M llvm/test/DebugInfo/assignment-tracking/X86/order-of-defs.ll
M llvm/test/DebugInfo/assignment-tracking/X86/remove-redundant-defs-bwd-scan.ll
M llvm/test/DebugInfo/assignment-tracking/X86/remove-redundant-defs-to-prevent-reordering.ll
M llvm/test/DebugInfo/assignment-tracking/X86/remove-undef-fragment.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-ir-salvage-assign.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-transfer-dbgassign.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location.ll
M llvm/test/DebugInfo/assignment-tracking/X86/split-alloca.ll
M llvm/test/DebugInfo/assignment-tracking/X86/untagged-store-assignment-extra-checks.ll
M llvm/test/DebugInfo/assignment-tracking/X86/untagged-store-assignment-outside-variable.ll
M llvm/test/DebugInfo/assignment-tracking/X86/untagged-store-frag.ll
M llvm/test/DebugInfo/assignment-tracking/X86/use-known-value-at-early-mem-def-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/use-known-value-at-early-mem-def.ll
M llvm/test/DebugInfo/duplicate_dbgvalue.ll
M llvm/test/DebugInfo/instcombine-sink-latest-assignment.ll
M llvm/test/DebugInfo/roundtrip-non-instruction-debug-info.ll
M llvm/test/DebugInfo/salvage-gep.ll
M llvm/test/DebugInfo/salvage-limit-expr-size.ll
M llvm/test/DebugInfo/salvage-overflow.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/dbg-assign-tag-offset.ll
M llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
M llvm/test/LTO/X86/pr38046.ll
M llvm/test/Linker/debug-info-use-before-def.ll
M llvm/test/Linker/thinlto_funcimport_debug.ll
M llvm/test/ThinLTO/X86/crash_debuginfo.ll
M llvm/test/ThinLTO/X86/debuginfo-cu-import.ll
M llvm/test/ThinLTO/X86/pr35472.ll
M llvm/test/Transforms/ADCE/adce-salvage-dbg-value.ll
M llvm/test/Transforms/ADCE/debug-info-intrinsic.ll
M llvm/test/Transforms/ArgumentPromotion/pr27568.ll
M llvm/test/Transforms/Attributor/ArgumentPromotion/alignment.ll
M llvm/test/Transforms/Attributor/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll
M llvm/test/Transforms/BDCE/basic.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split-preserve-debug.ll
M llvm/test/Transforms/CodeExtractor/LoopExtractor_alloca.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/debug-info-on-skipped-selects.ll
M llvm/test/Transforms/CodeGenPrepare/sink-shift-and-trunc.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable-inlined.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug-spill-dbg.declare.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg.ll
M llvm/test/Transforms/Coroutines/swift-async-dbg.ll
M llvm/test/Transforms/DCE/basic.ll
M llvm/test/Transforms/DCE/dbg-value-removal.ll
M llvm/test/Transforms/DeadStoreElimination/debuginfo.ll
M llvm/test/Transforms/GlobalOpt/shrink-global-to-bool-check-debug.ll
M llvm/test/Transforms/HotColdSplit/invalid-dbg-assign.ll
M llvm/test/Transforms/IROutliner/gvn-phi-debug.ll
M llvm/test/Transforms/IROutliner/legal-debug.ll
M llvm/test/Transforms/Inline/alloca-dbgdeclare.ll
M llvm/test/Transforms/Inline/delete-function-with-metadata-use.ll
M llvm/test/Transforms/Inline/ignore-debug-info.ll
M llvm/test/Transforms/Inline/inline-skip-use-empty-alloca.ll
M llvm/test/Transforms/Inline/local-as-metadata-undominated-use.ll
M llvm/test/Transforms/Inline/no-inline-line-tables.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/call-guard.ll
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/cast-set-preserve-signed-dbg-val.ll
M llvm/test/Transforms/InstCombine/consecutive-fences.ll
M llvm/test/Transforms/InstCombine/dbg-scalable-store-fixed-frag.ll
M llvm/test/Transforms/InstCombine/dbg-simplify-alloca-size.ll
M llvm/test/Transforms/InstCombine/debuginfo-dce.ll
M llvm/test/Transforms/InstCombine/debuginfo-dce2.ll
M llvm/test/Transforms/InstCombine/debuginfo-scalable-typesize.ll
M llvm/test/Transforms/InstCombine/debuginfo-skip.ll
M llvm/test/Transforms/InstCombine/debuginfo-variables.ll
M llvm/test/Transforms/InstCombine/debuginfo.ll
M llvm/test/Transforms/InstCombine/debuginfo_add.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/erase-dbg-values-at-dead-alloc-site.ll
M llvm/test/Transforms/InstCombine/lifetime-no-null-opt.ll
M llvm/test/Transforms/InstCombine/lifetime.ll
M llvm/test/Transforms/InstCombine/lower-dbg-declare.ll
M llvm/test/Transforms/InstCombine/pr43893.ll
M llvm/test/Transforms/InstCombine/salvage-dbg-declare.ll
M llvm/test/Transforms/InstCombine/sink-instruction-introduces-unnecessary-poison-value.ll
M llvm/test/Transforms/InstCombine/stacksave-debuginfo.ll
M llvm/test/Transforms/InstCombine/storemerge-dbg.ll
M llvm/test/Transforms/InstCombine/unavailable-debug.ll
M llvm/test/Transforms/InstCombine/unreachable-dbg-info-modified.ll
M llvm/test/Transforms/JumpThreading/branch-debug-info.ll
M llvm/test/Transforms/JumpThreading/guard-split-debuginfo.ll
M llvm/test/Transforms/JumpThreading/redundant-dbg-info.ll
M llvm/test/Transforms/JumpThreading/thread-debug-info.ll
M llvm/test/Transforms/LCSSA/avoid-intrinsics-in-catchswitch.ll
M llvm/test/Transforms/LCSSA/basictest.ll
M llvm/test/Transforms/LCSSA/rewrite-existing-dbg-values.ll
M llvm/test/Transforms/LICM/dbg-value-sink.ll
M llvm/test/Transforms/LICM/debug-value.ll
M llvm/test/Transforms/LICM/hoist-debuginvariant.ll
M llvm/test/Transforms/LICM/sinking-debugify.ll
M llvm/test/Transforms/LoopDeletion/crashbc.ll
M llvm/test/Transforms/LoopDeletion/diundef.ll
M llvm/test/Transforms/LoopDeletion/over-defensive-undefing-dbg-values.ll
M llvm/test/Transforms/LoopIdiom/X86/arithmetic-right-shift-until-zero.ll
M llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
M llvm/test/Transforms/LoopIdiom/X86/logical-right-shift-until-zero-debuginfo.ll
M llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
M llvm/test/Transforms/LoopIdiom/memset-debugify-remarks.ll
M llvm/test/Transforms/LoopRotate/dbgvalue.ll
M llvm/test/Transforms/LoopRotate/delete-dbg-values.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/lsr-cond-dbg.ll
M llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-0.ll
M llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-1.ll
M llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-2.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-0.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-1.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-2.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-3.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-4.ll
M llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-5.ll
M llvm/test/Transforms/LoopStrengthReduce/optimizemax_debugloc.ll
M llvm/test/Transforms/LoopStrengthReduce/pr12018.ll
M llvm/test/Transforms/LoopStrengthReduce/pr51329.ll
M llvm/test/Transforms/LoopStrengthReduce/pr51656.ll
M llvm/test/Transforms/LoopStrengthReduce/pr52161.ll
M llvm/test/Transforms/LoopUnroll/X86/call-remark.ll
M llvm/test/Transforms/LoopUnroll/debug-info.ll
M llvm/test/Transforms/LoopUnroll/runtime-epilog-debuginfo.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
M llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
M llvm/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
M llvm/test/Transforms/Mem2Reg/dbg-inline-scope-for-phi.ll
M llvm/test/Transforms/Mem2Reg/dbg_declare_to_value_conversions.ll
M llvm/test/Transforms/Mem2Reg/debug-alloca-phi-2.ll
M llvm/test/Transforms/Mem2Reg/debug-alloca-phi.ll
M llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
M llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
M llvm/test/Transforms/MemCpyOpt/pr37967.ll
M llvm/test/Transforms/MergeFunc/debuginfo-iterators.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
M llvm/test/Transforms/MergedLoadStoreMotion/st_sink_check_debug.ll
M llvm/test/Transforms/Reassociate/undef_intrinsics_when_deleting_instructions.ll
M llvm/test/Transforms/SCCP/ipsccp-basic.ll
M llvm/test/Transforms/SCCP/ipsccp-branch-unresolved-undef.ll
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M llvm/test/Transforms/SROA/dbg-inline.ll
M llvm/test/Transforms/SROA/dbg-single-piece.ll
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M llvm/test/Transforms/SafeStack/X86/debug-loc.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
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M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad-debuginfo.ll
M llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll
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M llvm/test/Transforms/SimplifyCFG/debug-info-thread-phi.ll
M llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue-inlined.ll
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M llvm/test/Transforms/SimplifyCFG/return-merge.ll
M llvm/test/Transforms/SimplifyCFG/speculate-dbgvalue.ll
M llvm/test/Transforms/SimplifyCFG/tail-merge-noreturn.ll
M llvm/test/Transforms/SpeculativeExecution/PR46267.ll
M llvm/test/Transforms/TailCallElim/debugloc.ll
M llvm/test/Transforms/Util/Debugify/loc-only-original-mode.ll
M llvm/test/Transforms/Util/Debugify/loc-only.ll
M llvm/test/Transforms/Util/dbg-user-of-aext.ll
M llvm/test/Transforms/Util/salvage-debuginfo.ll
M llvm/test/Transforms/Util/strip-nonlinetable-debuginfo-localvars.ll
M llvm/test/Transforms/Util/trivial-auto-var-init-call.ll
M llvm/test/Transforms/Util/trivial-auto-var-init-store.ll
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
These date back to when the non-intrinsic format of variable locations
was still being tested and was behind a compile-time flag, so not all
builds / bots would correctly run them. The solution at the time, to get
at least some test coverage, was to have tests opt-in to non-intrinsic
debug-info if it was built into LLVM.
Nowadays, non-intrinsic format is the default and has been on for more
than a year, there's no need for this flag to exist.
(I've downgraded the flag from "try" to explicitly requesting
non-intrinsic format in some places, so that we can deal with tests that
are explicitly about non-intrinsic format in their own commit).
Commit: da3ee9763266f9adedaac1b1b3162d14f951fc55
https://github.com/llvm/llvm-project/commit/da3ee9763266f9adedaac1b1b3162d14f951fc55
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Passes/StandardInstrumentations.cpp
A llvm/test/Other/dump-before-after-pass-number.ll
M llvm/test/Other/dump-before-after.ll
Log Message:
-----------
StandardInstrumentation: Fix -ir-dump-directory with -print-before-pass-number (#130983)
Commit: 999700ca477d77c96e771de0399630db773063d6
https://github.com/llvm/llvm-project/commit/999700ca477d77c96e771de0399630db773063d6
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
Log Message:
-----------
[libc++][test] Skip some `is_implicit_lifetime` tests for apple-clang-17 (#131302)
The skipping was present before but dropped. At the time it was dropped
in #128649, apple-clang-17 wasn't used for CI. But today it is used at
least for the "macos (generic-cxx23, macos-15)" configuration. So I
think we need to skip apple-clang-17 again.
Commit: befb52db94cc63558981baac5e58d86ed2ec1f37
https://github.com/llvm/llvm-project/commit/befb52db94cc63558981baac5e58d86ed2ec1f37
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/offload-Xarch.c
Log Message:
-----------
[Clang] Remove use of 'temporary' toolchains for offload deduction (#131332)
Summary:
We need a toolchain to get the GPU architectures when compiling with
OpenMP. This kind of breaks the toolchain model because these are cached
all over the place. Instead of making a new one, just create both of
them unconditionally. It's not like this is saving any work since we
still needed to create both toolchains in the earlier case.
Fixes: https://github.com/llvm/llvm-project/issues/131325
Commit: bdb4012fe3f9e30e2ea3e1d92524ad7725b2957e
https://github.com/llvm/llvm-project/commit/bdb4012fe3f9e30e2ea3e1d92524ad7725b2957e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SplitKit.cpp
Log Message:
-----------
[CodeGen] Remove parameter from LiveRangeEdit::canRematerializeAt [NFC]
Only one caller cares about the true case of this parameter, so move
the check to that single caller. Note that RegisterCoalescer seems
like it should care, but it already duplicates the check several
lines above.
Commit: 8c31bb7da34ac5d8a5e7db4d3964039dfd09a73f
https://github.com/llvm/llvm-project/commit/8c31bb7da34ac5d8a5e7db4d3964039dfd09a73f
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
Log Message:
-----------
[GSYM] Fix incorrect comparison in gSYM creation (#131197)
There is a bug in `llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp` where
`StmtSeqVal` was being compared against `UINT32_MAX` rather than the
correct `UINT64_MAX` - thanks @nocchijiang for [pointing this
out](https://github.com/llvm/llvm-project/pull/129196#discussion_r1986203058).
We correct the issue with this patch. For testing - the issue would show
when we have a correct offset of value `UINT32_MAX` - but constructing
such a test is impractical.
Commit: b936ef18559aac8d982229040158c65843d43eb2
https://github.com/llvm/llvm-project/commit/b936ef18559aac8d982229040158c65843d43eb2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Reorder include of RISCVInstrInfoZi* before C and Zc*. NFC (#131274)
Zclsd needs to reference Zilsd in CompressPats so put Zi before Zc.
The one issue I encountered is that RISCVInstrFormatsC.td needs to be
included before RISCVInstrInfoZicfiss. To fix this I moved the include
of RISCVInstrFormatsC.td from RISCVInstrInfoC.td to RISCVInstrInfo.td
where we include RISCVInstrFormats.td. I moved RISCVInstrFormatsV.td for
consistency.
Commit: 3ac5d8da615ee766700652149702911e9abfb565
https://github.com/llvm/llvm-project/commit/3ac5d8da615ee766700652149702911e9abfb565
Author: Nikolay Panchenko <npanchen at modular.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Tools/lsp-server-support/Transport.h
M mlir/lib/Tools/lsp-server-support/Transport.cpp
Log Message:
-----------
[mlir-lsp] Abstract input and output of the `JSONTransport` (#129320)
The patch abstracts sending and receiving json messages of
`JSONTransport` to allow custom implementation of them. For example, one
concrete implementation can use pipes without a need to convert file
descriptor to a `FILE` object.
Commit: cd54d581b506accf10435778219b647313cb493d
https://github.com/llvm/llvm-project/commit/cd54d581b506accf10435778219b647313cb493d
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
A llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard-true16.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] add v_cndmask_t16 to hazardmask (#128912)
add v_cndmask_t16 to hazardmask
Commit: beb4a482973d429ce73cbcba51f3199f7955f8ba
https://github.com/llvm/llvm-project/commit/beb4a482973d429ce73cbcba51f3199f7955f8ba
Author: Julian Nagele <j.nagele at apple.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-icmp-and.ll
Log Message:
-----------
[InstCombine] Use known bits to simplify mask in foldSelectICmpAnd (#128741)
Make use of known bits when trying to decompose a select/icmp bittest and folding it into an and. This means we can fold when additional information, for instance via a range attribute or metadata, allows us to conclude that the resulting mask is in fact a power of two.
Commit: cbbcc3d13b7747be4587e36ddc0699587ff31904
https://github.com/llvm/llvm-project/commit/cbbcc3d13b7747be4587e36ddc0699587ff31904
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3460.c
A clang/test/C/C2y/n3460_1.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3460 (#131196)
This moves some Annex G requirements for complex numbers into the main
body of the standard.
Commit: 2ee7ba47dc97ef377479ab013a2c3d2074a86393
https://github.com/llvm/llvm-project/commit/2ee7ba47dc97ef377479ab013a2c3d2074a86393
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Move Size and CopyCost overrides for vector register to the VReg class. NFC (#131222)
Instead using the IsVRegClass to calculate in the base class, just
override directly.
This will scale better if we need to do different types of overrides for
other register types in the future.
Commit: a8949b16e64f4787755a43b4fffed762ccb94b34
https://github.com/llvm/llvm-project/commit/a8949b16e64f4787755a43b4fffed762ccb94b34
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
Log Message:
-----------
[X86] Add test coverage showing failure to concatenate matching rotate nodes
Commit: 86329ba4d904bb895d5d840c523dde9ddf0ded8e
https://github.com/llvm/llvm-project/commit/86329ba4d904bb895d5d840c523dde9ddf0ded8e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
Log Message:
-----------
[HLSL] Remove old resource annotations (#130338)
Fixes #114126
Commit: 217fc6579bd0ddac96c283c4d996e97c9eab181e
https://github.com/llvm/llvm-project/commit/217fc6579bd0ddac96c283c4d996e97c9eab181e
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/FunctionBreakpoint.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/Watchpoint.cpp
Log Message:
-----------
[lldb][lldb-dap] Return optional from json utils (#129919)
Completion of #129818
Did not want to put `llvm::StringRef()` as the default value instead it
was `""`
Commit: 87a55191a5c5f1e89c71bda9dceb2f695105a60a
https://github.com/llvm/llvm-project/commit/87a55191a5c5f1e89c71bda9dceb2f695105a60a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/test/CodeGen/MIR/Generic/aligned-memoperands.mir
M llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
M llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
M llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
M llvm/test/CodeGen/MIR/X86/instr-symbols-and-mcsymbol-operands.mir
M llvm/test/CodeGen/MIR/X86/machine-verifier-address.mir
M llvm/test/CodeGen/MIR/X86/memory-operands.mir
M llvm/test/CodeGen/MIR/X86/unreachable_block.ll
Log Message:
-----------
MIR: Replace undef with poison in some MIR tests (#131282)
The IR doesn't matter so much in these.
Commit: 5eb557774df637c9e581bd3008cfc6d156a61902
https://github.com/llvm/llvm-project/commit/5eb557774df637c9e581bd3008cfc6d156a61902
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
A mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir
Log Message:
-----------
[mlir][xegpu] Add XeGPU subgroup map propagation analysis for XeGPU SIMT distribution. (#130240)
This PR adds the SG map propagation step of the XeGPU SIMT distribution.
SG map propagation is a sparse backward dataflow analysis that propagate
the sg_map backward starting from the operands of certain operations
(DPAS, store etc.).
This is the first step of XeGPU subgroup distribution. This analysis
result is used to attach layout information to each XeGPU SIMD subgroup
op. The lowering patterns in XeGPUSubgroupDistribute will consume these
layout info to distribute SIMD ops into SIMT ops that work on work-item
level data fragments.
### Summary of Lowering XeGPU SIMD -> SIMT
1. Subgroup map propagation (This PR)
2. Attach `sg_map` to each op in move all ops inside
`gpu.warp_execute_on_lane0` region.
3. Distribute each op using `sg_map`
4. Additional legalization steps to align more with Xe HW.
Commit: 3f62718c4a907125af31faa62365bdf11ddef7b6
https://github.com/llvm/llvm-project/commit/3f62718c4a907125af31faa62365bdf11ddef7b6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Migrate some tests away from undef (#131277)
Commit: 352b9e65be1756cafd6097ce858f87a2a48a71c5
https://github.com/llvm/llvm-project/commit/352b9e65be1756cafd6097ce858f87a2a48a71c5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
Log Message:
-----------
[X86] combineConcatVectorOps - extend ISD::ROTLI/VROTRI handling to support 256-bit types
Add checks that we aren't concatenating 128-bit X86ISD::VPERMI nodes.
Commit: 3fcd921aa492840f5a14fe29bdb10a55032af0d0
https://github.com/llvm/llvm-project/commit/3fcd921aa492840f5a14fe29bdb10a55032af0d0
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
R mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir
Log Message:
-----------
Revert "[mlir][xegpu] Add XeGPU subgroup map propagation analysis for XeGPU SIMT distribution." (#131364)
Reverts llvm/llvm-project#130240
Commit: e6382f2111353f5af66bb660c2e0317c21c398ed
https://github.com/llvm/llvm-project/commit/e6382f2111353f5af66bb660c2e0317c21c398ed
Author: Matthias Braun <matze at braunis.de>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/pr61111.ll
Log Message:
-----------
SelectionDAG: neg (and x, 1) --> SIGN_EXTEND_INREG x, i1 (#131239)
The pattern
```LLVM
%shl = shl i32 %x, 31
%ashr = ashr i32 %shl, 31
```
would be combined to `SIGN_EXTEND_INREG %x, ValueType:ch:i1` by
SelectionDAG.
However InstCombine normalizes this pattern to:
```LLVM
%and = and i32 %x, 1
%neg = sub i32 0, %and
```
This adds matching code to DAGCombiner to catch this variant as well.
Commit: 3ec693d3529c51d37c0ace5d6a3209ebe5575a1b
https://github.com/llvm/llvm-project/commit/3ec693d3529c51d37c0ace5d6a3209ebe5575a1b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
Log Message:
-----------
[X86] combineConcatVectorOps - use ConcatSubOperand for X86ISD::VPERMV operand concatenation (#131352)
More aggressively concatenate operands
Commit: e9fc7683a54d9e5233cff5d016d6f2cdcaf2b2c3
https://github.com/llvm/llvm-project/commit/e9fc7683a54d9e5233cff5d016d6f2cdcaf2b2c3
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/unary-expr-or-type-trait.cpp
A clang/test/CIR/Lowering/unary-expr-or-type-trait.cpp
Log Message:
-----------
[CIR] Upstream basic support for sizeof and alignof (#130847)
This change adds the essential support for sizeof and alignof operators
- Support for VariableArrayType can be added after closing #130197
Commit: 2f9d94981c0eb76fe2127b09351ba7b84064471c
https://github.com/llvm/llvm-project/commit/2f9d94981c0eb76fe2127b09351ba7b84064471c
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/JumpTable.cpp
M bolt/lib/Core/MCPlusBuilder.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
Log Message:
-----------
[BOLT] Change Relocation Type to 32-bit NFCI (#130792)
Commit: 51c706c11955bc1de57ca98b21cf8c7dd7b39aa9
https://github.com/llvm/llvm-project/commit/51c706c11955bc1de57ca98b21cf8c7dd7b39aa9
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
Log Message:
-----------
[NFC][AMDGPU] Replace direct arch comparison with `isAMDGCN()` (#131357)
Commit: d0a0de50f7dc6f116863ea9e8ca11efc2dc9f71e
https://github.com/llvm/llvm-project/commit/d0a0de50f7dc6f116863ea9e8ca11efc2dc9f71e
Author: lntue <lntue at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/src/__support/big_int.h
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/fixed_point/fx_bits_test.cpp
M libc/test/src/complex/CImagTest.h
M libc/test/src/complex/CRealTest.h
M libc/test/src/fcntl/openat_test.cpp
M libc/test/src/math/CopySignTest.h
M libc/test/src/math/FMaxTest.h
M libc/test/src/math/FMinTest.h
M libc/test/src/math/FrexpTest.h
M libc/test/src/math/NextAfterTest.h
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/exhaustive/fmod_generic_impl_test.cpp
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdlib/StrfromTest.h
M libc/test/src/string/memcpy_test.cpp
M libc/test/src/sys/random/linux/getrandom_test.cpp
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/time/strftime_test.cpp
M libc/test/src/unistd/lseek_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/readlink_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
Log Message:
-----------
[libc] Fix implicit conversion warnings in tests. (#131362)
Commit: c84d8e8f1c406ab34d56efd4a9f8c5fbce70af2d
https://github.com/llvm/llvm-project/commit/c84d8e8f1c406ab34d56efd4a9f8c5fbce70af2d
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
A clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/CMakeLists.txt
M clang/lib/Serialization/GeneratePCH.cpp
A clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Lex/HeaderSearchTest.cpp
Log Message:
-----------
[clang][modules] Introduce new `ModuleCache` interface (#131193)
This PR adds new `ModuleCache` interface to Clang's implicitly-built
modules machinery. The main motivation for this change is to create a
second implementation that uses a more efficient kind of
`llvm::AdvisoryLock` during dependency scanning.
In addition to the lock abstraction, the `ModuleCache` interface also
manages the existing `InMemoryModuleCache` instance. I found that
compared to keeping these separate/independent, the code is a bit
simpler now, since these are two tightly coupled concepts. I can
envision a more efficient implementation of the `InMemoryModuleCache`
for the single-process case too, which will be much easier to implement
with the current setup.
This is not intended to be a functional change.
Commit: 7598ceaf51e0fa726bcd50a251f86435d871ee70
https://github.com/llvm/llvm-project/commit/7598ceaf51e0fa726bcd50a251f86435d871ee70
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Serialization/BUILD.gn
Log Message:
-----------
[gn build] Port c84d8e8f1c40
Commit: 0b688f3ce154cb040f224f81c76571d2e4f62c8d
https://github.com/llvm/llvm-project/commit/0b688f3ce154cb040f224f81c76571d2e4f62c8d
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] enable true16 for more codegen test patch 1 (#131206)
This is a NFC patch.
Enable true16 mode for more CodeGen tests
Commit: b1fe7dabceec3341a2aeb466fd40749ce2c61b13
https://github.com/llvm/llvm-project/commit/b1fe7dabceec3341a2aeb466fd40749ce2c61b13
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] enable true16 for more codegen test patch 2 (#131210)
This is a NFC patch.
Enable true16 mode for more CodeGen tests
Commit: 0f1175c8ad0d687ae4708eeecf39f86151aad12f
https://github.com/llvm/llvm-project/commit/0f1175c8ad0d687ae4708eeecf39f86151aad12f
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] enable true16 for more codegen test patch 3 (#131212)
This is a NFC patch.
Enable true16 mode for more CodeGen tests
Commit: b17af9d8ee4e68550fe05fad1011f1322f3e6ec0
https://github.com/llvm/llvm-project/commit/b17af9d8ee4e68550fe05fad1011f1322f3e6ec0
Author: AdityaK <hiraditya at msn.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[NFC][llvm/IR] comparison of unsigned expression in ‘>= 0’ is always true (#130843)
Commit: 8bceb777a14017690ec8ea3029ad8932f2230eaf
https://github.com/llvm/llvm-project/commit/8bceb777a14017690ec8ea3029ad8932f2230eaf
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coro] Remove now unused CommonDebugInfo in CoroSplit (#129150)
Summary:
This cleans up the now unnecessary debug info collection in CoroSplit.
This makes CoroSplit pass almost as fast with -g2 as it is with -g1 on
the sample cpp file used with other parts of this stack:
| | Baseline | IdentityMD set | Prebuilt CommonDI | MetadataPred (cur) |
|-----------------|----------|----------------|-------------------|--------------------|
| CoroSplitPass | 306ms | 221ms | 68ms | 3.8ms |
| CoroCloner | 101ms | 72ms | 0.5ms | 0.5ms |
| CollectCommonDI | - | - | 63ms | - |
| Speed up | 1x | 1.4x | 4.5x | 80x |
Test Plan:
ninja check-all
Commit: fd24805c8e67c921991e82463bdc23563caf744e
https://github.com/llvm/llvm-project/commit/fd24805c8e67c921991e82463bdc23563caf744e
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
A mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir
Log Message:
-----------
Reapply [mlir][xegpu] Add XeGPU subgroup map propagation analysis for XeGPU SIMT distribution. (#131380)
Originally introduced in #130240 and reverted in #131364
Reproduced the issue locally in Linux by doing a shared lib build. Fixes
including adding the missing LINK_LIBS.
**Original commit message:**
This PR adds the SG map propagation step of the XeGPU SIMT distribution.
SG map propagation is a sparse backward dataflow analysis that propagate
the sg_map backward starting from the operands of certain operations
(DPAS, store etc.).
This is the first step of XeGPU subgroup distribution. This analysis
result is used to attach layout information to each XeGPU SIMD subgroup
op. The lowering patterns in XeGPUSubgroupDistribute will consume these
layout info to distribute SIMD ops into SIMT ops that work on work-item
level data fragments.
Summary of Lowering XeGPU SIMD -> SIMT
Subgroup map propagation (This PR)
Attach sg_map to each op in move all ops inside
gpu.warp_execute_on_lane0 region.
Distribute each op using sg_map
Additional legalization steps to align more with Xe HW.
Commit: 2490f7f076731ddcec10f157553a746d1197d5f3
https://github.com/llvm/llvm-project/commit/2490f7f076731ddcec10f157553a746d1197d5f3
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][Linalg] Allow expand shape propagation across linalg ops with dynamic shapes. (#127943)
With `tensor.expand_shape` allowing expanding dynamic dimension into
multiple dynamic dimension, adapt the reshape propagation through
expansion to handle cases where one dynamic dimension is expanded into
multiple dynamic dimension.
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 7a7c33d4f021236b17751ccd1367c394be67bfc2
https://github.com/llvm/llvm-project/commit/7a7c33d4f021236b17751ccd1367c394be67bfc2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lldb/source/API/CMakeLists.txt
Log Message:
-----------
[lldb] Sort source files alphabetically in API/CMakeLists.txt (NFC)
Commit: 955c02dc9c9c3458462a4de0436457a93ea1e9f5
https://github.com/llvm/llvm-project/commit/955c02dc9c9c3458462a4de0436457a93ea1e9f5
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
A mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
Log Message:
-----------
[mlir][tosa] Check for compile time constants in the validation pass (#131123)
This commit adds a concept of the 'dynamic' extension in the Dialect and
checks that compile time constant (CTC) operands for each operator are
constant if the dynamic extension is not loaded.
Operands labeled as CTC in the specification that are of tosa.shape
(shape_t in the specification) type are not checked as they are always
expected to be constant. This requirement is checked elsewhere in the
dialect.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 9c86198caf3654a744ae3fb15447040153acba19
https://github.com/llvm/llvm-project/commit/9c86198caf3654a744ae3fb15447040153acba19
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/multi-incoming-blocks-in-phi.ll
Log Message:
-----------
[SLP] Update vector value for incoming phi node, beeing vectorized already
If the phi node contains multiple same incoming blocks/values, need to
update the corresponding vectorized value, if it is not going to be
vectorized, if the incoming value was vectorized already.
Fixes #131355
Commit: f333841844623dd49ab308c2303dccfbf15d003c
https://github.com/llvm/llvm-project/commit/f333841844623dd49ab308c2303dccfbf15d003c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Add nf argument to VReg class instead overriding with a let. NFC (#131235)
This treats nf consistently with LMul.
Commit: cb64a363ca71033937108763b078906b86c7fb04
https://github.com/llvm/llvm-project/commit/cb64a363ca71033937108763b078906b86c7fb04
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
Log Message:
-----------
[HLSL] Make sure `isSigned` flag is set on target type for `TypedBuffer` resources with signed int vectors (#130223)
Fixes #130191
Commit: 78f74f686bfe21262f8b171e21450186edd081ab
https://github.com/llvm/llvm-project/commit/78f74f686bfe21262f8b171e21450186edd081ab
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/suppressions-sandbox.cpp
Log Message:
-----------
[Darwin][ASan][Test] Create a noinlined wrapper function for reliable suppression in test. (#131247)
CFStringCreateWithBytes may not always appear on stack due to
optimizations. Create a wrapper function for the purposes of testing
suppression files that will always appear on stack for test stability.
rdar://144800068
Commit: 6ac63129b7ef3413c9f86b81e9d33a619f94f911
https://github.com/llvm/llvm-project/commit/6ac63129b7ef3413c9f86b81e9d33a619f94f911
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[LLVM] Only enable `-fno-lifetime-dse` in LTO mode (#131381)
Summary:
Always passing this option is problematic since it is not supported by
`clang.` this leads to conflicts when using extra CMake tools like
`compile-commands` or `include-what-you-use`. This mainly works around a
bug that showed up during the LTO build. Theoretically this can show up
without LTO, but it's likely to work.
This can be removed once
https://github.com/llvm/llvm-project/issues/24952 is resolved.
Commit: 456963de9690a62d47c7a823cbc66c5a0f3d77d1
https://github.com/llvm/llvm-project/commit/456963de9690a62d47c7a823cbc66c5a0f3d77d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp:54:3:
error: definition of implicit copy assignment operator for 'Layout'
is deprecated because it has a user-declared copy constructor
[-Werror,-Wdeprecated-copy]
mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp:103:3:
error: definition of implicit copy assignment operator for 'SGMap'
is deprecated because it has a user-declared copy constructor
[-Werror,-Wdeprecated-copy]
Commit: 8413f4d837a96458104f63bab72c751b8285a458
https://github.com/llvm/llvm-project/commit/8413f4d837a96458104f63bab72c751b8285a458
Author: Daniel Rodríguez Troitiño <drodriguez at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/test/tools/llvm-objcopy/MachO/strip-with-encryption-info.test
Log Message:
-----------
[llvm-objcopy] Apply encryptable offset to first segment, not section (#130517)
Bug introduced #120995. The LLD code calculates the "size" of the Mach-O
headers, and then uses that size to place the segments, but the `__TEXT`
section stays at `fileoff` zero. When I wrote the code into llvm-objcopy
I calculated the extra space into the initial offset, which moved all
the sections back 1 page.
Besides the modified test checking for the right `fileoff` values of the
sections and the segments, I also manually checked the generated
binaries after `llvm-objcopy` using `dyld_info`, as the bug report
suggested.
Fixes #130472
Commit: 605a9f590d91a42ae652c2ab13487b5ad57c58a5
https://github.com/llvm/llvm-project/commit/605a9f590d91a42ae652c2ab13487b5ad57c58a5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/user-node-with-same-last-instr.ll
Log Message:
-----------
[SLP]Check if user node is same as other node and check operand order
Need to check if the user node is same as other node and check operand
order to prevent a compiler crash when trying to find matching gather
node with user nodes, having the same last instruction.
Fixes #131195
Commit: dccc0a836c20914549fa375905615db49d2f813b
https://github.com/llvm/llvm-project/commit/dccc0a836c20914549fa375905615db49d2f813b
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (#131379)
This is an extension of #131357. Hopefully this would be the last one.
Commit: fbf0276b6a7a7a4508c373cf87fc349569652659
https://github.com/llvm/llvm-project/commit/fbf0276b6a7a7a4508c373cf87fc349569652659
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-subvector.ll
Log Message:
-----------
[SLP] Reorder reuses mask, if it is not empty, for subvector operands
If the subvector operands has reuses mask, need to reorder the mask, not
the scalars, to prevent compiler crash due to mask/scalars size
mismatch.
Fixes #131360
Commit: a862b6deae987d7932470a57586f30bdeb3c7e54
https://github.com/llvm/llvm-project/commit/a862b6deae987d7932470a57586f30bdeb3c7e54
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Lower shared global to the correct NVVM address space (#131368)
Global with the CUDA shared data attribute needs to be lowered to llvm
globals with the correct address space (3). Address space is set from
the `mlir::NVVM::NVVMMemorySpace::kSharedMemorySpace` enum from
`mlir/Dialect/LLVMIR/NVVMDialect.h`
Commit: 471f034b1cdaaa7748719efb848684e5d2c6b923
https://github.com/llvm/llvm-project/commit/471f034b1cdaaa7748719efb848684e5d2c6b923
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy][NFC] clean ReleaseNotes.rst (#130626)
1. Fixed ordering to be alphabetical
2. Made lines no more than 80 characters long
3. Fixed typos
Commit: 4818623924a6846d17196a149b633b6bc3316b83
https://github.com/llvm/llvm-project/commit/4818623924a6846d17196a149b633b6bc3316b83
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/test/Fir/cuf.mlir
Log Message:
-----------
[flang][cuda] Add cuf.shared_memory operation (#131392)
Introduce `cuf.shared_memory` operation. The operation is used to get
the pointer in shared memory for a specific variable. The shared memory
is materialized as a global in address space 3 and the different
variables are pointing to it at different offset.
Follow up patches will add lowering and conversion of this operation.
Commit: 89889149cd21bb70c9a545fc18c1bfc1467b1b04
https://github.com/llvm/llvm-project/commit/89889149cd21bb70c9a545fc18c1bfc1467b1b04
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lld/MachO/ICF.cpp
Log Message:
-----------
[lld-macho] Improve ICF thunk folding logic (#131186)
Refactor to add some early return logic to `applySafeThunksToRange` so
that we completely skip irrelevant ranges.
Also add a check for `isCodeSection` to ensure we only apply branch
thunks to code section (they don't make sense for anything else).
Currently this isn't an issue since there are no `keepUnique` non-code
sections - but this is not a hard restriction and may be implemented in
the future, so we should be able to handle (i.e. avoid) this scenario.
Commit: bf6357f0f51eccc48b92a130afb51c0280d56180
https://github.com/llvm/llvm-project/commit/bf6357f0f51eccc48b92a130afb51c0280d56180
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/LoopIdiomRecognize.h
M llvm/include/llvm/Transforms/Utils/BuildLibCalls.h
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
A llvm/test/Transforms/LoopIdiom/strlen.ll
A llvm/test/Transforms/LoopIdiom/wcslen16.ll
A llvm/test/Transforms/LoopIdiom/wcslen32.ll
Log Message:
-----------
[Transforms] LoopIdiomRecognize recognize strlen and wcslen (#108985)
This PR continues the effort made in
https://discourse.llvm.org/t/rfc-strlen-loop-idiom-recognition-folding/55848
and https://reviews.llvm.org/D83392 and https://reviews.llvm.org/D88460
to extend `LoopIdiomRecognize` to find and replace loops of the form
```c
base = str;
while (*str)
++str;
```
and transforming the `strlen` loop idiom into the appropriate `strlen`
and `wcslen` library call which will give a small performance boost if
replaced.
```c
str = base + strlen(base)
len = str - base
```
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 5b2a8819fbe0966b740cc0d9c73591b6d2c9d20f
https://github.com/llvm/llvm-project/commit/5b2a8819fbe0966b740cc0d9c73591b6d2c9d20f
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/LoopIdiomRecognize.h
M llvm/include/llvm/Transforms/Utils/BuildLibCalls.h
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
R llvm/test/Transforms/LoopIdiom/strlen.ll
R llvm/test/Transforms/LoopIdiom/wcslen16.ll
R llvm/test/Transforms/LoopIdiom/wcslen32.ll
Log Message:
-----------
Revert "[Transforms] LoopIdiomRecognize recognize strlen and wcslen (#108985)" (#131405)
This reverts commit bf6357f0f51eccc48b92a130afb51c0280d56180.
Commit: c8b8415b1af12d2a67b523ed3d005d296fb97144
https://github.com/llvm/llvm-project/commit/c8b8415b1af12d2a67b523ed3d005d296fb97144
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang-rt/lib/cuda/CMakeLists.txt
Log Message:
-----------
[flang-rt] Install flang_rt.cuda with the toolchain. (#131373)
Commit: b4f5dcc65a362a1600a25924c1e55dde49c50a0c
https://github.com/llvm/llvm-project/commit/b4f5dcc65a362a1600a25924c1e55dde49c50a0c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Reword the description in package.json
Match the description of the Visual Studio Code extension with the
wording used by popular/official extensions. Most extension spell out
"Visual Studio Code" and use "in" instead of "from".
Commit: f326036767aaa179daedbdb62b10ad6ddea18e37
https://github.com/llvm/llvm-project/commit/f326036767aaa179daedbdb62b10ad6ddea18e37
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/support.cpp
M flang-rt/unittests/Runtime/Support.cpp
Log Message:
-----------
[flang-rt] Added IsContiguousUpTo runtime function. (#131048)
I want to be able to check if the storage is contiguous
in the innermost dimension, so I decided to add an entry point
that takes `dim` as the number of leading dimensions to check.
It seems that a runtime call might result in less code size
even when `dim` is 1, so here it is.
For opt-for-speed I am going to inline it in FIR.
Depends on #131047.
Commit: b7852939b59231181f98d60d3bbb9b5273019f66
https://github.com/llvm/llvm-project/commit/b7852939b59231181f98d60d3bbb9b5273019f66
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Replace multiple calls to `MI.getOpcode()` with `Opcode` (#131400)
Commit: 29a000023caf5b0b02a5d8b517d03f9538e2885e
https://github.com/llvm/llvm-project/commit/29a000023caf5b0b02a5d8b517d03f9538e2885e
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
A mlir/test/Dialect/LLVMIR/module-roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/module-flags.ll
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/mlir-translate/split-markers.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add module flags support (#130679)
Import and translation support.
Note that existing support (prior to this PR) already covers enough in
translation specifically to emit "Debug Info Version". Also, the debug
info version metadata is being emitted even though the imported IR has
no information and is showing up in some tests (will fix that in another
PR).
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Co-authored-by: Henrich Lauko <xlauko at mail.muni.cz>
Commit: 5265412c13b4581e55e5d419f39a2206139b30c6
https://github.com/llvm/llvm-project/commit/5265412c13b4581e55e5d419f39a2206139b30c6
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/Import.h
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
A mlir/test/Target/LLVMIR/Import/intrinsic-prefer-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] Import: add flag to prefer using unregistered intrinsics (#130685)
Currently, there is no common mechanism for supported intrinsics to be
generically annotated with arg and ret attributes. Since there are many
supported intrinsics around different dialects, the amount of work to
teach all them about these attributes is not trivial (though it would be
nice in the long term).
This PR adds a new flag `-prefer-unregistered-intrinsics` that can be
used alongside `--import-llvm` to always use `llvm.intrinsic_call`
during import time (ignoring dialect hooks for custom intrinsic
support).
Using this flag allow us to roundtrip the LLVM IR while eliminating a
whole set of differences coming from lack of arg/ret attributes on
supported intrinsics.
Note `convertIntrinsic` has to be moved to an implementation file
because it queries into `moduleImport` state, which is a fwd declaration
in `LLVMImportInterface.h`
Commit: d52ec1e9ddc630ed6567017e72ad98657a6b5e40
https://github.com/llvm/llvm-project/commit/d52ec1e9ddc630ed6567017e72ad98657a6b5e40
Author: Bangtian Liu <liubangtian at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[MLIR][NFC] fix msvc debug build errors (#131393)
We found the build broken using msvc debug build as below:
```
C:\Users\bangtliu\iree\third_party\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1162): error C2338: static_assert failed: 'You are trying to use a default number of inlined elements for `SmallVector<T>` but `sizeof(T)` is really big! Please use an explicit number of inlined elements with `SmallVector<T, N>` to make sure you really want that much inline storage.'
C:\Users\bangtliu\iree\third_party\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1162): note: the template instantiation context (the oldest one first) is
C:\Users\bangtliu\iree\third_party\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1194): note: see reference to class template instantiation 'llvm::CalculateSmallVectorDefaultInlinedElements<T>' being compiled
with
[
T=`anonymous-namespace'::LinalgOperandDef
]
C:\Users\bangtliu\iree\third_party\llvm-project\mlir\tools\mlir-linalg-ods-gen\mlir-linalg-ods-yaml-gen.cpp(120): error C2976: 'llvm::SmallVector': too few template arguments
C:\Users\bangtliu\iree\third_party\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1195): note: see declaration of 'llvm::SmallVector'
[862/7776] Building CXX object llvm-project\lib\DebugInfo\DWARF\CMakeFiles\LLVMDebugInfoDWARF.dir\DWARFDebugLine.cpp.obj
ninja: build stopped: subcommand failed.
```
This PR is added to address this error.
Commit: bac21719a8a9b766a6d7bc3118e69b9ac35ea00f
https://github.com/llvm/llvm-project/commit/bac21719a8a9b766a6d7bc3118e69b9ac35ea00f
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Core/Relocation.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
Log Message:
-----------
[BOLT] Pass unfiltered relocations to disassembler. NFCI (#131202)
Instead of filtering and modifying relocations in readRelocations(),
preserve the relocation info and use it in the symbolizing disassembler.
This change mostly affects AArch64, where we need to look at original
linker relocations in order to properly symbolize instruction operands.
Commit: 4b1b629d60343ca82dc7f82137c1334c85411701
https://github.com/llvm/llvm-project/commit/4b1b629d60343ca82dc7f82137c1334c85411701
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
Log Message:
-----------
[BOLT] Fix a warning
This patch fixes:
bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp:128:20: error:
unused variable 'SymbolPageAddr' [-Werror,-Wunused-variable]
Commit: 4fb20b85fd8157d7fac2456828c639092970b54e
https://github.com/llvm/llvm-project/commit/4fb20b85fd8157d7fac2456828c639092970b54e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
A flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Compute offset on cuf.shared_memory ops (#131395)
Add a pass to compute the size of the shared memory (static shared
memory) and the offsets of each variables to be placed in shared memory.
The global representing the shared memory is also created during this
pass.
In case of dynamic shared memory, the global as a type of
`!fir.array<0xi8>` and the size of the memory is set at kernel launch.
Commit: e86081b6c275cdbf5b83cb9a865ce6c4d713215e
https://github.com/llvm/llvm-project/commit/e86081b6c275cdbf5b83cb9a865ce6c4d713215e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
A flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
Log Message:
-----------
[flang][cuda] Convert cuf.shared_memory operation to LLVM ops (#131396)
Convert the operation to `llvm.addressof` operation with
`llvm.getelementptr` with the appropriate offset.
Commit: bb694998d2f2aacc0f35384de60c82c78839b231
https://github.com/llvm/llvm-project/commit/bb694998d2f2aacc0f35384de60c82c78839b231
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
A libc/config/uefi/config.json
A libc/config/uefi/entrypoints.txt
A libc/config/uefi/headers.txt
M libc/include/Uefi.yaml
M libc/src/__support/OSUtil/io.h
A libc/src/__support/OSUtil/uefi/CMakeLists.txt
A libc/src/__support/OSUtil/uefi/exit.cpp
A libc/src/__support/OSUtil/uefi/io.cpp
A libc/src/__support/OSUtil/uefi/io.h
M libc/utils/hdrgen/hdrgen/header.py
Log Message:
-----------
[libc] init uefi (#131246)
Initial UEFI OS target support after the headers. This just defines
enough that stuff might try and compile. Test with:
```
$ cmake -S llvm -B build -G Ninja -DLLVM_RUNTIME_TARGETS=x86_64-unknown-uefi-llvm -DRUNTIMES_x86_64-unknown-uefi-llvm_LLVM_ENABLE_RUNTIMES=libc -DRUNTIMES_x86_64-unknown-uefi-llvm_LLVM_LIBC_FULL_BUILD=true -DCMAKE_C_COMPILER_WORKS=true -DCMAKE_CXX_COMPILER_WORKS=true -DLLVM_ENABLE_PROJECTS="clang;lld" -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_LIBCXX=true -DLLVM_HOST_TRIPLE=aarch64-unknown-linux-gnu -DLLVM_DEFAULT_TARGET_TRIPLE=x86_64-unknown-uefi-llvm -DCMAKE_INSTALL_LIBDIR=build/target/lib
$ ninja -C build
```
Commit: 221bc55806db19974537ec59cffb66222902b51e
https://github.com/llvm/llvm-project/commit/221bc55806db19974537ec59cffb66222902b51e
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRMCInstLower.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
Log Message:
-----------
Move AVR-specific MCSymbolRefExpr::VariantKind to AVRMCExpr
Note: AVR uses both VK_None and VK_AVR_NONE, which look strange.
Commit: a3ce1cc3b0ea307157580fbf1a59fe4615caec71
https://github.com/llvm/llvm-project/commit/a3ce1cc3b0ea307157580fbf1a59fe4615caec71
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
Log Message:
-----------
[MC] Remove unused VK_AVR_*
Commit: b034905c821884c59a8d882a1714b7a06bbbf6f3
https://github.com/llvm/llvm-project/commit/b034905c821884c59a8d882a1714b7a06bbbf6f3
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/ThinLTO/X86/ctxprof.ll
M llvm/test/Transforms/EliminateAvailableExternally/transform-to-local.ll
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-entrycount.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid-ctx-only.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid-flat-first.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid.yaml
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util-negative.test
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util.test
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
Log Message:
-----------
[ctxprof] Capture sampling info for context roots (#131201)
When we collect a contextual profile, we sample the threads entering its root and only collect on one at a time (see `ContextRoot::Taken`). If we want to compare profiles between contextual profiles, and/or flat profiles, we have a problem: we don't know how to compare the counter values relative to each other. To that end, we add `ContextRoot::TotalEntries`, which is incremented every time a root is entered and serves as multiplier for the counter values collected under that root.
We expose this in the profile and leave the normalization to the user of the profile, for a few reasons:
* it's only needed if reasoning about all profiles in aggregate.
* the goal, in compiler_rt, is to flush out the profile as quickly as possible, and performing multiplications adds an overhead that may not even be necessary if the consumer of the profile doesn't care about combining profiles
* the information itself may be interesting as an indication of relative sampling of various contexts.
Commit: a4976ca6749800765048d75a4868255403c96d2b
https://github.com/llvm/llvm-project/commit/a4976ca6749800765048d75a4868255403c96d2b
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h
Log Message:
-----------
Move Hexagon-specific MCSymbolRefExpr::VariantKind to HexagonMCExpr
In the future, should try storing the relocation operator in
MCTargetExpr and refactor the ELF writer to use MCValue::RefKind,
similar to AArch64MCExpr.
Also add a MCSymbolRefExpr::create overload that takes an uint16_t
argument to help port code.
Commit: e642ed8b4ac70264454d7e0a8bec787c4f2b435a
https://github.com/llvm/llvm-project/commit/e642ed8b4ac70264454d7e0a8bec787c4f2b435a
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
Log Message:
-----------
[AVR] Remove initializeVariantKinds
AVR doesn't use @reloc or ARM-style sym(reloc) supported by
AsmParser.cpp. Instead, AVRAsmParser parses the operator (e.g.
pm_lo8(...))
Commit: 215c47e4d3b26b780c7019c050bcae874ca2084d
https://github.com/llvm/llvm-project/commit/215c47e4d3b26b780c7019c050bcae874ca2084d
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/test/Transforms/PGOProfile/ctx-instrumentation.ll
Log Message:
-----------
[ctxprof] Missing test update post #131201 (#131428)
Commit: 1762f16f6cc497255b5ba4e68372717db0448112
https://github.com/llvm/llvm-project/commit/1762f16f6cc497255b5ba4e68372717db0448112
Author: Iris <0.0 at owo.li>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/div-shift.ll
M llvm/test/Transforms/InstCombine/intrinsic-distributive.ll
A llvm/test/Transforms/InstCombine/shift-uminmax.ll
Log Message:
-----------
[InstCombine] Fold `umax/umin(nuw_shl(z, x), nuw_shl(z, y)) -> nuw_shl(z, umax/umin(x, y))` and `umax/umin(nuw_shl(x, z), nuw_shl(y, z)) -> nuw_shl(umax/umin(x, y), z)` (#131076)
- Closes #129947
This PR introduces the following transformations:
1. `umax(nuw_shl(z, x), nuw_shl(z, y)) -> nuw_shl(z, umax(x, y))`
2. `umin(nuw_shl(z, x), nuw_shl(z, y)) -> nuw_shl(z, umin(x, y))`
3. `umax(nuw_shl(x, z), nuw_shl(y, z)) -> nuw_shl(umax(x, y),z)`
4. `umin(nuw_shl(x, z), nuw_shl(y, z)) -> nuw_shl(umin(x, y),z)`
Alive2 live proof:
- https://alive2.llvm.org/ce/z/6bM-p7 for 1 and 2
- https://alive2.llvm.org/ce/z/aqLRYA and
https://alive2.llvm.org/ce/z/twoVhb for 3 and 4 repectively
Commit: aead088f02b9452ac151a77e05228ad9458a6eb5
https://github.com/llvm/llvm-project/commit/aead088f02b9452ac151a77e05228ad9458a6eb5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-14 (Fri, 14 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#131419)
Commit: 2ada0c1e6163502a8b3fd6485c290eca26ce8748
https://github.com/llvm/llvm-project/commit/2ada0c1e6163502a8b3fd6485c290eca26ce8748
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
Log Message:
-----------
[AArch64] Move fixELFSymbolsInTLSFixups to getRelocType
fixELFSymbolsInTLSFixups walks the expression tree, which is complex and
unnecessary. As the expression must be relocatable, we can move the code
to getRelocType and just set SymA.
Commit: 720730041deeb522177efe2e8c1d18c260edeb02
https://github.com/llvm/llvm-project/commit/720730041deeb522177efe2e8c1d18c260edeb02
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
M llvm/lib/Target/NVPTX/NVPTXMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCExpr.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
Log Message:
-----------
[MC] Remove empty fixELFSymbolsInTLSFixups overrides
Follow-up to 2ada0c1e6163502a8b3fd6485c290eca26ce8748
Commit: 6c66cda40d7c9622e08a986411d47638abbead59
https://github.com/llvm/llvm-project/commit/6c66cda40d7c9622e08a986411d47638abbead59
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/AntiDepBreaker.h
Log Message:
-----------
[AntiDepBreaker] Use MCRegister. NFC
This matches the type passed by AggresssiveAntiDepBreaker and
CriticalAntiDepBreaker.
Commit: 3b5413c77fd5ce2488e3f45c1ba967e3d3dfa2c8
https://github.com/llvm/llvm-project/commit/3b5413c77fd5ce2488e3f45c1ba967e3d3dfa2c8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
Log Message:
-----------
[CodeGen] Use MCRegister in DbgVariableLocation. NFC
Commit: 254951749febef42620242fd22dfba62f624f79f
https://github.com/llvm/llvm-project/commit/254951749febef42620242fd22dfba62f624f79f
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/ctest.ll
Log Message:
-----------
[X86][APX] Remove the EFLAGS def operand rather than the last one (#131430)
The last one may be an implict use, e.g.,
`IDIV32r %4:gr32, implicit-def dead $eax, implicit-def $edx,
implicit-def dead $eflags, implicit $eax, implicit $edx`
https://godbolt.org/z/KPKzj5c8K
Commit: 94dc397c7e1a87cc1023c7f70aa444ce5fa422a1
https://github.com/llvm/llvm-project/commit/94dc397c7e1a87cc1023c7f70aa444ce5fa422a1
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependencies for fd24805c8e67c921991e82463bdc23563caf744e
Commit: 6a030b300547233dc5fb023a893737fa75bf60dc
https://github.com/llvm/llvm-project/commit/6a030b300547233dc5fb023a893737fa75bf60dc
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unused VPlanIngredient (NFC).
VPlanIngredient is not used anymore, remove it.
Commit: 1e6ba3cd2fe96be00b6ed6ba28b3d9f9271d784d
https://github.com/llvm/llvm-project/commit/1e6ba3cd2fe96be00b6ed6ba28b3d9f9271d784d
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Remove now unused FindDebugInfoToIdentityMap (#129151)
Summary:
This function is no longer needed.
Test Plan:
ninja check-llvm-unit
Commit: 5cc2ae0b519065c39df124d46de1ba75d4b144eb
https://github.com/llvm/llvm-project/commit/5cc2ae0b519065c39df124d46de1ba75d4b144eb
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
Log Message:
-----------
[libc++][test] Skip a `is_virtual_base_of` test for apple-clang-17 (#131438)
It seems that Apple Clang 17 starts to be used for CI, while it hasn't
supported `__builtin_is_virtual_base_of` yet. And thus we need to skip
the test for `is_virtual_base_of`.
Follows up #131302.
Commit: d781ac1cf0d561b79f6ff834d786c6a999429901
https://github.com/llvm/llvm-project/commit/d781ac1cf0d561b79f6ff834d786c6a999429901
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Basic/Builtins.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/__stdarg_va_arg.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/C/C23/n2975.c
M clang/test/CodeGen/varargs.c
A clang/test/Sema/c23-varargs.c
Log Message:
-----------
[C23] Add __builtin_c23_va_start (#131166)
This builtin is supported by GCC and is a way to improve diagnostic
behavior for va_start in C23 mode. C23 no longer requires a second
argument to the va_start macro in support of variadic functions with no
leading parameters. However, we still want to diagnose passing more than
two arguments, or diagnose when passing something other than the last
parameter in the variadic function.
This also updates the freestanding <stdarg.h> header to use the new
builtin, same as how GCC works.
Fixes #124031
Commit: 65e68a30787d7ce2bf5a9e695dd03944137c5287
https://github.com/llvm/llvm-project/commit/65e68a30787d7ce2bf5a9e695dd03944137c5287
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M lldb/include/lldb/DataFormatters/DumpValueObjectOptions.h
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/DataFormatters/DumpValueObjectOptions.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
A lldb/test/API/commands/dwim-print/objc/Makefile
A lldb/test/API/commands/dwim-print/objc/TestDWIMPrintObjC.py
A lldb/test/API/commands/dwim-print/objc/main.m
Log Message:
-----------
[lldb] Update dwim-print to show expanded objc instances (#117500)
When printing an ObjC object, which is a pointer, lldb has handled it
the same way it treats any other pointer – printing only class name and
pointer address. The object is not expanded, its children are not shown.
This change updates `dwim-print` to print objc pointers by expanding (ie
dereferencing), with the assumption that it's what the user wants.
Note that this is currently possible using the `--ptr-depth`/`-P` flag.
With this change, when `dwim-print` prints root level objc objects, it's
the same effect as using `--ptr-depth 1`.
Commit: f83726e6add0c0e3850333a57cbb24d5071eee24
https://github.com/llvm/llvm-project/commit/f83726e6add0c0e3850333a57cbb24d5071eee24
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
M compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/ContinuousSyncMode/online-merging-windows.c
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
M compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
M compiler-rt/test/profile/lit.cfg.py
Log Message:
-----------
[profile] Use fprofile-continuous in compiler-rt tests (#126617)
PR #124353 introduced the clang option `-fprofile-continuous` to enable
continuous mode. Use this option in all compiler-rt tests, where applicable.
Changes can be summarized as follows:
1) tests that use `-fprofile-instr-generate` (`%clang_profgen`), which
is an option that takes profile file name, are changed like so:
```
-// RUN: %clang_profgen_cont <SOME-OPTIONS> -o %t.exe %s
-// RUN: env LLVM_PROFILE_FILE="%c%t.profraw" %run %t.exe
+// RUN: %clang_profgen=%t.profraw -fprofile-continuous <SOME-OPTIONS> -o %t.exe %s
+// RUN: %run %t.exe
```
2) tests that use `-fprofile-generate` (`%clang_pgogen`), which is an
option that takes a profile directory, are on case-by-case basis. Where
the default name "default_%m.profraw" works, those tests were changed to
use `%clang_pgogen=<dir>`, and the rest (`set-filename.c` and
`get-filename.c`) continued to use the `LLVM_PROFILE_FILE` environment
variable .
3) `set-file-object.c` uses different filename for different run of the
same executable, so it continued to use the `LLVM_PROFILE_FILE`
environment variable.
4) `pid-substitution.c` add a clang_profgen variation.
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 4230858a52abcd165dc52edd194f18cef436cbf3
https://github.com/llvm/llvm-project/commit/4230858a52abcd165dc52edd194f18cef436cbf3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
Log Message:
-----------
[ARM] Avoid repeated map lookups (NFC) (#131420)
Commit: 03205121d264acd0661b57a14dcf323343daa3ad
https://github.com/llvm/llvm-project/commit/03205121d264acd0661b57a14dcf323343daa3ad
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#131421)
Commit: 6a1fd24e9ac0835944eb392a3627c5c636671525
https://github.com/llvm/llvm-project/commit/6a1fd24e9ac0835944eb392a3627c5c636671525
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131422)
Commit: d1700cdbf2740b65ccdeefe0fff4837977c8e6a6
https://github.com/llvm/llvm-project/commit/d1700cdbf2740b65ccdeefe0fff4837977c8e6a6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#131423)
Commit: 5bc8db884e3a8b9375196fce3add5b50f21cfda4
https://github.com/llvm/llvm-project/commit/5bc8db884e3a8b9375196fce3add5b50f21cfda4
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M libcxx/include/__utility/exception_guard.h
Log Message:
-----------
[libc++][NFC] fix exception_guard include guard name (#131370)
Commit: fc17114ac00d55b0e381d4e70e6f0bc2d0c5cc43
https://github.com/llvm/llvm-project/commit/fc17114ac00d55b0e381d4e70e6f0bc2d0c5cc43
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Remove now unused CollectDebugInfoForCloning (#129152)
Summary:
This function is no longer used, let's remove it from the header and
impl.
Test Plan:
ninja check-llvm-unit
Commit: 86ae25d2be59d57b3d215de03ee685c39e509c9f
https://github.com/llvm/llvm-project/commit/86ae25d2be59d57b3d215de03ee685c39e509c9f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[CodeGen][X86] Use Register in TTI unfoldMemoryOperand interface. NFC
Commit: 7af3d3929e8523cad144ea94551328ce103f9d68
https://github.com/llvm/llvm-project/commit/7af3d3929e8523cad144ea94551328ce103f9d68
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
A llvm/test/CodeGen/SystemZ/vec-reduce-cmp.ll
Log Message:
-----------
[SystemZ] Optimize vector comparison reductions
Generate efficient code using the condition code set by the
VECTOR (FP) COMPARE family of instructions to implement
vector comparison reductions, e.g. as resulting from
__builtin_reduce_and/or of some vector comparsion.
Fixes: https://github.com/llvm/llvm-project/issues/129434
Commit: cdc786498650c028c9c8ce23dfbff81bf2780d14
https://github.com/llvm/llvm-project/commit/cdc786498650c028c9c8ce23dfbff81bf2780d14
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/test/CodeGen/SystemZ/int-mul-16.ll
A llvm/test/CodeGen/SystemZ/vec-mul-07.ll
A llvm/test/CodeGen/SystemZ/vec-mul-08.ll
A llvm/test/CodeGen/SystemZ/vec-mul-09.ll
A llvm/test/CodeGen/SystemZ/vec-mul-10.ll
A llvm/test/CodeGen/SystemZ/vec-mul-11.ll
A llvm/test/CodeGen/SystemZ/vec-mul-12.ll
A llvm/test/CodeGen/SystemZ/vec-mul-13.ll
A llvm/test/CodeGen/SystemZ/vec-mul-14.ll
Log Message:
-----------
[SystemZ] Optimize widening and high-word vector multiplication
Detect (non-intrinsic) IR patterns corresponding to the semantics
of the various widening and high-word multiplication instructions.
Specifically, this is done by:
- Recognizing even/odd widening multiplication patterns in DAGCombine
- Recognizing widening multiply-and-add on top during ISel
- Implementing the standard MULHS/MUHLU IR opcodes
- Detecting high-word multiply-and-add (which common code does not)
Depending on architecture level, this can support all integer
vector types as well as the scalar i128 type.
Fixes: https://github.com/llvm/llvm-project/issues/129705
Commit: 4a4987be360ac7e4caad65bed54de4ed1d9342ed
https://github.com/llvm/llvm-project/commit/4a4987be360ac7e4caad65bed54de4ed1d9342ed
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
M llvm/test/CodeGen/SystemZ/vec-cmpsel.ll
M llvm/test/CodeGen/SystemZ/vec-move-23.ll
M llvm/test/CodeGen/SystemZ/vec-shift-07.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-01.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-02.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-03.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-04.ll
Log Message:
-----------
[SystemZ] Optimize vector zero/sign extensions
Generate more efficient code for zero or sign extensions where
the source is a subvector generated via SHUFFLE_VECTOR.
Specifically, recognize patterns corresponding to (series of)
VECTOR UNPACK instructions, or the VECTOR SIGN EXTEND TO
DOUBLEWORD instruction.
As a special case, also handle zero or sign extensions of a
vector element to i128.
Fixes: https://github.com/llvm/llvm-project/issues/129576
Fixes: https://github.com/llvm/llvm-project/issues/129899
Commit: 4155cc0fb3198b1aa4b8e6601980f418c0428cf7
https://github.com/llvm/llvm-project/commit/4155cc0fb3198b1aa4b8e6601980f418c0428cf7
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
A llvm/test/CodeGen/SystemZ/int-cmp-65.ll
A llvm/test/CodeGen/SystemZ/vec-cmp-10.ll
Log Message:
-----------
[SystemZ] Recognize carry/borrow computation
Generate code using the VECTOR ADD COMPUTE CARRY and
VECTOR SUBTRACT COMPUTE BORROW INDICATION instructions
to implement open-coded IR with those semantics.
Handles integer vector types as well as i128.
Fixes: https://github.com/llvm/llvm-project/issues/129608
Commit: f4ea1055ad574e0e17fe19662a8c8bcf17e64bfe
https://github.com/llvm/llvm-project/commit/f4ea1055ad574e0e17fe19662a8c8bcf17e64bfe
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/test/CodeGen/SystemZ/rot-03.ll
M llvm/test/CodeGen/SystemZ/shift-16.ll
A llvm/test/CodeGen/SystemZ/shift-17.ll
M llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
Log Message:
-----------
[SystemZ] Implement i128 funnel shifts
These can be handled via the VECTOR SHIFT LEFT/RIGHT DOUBLE
family of instructions, depending on architecture level.
Fixes: https://github.com/llvm/llvm-project/issues/129955
Commit: 911953a2e40845cc341f80dfb7689e7a375455b1
https://github.com/llvm/llvm-project/commit/911953a2e40845cc341f80dfb7689e7a375455b1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
Log Message:
-----------
[Sparc] Move fixELFSymbolsInTLSFixups to getRelocType
fixELFSymbolsInTLSFixups walks the expression tree, which is complex and
unnecessary. As the expression must be relocatable, we can move the code
to getRelocType and just set SymA. The behavior is similar to GNU
assembler.
__tls_get_addr registery (https://reviews.llvm.org/D43271) is unnecessary
now. SparcMCExpr::visitUsedExpr registers the symbol.
Commit: 6c2f8476e7e7c655071c5510955c3042d71b670c
https://github.com/llvm/llvm-project/commit/6c2f8476e7e7c655071c5510955c3042d71b670c
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Dialect Conversion: Add 1:N support to `remapInput` (#131454)
This commit adds 1:N support to `SignatureConversion::remapInputs`. This
API allows users to replace a block argument with multiple replacement
values. (And the block argument is dropped.) The API already supported
"bbarg --> multiple bbargs" mappings, but "bbarg --> multiple SSA
values" was missing.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: 8ff27bbd8449bbb8619b1539c5edd3be203d9d31
https://github.com/llvm/llvm-project/commit/8ff27bbd8449bbb8619b1539c5edd3be203d9d31
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove unneeded select in VPWidenPointerInductionRecipe (NFC).
Commit: a1a29c3cb32a3b3e01b5b29c8d1d9ddbcee908ed
https://github.com/llvm/llvm-project/commit/a1a29c3cb32a3b3e01b5b29c8d1d9ddbcee908ed
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
Log Message:
-----------
[Mips] Move fixELFSymbolsInTLSFixups to getRelocType
fixELFSymbolsInTLSFixups walks the expression tree, which is complex and
unnecessary. As the expression must be relocatable, we can move the code
to getRelocType and just set SymA. The behavior is similar to GNU
assembler.
Commit: 5ae8f25dcc89dcd0238a6e38e63bffe67eeaabb8
https://github.com/llvm/llvm-project/commit/5ae8f25dcc89dcd0238a6e38e63bffe67eeaabb8
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
Log Message:
-----------
[RISCV] Move fixELFSymbolsInTLSFixups to getRelocType
fixELFSymbolsInTLSFixups walks the expression tree, which is complex and
unnecessary. As the expression must be relocatable, we can move the code
to getRelocType and just set SymA. The behavior is similar to GNU
assembler.
Commit: 56b05a0d6ba6d6c3dd4fa6e8d520861331a79e3f
https://github.com/llvm/llvm-project/commit/56b05a0d6ba6d6c3dd4fa6e8d520861331a79e3f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Use VFxUF in VPWidenPointerInductionRecipe.
Use VFxUF VPValue instead of computing VF * UF explicitly.
Commit: 5f449b9a5dae35afc88c825a0703e348f47e5875
https://github.com/llvm/llvm-project/commit/5f449b9a5dae35afc88c825a0703e348f47e5875
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/test/MC/RISCV/hilo-constaddr-expr.s
Log Message:
-----------
[RISCV] Allow RISCVMCExpr folding in the absence of linker relaxaxation
In the AArch64 target, `bar: add x0, x0, :lo12:foo-bar; foo:`
can be folded.
Remove the restriction (https://reviews.llvm.org/D104473), which became
unnecessary after https://reviews.llvm.org/D155357
Commit: 37a57ca257c18ee7c3d8f4afae39aac7803e2bb7
https://github.com/llvm/llvm-project/commit/37a57ca257c18ee7c3d8f4afae39aac7803e2bb7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/FMF.h
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[FMF] Set all bits if needed when setting individual flags. (#131321)
Currently fast() won't return true if all flags are set via setXXX,
which is surprising. Update setters to set all bits if needed to make
sure isFast() consistently returns the expected result.
PR: https://github.com/llvm/llvm-project/pull/131321
Commit: 316811060775f3d6284b5bb21cf7ea727fc2254d
https://github.com/llvm/llvm-project/commit/316811060775f3d6284b5bb21cf7ea727fc2254d
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_mem_intrinsics.ll
A llvm/test/Instrumentation/AddressSanitizer/remove-memory-effects.ll
Log Message:
-----------
[AddressSanitizer] Remove memory effects from functions (#130495)
If left as-is, subsequent optimizations might utilize the possible
memory effects and optimize-out the instrumentation. Think of the
following case:
```
store i8 4, ptr %shadow
call void @llvm.lifetime.start.p0(i64 4, ptr %local)
%28 = call void @foo(ptr %local)
store i8 -8, ptr %shadow
call void @llvm.lifetime.end.p0(i64 4, ptr %local)
```
where `foo` is an external function with `memory(argmem: write)`. A pass
such as DeadStoreElimination is allowed to remove the initial store,
which might fail sanitizer checks within `foo`.
My first attempt was to add a `memory(readwrite)` at the call-site
level, but unfortunately the current implementation of
`getMemoryEffects` doesn't exactly give it "precedence" as specified,
but rather restricts the access specified by the call-site and not the
other way around as well.
Commit: fc6fd6a2f119c4d2666e0cb499c59068f39944e2
https://github.com/llvm/llvm-project/commit/fc6fd6a2f119c4d2666e0cb499c59068f39944e2
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Clean up comments in CloneFunctionInto (#129153)
Summary:
Some comments no longer make sense nor refer to an existing code path.
Test Plan:
ninja check-llvm-unit
Commit: 8560da28c69de481f3ad147722577e87b902facb
https://github.com/llvm/llvm-project/commit/8560da28c69de481f3ad147722577e87b902facb
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
Log Message:
-----------
[PowerPC] Simplify PPCMCExpr::evaluateAsRelocatableImpl
The signedness of the @l result is dependent on the instruction operand
(gas behavior).
E.g. in `addis 3,3,65535 at l`, 65535 at l is signed. Unfortunately
we don't have the information.
bfef1dd694d4c646f79521fa3258bbb2398a990c (2014) checked `Fixup`,
which was unnecessary and mislead https://reviews.llvm.org/D115419
to make the code more complex.
In PPCMCExpr::evaluateAsRelocatableImpl we don't need to validate the
result. Just continue and rely on the validation in ELFObjectWriter.
Commit: 7c26407a20b568ff13068e3ef9108f75e53e3247
https://github.com/llvm/llvm-project/commit/7c26407a20b568ff13068e3ef9108f75e53e3247
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Symbols.cpp
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
M lld/test/COFF/arm64x-altnames.s
M lld/test/COFF/arm64x-incl.s
M lld/test/COFF/arm64x-symtab.s
M lld/test/COFF/locally-imported-arm64x.s
Log Message:
-----------
[LLD][COFF] Clarify EC vs. native symbols in diagnostics on ARM64X (#130857)
On ARM64X, symbol names alone are ambiguous as they may refer to either
a native or an EC symbol. Append '(EC symbol)' or '(native symbol)' in
diagnostic messages to distinguish them.
Commit: 6616acd80cd91a0075e3cd481bb9a6d82fd4ea9e
https://github.com/llvm/llvm-project/commit/6616acd80cd91a0075e3cd481bb9a6d82fd4ea9e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M .github/workflows/docs.yml
M .github/workflows/pr-code-format.yml
Log Message:
-----------
[Github] Change to step-security fork of changed actions
The tj-actions/changed-files repo has been taken down to the security
incident
(https://www.stepsecurity.io/blog/harden-runner-detection-tj-actions-changed-files-action-is-compromised).
This patch moves these jobs over step-security's fork, which has been
loosely audited and has had the malicious commits removed. This is
mainly intended as a stop-gap to get these actions running again while
we figure out the best path forward.
Commit: aadfa9f6c8722d45154b4c7f5d9f91daf78ef9fa
https://github.com/llvm/llvm-project/commit/aadfa9f6c8722d45154b4c7f5d9f91daf78ef9fa
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-constant-ops.ll
A llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-gaps.ll
A llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Add additional tests for narrowing interleave groups.
Extend test coverage for https://github.com/llvm/llvm-project/pull/106441.
Commit: 9a1e39062b2ab445f1f4424ecdc5ffb46e8cb9e0
https://github.com/llvm/llvm-project/commit/9a1e39062b2ab445f1f4424ecdc5ffb46e8cb9e0
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/SemaCXX/ms-property.cpp
Log Message:
-----------
[Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450)
For an expression `nodiscard_function().static_member(), the nodiscard
warnings added by #120223, are not useful or actionable, and are
disruptive to some library implementations; we just remove them.
Fixes #131410
Commit: 79d84a878e83990c235da8710273a98bf835c915
https://github.com/llvm/llvm-project/commit/79d84a878e83990c235da8710273a98bf835c915
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/test/MC/Mips/hilo-addressing.s
Log Message:
-----------
MipsMCExpr: remove unneeded folding and fix a crash for %hi(und-$L3)
After folding the inner expression, we might get something like
%hi(0x30124), MipsAsmBackend::applyFixup will apply the relocation
operator, so we don't need to duplicate code in MipsMCExpr
(introduced by https://reviews.llvm.org/D19716).
While we don't know the encoding at parse time (see hilo-addressing.s),
it is not an issue.
This change also removes an inappropriate use of `Fixup`
(introduced in 2014 by 752b91bd821ad8a23e004b6cd631ae4f6984ae8b ; which
will go away with my next change).
In addition, fix a crash by porting the fix from RISCV.
```
lui $4, %hi(und-$L3)
```
Commit: 6a8d5f22ffc5113de9868e2b4227d699b14d0421
https://github.com/llvm/llvm-project/commit/6a8d5f22ffc5113de9868e2b4227d699b14d0421
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
Log Message:
-----------
[VPlan] Don't access canonical IV in VPWidenPointerInduction::execute.
This updates VPWidenPointerInductionRecipe::execute to not use the
canonical IV to determine the insert point. Instead, it relies on the
current recipe position. In cases where this is not sufficient, set the
insert point to the first non-phi instruction, to ensure phis are
created together.
Commit: 0bd8a75a0c8ce76fa36036d4de1979f777d44918
https://github.com/llvm/llvm-project/commit/0bd8a75a0c8ce76fa36036d4de1979f777d44918
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Fix formatting after 6a8d5f22f.
Commit: d6fbffa23c84e622735b3e880fd800985c1c0072
https://github.com/llvm/llvm-project/commit/d6fbffa23c84e622735b3e880fd800985c1c0072
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
Log Message:
-----------
[MC] evaluateAsRelocatable: remove the Fixup argument
Commit 752b91bd821ad8a23e004b6cd631ae4f6984ae8b added the argument for
PowerPC to evaluate @l/@ha as constant in 2014. However, this is not
needed and has been cleaned up by
commit 8560da28c69de481f3ad147722577e87b902facb.
Mips also had an inappropriate use, which has been fixed by
79d84a878e83990c235da8710273a98bf835c915
Commit: 5e65b40f9c0fd9fc9bc17c36dbd5ee1beec15d4f
https://github.com/llvm/llvm-project/commit/5e65b40f9c0fd9fc9bc17c36dbd5ee1beec15d4f
Author: David Rivera <davidriverg at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseDefaultMemberInitCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-default-member-init.cpp
Log Message:
-----------
[clang-tidy] detect explicit casting within modernize-use-default-member-init (#129408)
This aims to fix a portion of #122480. Added some matchers to detect
explicit casting which utilize builtin types as its source expression.
these are the various forms of casting supported I thought would useful
for this check:
- C Style explicit casting
- Static explicit casting
- Functional explicit casting
Commit: ff2ed154a8a9ea52adb3667833fe6fddd27b0487
https://github.com/llvm/llvm-project/commit/ff2ed154a8a9ea52adb3667833fe6fddd27b0487
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
Log Message:
-----------
[MC] evaluateAsAbsolute requires MCValue::RefKind==0
In `.equ a, 3; .if a at plt`, a at plt does not evaluate to an absolute value
(MCExpr::evaluateAsRelocatableImpl disables evaluation when the Kind !=
0 at parse time). Similarly, when using MCTargetValue,
evaluateAsAbsolute should return false when MCValue::RefKind==0.
This allows us to remove `if (!Asm)` check from MipsMCExpr.cpp
(%hi(0xdeadbeef) is not evaluated to a constant without RefKind) and
make targets less error-prone.
Commit: 7722d7519ca2679e105e2db68c889b3727938c8d
https://github.com/llvm/llvm-project/commit/7722d7519ca2679e105e2db68c889b3727938c8d
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUDelayedMCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.h
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/NVPTX/NVPTXMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCExpr.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
Log Message:
-----------
[MC] evaluateAsRelocatableImpl: remove the Fixup argument
Follow-up to d6fbffa23c84e622735b3e880fd800985c1c0072 . This commit
updates all call sites and removes the argument from the function.
Commit: 4286f4dccee9140eef3ef7d059619eaab73fc392
https://github.com/llvm/llvm-project/commit/4286f4dccee9140eef3ef7d059619eaab73fc392
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/docs/ReleaseNotes.rst
M lld/test/ELF/aarch64-feature-gcs.s
Log Message:
-----------
[AArch64][GCS][LLD] Introduce -zgcs-report-dynamic Command Line Option (#127787)
When GCS was introduced to LLD, the gcs-report option allowed for a user
to gain information relating to if their relocatable objects supported
the feature. For an executable or shared-library to support GCS, all
relocatable objects must declare that they support GCS.
The gcs-report checks were only done on relocatable object files,
however for a program to enable GCS, the executable and all shared
libraries that it loads must enable GCS. gcs-report-dynamic enables
checks to be performed on all shared objects loaded by LLD, and in cases
where GCS is not supported, a warning or error will be emitted.
It should be noted that only shared files directly passed to LLD are
checked for GCS support. Files that are noted in the `DT_NEEDED` tags
are assumed to have had their GCS support checked when they were
created.
The behaviour of the -zgcs-dynamic-report option matches that of GNU ld.
The behaviour is as follows unless the user explicitly sets the value:
* -zgcs-report=warning or -zgcs-report=error implies
-zgcs-report-dynamic=warning.
This approach avoids inheriting an error level if the user wishes to
continue building a module without rebuilding all the shared libraries.
The same approach was taken for the GNU ld linker, so behaviour is
identical across the toolchains.
This implementation matches the error message and command line interface
used within the GNU ld Linker. See here:
https://github.com/bminor/binutils-gdb/commit/724a8341f6491283cf90038260c83a454b7268ef
To support this option being introduced, two other changes are included
as part of this PR. The first converts the -zgcs-report option to
utilise an Enum, opposed to StringRef values. This enables easier
tracking of the value the user defines when inheriting the value for the
gas-report-dynamic option. The second is to parse the Dynamic Objects
program headers to locate the GNU Attribute flag that shows GCS is
supported. This is needed so, when using the gcs-report-dynamic option,
LLD can correctly determine if a dynamic object supports GCS.
---------
Co-authored-by: Fangrui Song <i at maskray.me>
Commit: 2091547d4cc9ad59ca0c9f80193921d9a39f691a
https://github.com/llvm/llvm-project/commit/2091547d4cc9ad59ca0c9f80193921d9a39f691a
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/test/CodeGen/PowerPC/global-merge-aix-sections.ll
Log Message:
-----------
[PPC codegen test] NFC: Fix RUN line; fix DATA checks to match 64-bit
Commit: e30a5d657034c1cf7081be4601a39888c0c1f2a6
https://github.com/llvm/llvm-project/commit/e30a5d657034c1cf7081be4601a39888c0c1f2a6
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Simplify string a bit (#127135)
This PR refactors `basic_string` a bit to simplify its implementation in
the following ways:
- Instead of manually checking whether a string is short or long,
followed by calling the specific functions (e.g., `__get_short_size()`,
`__get_long_size()`), we call the general functions (`size()`) to hide
the conditional checks and make the code more concise.
- Once a string is determined to be short or long, we directly call the
specific functions instead of the general versions to get rid of
unnecessary internal conditional checks. For example, for a long string,
we would directly call `{__set, __get}_long_pointer` instead of `{__set,
__get}_pointer()`.
- Variables that are defined in both the `if` and `else` branches are
now declared in a common scope to reduce redundancy.
- When the string size is calculated multiple times using
`traits_type::length(__s)`, a variable is introduced to store its
length. While modern compilers can optimize this with constant folding,
explicitly storing the length improves code readability and makes the
logic clearer.
- Fixed synopsis with missing default arguments.
Commit: f7cab64684bc150da96d62d66c1d9ecaba9c747b
https://github.com/llvm/llvm-project/commit/f7cab64684bc150da96d62d66c1d9ecaba9c747b
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.assert.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.pass.cpp
Log Message:
-----------
[libc++][numeric][NFC] Cleanup *Saturation arithmetic* tests (#101826)
This simplifies the tests a little bit:
Fixed -> TODO(LLVM20): remove [[maybe_unused]] and `{}` scope since all
supported compilers support "Placeholder variables with no name"
*IMPORTANT: Requires Apple Clang with [P2169R4: A nice placeholder with
no name](https://wg21.link/P2169R4)*
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: f5f8f3c64929131664a4dcac04d055488a0a0466
https://github.com/llvm/llvm-project/commit/f5f8f3c64929131664a4dcac04d055488a0a0466
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
Log Message:
-----------
[GSYM] Update gSym unit test with stable / portable path (#131204)
This patch adds `-fdebug-compilation-dir=.` to the clang invocation in
`llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml`
and updates the rest of the test accordingly.
Previously, without the newly added argument, the test would
significantly change every time it was regenerated due to the generation
script using a temporary directory as the compilation directory. See
discussion in https://github.com/llvm/llvm-project/pull/129562 for
additional context.
This patch ensures determinism across test update runs - if the test
hasn't been updated and we try to regenerate the contents, nothing will
change.
Commit: d0177670a0e59e9d9719386f85bb78de0929407c
https://github.com/llvm/llvm-project/commit/d0177670a0e59e9d9719386f85bb78de0929407c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/SCCIterator.h
Log Message:
-----------
[ADT] Avoid repeated hash lookups (NFC) (#131418)
Commit: 508db53d1af5b01f8f8275229f087bb6407f0033
https://github.com/llvm/llvm-project/commit/508db53d1af5b01f8f8275229f087bb6407f0033
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#131493)
Commit: 0689d23ab3089eb9920b8f5caa92e423fe3475f8
https://github.com/llvm/llvm-project/commit/0689d23ab3089eb9920b8f5caa92e423fe3475f8
Author: Michael Park <mcypark at gmail.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Modules/pr121245.cpp
A clang/test/Modules/pr129982.cpp
Log Message:
-----------
[C++20][Modules] Prevent premature calls to PassInterestingDeclsToConsumer() within FinishedDeserializing(). (#129982)
`ASTReader::FinishedDeserializing` uses `NumCurrentElementsDeserializing` to keep track of nested `Deserializing` RAII actions. The `FinishedDeserializing` only performs actions if it is the top-level `Deserializing` layer. This works fine in general, but there is a problematic edge case.
If a call to `redecls()` in `FinishedDeserializing` performs deserialization, we re-enter `FinishedDeserializing` while in the middle of the previous `FinishedDeserializing` call.
The known problematic part of this is that this inner `FinishedDeserializing` can go all the way to `PassInterestingDeclsToConsumer`, which operates on `PotentiallyInterestingDecls` data structure which contain decls that should be handled by the previous `FinishedDeserializing` stage.
The other shared data structures are also somewhat concerning at a high-level in that the inner `FinishedDeserializing` would be handling pending actions that are not "within its scope", but this part is not known to be problematic.
We already have a guard within `PassInterestingDeclsToConsumer` because we can end up with recursive deserialization within `PassInterestingDeclsToConsumer`. The implemented solution is to apply this guard to the portion of `FinishedDeserializing` that performs further deserialization as well. This ensures that recursive deserialization does not trigger `PassInterestingDeclsToConsumer` which may operate on entries that are not ready to be passed.
Commit: 3fe914c9faa8367ec72f44e8953de1d1ea63e011
https://github.com/llvm/llvm-project/commit/3fe914c9faa8367ec72f44e8953de1d1ea63e011
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86VZeroUpper.cpp
Log Message:
-----------
[X86] Use Register and MCRegister. NFC
Commit: 1e02442df6cfdcc70123a9087173ca84c518d0a1
https://github.com/llvm/llvm-project/commit/1e02442df6cfdcc70123a9087173ca84c518d0a1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M llvm/docs/CIBestPractices.rst
Log Message:
-----------
[Github][Docs] Add best practice for top level read permissions (#131470)
This patch adds a section pointing out how permissions should be done
within Github workflows. I believe all of our workflows are currently
compliant with this, but it helps to have something to point to
documenting the practice and especially the motivation.
Commit: f4043f451d0e8c30c8a9826ce87a6e76f3ace468
https://github.com/llvm/llvm-project/commit/f4043f451d0e8c30c8a9826ce87a6e76f3ace468
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-15 (Sat, 15 Mar 2025)
Changed paths:
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
Log Message:
-----------
Skip more WebKit checker tests on targets where builtin is not supported. (#131501)
Commit: de03e102d1ea4da1c62b9ad735848d8869d08b44
https://github.com/llvm/llvm-project/commit/de03e102d1ea4da1c62b9ad735848d8869d08b44
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/RawBufferLoad.ll
M llvm/test/CodeGen/DirectX/cross.ll
Log Message:
-----------
[DirectX] Change placeholders from `undef` to `poison` used in fully instantiated vector [NFC] (#130970)
Commit: 3fac23505ffdb3b7ff7a61fc8beca2aabc2cb6c8
https://github.com/llvm/llvm-project/commit/3fac23505ffdb3b7ff7a61fc8beca2aabc2cb6c8
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
R llvm/test/CodeGen/AArch64/arm64-vclz.ll
R llvm/test/CodeGen/AArch64/arm64-vpopcnt.ll
A llvm/test/CodeGen/AArch64/ctlz.ll
A llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/cttz.ll
R llvm/test/CodeGen/AArch64/vec_cttz.ll
Log Message:
-----------
[AArch64][GlobalISel] Add cttz, ctlz and ctpop test coverage. NFC
Commit: 90e6ba606f7a0a8c9b7b3881a7a8df2cf4cfeb70
https://github.com/llvm/llvm-project/commit/90e6ba606f7a0a8c9b7b3881a7a8df2cf4cfeb70
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] Remove min/max v2s64 clamp
We can now lower the icmp, allowing us to remove the FIXME.
Commit: 926d980017d82dedb9eb50147a82fdfb01659f16
https://github.com/llvm/llvm-project/commit/926d980017d82dedb9eb50147a82fdfb01659f16
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Log Message:
-----------
[AArch64][GlobalISel] Some minor reordering of types for consistency. NFC
Commit: dc9a183ac6aa2d087ceac56970255b06c4772ca3
https://github.com/llvm/llvm-project/commit/dc9a183ac6aa2d087ceac56970255b06c4772ca3
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Move DebugInfoFinder decl closer to its place of usage (#129154)
Summary:
This makes it clear that DIFinder is only really necessary for llvm.dbg.cu update.
Test Plan:
ninja check-llvm-unit
Commit: 4e9894498e166ef6b207c25e780db0b6f006cc89
https://github.com/llvm/llvm-project/commit/4e9894498e166ef6b207c25e780db0b6f006cc89
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
Log Message:
-----------
[VPlan] Truncate VFxUF if needed in VPWidenPointerInduction::execute.
Create truncate if needed after 56b05a0d6. Note that this preserves the
original behavior pre 56b05a0d6. If truncate would strip any set bits,
then the explicit computation in the narrower type would wrap.
Commit: d928a671b84afb9c2ad64353694537a198f04651
https://github.com/llvm/llvm-project/commit/d928a671b84afb9c2ad64353694537a198f04651
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][Vector] Refactor VectorEmulateNarrowType.cpp (#123529)
This is PR refactors `alignedConversionPrecondition` from
VectorEmulateNarrowType.cpp and adds new helper hooks.
**Update `alignedConversionPrecondition` (1)**
This method doesn't require the vector type for the "container" argument. The
underlying element type is sufficient. The corresponding argument has been
renamed as `containerTy` - this is meant as the multi-byte container element
type (`i8`, `i16`, `i32`, etc). With this change, the updated invocations of
`alignedConversionPrecondition` (in e.g. `RewriteAlignedSubByteIntExt`) make it
clear that the container element type is assumed to be `i8`.
**Update alignedConversionPrecondition (2):**
The final check in `alignedConversionPrecondition` has been replaced with a new
helper method, `isSubByteVecFittable`. This helper hook is now also re-used in
`ConvertVectorTransferRead` (to improve code re-use).
**Other updates**
Extended + unified comments.
**Implements**: https://github.com/llvm/llvm-project/issues/123630
Commit: 215c0d2b651dc757378209a3edaff1a130338dd8
https://github.com/llvm/llvm-project/commit/215c0d2b651dc757378209a3edaff1a130338dd8
Author: David Green <david.green at arm.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Log Message:
-----------
[AArch64][GlobalISel] Reorder getActionDefinitionsBuilders. NFC
These had grown fairly organically and the order wasn't very clear. I've tried
to move some similar nodes closer to one another.
Commit: 616d1046c3e2d7e5167ba2e6fc0c5fe06cf0a503
https://github.com/llvm/llvm-project/commit/616d1046c3e2d7e5167ba2e6fc0c5fe06cf0a503
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] fix ioctl interception for musl. (#131464)
Commit: 9829d457ae197cf8ef3ed34392b18f481f57d760
https://github.com/llvm/llvm-project/commit/9829d457ae197cf8ef3ed34392b18f481f57d760
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M libcxx/test/libcxx/system_reserved_names.gen.py
Log Message:
-----------
[libc++][test] Adds a test for a reserved name. (#131363)
This was discovered when using this name in #130500.
Commit: 8705e489dc17eb7124aca5070201d2dd234f97c1
https://github.com/llvm/llvm-project/commit/8705e489dc17eb7124aca5070201d2dd234f97c1
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
Log Message:
-----------
[lldb] Remove use of comma operator (NFC) (#131233)
No reason for the comma operator, make this more conventional with two statements.
Commit: e2438ce9400243ce9367d74151e00d4772797ec4
https://github.com/llvm/llvm-project/commit/e2438ce9400243ce9367d74151e00d4772797ec4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
Log Message:
-----------
[BPF] Avoid repeated map lookups (NFC) (#131494)
Commit: 48ecec20a2048689e53007ce4b929a7d6a9a3b17
https://github.com/llvm/llvm-project/commit/48ecec20a2048689e53007ce4b929a7d6a9a3b17
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
Log Message:
-----------
[Hexagon] Avoid repeated hash lookups (NFC) (#131496)
Commit: 1bc2108c49f413052cee798906c9d57dc18e1a1e
https://github.com/llvm/llvm-project/commit/1bc2108c49f413052cee798906c9d57dc18e1a1e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131497)
Commit: 93ce345504519ec383a19716f2d45bac93db8207
https://github.com/llvm/llvm-project/commit/93ce345504519ec383a19716f2d45bac93db8207
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#131498)
Commit: 7c98cddc5add28834330a7a8fc3c9468b7d6fca3
https://github.com/llvm/llvm-project/commit/7c98cddc5add28834330a7a8fc3c9468b7d6fca3
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M mlir/include/mlir-c/AffineExpr.h
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/CAPI/IR/AffineExpr.cpp
M mlir/test/python/ir/affine_expr.py
Log Message:
-----------
[mlir] Expose `AffineExpr.shift_dims/shift_symbols` through C and Python bindings (#131521)
Commit: 4e841d7d63cd6056c7fc0e5c5dc23022d7694cd7
https://github.com/llvm/llvm-project/commit/4e841d7d63cd6056c7fc0e5c5dc23022d7694cd7
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M libc/docs/getting_started.rst
M libc/docs/index.rst
A libc/docs/uefi/building.rst
A libc/docs/uefi/index.rst
A libc/docs/uefi/support.rst
A libc/docs/uefi/testing.rst
A libc/docs/uefi/using.rst
Log Message:
-----------
[libc] add uefi docs (#131426)
Adds documentation for the UEFI target since #131246 was merged.
Commit: b6485765284a40297c667386e7ac662045195366
https://github.com/llvm/llvm-project/commit/b6485765284a40297c667386e7ac662045195366
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineDebugify.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131495)
Commit: ee29e16135a9a775fa7eb9f434d1c62bb9bcfbfd
https://github.com/llvm/llvm-project/commit/ee29e16135a9a775fa7eb9f434d1c62bb9bcfbfd
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
R llvm/test/Transforms/LoopVectorize/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Reorganize tests for narrowing interleave group transform.
Make test target-dependent, as they will require access to a concrete
vector register width. Also add new tests for cost modeling, unrolling
and removing the vector loop region.
Commit: 40b703421377fbc0f72a7f028d1d56a057d8448e
https://github.com/llvm/llvm-project/commit/40b703421377fbc0f72a7f028d1d56a057d8448e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
Log Message:
-----------
[LV] Add tests for vector backedge elimination with early-exit loops.
Commit: 3e6f618e86f5fbad2c2d5802416ec3d3366a2837
https://github.com/llvm/llvm-project/commit/3e6f618e86f5fbad2c2d5802416ec3d3366a2837
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[llvm][ADT] Add `getSingleElement` helper (#131508)
This commit adds a new helper function: `getSingleElement`
This function asserts that the container has a single element and then
returns that element. This helper function is useful during 1:N dialect
conversions in MLIR, where certain `ValueRange`s (returned from the
adaptor) are known to have a single value.
Commit: 950bc6cd77455b1ec1679cf9f125055e2de1910f
https://github.com/llvm/llvm-project/commit/950bc6cd77455b1ec1679cf9f125055e2de1910f
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFuse] Change placeholder from `undef` to `poison` (#131535)
Use `poison` instead of `undef` as a placeholder for phi entries of
unreachable predecessors.
Commit: 91328dbae986dfa93cf2acef0a93361fd5ced66d
https://github.com/llvm/llvm-project/commit/91328dbae986dfa93cf2acef0a93361fd5ced66d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate user-defined conversion functions (#131434)
Also fix/delete existing invalid/redundant test cases.
Fix #130894
Commit: 81ba006296680c9d62aba12c5e3f083e2f7c595d
https://github.com/llvm/llvm-project/commit/81ba006296680c9d62aba12c5e3f083e2f7c595d
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/nocf_check.ll
Log Message:
-----------
[X86] nocf_check: disable tail call
When a function pointer is annotated with
`void (*fptr)(void) __attribute__((nocf_check));`, calling it should use
the NOTRACK prefix, as the callee may not contain an ENDBR.
https://reviews.llvm.org/D41879 implemented NOTRACK variants for
X86ISD::CALL and ISD::BRIND but not for TCRETURN. Given that there are
so many tail call variants (e.g. conditional tailcall
https://reviews.llvm.org/D29856), let's just disable tailcall.
While nocf_check has some uses within the Linux kernel, it isn't a
popular attribute.
Fix #91228
Pull Request: https://github.com/llvm/llvm-project/pull/131487
Commit: 2dc123b33d51fcccb9e1af7230bc6573f77b3ccc
https://github.com/llvm/llvm-project/commit/2dc123b33d51fcccb9e1af7230bc6573f77b3ccc
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/SemaOpenCL/invalid-kernel-attrs.cl
Log Message:
-----------
[clang][opencl] Allow passing all zeros to reqd_work_group_size (#131543)
Allow passing all zeros to reqd_work_group_size.
Test plan: ninja check-all
Commit: 125c4db7301875cae928406043f02ed5b1133195
https://github.com/llvm/llvm-project/commit/125c4db7301875cae928406043f02ed5b1133195
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
Log Message:
-----------
[lldb][lldb-dap] setVariable request should send the correct response (#130773)
The display value was incorrectly sent as "result" instead of "value".
Commit: 2e78abe788c55721033d38a408d8f34af20bc8cc
https://github.com/llvm/llvm-project/commit/2e78abe788c55721033d38a408d8f34af20bc8cc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
Log Message:
-----------
[MSP430] Delete unneeded fixupNeedsRelaxationAdvanced
Commit: 4b86a7f3860a3cb0368e308494f65c103c02fa18
https://github.com/llvm/llvm-project/commit/4b86a7f3860a3cb0368e308494f65c103c02fa18
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Update the minimum python version requirement
See https://llvm.org/docs/GettingStarted.html#software
Fix #131456
Commit: 4fde8c341f9166e6ec6dff6e7704be175e382f5b
https://github.com/llvm/llvm-project/commit/4fde8c341f9166e6ec6dff6e7704be175e382f5b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/CUDA/cuda-shared.cuf
Log Message:
-----------
[flang][cuda] Lower CUDA shared variable with cuf.shared_memory op (#131399)
Use `cuf.shared_memory` operation instead of `cuf.alloc` for CUDA shared
variable. These variables do not need free operations.
Commit: e24e523150c2a4e7597dae9919da0378ee3d4255
https://github.com/llvm/llvm-project/commit/e24e523150c2a4e7597dae9919da0378ee3d4255
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
Log Message:
-----------
[LoopVectorize] Add test for follow-up metadata for loops (NFC) (#131337)
When pragma of loop transformations are encoded in LLVM IR, follow-up
metadata is used if multiple transformations are specified. They are
used to explicitly express the order of the transformations. However,
they are not properly processed on each transformation pass, so now only
the first one is attempted to be applied. This is a pre-commit to add a
test that causes the problem.
ref:
https://github.com/llvm/llvm-project/pull/127474#issuecomment-2717790398
Commit: 752aa81c4ff754945c695ac771577c1370564411
https://github.com/llvm/llvm-project/commit/752aa81c4ff754945c695ac771577c1370564411
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaRISCV.cpp
Log Message:
-----------
[clang][RISCV] Rename variable name in SemaRISCV. NFC (#131261)
Commit: 2a2d6d61b178f0d8d542333155510896c7bc75b5
https://github.com/llvm/llvm-project/commit/2a2d6d61b178f0d8d542333155510896c7bc75b5
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
Log Message:
-----------
[RISCV] Remove unused check prefixes from half arith strict test. NFC
Commit: 687c9d359ee124acecbdcdd699aefa77ccd6d16a
https://github.com/llvm/llvm-project/commit/687c9d359ee124acecbdcdd699aefa77ccd6d16a
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/FEntryInserter.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/Passes/PassBuilder.cpp
A llvm/test/CodeGen/X86/fentry.mir
Log Message:
-----------
[CodeGen][NPM] Port FEntryInserter to NPM (#129857)
Commit: de60c0e034f90b634235ce01fc19da9afd8b699c
https://github.com/llvm/llvm-project/commit/de60c0e034f90b634235ce01fc19da9afd8b699c
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
[MC] .reloc: move FirstLiteralRelocationKind check to evaluateFixup
Target shouldForceRelocation checks `FirstLiteralRelocationKind` to
determine whether a relocation is forced due to the .reloc directive. We
should move the code to evaluateFixup so that many targets don't need to
override shouldForceRelocation.
Commit: baab447aadd59b34bd838584b16d11475329853f
https://github.com/llvm/llvm-project/commit/baab447aadd59b34bd838584b16d11475329853f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/tools/llc/new-pm/option-conflict.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Report error in lieu of warning for invalid cl option (#128846)
Commit: c5a491e9ea22014b65664b6e09134b4f055933e2
https://github.com/llvm/llvm-project/commit/c5a491e9ea22014b65664b6e09134b4f055933e2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
A llvm/test/Transforms/LoopUnroll/pr131465.ll
Log Message:
-----------
[SCEV] Check whether the start is non-zero in `ScalarEvolution::howFarToZero` (#131522)
https://github.com/llvm/llvm-project/pull/94525 assumes that the loop
will be infinite when the stride is zero. However, it doesn't hold when
the start value of addrec is also zero.
Closes https://github.com/llvm/llvm-project/issues/131465.
Commit: e0fee65b87872c434ab7a60fe237573d5ce88ca9
https://github.com/llvm/llvm-project/commit/e0fee65b87872c434ab7a60fe237573d5ce88ca9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
Log Message:
-----------
[PowerPC] Use Register in FastISel. NFC
Commit: b09b9ac1081d19c8021df8e55e96cd1325f0eed0
https://github.com/llvm/llvm-project/commit/b09b9ac1081d19c8021df8e55e96cd1325f0eed0
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue128714.mir
Log Message:
-----------
[llvm][CodeGen] Fix the empty interval issue in Window Scheduler (#129204)
The interval of newly generated reg in ModuloScheduleExpander is empty.
This will cause crash at some corner case. This patch recalculate the
live intervals of these regs.
Commit: 8a1b4d0ed2bb5cf29714cef33604b53f42ae8273
https://github.com/llvm/llvm-project/commit/8a1b4d0ed2bb5cf29714cef33604b53f42ae8273
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
Log Message:
-----------
[MC] Rework AVR #121498 to not add extra argument to shouldForceRelocation
This removes the extra argument from commit 814b34f31e163e76b816194004689985f5b9fd7b.
Also remove unneeded `>= FirstLiteralRelocationKind`.
Commit: f75d75b8899aa44cfb2cd4e94fb43fa561f0f285
https://github.com/llvm/llvm-project/commit/f75d75b8899aa44cfb2cd4e94fb43fa561f0f285
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
Log Message:
-----------
AMDGPU: Use MFPropsModifier modifier in SIFoldOperands (#127752)
This doesn't appear to work. I do not get an error in the new PM.
---------
Co-authored-by: Akshat Oke <Akshat.Oke at amd.com>
Commit: f402953339fa5b1c206cb5d6ac3d9b15b1e81509
https://github.com/llvm/llvm-project/commit/f402953339fa5b1c206cb5d6ac3d9b15b1e81509
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
Log Message:
-----------
[ORC] Fix code example in comment: SPS function sigs are function types. NFCI.
Commit: 6c867e27a7b597910571677abdef77b703a5a601
https://github.com/llvm/llvm-project/commit/6c867e27a7b597910571677abdef77b703a5a601
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Shape/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/test/lib/Analysis/TestCFGLoopInfo.cpp
Log Message:
-----------
[mlir] Use `getSingleElement`/`hasSingleElement` in various places (#131460)
This is a code cleanup. Update a few places in MLIR that should use
`hasSingleElement`/`getSingleElement`.
Note: `hasSingleElement` is faster than `.getSize() == 1` when it is
used with linked lists etc.
Depends on #131508.
Commit: 009d36222cfdb59f49597e01d157ca4f65ac9295
https://github.com/llvm/llvm-project/commit/009d36222cfdb59f49597e01d157ca4f65ac9295
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
A clang/test/CodeCompletion/if-const.cpp
Log Message:
-----------
[clang][CodeComplete] Add code completion for if constexpr and consteval (#124315)
Code complete `constexpr` and `consteval` keywords after `if` in the
relevant language modes. If pattern completion is enabled, the
completions also include placeholders for the condition (in the case
of `constexpr`) and statement block.
Commit: 2c35cb6f16b21d984b298e2ddf445d20f194e142
https://github.com/llvm/llvm-project/commit/2c35cb6f16b21d984b298e2ddf445d20f194e142
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
Log Message:
-----------
[MC] Remove unneeded getNumFixupKinds
Commit: 05607a3f39f97449e75358159ce8526e5d734615
https://github.com/llvm/llvm-project/commit/05607a3f39f97449e75358159ce8526e5d734615
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#131551)
Commit: 78408fddccf34b7d79eb655fa2cb4dfacdfb8ae3
https://github.com/llvm/llvm-project/commit/78408fddccf34b7d79eb655fa2cb4dfacdfb8ae3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-16 (Sun, 16 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
Log Message:
-----------
[ExecutionEngine] Avoid repeated map lookups (NFC) (#131552)
Commit: 7eb8b731784722669106267764c74997e9a63cbe
https://github.com/llvm/llvm-project/commit/7eb8b731784722669106267764c74997e9a63cbe
Author: sharang.12492 <sharang.12492 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/test_taskloop_lastprivate_semantic_restrictions.f90
A flang/test/Semantics/OpenMP/test_taskloop_reduction_semantic_restrictions.f90
Log Message:
-----------
[Flang][OpenMP][taskloop] Adding missing semantic checks in Taskloop (#128431)
Below semantic checks for Taskloop clause mentioned in OpenMP [5.2]
specification were missing, this patch contains the semantic checks,
corresponding error messages and test cases:
OpenMP standard [5.2]:
[12.6] Taskloop Construct
[Restrictions]
Restrictions to the taskloop construct are as follows:
• The reduction-modifier must be default.
• The conditional lastprivate-modifier must not be specified.
Authored-by: shkaushi <sharang.kaushik at amd.com>
Commit: 3b1e18c2dba850922bc259a258e65490058e523d
https://github.com/llvm/llvm-project/commit/3b1e18c2dba850922bc259a258e65490058e523d
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/capturing-this-in-member-variable.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/capturing-this-in-member-variable.cpp
Log Message:
-----------
[clang-tidy] Add new check bugprone-capture-this-by-field (#130297)
Finds lambda captures that capture the ``this`` pointer and store it as
class
members without handle the copy and move constructors and the
assignments.
Capture this in a lambda and store it as a class member is dangerous
because the
lambda can outlive the object it captures. Especially when the object is
copied
or moved, the captured ``this`` pointer will be implicitly propagated to
the
new object. Most of the time, people will believe that the captured
``this``
pointer points to the new object, which will lead to bugs.
Fixes: #120863
---------
Co-authored-by: Baranov Victor <70346889+vbvictor at users.noreply.github.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: c3f6d2c024968d21157aa0a523ef1f1e61a07441
https://github.com/llvm/llvm-project/commit/c3f6d2c024968d21157aa0a523ef1f1e61a07441
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 3b1e18c2dba8
Commit: 57e36419b251f7e5a86566c86b4d61fbd605db5c
https://github.com/llvm/llvm-project/commit/57e36419b251f7e5a86566c86b4d61fbd605db5c
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/docs/analyzer/developer-docs.rst
A clang/docs/analyzer/developer-docs/Statistics.rst
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
A clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/WorkList.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/Analysis/analyzer-config.c
A clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
A clang/test/Analysis/csv2json.py
M clang/test/lit.cfg.py
Log Message:
-----------
[analyzer] Introduce per-entry-point statistics (#131175)
So far CSA was relying on the LLVM Statistic package that allowed us to
gather some data about analysis of an entire translation unit. However,
the translation unit consists of a collection of loosely related entry
points. Aggregating data across multiple such entry points is often
counter productive.
This change introduces a new lightweight always-on facility to collect
Boolean or numerical statistics for each entry point and dump them in a
CSV format. Such format makes it easy to aggregate data across multiple
translation units and analyze it with common data-processing tools.
We break down the existing statistics that were collected on the per-TU
basis into values per entry point.
Additionally, we enable the statistics unconditionally (STATISTIC ->
ALWAYS_ENABLED_STATISTIC) to facilitate their use (you can gather the
data with a simple run-time flag rather than having to recompile the
analyzer). These statistics are very light and add virtually no
overhead.
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
CPP-6160
Commit: 9b1ce477af5603e665258362fb8b9fe4091efbde
https://github.com/llvm/llvm-project/commit/9b1ce477af5603e665258362fb8b9fe4091efbde
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
Log Message:
-----------
[gn build] Port 57e36419b251
Commit: ccfabe8380572d99a6833bfff09a62018aca1a15
https://github.com/llvm/llvm-project/commit/ccfabe8380572d99a6833bfff09a62018aca1a15
Author: Julian Ruess <julianonline+github at posteo.de>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy-diff] Add an option to treat warnings as errors (#128221)
This patch allows to treat warnings as erros using clang-tidy-diff.
Co-authored-by: Piotr Zegar <me at piotrzegar.pl>
Commit: 3af6c9fa832ac29125cad76acb397d6235c371e9
https://github.com/llvm/llvm-project/commit/3af6c9fa832ac29125cad76acb397d6235c371e9
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/Transport.cpp
Log Message:
-----------
[lldb][lldb-dap][NFC] Fix swapped logging directions for DAP messages. (#131544)
The logging markers for incoming ("<--") and outgoing ("-->") messages
were incorrectly reversed. from #7790d69
Commit: 6b47bba44087caa7d4805bdb3229153a3bfba7a5
https://github.com/llvm/llvm-project/commit/6b47bba44087caa7d4805bdb3229153a3bfba7a5
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds_alias.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
Log Message:
-----------
[AMDGPU] Add intrinsics and MIs for ds_bvh_stack_* (#130007)
New intrinsics / instructions :
int_amdgcn_ds_bvh_stack_push4_pop1_rtn / ds_bvh_stack_push4_pop1_rtn_b32
int_amdgcn_ds_bvh_stack_push8_pop1_rtn / ds_bvh_stack_push8_pop1_rtn_b32
int_amdgcn_ds_bvh_stack_push8_pop2_rtn / ds_bvh_stack_push8_pop2_rtn_b64
Co-authored-by: Mateja Marjanovic <mateja.marjanovic at amd.com>
Commit: fd41f1b0ce1e7d4eb2d51da82418b3e41dbb59ba
https://github.com/llvm/llvm-project/commit/fd41f1b0ce1e7d4eb2d51da82418b3e41dbb59ba
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
A clang/test/Analysis/fixed-address-notes.c
Log Message:
-----------
[clang][analyzer] Add BugReporterVisitor messages for non-null fixed pointer (#129557)
Commit: a10e1e0135970861d3fd2f742e3628fe94e00af4
https://github.com/llvm/llvm-project/commit/a10e1e0135970861d3fd2f742e3628fe94e00af4
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
Log Message:
-----------
[RISCV] Remove unused check prefixes from double maximum/minimum test. NFC
Commit: d9110858ee938db424887cd3435488525dd632cb
https://github.com/llvm/llvm-project/commit/d9110858ee938db424887cd3435488525dd632cb
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaAccess.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
Log Message:
-----------
[Clang] Fix an incorrect assumption on getTemplatedDecl() (#131559)
Since a68d20e98, we've been calling HandleDelayedAccessCheck() for
concept declarations when the declaration contains invalid member
accesses.
However, a concept declaration is TemplateDecl such that doesn't contain
any TemplatedDecl.
Fixes https://github.com/llvm/llvm-project/issues/131530
Commit: 8cc6c2e80fb007f0e0e2ee65bca070c0f7fb7010
https://github.com/llvm/llvm-project/commit/8cc6c2e80fb007f0e0e2ee65bca070c0f7fb7010
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
Log Message:
-----------
AMDGPU: Migrate more tests away from undef (#131314)
andorbitset.ll is interesting since it directly depends on the
difference between poison and undef. Not sure it's useful to keep
the version using poison, I assume none of this code makes it to
codegen.
si-spill-cf.ll was also a nasty case, which I doubt has been reproducing
its original issue for a very long time. I had to reclaim an older version,
replace some of the poison uses, and run simplify-cfg. There's a very
slight change in the final CFG with this, but final the output is approximately
the same as it used to be.
Commit: 4f2ee07454b0d0b156a728ca540f584310ef4a62
https://github.com/llvm/llvm-project/commit/4f2ee07454b0d0b156a728ca540f584310ef4a62
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/AArch64/test-indirect-branch.s
Log Message:
-----------
[BOLT][AArch64] Do not crash on authenticated branch instructions (#129898)
When an indirect branch instruction is decoded, analyzeIndirectBranch
method is asked if this is a well-known code pattern. On AArch64, the
only special pattern which is detected is Jump Table, emitted as a
branch to the sum of a constant base address and a variable offset.
Therefore, `Inst.getOpcode()` being one of `AArch64::BRA*` means Inst
cannot belong to such Jump Table pattern, thus returning early.
Commit: ee8a804cbab56fdc00dea43091e2cfabd01a3b9f
https://github.com/llvm/llvm-project/commit/ee8a804cbab56fdc00dea43091e2cfabd01a3b9f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
Log Message:
-----------
AMDGPU: Switch test to generated checks (#131315)
I doubt this is testing what it originally intended anymore. Also
replace an undef.
Commit: a6ae965cec96ac3a79b908afa9e2cd1ed5f3d5e1
https://github.com/llvm/llvm-project/commit/a6ae965cec96ac3a79b908afa9e2cd1ed5f3d5e1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
Log Message:
-----------
AMDGPU: Switch scheduler-subrange-crash.ll to generated checks (#131316)
Also remove unnecessarily requiring asserts, and replace undef
with poison.
Commit: 1f1f8200bdf568ce41259ffcf78b32dd4630e1e8
https://github.com/llvm/llvm-project/commit/1f1f8200bdf568ce41259ffcf78b32dd4630e1e8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
Log Message:
-----------
AMDGPU: Switch simplifydemandedbits-recursion.ll to generated checks (#131317)
This just checked the s_endpgm. Generate full checks, and remove undefs.
Commit: 7dcea28bf92e49737fa285e93621cfa814323524
https://github.com/llvm/llvm-project/commit/7dcea28bf92e49737fa285e93621cfa814323524
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
Log Message:
-----------
[AMDGPU] Add identity_combines to RegBankCombiner (#131305)
Commit: 27099982da2f5a6c2d282d6b385e79d080669546
https://github.com/llvm/llvm-project/commit/27099982da2f5a6c2d282d6b385e79d080669546
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugType.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Core/Checker.cpp
Log Message:
-----------
[NFC][analyzer] Framework for multipart checkers (#130985)
In the static analyzer codebase we have a traditional pattern where a
single checker class (and its singleton instance) acts as the
implementation of several (user-facing or modeling) checkers that have
shared state and logic, but have their own names and can be enabled or
disabled separately.
Currently these multipart checker classes all reimplement the same
boilerplate logic to store the enabled/disabled state, the name and the
bug types associated with the checker parts. This commit extends
`CheckerBase`, `BugType` and the checker registration process to offer
an easy-to-use alternative to that boilerplate (which includes the ugly
lazy initialization of `mutable std::unique_ptr<BugType>`s).
In this new framework the single-part checkers are internally
represented as "multipart checkers with just one part" (because this way
I don't need to reimplement the same logic twice) but this does not
require any changes in the code of simple single-part checkers.
I do not claim that these multi-part checkers are perfect from an
architectural point of view; but they won't suddenly disappear after
many years of existence, so we might as well introduce a clear framework
for them. (Switching to e.g. 1:1 correspondence between checker classes
and checker names would be a prohibitively complex change.)
This PR ports `DivZeroChecker` to the new framework as a proof of
concept. I'm planning to do a series of follow-up commits to port the
rest of the multi-part checker.
Commit: ab1dcac6db2229387c711b7a4059e36ba09583cc
https://github.com/llvm/llvm-project/commit/ab1dcac6db2229387c711b7a4059e36ba09583cc
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
Log Message:
-----------
[AMDGPU][RegBankInfo] Promote scalar i16 and/or/xor to i32 (#131306)
See #64591
Commit: e456579e346c0790603544dc7617edfe44953f4c
https://github.com/llvm/llvm-project/commit/e456579e346c0790603544dc7617edfe44953f4c
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU][RegBankCombiner] Add cast_of_cast and constant_fold_cast combines (#131307)
We can add a bunch of exts/truncs during RBSelect, we should be able to fold
them away afterwards.
Commit: 0878dd14b20579dd127396787ec81ba7239b3366
https://github.com/llvm/llvm-project/commit/0878dd14b20579dd127396787ec81ba7239b3366
Author: David Green <david.green at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
Log Message:
-----------
[AArch64][GlobalISel] Add coverage for arm64-neon-2velem.ll. NFC
Commit: 93e0df07c2b32610ff8cc9451b5b5036f9a3ed37
https://github.com/llvm/llvm-project/commit/93e0df07c2b32610ff8cc9451b5b5036f9a3ed37
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/metadirective-common.f90
Log Message:
-----------
[Flang][OpenMP] Allow zero trait score (#131473)
Commit: 5c73c5c9bf0e048737682040f22734c3eb63cbbf
https://github.com/llvm/llvm-project/commit/5c73c5c9bf0e048737682040f22734c3eb63cbbf
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][NFC] Add missing immediate qualifier to VSM3RNDS2 instruction (#131576)
Commit: 0c34d7a9e7a4b5d249dda46ff8ab754cf3f934c7
https://github.com/llvm/llvm-project/commit/0c34d7a9e7a4b5d249dda46ff8ab754cf3f934c7
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Require operand/result tensors of at least rank 1 for some operations (#131335)
This commit updates the following operations (operands/results) to be of
at least rank 1 such that it aligns with the expectations of the
specification:
- ARGMAX (input)
- REDUCE_ALL (input/output)
- REDUCE_ANY (input/output)
- REDUCE_MAX (input/output)
- REDUCE_MIN (input/output)
- REDUCE_PRODUCT (input/output)
- REDUCE_SUM (input/output)
- CONCAT (each input in input1/output)
- PAD (input1/output)
- REVERSE (input1/output)
- SLICE (input1/output)
- TILE (input1/output)
- TRANSPOSE (input1/output)
In addition to this change, PAD has been updated to allow unranked
tensors for input1/output, inline with other operations.
Commit: 846cf86b2bbec68c01f762f65e2778a32fe15daa
https://github.com/llvm/llvm-project/commit/846cf86b2bbec68c01f762f65e2778a32fe15daa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
libclc: Add missing gfx950 target (#131585)
Commit: 8c939f54b4907935a877e75d09ee88bf90401cb4
https://github.com/llvm/llvm-project/commit/8c939f54b4907935a877e75d09ee88bf90401cb4
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Change placeholder from `undef` to `poison` (#131536)
Use `poison` instead of `undef` as a placeholder for phi entries of
unreachable predecessors.
Commit: 6eb32a2fa0d16bea03f22dd2078f53da6d9352cd
https://github.com/llvm/llvm-project/commit/6eb32a2fa0d16bea03f22dd2078f53da6d9352cd
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
Log Message:
-----------
[clang] Change placeholder from `undef` to `poison` (#131533)
Return a `poison` value, instead of `undef`, if there is no available
SEH info.
Commit: e57cd100ca297cf81854e35cccbf703edddd4aad
https://github.com/llvm/llvm-project/commit/e57cd100ca297cf81854e35cccbf703edddd4aad
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Support/Compiler.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (#131578)
While building llvm (clang, lld) against emscripten we see this
[error](https://github.com/emscripten-forge/recipes/actions/runs/13803029307/job/38608794602#step:9:1715)
```
│ │ In file included from $SRC_DIR/llvm/lib/Frontend/OpenACC/ACC.cpp:9:
│ │ $SRC_DIR/build/include/llvm/Frontend/OpenACC/ACC.h.inc:192:1: error: unknown type name 'LLVM_ABI'
│ │ 192 | LLVM_ABI Directive getOpenACCDirectiveKind(llvm::StringRef Str);
│ │ | ^
│ │ $SRC_DIR/build/include/llvm/Frontend/OpenACC/ACC.h.inc:192:19: error: expected ';' after top level declarator
│ │ 192 | LLVM_ABI Directive getOpenACCDirectiveKind(llvm::StringRef Str);
│ │ | ^
```
Now this was happening because we weren't defining LLVM_ABI correctly when building against emscripten. If you see [llvm/Support/Compiler.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/Compiler.h#L206-L210), the condition only checked for the platform __WASM__ . Now Emscripten targets WebAssembly but doesn't imply the platform by default so the check isn't complete to define LLVM_ABI.
The successful build after using this patch can be seen [here](https://github.com/emscripten-forge/recipes/actions/runs/13805214092/job/38614585621)
Commit: f4feab927ba33e897c4f05bf3b52226bc0a824c7
https://github.com/llvm/llvm-project/commit/f4feab927ba33e897c4f05bf3b52226bc0a824c7
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[NFC][KeyInstr] Add (LLVM_)EXPERIMENTAL_KEY_INSTRUCTIONS (cmake/)definition (#131344)
Key Instructions will start development behind a compile time flag to avoid
passing on the increased memory usage to all debug builds. We're working on
improving DILocation memory characteristics simultaneously; once that work lands
we can remove `EXPERIMENTAL_KEY_INSTRUCTIONS`.
This patch doesn't add any code, it's just so we can get the SIE buildbot
building with the new option right away.
Commit: 6085f3f6a80dc3be97d31a4c31a22fd77dbb6e83
https://github.com/llvm/llvm-project/commit/6085f3f6a80dc3be97d31a4c31a22fd77dbb6e83
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp_sched.cpp
Log Message:
-----------
[OpenMP] Address __kmp_dist_for_static_init issue (#129902)
This patch attempts to provide a fix for an issue that appears when the
`__kmp_dist_for_static_init` function is called from a serialized team.
This is triggered by code generated by flang for `distribute parallel
do` constructs whenever an `if` clause for the `parallel` leaf construct
is present. This results in the introduction of a call to
`__kmpc_fork_call_if` in place of `__kmpc_fork_call`. When it evaluates
to `false`, it defers execution to `__kmp_serialized_parallel`, which
creates a new serial team that is picked up by
`__kmp_dist_for_static_init`, resulting in an incorrect `team` pointer
that causes the `nteams == (kmp_uint32)team->t.t_parent->t.t_nproc`
assertion to fail.
The sequence of calls replicating this issue can be summarized as:
- `__kmpc_fork_teams`
- `__kmpc_fork_call_if`
- `__kmpc_dist_for_static_init_*`
Since I am not familiar with the implementation of the OpenMP runtime,
it is possible that the above sequence of calls is incorrect, or that
the bug can be better fixed in another way, so I am open to discussing
this.
The following Fortran program can be compiled with flang to show the
issue:
```f90
! Compile and run: flang -fopenmp test.f90 -o test && ./test
! Check LLVM IR: flang -fc1 -emit-llvm -fopenmp test.f90 -o -
program main
implicit none
integer, parameter :: n = 10
integer :: i, idx(n)
!$omp teams
!$omp distribute parallel do if(.false.)
do i=1,n
idx(i) = i
end do
!$omp end teams
print *, idx
end program
```
Commit: e0223fa24aedf14895ea31beb87dac6d5a2137f0
https://github.com/llvm/llvm-project/commit/e0223fa24aedf14895ea31beb87dac6d5a2137f0
Author: Imad Aldij <os at imadij.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[Clang][NFC] Rename SecondArgIsLastNamedArgument for clarity and consistency (#131346)
Change the name of the control variable `SecondArgIsLastNamedArgument`
to `SecondArgIsLastNonVariadicArgument` for clarity and consistency.
Following feedback on earlier PR that was merged:
-
https://github.com/llvm/llvm-project/pull/131238#discussion_r1995690691_
Commit: 17b4be8f63a9a2c17290c8540d84f17a370b1915
https://github.com/llvm/llvm-project/commit/17b4be8f63a9a2c17290c8540d84f17a370b1915
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Move setting name and adding VFs after recipe creation.(NFC)
Recipe creation is the only place where the VF range is restricted. Move
setting the VFs just after initial recipe creation.
Commit: 06546e005d2f9363c51552cfdbe7e69d0bcb5f02
https://github.com/llvm/llvm-project/commit/06546e005d2f9363c51552cfdbe7e69d0bcb5f02
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/unique_object_duplication.h
Log Message:
-----------
[clang][NFC] Fix typo 'initializeation' (#131594)
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: ed57ab0c2b8f359e7937f2c565239bd7cf124a9f
https://github.com/llvm/llvm-project/commit/ed57ab0c2b8f359e7937f2c565239bd7cf124a9f
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
A cmake/Modules/FindLibcCommonUtils.cmake
R llvm/cmake/modules/FindLibcCommonUtils.cmake
Log Message:
-----------
[cmake] Move FindLibcCommonUtils to shared cmake, to fix standalone builds (#131586)
Move `FindLibcCommonUtils` from LLVM's CMake module directory to the
shared top-level CMake directory, as the module is intended to be used
from within the source tree rather than the installed LLVM version. This
fixes standalone offload builds after #131205.
Commit: b79d53caaad7a36b1f20c70ea777fa283d181652
https://github.com/llvm/llvm-project/commit/b79d53caaad7a36b1f20c70ea777fa283d181652
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
A llvm/test/CodeGen/X86/pr131389.ll
Log Message:
-----------
[X86] X86MCInstLower.cpp - printConstant - don't assume the source constant data is smaller than the printed data
Bail out if the constant types aren't compatible
Fixes #131389
Commit: 1e89a76a0490b6c55a3e46ecf967da3e30c9112b
https://github.com/llvm/llvm-project/commit/1e89a76a0490b6c55a3e46ecf967da3e30c9112b
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
Log Message:
-----------
[MLIR] Refactor to create vectorization convOp precondition check (#130181)
In corner situations, the vectorization pass may face to lower a conv2d
op and assert in a completely irrelevant location in
vectorizeConvolution() subroutine.
~~This PR rejects the conv2d op early and make the asserted routine to
return failure as a defensive workaround.~~
In addressing this, the PR moved all condition check away from the
`Conv1dGenerator` into the `convOpPreconditionCheck()` function. This
makes the unsupported ops such as conv2d to be rejected early and leave
a cleaner `Conv1dGenerator` constructor.
Commit: 19adc69029ba090d9eae3b89069dee7eadb1bd26
https://github.com/llvm/llvm-project/commit/19adc69029ba090d9eae3b89069dee7eadb1bd26
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
Log Message:
-----------
[analyzer] Add [[maybe_unused]] forgotten in 57e36419b251 (#131617)
Fixes
https://github.com/llvm/llvm-project/pull/131175#discussion_r1998764727
Commit: 1c3a9a853ce68c3c539e7cab21380b9d8b18f426
https://github.com/llvm/llvm-project/commit/1c3a9a853ce68c3c539e7cab21380b9d8b18f426
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
A llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
Log Message:
-----------
[AMDGPU] frame index elimination hit assertion for scavenged nonreg (#130287)
Avoid spilling and fold the offset into `FIOp` when the scavenger fails
to find a free reg during frame index elimination.
Fixes #130120
Commit: 2ff370f45266b14c2a86e6395042a4574701f2d2
https://github.com/llvm/llvm-project/commit/2ff370f45266b14c2a86e6395042a4574701f2d2
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/unnecessary-virtual-specifier.cpp
Log Message:
-----------
Warn about virtual methods in `final` classes (#131188)
There's never any point to adding a `virtual` specifier to methods in a
`final` class, since the class can't be subclassed. This adds a warning
when we notice this happening, as suggested in #131108.
We don't currently implement the second part of the suggestion, to warn
on `virtual` methods which are never overridden anywhere. Although it's
feasible to do this for things with internal linkage (so we can check at
the end of the TU), it's more complicated to implement and it's not
clear it's worth the effort.
I tested the warning by compiling chromium and clang itself. Chromium
resulted in [277 warnings across 109
files](https://github.com/user-attachments/files/19234889/warnings-chromium.txt),
while clang had [38 warnings across 29
files](https://github.com/user-attachments/files/19234888/warnings-clang.txt).
I inspected a subset of the warning sites manually, and they all seemed
legitimate.
This warning is very easy to fix (just remove the `virtual` specifier)
and I haven't seen any false positives, so it's suitable for
on-by-default. However, I've currently made it off-by-default because it
fires at several places in the repo. I plan to submit a followup PR
fixing those places and enabling the warning by default.
Commit: 8bc0f879a05228c58235ded510360da2220f0afd
https://github.com/llvm/llvm-project/commit/8bc0f879a05228c58235ded510360da2220f0afd
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] D16 LDS load/store pseudo instructions in true16 (#131427)
Implement new pseudos with the suffix _t16 which have VGPR_16 as the
store src or load dst. This affects LDS 8 and 16-bit loads and stores.
Lower the pseudos to the existing real Hi/Lo instructions in MC inst
layer with VGPR_32 src or dst
---------
Co-authored-by: Abhinav <abhinav.garg at amd.com>
Commit: b8317df8d8f6dc110edfbf86d8269c912cb2a2a9
https://github.com/llvm/llvm-project/commit/b8317df8d8f6dc110edfbf86d8269c912cb2a2a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Avoid repeated hash lookups (NFC) (#131553)
Commit: 8789c0083de178fd044e5fb94b3a36c2eec49e0a
https://github.com/llvm/llvm-project/commit/8789c0083de178fd044e5fb94b3a36c2eec49e0a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131554)
Commit: e71686ed1539abe8ec68a4efa010f5ede13e9888
https://github.com/llvm/llvm-project/commit/e71686ed1539abe8ec68a4efa010f5ede13e9888
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[TargetParser] Avoid repeated hash lookups (NFC) (#131555)
Commit: 9455df969ef34681d08b2118a2ca2e8b0bd0155b
https://github.com/llvm/llvm-project/commit/9455df969ef34681d08b2118a2ca2e8b0bd0155b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#131556)
Commit: 83356f3b62e95b980ca48083aafa4a1b4040d4c9
https://github.com/llvm/llvm-project/commit/83356f3b62e95b980ca48083aafa4a1b4040d4c9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Compile functions lazily (#131596)
Create the Function* handles for all functions we see, but delay the
actual compilation until we really call the function. This speeds up
compile times with the new interpreter a bit.
Commit: 1b237198dc9d308c6d589e01637ec7496b48b3e0
https://github.com/llvm/llvm-project/commit/1b237198dc9d308c6d589e01637ec7496b48b3e0
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
Reapply "[lldb] Implement basic support for reverse-continue (#125242)" (again) (#128156)
This reverts commit
https://github.com/llvm/llvm-project/commit/87b7f63a117c340a6d9ca47959335fd7ef6c7ad2,
reapplying
https://github.com/llvm/llvm-project/commit/7e66cf74fb4e6a103f923e34700a7b6f20ac2a9b
with a small (and probably temporary)
change to generate more debug info to help with diagnosing buildbot
issues.
Commit: 37c3fbfa5ae9c124fffa4d53df708c688d8584c6
https://github.com/llvm/llvm-project/commit/37c3fbfa5ae9c124fffa4d53df708c688d8584c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Add test showing failure to merge concatenatable VPERMV3 nodes
Commit: 269c40fafc80576ab4efcd7fba954fd5588ea118
https://github.com/llvm/llvm-project/commit/269c40fafc80576ab4efcd7fba954fd5588ea118
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
Log Message:
-----------
[X86] Add tests for concatenation of VPERMV nodes
Commit: 52e7ca9279b4cbe30cacca67548347ef5f96b120
https://github.com/llvm/llvm-project/commit/52e7ca9279b4cbe30cacca67548347ef5f96b120
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
Log Message:
-----------
[LLVM][NVPTX] Add support for ldmatrix extensions introduced in PTX 8.6 (#124899)
This commit adds support for the following ldmatrix extensions
introduced in PTX 8.6
- Support for m16n16 with b8 type with mandatory transpose
- Support for m16n16 with m8n16 with source and desitination formats
The above extensions are only supported on sm_100a, sm_101a, sm_120a
Please refer the PTX ISA for more information:
https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-ldmatrix
Commit: 3959bbc1345b9eb99b208e816a86e6a39103c345
https://github.com/llvm/llvm-project/commit/3959bbc1345b9eb99b208e816a86e6a39103c345
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[NFC] Remove trailing white spaces from `llvm/docs/LangRef.rst`
Commit: a4510aa7cb6073ccec63edce3aaed3e6f92563a5
https://github.com/llvm/llvm-project/commit/a4510aa7cb6073ccec63edce3aaed3e6f92563a5
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/GetToolchainDirs.cmake
Log Message:
-----------
[flang-rt] replace the triple dir to 'aix' for flang-rt to be consistent with clang on AIX. (#130875)
This change is to put `libflang_rt.runtime.a` into
`build/lib/clang/21/lib/aix/libflang_rt.runtime.a`, which is consistent
with clang on AIX.
Commit: 7054655c52e03a2a0d3bca679cb883241679a14e
https://github.com/llvm/llvm-project/commit/7054655c52e03a2a0d3bca679cb883241679a14e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[llvm-exegesis] Add myself as an llvm-exegesis maintainer (#131580)
More people have been interested in exegesis recently, so having a point
of contact would probably be good. Exegesis also never had proper code
owners in the previous system, so adding them now is a decent step
forward.
I'm nominating myself as I'm interested in pushing the project further,
and have a decent amount of experience with the code base. Two of the
original authors, Clement and Guillaume, now have different priorities
at work and are thus not as invested into maintaining exegesis anymore.
Commit: e2c43ba981620cf71ce3ccf004db7c0db4caf8a7
https://github.com/llvm/llvm-project/commit/e2c43ba981620cf71ce3ccf004db7c0db4caf8a7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
Log Message:
-----------
[NFC][AMDGPU] Auto generate check lines for `llvm/test/CodeGen/AMDGPU/packed-fp32.ll` (#131629)
Commit: eef5ea0c42fc07ef2c948be59b57d0df8ec801ca
https://github.com/llvm/llvm-project/commit/eef5ea0c42fc07ef2c948be59b57d0df8ec801ca
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
Log Message:
-----------
[VPlan] Account for dead FOR splice simplification in cost model (#131486)
Fixes #131359
After #129645, a first-order recurrence will no longer have it's splice
costed if the VPInstruction::FirstOrderRecurrenceSplice has no users and
is dead.
The legacy cost model didn't account for this, so this accounts for it
in planContainsAdditionalSimplifications to avoid the "VPlan cost model
and legacy cost model disagreed" assertion.
Commit: b00ad366323cee324b0294f6395c33ae4b047e2c
https://github.com/llvm/llvm-project/commit/b00ad366323cee324b0294f6395c33ae4b047e2c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
Log Message:
-----------
[RISCV] Use hasFeature instead of checkFeature in llvm-exegesis. NFC (#131401)
Until recently checkFeature was quite slow. #130936
I was curious where we use checkFeature and noticed these. I thought we
could use hasFeature instead of going through strings.
Commit: 54cb4059da2751758b3ab6dc5630e40b228bcda5
https://github.com/llvm/llvm-project/commit/54cb4059da2751758b3ab6dc5630e40b228bcda5
Author: Vineet Kumar <173554+vntkmr at users.noreply.github.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/combine-fma-negate.ll
Log Message:
-----------
[X86][ISel][FMA] Get a handle on operand nodes when negating FMA (#130176)
When negating an FMA opcode, a new node created for a negated FMA
operand may be deleted while recursively negating another FMA operand.
This causes the following assertion to fail:
```
llc: /root/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7686: llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags): Assertion `N1.getOpcode() != ISD::DELETED_NODE && N2.getOpcode() != ISD::DELETED_NODE && N3.getOpcode() != ISD::DELETED_NODE && "Operand is DELETED_NODE!"' failed.
```
This patch adds a temporary handle on the new negated nodes to prevent
them from being deleted.
For eg. see https://godbolt.org/z/Tq4PvnKM4 .
Co-authored-by: Vineet Kumar <vineetk at hpe.com>
Commit: 67f1c033b8ff07c2713b3cb1209a574129274cbf
https://github.com/llvm/llvm-project/commit/67f1c033b8ff07c2713b3cb1209a574129274cbf
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-18 (Tue, 18 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove createReduction. NFCI (#131336)
This is split off from #131300.
A VPReductionRecipe will never have a AnyOf or FindLastIV recurrence, so
when it calls createReduction it always calls createSimpleReduction.
If we replace the call then it leaves createReduction with one user in
VPInstruction::ComputeReductionResult, which we can inline and then
remove.
Commit: 800593a014791e3aa26f04357f580d2dcc87320a
https://github.com/llvm/llvm-project/commit/800593a014791e3aa26f04357f580d2dcc87320a
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Avoid duplicated module flags in the export (#131627)
This commit resolves an issue in the LLVMIR export that caused the
duplication of the "Debug Info Version" module flag, when it was already
in MLIR.
Commit: 561f1d0b7cbbe6f40dca40830ccb4b956bf9ecef
https://github.com/llvm/llvm-project/commit/561f1d0b7cbbe6f40dca40830ccb4b956bf9ecef
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] add test coverage for concatenation to 512-bit VPERMILPD nodes
Commit: 9a92fe0f8d34ba0b06b3f831c269d381f3944304
https://github.com/llvm/llvm-project/commit/9a92fe0f8d34ba0b06b3f831c269d381f3944304
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Add additional test coverage for #109272
Commit: b3c5031b07396959c5d4e7f62d516d63de015358
https://github.com/llvm/llvm-project/commit/b3c5031b07396959c5d4e7f62d516d63de015358
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
Log Message:
-----------
[HLSL] Remove HLSLResource attribute (#130342)
Fixes #104862
Commit: 47f7daab06e4e83f64a1b268da7ada4f50d50349
https://github.com/llvm/llvm-project/commit/47f7daab06e4e83f64a1b268da7ada4f50d50349
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/glob.yaml
Log Message:
-----------
[libc][docs] Add glob implementation status doc and include in CMakeLists (#126923)
These changes tracks `glob.h` for the implementation status of functions
and macros, with respect to the issue ( #122006 ) .
cc @nickdesaulniers
Commit: fbb8929c9d15fdc0001205ee4a7b42a78edc5213
https://github.com/llvm/llvm-project/commit/fbb8929c9d15fdc0001205ee4a7b42a78edc5213
Author: John Harrison <harjohn at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
R lldb/tools/lldb-dap/Protocol.cpp
R lldb/tools/lldb-dap/Protocol.h
A lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolBase.h
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Updating RequestHandler to encode/decode arguments and response. (#130090)
This is a work in progress refactor to add explicit types instead of
generic 'llvm::json::Value' types to the DAP protocol.
This updates RequestHandler to have take the type of the arguments and
response body for serialization for requests.
The 'source' and 'disconnect' request is updated to show how the new
flow
works and includes serialization handling for optional arguments and
'void'
responses.
This is built on top of #130026
---------
Co-authored-by: Adrian Vogelsgesang <adrian.vogelsgesang at tum.de>
Commit: 681b24132c5d8ce8eafee191a967799dd2a23960
https://github.com/llvm/llvm-project/commit/681b24132c5d8ce8eafee191a967799dd2a23960
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port fbb8929c9d15
Commit: 046041842022f12ab04403e255ceeec25d6ce11c
https://github.com/llvm/llvm-project/commit/046041842022f12ab04403e255ceeec25d6ce11c
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
Log Message:
-----------
[clang][driver][NFC] Remove else after return (#131182)
Commit: c53caae1d0baaf21d63e5f7152171699bcab0750
https://github.com/llvm/llvm-project/commit/c53caae1d0baaf21d63e5f7152171699bcab0750
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M libcxx/include/__memory/unique_ptr.h
Log Message:
-----------
[libc++][NFC] Remove dead link in comment
Commit: ca1bde0b91a6129e7bacee0fa67e4331b06dd683
https://github.com/llvm/llvm-project/commit/ca1bde0b91a6129e7bacee0fa67e4331b06dd683
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Check dtor instance pointers for active-ness (#128732)
And diagnose if we're trying to destroy an inactive member of a union.
Commit: cfa07ccdfcf03cbd48086fe9988f97e3a776b02c
https://github.com/llvm/llvm-project/commit/cfa07ccdfcf03cbd48086fe9988f97e3a776b02c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix builtin_memchr with non-0 start index (#131633)
Commit: ead9d6a56d764190aa916c5259ab50986f803128
https://github.com/llvm/llvm-project/commit/ead9d6a56d764190aa916c5259ab50986f803128
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/empty-vectorizable-tree.ll
Log Message:
-----------
[SLP]Check VectorizableTree is not empty before accessing elements
Need to check VectorizableTree is not empty before accessing elements.
Fixes #131635
Commit: c6f318df91b7e32f7f55ff6e53bb7be9750f3f30
https://github.com/llvm/llvm-project/commit/c6f318df91b7e32f7f55ff6e53bb7be9750f3f30
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-17 (Mon, 17 Mar 2025)
Changed paths:
M .ci/compute-projects.sh
M .ci/generate-buildkite-pipeline-premerge
M .ci/metrics/metrics.py
M .ci/metrics/requirements.lock.txt
M .ci/metrics/requirements.txt
M .ci/monolithic-linux.sh
M .github/workflows/docs.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/release-asset-audit.py
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/JumpTable.cpp
M bolt/lib/Core/MCPlusBuilder.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/AsmDump.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/test/AArch64/test-indirect-branch.s
M bolt/test/X86/icf-safe-icp.test
M bolt/test/X86/icf-safe-process-rela-data.test
M bolt/test/X86/icf-safe-test1.test
M bolt/test/X86/icf-safe-test2GlobalConstPtrNoPic.test
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.h
M clang-tools-extra/clang-tidy/bugprone/OptionalValueConversionCheck.cpp
M clang-tools-extra/clang-tidy/cert/DontModifyStdNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/clang-tidy/modernize/UseDefaultMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdNumbersCheck.cpp
A clang-tools-extra/clang-tidy/readability/AmbiguousSmartptrResetCallCheck.cpp
A clang-tools-extra/clang-tidy/readability/AmbiguousSmartptrResetCallCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/capturing-this-in-member-variable.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/capturing-this-in-member-variable.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/optional-value-conversion-construct-from-std.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-allowed-types.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers-values.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values-before-cxx23.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-wrong-config.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-default-member-init.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-numbers.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/ambiguous-smartptr-reset-call-custom-pointers.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/ambiguous-smartptr-reset-call.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-anon-record-fields.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/file-filter.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/system-headers.cpp
A clang/AreaTeamMembers.txt
M clang/Maintainers.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/analyzer/developer-docs.rst
A clang/docs/analyzer/developer-docs/Statistics.rst
M clang/docs/tools/dump_ast_matchers.py
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/Mangle.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/ABI.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/CIR/Dialect/CMakeLists.txt
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
A clang/include/clang/CIR/Dialect/Passes.h
A clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/CompilerInvocation.h
M clang/include/clang/Lex/LiteralSupport.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
A clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugType.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/include/clang/Support/Compiler.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CMakeLists.txt
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Dialect/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/lib/CIR/Dialect/Transforms/PassDetail.h
A clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/PPC.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/SPIRV.cpp
M clang/lib/Driver/ToolChains/SPIRV.h
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/PrecompiledPreamble.cpp
M clang/lib/Headers/__stdarg_va_arg.h
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/CMakeLists.txt
M clang/lib/Serialization/GeneratePCH.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
A clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/AssumeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnValueChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ValistChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/Checker.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
A clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/WorkList.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Tooling/RefactoringCallbacks.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/if.cpp
A clang/test/AST/ByteCode/libcxx/memcmp-pointer.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
M clang/test/AST/HLSL/vector-constructors.hlsl
M clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
M clang/test/AST/ast-print-openacc-routine-construct.cpp
A clang/test/Analysis/ArrayBound/assumption-reporting.c
A clang/test/Analysis/ArrayBound/assumptions.c
A clang/test/Analysis/ArrayBound/brief-tests.c
A clang/test/Analysis/ArrayBound/cplusplus.cpp
A clang/test/Analysis/ArrayBound/verbose-tests.c
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
A clang/test/Analysis/Checkers/WebKit/forward-decl-checker.mm
M clang/test/Analysis/Checkers/WebKit/mock-system-header.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
A clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/analyzer-enabled-checkers.c
A clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
A clang/test/Analysis/builtin_assume.cpp
A clang/test/Analysis/csv2json.py
M clang/test/Analysis/cxx23-assume-attribute.cpp
A clang/test/Analysis/fixed-address-notes.c
R clang/test/Analysis/out-of-bounds-constraint-check.c
R clang/test/Analysis/out-of-bounds-diagnostics.c
R clang/test/Analysis/out-of-bounds-new.cpp
R clang/test/Analysis/out-of-bounds-notes.c
R clang/test/Analysis/out-of-bounds.c
M clang/test/Analysis/std-c-library-functions-POSIX.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
M clang/test/C/C23/n2975.c
A clang/test/C/C2y/n3363.c
A clang/test/C/C2y/n3451.c
A clang/test/C/C2y/n3460.c
A clang/test/C/C2y/n3460_1.c
A clang/test/C/C2y/n3482.c
A clang/test/C/C2y/n3505.c
A clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/CodeGen/basic.c
A clang/test/CIR/CodeGen/unary-expr-or-type-trait.cpp
A clang/test/CIR/IR/array.cir
A clang/test/CIR/Lowering/array.cpp
M clang/test/CIR/Lowering/func-simple.cpp
A clang/test/CIR/Lowering/unary-expr-or-type-trait.cpp
A clang/test/CIR/Transforms/scope.cir
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
A clang/test/CodeCompletion/if-const.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/builtins-elementwise-math.c
A clang/test/CodeGen/p0963r3.cpp
A clang/test/CodeGen/strictfp-elementwise-builtins.cpp
R clang/test/CodeGen/strictfp-elementwise-bulitins.cpp
M clang/test/CodeGen/varargs.c
M clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
M clang/test/CodeGenCXX/cxx23-p2280r4.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
R clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/CodeGenHLSL/BasicFeatures/standard_conversion_sequences.hlsl
A clang/test/CodeGenHLSL/BoolVector.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_packoffset.hlsl
A clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M clang/test/Driver/HLSL/metal-converter.hlsl
A clang/test/Driver/aix-shared-lib-tls-model-opt.c
M clang/test/Driver/aix-small-local-exec-dynamic-tls.c
M clang/test/Driver/arm-thread-pointer.c
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/dxc_dxv_path.hlsl
M clang/test/Driver/fprofile-continuous.c
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/offload-Xarch.c
A clang/test/Driver/opencl-aot-compilation.cl
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/spirv-openmp-toolchain.c
M clang/test/Driver/spirv-toolchain.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Lexer/ms-extensions.c
M clang/test/Misc/time-passes.c
M clang/test/Modules/external-but-not-type-external.cppm
A clang/test/Modules/lambda-in-module-purview-2.cppm
A clang/test/Modules/lambda-in-module-purview.cppm
A clang/test/Modules/pr121245.cpp
A clang/test/Modules/pr125999.cppm
A clang/test/Modules/pr129982.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/OpenMP/requires_ast_print.cpp
M clang/test/OpenMP/requires_messages.cpp
M clang/test/OpenMP/target_data_ast_print.cpp
M clang/test/OpenMP/target_map_messages.cpp
M clang/test/Parser/cxx-template-decl.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/Parser/decomposed-condition.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
M clang/test/Sema/attr-availability-macosx.cpp
M clang/test/Sema/builtins-elementwise-math.c
A clang/test/Sema/c23-varargs.c
M clang/test/Sema/for.c
A clang/test/Sema/offsetof-ucrt.c
A clang/test/Sema/shift-bool.c
M clang/test/Sema/shift-bool.cpp
M clang/test/Sema/varargs-x86-64.c
M clang/test/Sema/varargs.c
M clang/test/SemaCXX/builtins-elementwise-math.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
A clang/test/SemaCXX/copy-ctor-template.cpp
R clang/test/SemaCXX/coroutine-decltype.cpp
A clang/test/SemaCXX/coroutine-unevaluate.cpp
M clang/test/SemaCXX/cxx0x-nontrivial-union.cpp
M clang/test/SemaCXX/decomposed-condition.cpp
M clang/test/SemaCXX/ms-property.cpp
A clang/test/SemaCXX/offsetof-ucrt.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
A clang/test/SemaCXX/union-member-destructor.cpp
M clang/test/SemaCXX/unique_object_duplication.h
A clang/test/SemaCXX/unnecessary-virtual-specifier.cpp
M clang/test/SemaCXX/vararg-non-pod.cpp
M clang/test/SemaCXX/varargs.cpp
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
A clang/test/SemaHLSL/Types/BuiltinVector/BooleanVectorConstantExpr.hlsl
M clang/test/SemaOpenACC/atomic-construct-ast.cpp
M clang/test/SemaOpenACC/cache-construct-ast.cpp
M clang/test/SemaOpenACC/combined-construct-ast.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-ast.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct-default-ast.cpp
M clang/test/SemaOpenACC/declare-construct-ast.cpp
M clang/test/SemaOpenACC/init-construct-ast.cpp
M clang/test/SemaOpenACC/loop-ast.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/routine-construct-ast.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/test/SemaOpenACC/shutdown-construct-ast.cpp
M clang/test/SemaOpenCL/invalid-kernel-attrs.cl
M clang/test/SemaSYCL/float128.cpp
M clang/test/SemaTemplate/constructor-template.cpp
A clang/test/TableGen/HLSLAttribute-errors.td
M clang/test/Tooling/clang-linker-wrapper-spirv-elf.cpp
M clang/test/Tooling/lit.local.cfg
M clang/test/lit.cfg.py
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
M clang/tools/cir-opt/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/clang-format/git-clang-format
M clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/ASTMatchers/ASTMatchersInternalTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Lex/HeaderSearchTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_status.html
M clang/www/get_involved.html
M clang/www/get_started.html
A cmake/Modules/FindLibcCommonUtils.cmake
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/lib/hwasan/hwasan_globals.cpp
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/lib/profile/InstrProfilingPlatformDarwin.c
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/lib/profile/InstrProfilingPlatformWindows.c
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Darwin/suppressions-sandbox.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M compiler-rt/test/profile/ContinuousSyncMode/basic.c
M compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
M compiler-rt/test/profile/ContinuousSyncMode/image-with-no-counters.c
M compiler-rt/test/profile/ContinuousSyncMode/multi-threaded.cpp
M compiler-rt/test/profile/ContinuousSyncMode/online-merging-windows.c
M compiler-rt/test/profile/ContinuousSyncMode/online-merging.c
M compiler-rt/test/profile/ContinuousSyncMode/pid-substitution.c
M compiler-rt/test/profile/ContinuousSyncMode/reset-default-profile.c
M compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
M compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c
M compiler-rt/test/profile/ContinuousSyncMode/set-filename.c
R compiler-rt/test/profile/Inputs/instrprof-order-file.c
R compiler-rt/test/profile/instrprof-order-file.test
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Darwin/malloc_zone.cpp
M flang-rt/CMakeLists.txt
M flang-rt/README.md
A flang-rt/cmake/clang_gcc_root.cpp
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/cmake/modules/GetToolchainDirs.cmake
A flang-rt/cmake/quadmath_wrapper.h.in
M flang-rt/lib/cuda/CMakeLists.txt
M flang-rt/lib/quadmath/CMakeLists.txt
M flang-rt/lib/quadmath/complex-math.h
M flang-rt/lib/quadmath/math-entries.h
M flang-rt/lib/runtime/command.cpp
M flang-rt/lib/runtime/support.cpp
M flang-rt/unittests/Runtime/Support.cpp
M flang/cmake/modules/FlangCommon.cmake
A flang/docs/ArrayRepacking.md
M flang/docs/F202X.md
M flang/docs/index.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/BoxAnalyzer.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/Inquiry.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Runtime/command.h
M flang/include/flang/Runtime/support.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/variable.cpp
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
A flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-coarray.h
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/type.cpp
M flang/runtime/CMakeLists.txt
M flang/test/CMakeLists.txt
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
A flang/test/Driver/dash-x-f95-cpp-input.f
A flang/test/Driver/dash-x-f95-do-not-assume-fixed-form.f90
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Driver/verbose-asm.f90
M flang/test/Fir/CUDA/cuda-code-gen.mlir
A flang/test/Fir/CUDA/cuda-shared-offset.mlir
A flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
M flang/test/Fir/CUDA/cuda-target-rewrite.mlir
A flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Fir/basic-program.fir
A flang/test/Fir/box-total-elements-fold.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/copy-codegen.fir
M flang/test/Fir/cuf.mlir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
A flang/test/Fir/is-contiguous-box-fold.fir
A flang/test/Fir/omp-teams.fir
M flang/test/Fir/struct-passing-return-loongarch64-bystack.fir
M flang/test/Fir/struct-passing-x86-64-byval.fir
M flang/test/Fir/struct-passing-x86-64-one-field-inreg.fir
M flang/test/Fir/struct-passing-x86-64-several-fields-inreg.fir
M flang/test/Fir/struct-return-aarch64.fir
M flang/test/Fir/struct-return-loongarch64-byreg.fir
M flang/test/Fir/struct-return-powerpc64-aix.fir
M flang/test/Fir/struct-return-ppc64le.fir
M flang/test/Fir/struct-return-x86-64.fir
M flang/test/Fir/target-rewrite-complex-10-x86.fir
M flang/test/Fir/target-rewrite-complex.fir
M flang/test/Fir/target-rewrite-complex16.fir
M flang/test/Fir/target-rewrite-indirect-calls.fir
M flang/test/Fir/target-rewrite-integer-loongarch64.fir
M flang/test/Fir/target.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling-bounds.f90
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling-polymorphic.f90
M flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling.f90
M flang/test/Integration/OpenMP/private-global.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
A flang/test/Lower/CUDA/cuda-shared.cuf
A flang/test/Lower/CUDA/cuda-shared01.cuf
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
A flang/test/Lower/OpenMP/missing-inode.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
A flang/test/Lower/OpenMP/privatization-proc-ptr.f90
A flang/test/Lower/OpenMP/reduction-equivalence.f90
A flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/forall/character-1.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
A flang/test/Parser/OpenMP/metadirective-flush.f90
A flang/test/Parser/func-label.f
A flang/test/Preprocessing/bug126459.F90
A flang/test/Semantics/OpenMP/cancel.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
A flang/test/Semantics/OpenMP/equivalence-namelist.f90
M flang/test/Semantics/OpenMP/metadirective-common.f90
A flang/test/Semantics/OpenMP/test_taskloop_lastprivate_semantic_restrictions.f90
A flang/test/Semantics/OpenMP/test_taskloop_reduction_semantic_restrictions.f90
M flang/test/Semantics/allocate12.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/assign11.f90
M flang/test/Semantics/bindings01.f90
M flang/test/Semantics/c_f_pointer.f90
M flang/test/Semantics/call04.f90
M flang/test/Semantics/call06.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/deallocate05.f90
M flang/test/Semantics/expr-errors06.f90
M flang/test/Semantics/io11.f90
M flang/test/Semantics/lockstmt03.f90
A flang/test/Semantics/modfile74.f90
M flang/test/Semantics/move_alloc.f90
A flang/test/Semantics/pdt04.f90
M flang/test/Semantics/resolve105.f90
A flang/test/Transforms/simplify-fir-operations.fir
M flang/test/Transforms/stack-arrays-hlfir.f90
M flang/tools/bbc/bbc.cpp
M flang/tools/f18/CMakeLists.txt
M flang/tools/flang-driver/fc1_main.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/config.json
M libc/config/gpu/amdgpu/config.json
M libc/config/gpu/nvptx/config.json
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
A libc/config/uefi/config.json
A libc/config/uefi/entrypoints.txt
A libc/config/uefi/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/configure.rst
M libc/docs/getting_started.rst
M libc/docs/gpu/rpc.rst
M libc/docs/headers/index.rst
M libc/docs/headers/stdfix.rst
M libc/docs/index.rst
A libc/docs/uefi/building.rst
A libc/docs/uefi/index.rst
A libc/docs/uefi/support.rst
A libc/docs/uefi/testing.rst
A libc/docs/uefi/using.rst
M libc/hdr/CMakeLists.txt
A libc/hdr/locale_macros.h
M libc/hdr/wchar_overlay.h
M libc/include/Uefi.yaml
M libc/include/strings.yaml
M libc/shared/rpc_opcodes.h
A libc/shared/rpc_server.h
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FMA.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/double_double.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/multiply_add.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/OSUtil/io.h
A libc/src/__support/OSUtil/uefi/CMakeLists.txt
A libc/src/__support/OSUtil/uefi/exit.cpp
A libc/src/__support/OSUtil/uefi/io.cpp
A libc/src/__support/OSUtil/uefi/io.h
A libc/src/__support/RPC/rpc_server.h
M libc/src/__support/big_int.h
M libc/src/__support/float_to_string.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/macros/properties/cpu_features.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/locale/CMakeLists.txt
M libc/src/locale/duplocale.cpp
M libc/src/locale/freelocale.cpp
M libc/src/locale/locale.cpp
M libc/src/locale/newlocale.cpp
M libc/src/locale/newlocale.h
M libc/src/locale/setlocale.cpp
M libc/src/locale/setlocale.h
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/acosf16.cpp
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/cbrt.cpp
M libc/src/math/generic/cos.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/cosf16.cpp
M libc/src/math/generic/coshf16.cpp
M libc/src/math/generic/cospif.cpp
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp10m1f.cpp
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/exp2f16.cpp
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/exp2m1f.cpp
M libc/src/math/generic/exp2m1f16.cpp
M libc/src/math/generic/expf.cpp
M libc/src/math/generic/expf16.cpp
M libc/src/math/generic/expm1f.cpp
M libc/src/math/generic/expm1f16.cpp
M libc/src/math/generic/fmul.cpp
M libc/src/math/generic/hypotf.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log10f16.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log2f16.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/logf16.cpp
M libc/src/math/generic/pow.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction_double_common.h
M libc/src/math/generic/sin.cpp
M libc/src/math/generic/sincos.cpp
M libc/src/math/generic/sincos_eval.h
M libc/src/math/generic/sincosf.cpp
M libc/src/math/generic/sincosf16_utils.h
M libc/src/math/generic/sincosf_utils.h
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinf16.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/math/generic/sinhf16.cpp
M libc/src/math/generic/tan.cpp
M libc/src/math/generic/tanf.cpp
M libc/src/math/generic/tanf16.cpp
M libc/src/math/generic/tanhf16.cpp
M libc/src/math/generic/tanpif16.cpp
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/vprintf.cpp
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.cpp
M libc/src/stdio/printf_core/converter.h
M libc/src/stdio/printf_core/fixed_converter.h
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_dec_converter_limited.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdio/printf_core/float_inf_nan_converter.h
M libc/src/stdio/printf_core/int_converter.h
M libc/src/stdio/printf_core/parser.h
R libc/src/stdio/printf_core/printf_main.cpp
M libc/src/stdio/printf_core/printf_main.h
M libc/src/stdio/printf_core/ptr_converter.h
M libc/src/stdio/printf_core/strerror_converter.h
M libc/src/stdio/printf_core/string_converter.h
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/src/stdio/printf_core/vfprintf_internal.h
M libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/writer.cpp
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdlib/quick_sort.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/string/memory_utils/inline_bcmp.h
M libc/src/string/memory_utils/inline_memcmp.h
M libc/src/string/memory_utils/inline_memcpy.h
M libc/src/string/memory_utils/inline_memmove.h
M libc/src/string/memory_utils/inline_memset.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/src/strings/CMakeLists.txt
A libc/src/strings/strcasecmp_l.cpp
A libc/src/strings/strcasecmp_l.h
A libc/src/strings/strncasecmp_l.cpp
A libc/src/strings/strncasecmp_l.h
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
R libc/src/time/strftime_core/converter.cpp
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
R libc/src/time/strftime_core/strftime_main.cpp
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/HashTable/table_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixed_point/fx_bits_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/complex/CImagTest.h
M libc/test/src/complex/CRealTest.h
M libc/test/src/fcntl/openat_test.cpp
M libc/test/src/locale/CMakeLists.txt
M libc/test/src/locale/locale_test.cpp
M libc/test/src/locale/localeconv_test.cpp
M libc/test/src/math/CopySignTest.h
M libc/test/src/math/FMaxTest.h
M libc/test/src/math/FMinTest.h
M libc/test/src/math/FModTest.h
M libc/test/src/math/FrexpTest.h
M libc/test/src/math/NextAfterTest.h
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/exhaustive/fmod_generic_impl_test.cpp
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdlib/StrfromTest.h
M libc/test/src/string/memcpy_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/CMakeLists.txt
M libc/test/src/strings/bcopy_test.cpp
A libc/test/src/strings/strcasecmp_l_test.cpp
A libc/test/src/strings/strncasecmp_l_test.cpp
M libc/test/src/sys/random/linux/getrandom_test.cpp
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/time/strftime_test.cpp
M libc/test/src/unistd/lseek_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/readlink_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
A libc/utils/docgen/glob.yaml
M libc/utils/gpu/CMakeLists.txt
M libc/utils/gpu/loader/CMakeLists.txt
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
M libc/utils/gpu/loader/nvptx/CMakeLists.txt
R libc/utils/gpu/server/CMakeLists.txt
R libc/utils/gpu/server/rpc_server.cpp
M libc/utils/hdrgen/hdrgen/header.py
M libclc/CMakeLists.txt
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/rotate.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit_reference
M libcxx/include/__fwd/bit_reference.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/future
M libcxx/include/regex
M libcxx/include/string
A libcxx/test/benchmarks/algorithms/modifying/rotate.bench.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.compare_exchange_strong.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.compare_exchange_weak.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.ctor.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.load.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.store.pass.cpp
M libcxx/test/libcxx/atomics/atomics.ref/assert.wait.pass.cpp
A libcxx/test/libcxx/atomics/atomics.ref/compare_exchange_strong.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/compare_exchange_weak.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/load.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/store.verify.cpp
A libcxx/test/libcxx/atomics/atomics.ref/wait.verify.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.search/search.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.assert.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.compile.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
R libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/test/std/utilities/template.bitset/bitset.members/left_shift_eq.pass.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Symbols.cpp
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/Writer.cpp
M lld/MachO/ICF.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/COFF/Inputs/defaultlib.yaml
M lld/test/COFF/arm64x-altnames.s
M lld/test/COFF/arm64x-incl.s
M lld/test/COFF/arm64x-symtab.s
M lld/test/COFF/locally-imported-arm64x.s
M lld/test/COFF/nodefaultlib.test
M lld/test/ELF/aarch64-feature-gcs.s
A lld/test/ELF/linkerscript/overlay-keep.test
M lld/test/ELF/linkerscript/section-class.test
M lld/test/ELF/loongarch-relax-emit-relocs.s
A lld/test/ELF/loongarch-relax-tls-le.s
M lld/test/ELF/loongarch-tls-gd.s
M lld/test/ELF/loongarch-tls-ld.s
M lld/test/ELF/loongarch-tls-le.s
M lld/test/MachO/start-end.s
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.rst
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Core/Telemetry.h
M lldb/include/lldb/DataFormatters/DumpValueObjectOptions.h
M lldb/include/lldb/Target/Language.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBLineEntry.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Breakpoint/BreakpointResolver.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/DataFormatters/DumpValueObjectOptions.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/aix/Host.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
A lldb/source/Plugins/Process/AIX/CMakeLists.txt
A lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
A lldb/source/Plugins/Process/AIX/NativeProcessAIX.h
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
A lldb/test/API/commands/dwim-print/objc/Makefile
A lldb/test/API/commands/dwim-print/objc/TestDWIMPrintObjC.py
A lldb/test/API/commands/dwim-print/objc/main.m
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/terminated-event/TestDAP_terminatedEvent.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteFork.py
A lldb/test/API/tools/lldb-server/TestGdbRemoteForkResume.py
A lldb/test/API/tools/lldb-server/TestGdbRemote_qMemoryRegion.py
A lldb/test/API/tools/lldb-server/TestGdbRemote_qRegisterInfo.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
A lldb/test/API/tools/lldb-server/qSupported/Makefile
A lldb/test/API/tools/lldb-server/qSupported/TestGdbRemote_qSupported.py
A lldb/test/API/tools/lldb-server/qSupported/main.c
A lldb/test/Shell/Commands/command-statistics-dump.test
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
A lldb/tools/lldb-dap/DAPLog.h
M lldb/tools/lldb-dap/FunctionBreakpoint.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
R lldb/tools/lldb-dap/IOStream.cpp
R lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
R lldb/tools/lldb-dap/Protocol.cpp
R lldb/tools/lldb-dap/Protocol.h
A lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolBase.h
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
A lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
A lldb/tools/lldb-dap/Transport.cpp
A lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/Watchpoint.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/uri-launch-handler.ts
M lldb/tools/lldb-server/CMakeLists.txt
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBLineEntryTest.cpp
M lldb/unittests/Symbol/SymtabTest.cpp
M lldb/unittests/Utility/AnsiTerminalTest.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CIBestPractices.rst
M llvm/docs/CodeReview.rst
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/HowToCrossCompileLLVM.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/WritingAnLLVMPass.rst
M llvm/examples/Kaleidoscope/Chapter8/toy.cpp
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/ADT/SCCIterator.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/ilist_node.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/OptimizationRemarkEmitter.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/AntiDepBreaker.h
A llvm/include/llvm/CodeGen/BranchFoldingPass.h
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/DetectDeadLanes.h
A llvm/include/llvm/CodeGen/ExpandFp.h
R llvm/include/llvm/CodeGen/ExpandLargeFpConvert.h
A llvm/include/llvm/CodeGen/FEntryInserter.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
A llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/PatchableFunction.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/include/llvm/ExecutionEngine/JITLink/EHFrameSupport.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCEHFrameRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/AllocationActions.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.h
M llvm/include/llvm/Frontend/HLSL/HLSLResource.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/include/llvm/IR/FMF.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/InstrProfData.inc
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfYAML.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/include/llvm/SandboxIR/PassManager.h
A llvm/include/llvm/Support/AdvisoryLock.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/LockFileManager.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Support/Timer.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h
R llvm/include/llvm/Transforms/Instrumentation/InstrOrderFile.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/NullPass.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
A llvm/lib/CodeGen/ExpandFp.cpp
R llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineDebugify.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PatchableFunction.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
M llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
R llvm/lib/ExecutionEngine/Orc/EPCEHFrameRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/AllocationActions.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
M llvm/lib/ExecutionEngine/TargetSelect.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/Support/DebugCounter.cpp
M llvm/lib/Support/JSON.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/Timer.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUDelayedMCExpr.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRMCInstLower.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.h
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILDataScalarization.h
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
R llvm/lib/Target/DirectX/DXILResource.cpp
R llvm/lib/Target/DirectX/DXILResource.h
R llvm/lib/Target/DirectX/DXILResourceAnalysis.cpp
R llvm/lib/Target/DirectX/DXILResourceAnalysis.h
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXMCExpr.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCTargetStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVAsmBackend.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/TargetMachineC.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCExpr.h
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrBuilder.h
M llvm/lib/Target/X86/X86InstrConditionalCompare.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/X86/X86VZeroUpper.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
R llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/WindowsDriver/MSVCPaths.cpp
M llvm/runtimes/CMakeLists.txt
A llvm/test/Analysis/BasicAA/captures.ll
M llvm/test/Analysis/CostModel/AArch64/abs.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-overflow.ll
M llvm/test/Analysis/CostModel/AArch64/arith-ssat.ll
M llvm/test/Analysis/CostModel/AArch64/arith-usat.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
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M llvm/test/CodeGen/AArch64/O3-pipeline.ll
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M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
R llvm/test/CodeGen/AArch64/arm64-vclz.ll
R llvm/test/CodeGen/AArch64/arm64-vpopcnt.ll
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M llvm/test/CodeGen/AArch64/branch-folder-oneinst.mir
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A llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/cttz.ll
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M llvm/test/CodeGen/AArch64/dbg-assign-tag-offset-mix-loc.ll
M llvm/test/CodeGen/AArch64/dbg-assign-tag-offset.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
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M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
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M llvm/test/CodeGen/AArch64/pauthlr-prologue-duplication.mir
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M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
R llvm/test/CodeGen/AArch64/vec_cttz.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.r600.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis-heuristics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.r600.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/big_alu.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/branch-folder-requires-no-phis.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
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M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
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M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
A llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine_vloads.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/complex-folding.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
A llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
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M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
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M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/floor.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmad.ll
M llvm/test/CodeGen/AMDGPU/fmax.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
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M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
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M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
A llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/input-mods.r600.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
A llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/jump-address.ll
M llvm/test/CodeGen/AMDGPU/kcache-fold.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll
M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-anonymous-kernels.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-mixed-absolute-addresses.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice-absolute-md.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
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M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
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M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
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M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
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M llvm/test/CodeGen/AMDGPU/llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.cube.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
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M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
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M llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
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M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-memory.r600.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
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M llvm/test/CodeGen/AMDGPU/loop_break.ll
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A llvm/test/CodeGen/AMDGPU/merge-consecutive-wait-alus.mir
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M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
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M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
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M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mmo-target-flags-folding.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-and-hostcall.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
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M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
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M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
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A llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
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M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/pv-packing.ll
M llvm/test/CodeGen/AMDGPU/pv.ll
M llvm/test/CodeGen/AMDGPU/r600-encoding.ll
M llvm/test/CodeGen/AMDGPU/r600-export-fix.ll
M llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
M llvm/test/CodeGen/AMDGPU/r600cfg.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
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M llvm/test/CodeGen/AMDGPU/required-export-priority.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
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M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
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M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
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M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
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M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
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M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
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M llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll
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M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
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M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
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M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
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M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
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M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
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M llvm/test/CodeGen/AMDGPU/swdev282079.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle-export.ll
M llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll
M llvm/test/CodeGen/AMDGPU/texture-input-merge.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/usubsat.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
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M llvm/test/CodeGen/AMDGPU/valu-i1.ll
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M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
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M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
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M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vsetvl-cross-inline-asm.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_fp_max_error/IntelFPMaxErrorFPMath.ll
A llvm/test/CodeGen/SystemZ/int-cmp-65.ll
M llvm/test/CodeGen/SystemZ/int-mul-16.ll
A llvm/test/CodeGen/SystemZ/machine-latecleanup-kills.mir
M llvm/test/CodeGen/SystemZ/rot-03.ll
M llvm/test/CodeGen/SystemZ/shift-16.ll
A llvm/test/CodeGen/SystemZ/shift-17.ll
M llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
A llvm/test/CodeGen/SystemZ/vec-cmp-10.ll
M llvm/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
M llvm/test/CodeGen/SystemZ/vec-cmpsel.ll
M llvm/test/CodeGen/SystemZ/vec-move-23.ll
A llvm/test/CodeGen/SystemZ/vec-mul-07.ll
A llvm/test/CodeGen/SystemZ/vec-mul-08.ll
A llvm/test/CodeGen/SystemZ/vec-mul-09.ll
A llvm/test/CodeGen/SystemZ/vec-mul-10.ll
A llvm/test/CodeGen/SystemZ/vec-mul-11.ll
A llvm/test/CodeGen/SystemZ/vec-mul-12.ll
A llvm/test/CodeGen/SystemZ/vec-mul-13.ll
A llvm/test/CodeGen/SystemZ/vec-mul-14.ll
A llvm/test/CodeGen/SystemZ/vec-reduce-cmp.ll
M llvm/test/CodeGen/SystemZ/vec-shift-07.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-01.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-02.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-03.ll
A llvm/test/CodeGen/SystemZ/vec-unpack-04.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
M llvm/test/CodeGen/X86/DbgValueOtherTargets.test
M llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll
M llvm/test/CodeGen/X86/O0-pipeline.ll
M llvm/test/CodeGen/X86/apx/ccmp.ll
M llvm/test/CodeGen/X86/apx/ctest.ll
A llvm/test/CodeGen/X86/apx/nf-regressions.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-ccmp.mir
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/atomic-unordered.ll
M llvm/test/CodeGen/X86/avx-shift.ll
M llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/CodeGen/X86/block-placement.mir
M llvm/test/CodeGen/X86/branchfolding-ehpad.mir
A llvm/test/CodeGen/X86/combine-fma-negate.ll
M llvm/test/CodeGen/X86/combine-pmadd.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
A llvm/test/CodeGen/X86/fentry.mir
M llvm/test/CodeGen/X86/fold-sext-trunc.ll
M llvm/test/CodeGen/X86/fold-zext-trunc.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/implicit-null-check.ll
M llvm/test/CodeGen/X86/known-bits-vector.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
A llvm/test/CodeGen/X86/llvm.modf-win32.ll
M llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/membarrier.ll
M llvm/test/CodeGen/X86/mfence.ll
M llvm/test/CodeGen/X86/mulvi32.ll
A llvm/test/CodeGen/X86/narrow-load-metadata.ll
M llvm/test/CodeGen/X86/nocf_check.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/optimize-compare.mir
M llvm/test/CodeGen/X86/paddus.ll
M llvm/test/CodeGen/X86/pmul.ll
A llvm/test/CodeGen/X86/pr131389.ll
M llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
M llvm/test/CodeGen/X86/select-optimize.ll
M llvm/test/CodeGen/X86/selectiondag-order.ll
M llvm/test/CodeGen/X86/sink-local-value.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/XCore/dwarf_debug.ll
M llvm/test/DebugInfo/AArch64/cfi-eof-prologue.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/AArch64/select-optimize-trailing-dbg-records.ll
M llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
M llvm/test/DebugInfo/ARM/split-complex.ll
M llvm/test/DebugInfo/ARM/sroa-complex.ll
M llvm/test/DebugInfo/COFF/class-options-common.ll
M llvm/test/DebugInfo/COFF/cpp-mangling.ll
M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lines-bb-start.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/numeric-leaves.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-integer-old.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll
M llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/adce/no-delete.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/codegenprepare/sunk-addr.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/hwasan.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/long-double-x87.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/nullptr-declare.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/scalable-vector.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/set-flag-only-if-modified.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/structured-bindings.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/var-not-alloca-sized.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/vla.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/shared-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/use-before-def.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/do-not-remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/store-new-type.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-vectorize/remove-redundant-dbg.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/store-to-part-of-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/optnone.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/instruction-type.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/roundtrip.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/verify.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/salvage-value.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll
R runtimes/cmake/Modules/FindLibcCommonUtils.cmake
Log Message:
-----------
Rebase, address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/dc66ca4202d2...c6f318df91b7
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