[all-commits] [llvm/llvm-project] e61859: [RISCV] Add Qualcomm uC Xqcili (load large immedia...

[u4f3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e61859f14ddd4a1c816518676a2a6dc19ef92206
      https://github.com/llvm/llvm-project/commit/e61859f14ddd4a1c816518676a2a6dc19ef92206
  Author: u4f3 <ricoafoat at gmail.com>
  Date:   2025-03-13 (Thu, 13 Mar 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/TargetParser/RISCVISAInfo.cpp
    M llvm/test/CodeGen/RISCV/attributes.ll
    A llvm/test/MC/RISCV/xqcili-invalid.s
    A llvm/test/MC/RISCV/xqcili-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add Qualcomm uC Xqcili (load large immediates) extension (#130012)

The Xqcili extension includes a two instructions that load large
immediates than is available with the base RISC-V ISA.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0

This patch adds assembler only support.



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