[all-commits] [llvm/llvm-project] 459b4e: Reland "[AMDGPU] Remove s_delay_alu for VALU->SGPR...

Thu Mar 13 02:26:45 PDT 2025

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 459b4e3fe10805b110bc89aa857532715bfe54e0
      https://github.com/llvm/llvm-project/commit/459b4e3fe10805b110bc89aa857532715bfe54e0
  Author: Ana Mihajlovic <Ana.Mihajlovic at amd.com>
  Date:   2025-03-13 (Thu, 13 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
    M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
    M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
    M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
    M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/fp-classify.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/fract-match.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
    M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
    M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
    M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
    M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
    M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
    M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
    M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
    M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
    M llvm/test/CodeGen/AMDGPU/saddo.ll
    M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
    M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
    M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
    M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll

  Log Message:
  -----------
  Reland "[AMDGPU] Remove s_delay_alu for VALU->SGPR->SALU (#127212)" (#131111)

We have a VALU->SGPR->SALU (VALU writing to SGPR and SALU reading from
it). When VALU is issued, it increments internal counter VA_SDST used to
track use of this SGPR. SALU will not issue until VA_SDST is zero, that
is when VALU is finished writing. Therefore, delays added by s_delay_alu
are not needed in this situation.

To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications