[all-commits] [llvm/llvm-project] 3ad810: AMDGPU/GlobalISel: Disable LCSSA pass (#124297)

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3ad810ea9a97bb3399d8590372a6d3a0eb40d236
      https://github.com/llvm/llvm-project/commit/3ad810ea9a97bb3399d8590372a6d3a0eb40d236
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2025-03-12 (Wed, 12 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Disable LCSSA pass (#124297)

Disable LCSSA pass in preparation for implementing temporal divergence
lowering in amdgpu divergence lowering. Breaks all cases where sgpr or
i1 values are used outside of the cycle with divergent exit.
Regenerate regression tests for amdgpu divergence lowering with LCSSA
disabled.
Update IntrinsicLaneMaskAnalyzer to stop tracking lcssa phis that are
lane masks.



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