[all-commits] [llvm/llvm-project] 7c77a4: [X86] combineConcatVectorOps - convert ISD::VECTOR...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c77a4655ca56eab7e1a4419f0013b514ab42473
      https://github.com/llvm/llvm-project/commit/7c77a4655ca56eab7e1a4419f0013b514ab42473
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-03-11 (Tue, 11 Mar 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/gfni-rotates.ll
    M llvm/test/CodeGen/X86/known-bits-vector.ll
    M llvm/test/CodeGen/X86/matrix-multiply.ll
    M llvm/test/CodeGen/X86/mulvi32.ll
    M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
    M llvm/test/CodeGen/X86/widen_bitcnt.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)

Only concatenate ISD::VECTOR_SHUFFLE nodes if at least one operand is beneficial to concatenate.



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