[all-commits] [llvm/llvm-project] 299be6: [clang] Fix CodeComplete crash involving CWG1432 (...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Mar 10 07:05:08 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/lvfiximprove-max-safe-distance-analysis
Home: https://github.com/llvm/llvm-project
Commit: 299be6123b8106dae31a8c7065d1e395b400cbe2
https://github.com/llvm/llvm-project/commit/299be6123b8106dae31a8c7065d1e395b400cbe2
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/CodeCompletion/GH125500.cpp
Log Message:
-----------
[clang] Fix CodeComplete crash involving CWG1432 (#129436)
This skips the provisional resolution of CWG1432 just when ordering the
candidates for function call code completion, as otherwise this breaks
some assumptions the implementation makes about how closely related the
candidates are.
As a drive-by, deduplicate the implementation with the one used for
class template partial ordering, and strenghten an assertion which was
previosuly dependent on the order of candidates.
Also add a test for the fix for CWG1432 when partial ordering function
templates, which was otherwise untested.
Fixes #125500
Commit: dddfd77f653d7e88965b647e9bc38827cae8bf8a
https://github.com/llvm/llvm-project/commit/dddfd77f653d7e88965b647e9bc38827cae8bf8a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Fix some variables as per coding standards (#129489)
Commit: 17857d92416da5997262318a6f62fccad9c5a156
https://github.com/llvm/llvm-project/commit/17857d92416da5997262318a6f62fccad9c5a156
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/kmov.ll
M llvm/test/CodeGen/X86/pr78897.ll
Log Message:
-----------
[X86] Generate `kmov` for masking integers (#120593)
When we have an integer used as a bit mask the llvm ir looks something
like this
```
%1 = and <16 x i32> %.splat, <i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256, i32 512, i32 1024, i32 2048, i32 4096, i32 8192, i32 16384, i32 32768>
%cmp1 = icmp ne <16 x i32> %1, zeroinitializer
```
where `.splat` is vector containing the mask in all lanes. The assembly
generated for this looks like
```
vpbroadcastd %ecx, %zmm0
vptestmd .LCPI0_0(%rip), %zmm0, %k1
```
where we have a constant table of powers of 2.
Instead of doing this we could just move the relevant bits directly to
`k` registers using a `kmov` instruction.
```
kmovw %ecx, %k1
```
This is faster and also reduces code size.
Commit: a088b0ec7653f12e60d01959bc71ea4f7fd206f0
https://github.com/llvm/llvm-project/commit/a088b0ec7653f12e60d01959bc71ea4f7fd206f0
Author: Vy Nguyen <vyng at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Telemetry.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[LLDB][Telemetry]Define DebuggerTelemetryInfo and related methods (#127696)
This type of entry is used to collect data about the debugger
startup/exit
Also introduced a helper ScopedDispatcher
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: cb940306d4a3078b53141221985ca8893a9a2cb6
https://github.com/llvm/llvm-project/commit/cb940306d4a3078b53141221985ca8893a9a2cb6
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
Log Message:
-----------
[test] Add '-o -' to llc command to avoid creating unnecessary temp files
Commit: d37a39207bc15507e602e41b7655f615c10c9a1d
https://github.com/llvm/llvm-project/commit/d37a39207bc15507e602e41b7655f615c10c9a1d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/dtor.cu
Log Message:
-----------
[CUDA][HIP] fix virtual dtor host/device attr (#128926)
Currently if CUDA/HIP users use template class with virtual dtor
and std::string data member with C++20 and MSVC. When the template
class is explicitly instantiated, there is error about host
function called by host device function (used to be undefined
symbols in linking stage before member destructors were checked
by deferred diagnostics).
It was caused by clang inferring host/device attributes for
default dtors. Since all dtors of member and parent classes
have implicit host device attrs, clang infers the virtual dtor have
implicit host and device attrs. Since virtual dtor of
explicitly instantiated template class must be emitted,
this causes constexpr dtor of std::string emitted, which
calls a host function which was not emitted on device side.
This is a serious issue since it prevents users from
using std::string with C++20 on Windows.
When inferring host device attr of virtual dtor of explicit
template class instantiation, clang should be conservative
since it is sure to be emitted. Since an implicit host device
function may call a host function, clang cannot assume it is
always available on device. This guarantees dtors that
may call host functions not to have implicit device attr,
therefore will not be emitted on device side.
Fixes: https://github.com/llvm/llvm-project/issues/108548
Fixes: SWDEV-517435
Commit: 96336acb48562edcae59eb1d5d4acb0200efeded
https://github.com/llvm/llvm-project/commit/96336acb48562edcae59eb1d5d4acb0200efeded
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Tighten double-destroy check (#129528)
The instance pointer of the current function being the same as the one
we're destroying is only relevant if said function is also a destructor.
Commit: bcce75415e52c8529e94f70c49b481e903381aaa
https://github.com/llvm/llvm-project/commit/bcce75415e52c8529e94f70c49b481e903381aaa
Author: Robert Konicar <xkonicar at fi.muni.cz>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add suport for ptrmask intrinsic op (#129539)
Resolves #115805
This patch adds support for ptrmask intrinsic in LLVM dialect and
corresponding import/export tests.
Commit: bcb0c3a2917156e313dc5258fce0890a951ebabf
https://github.com/llvm/llvm-project/commit/bcb0c3a2917156e313dc5258fce0890a951ebabf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129465)
Commit: da6d5fa79a558b66c281bed3f5ce848a69a65208
https://github.com/llvm/llvm-project/commit/da6d5fa79a558b66c281bed3f5ce848a69a65208
Author: Lukas Bergdoll <lukas.bergdoll at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libc/src/stdlib/qsort_pivot.h
Log Message:
-----------
Add missing LIBC_INLINE to qsort_pivot.h (#126249)
Fixes #111495
Commit: 95e460a3878555907ae8e8afe350b40ea8150005
https://github.com/llvm/llvm-project/commit/95e460a3878555907ae8e8afe350b40ea8150005
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Core/Debugger.cpp:1002:10: error: lambda capture 'this'
is not used [-Werror,-Wunused-lambda-capture]
Commit: 396139a3b6fc9f1a06a010c1da4164527d1e14da
https://github.com/llvm/llvm-project/commit/396139a3b6fc9f1a06a010c1da4164527d1e14da
Author: wieDasDing <6884440+dingxiangfei2009 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python.swig
Log Message:
-----------
Push down the swig module to avoid an import cycle (#129135)
Fix #92603
This replaces #113066. I finally came back to this issue and it seems
that this approach is still very promising.
As requested, I have added a short explanation as to why CPython module
should be moved into a submodule.
cc @JDevlieghere who reviewed on the previous PR earlier.
Commit: ccf1bfc1d50a70260d200a9137ab7924dac029a8
https://github.com/llvm/llvm-project/commit/ccf1bfc1d50a70260d200a9137ab7924dac029a8
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#128074)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the
level is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256
when the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so
an error should be raised instead
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 5d7d66ba0d1ad6fcf1aefffd045eea88597f4614
https://github.com/llvm/llvm-project/commit/5d7d66ba0d1ad6fcf1aefffd045eea88597f4614
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A clang/include/clang/AST/DeclOpenACC.h
M clang/include/clang/AST/DeclVisitor.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaBase.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/DeclBase.cpp
A clang/lib/AST/DeclOpenACC.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/AST/ast-print-openacc-declare-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
A clang/test/SemaOpenACC/declare-construct-ast.cpp
A clang/test/SemaOpenACC/declare-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/unimplemented-construct.c
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'declare' construct AST/Sema
The 'declare' construct is the first of two 'declaration' level
constructs, so it is legal in any place a declaration is, including as a
statement, which this accomplishes by wrapping it in a DeclStmt. All
clauses on this have a 'same scope' requirement, which this enforces as
declaration context instead, which makes it possible to implement these
as a template.
The 'link' and 'device_resident' clauses are also added, which have some
similar/small restrictions, but are otherwise pretty rote.
This patch implements all of the above.
Commit: cb850fef2a564ea330e8a4878fafb4f5b4a7a98e
https://github.com/llvm/llvm-project/commit/cb850fef2a564ea330e8a4878fafb4f5b4a7a98e
Author: David Green <david.green at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
Log Message:
-----------
[AArch64] Don't try to custom lower fp16 selects with nofp (#129492)
If we do not have fp then we do not need to try and custom lower fp16
selects.
Fixes #129394.
Commit: 0735cece68abd7138474a62e0b023739830c4d17
https://github.com/llvm/llvm-project/commit/0735cece68abd7138474a62e0b023739830c4d17
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-associate-component.fir
Log Message:
-----------
[flang] Fixed fir.coordinate_of access in AddDebugInfo. (#129423)
The issue came up after #127231, when fir.coordinate_of, fed into
a declare, only has the field attribute and no coordinates.
Commit: ba9bd22e1b535a1669e3918fa77f6edaf6851d9a
https://github.com/llvm/llvm-project/commit/ba9bd22e1b535a1669e3918fa77f6edaf6851d9a
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU] Account for existing SDWA selections (#123221)
The si-peephole-sdwa pass adjusts the selections on sdwa instructions to
the selections on their operands during its conversions. For instance,
if an instruction selects `BYTE_0` and its operand selects `WORD_1`, the
combined selection should be `BYTE_2`, i.e. "`BYTE_0` of `WORD_1`". The
existing implementation does not always handle this correctly in some
complex situations with instructions across different basic blocks as
demonstrated by the test cases included in this PR.
This PR adds an additional selection combination step to the conversion
to fix this issue. It reverts the changes made by PR #123942 which had
disabled the conversion of preexisting SDWA instructions completely as a
quick fix.
---------
Co-authored-by: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 0303fd2746dfc836507a5728cfc109316368894c
https://github.com/llvm/llvm-project/commit/0303fd2746dfc836507a5728cfc109316368894c
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
M llvm/test/CodeGen/PowerPC/memset-tail.ll
Log Message:
-----------
[PowerPC] hoist xxspltib out of loop body (#127121)
Fixes https://github.com/llvm/llvm-project/issues/127119
Remove `hasSideEffects` from `xxspltib` since there is no special
restriction specified in the ISA that prevent it from being reordered,
move, CSE, or LICM. Removing this restriction will allow `xxspltib` to
be hoisted out of loop bodies.
Commit: 3dafa486a6a41bacd31b3b1661fa44fa5e71520a
https://github.com/llvm/llvm-project/commit/3dafa486a6a41bacd31b3b1661fa44fa5e71520a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/deref-to-array.cpp
Log Message:
-----------
[clang][bytecode] Don't narrow() when dereferencing to array type (#129524)
It doesn't make sense to do this if the result is supposed to be an
array.
Commit: 24794792858ae76ea593d4c1d5ea45c73b4fd87e
https://github.com/llvm/llvm-project/commit/24794792858ae76ea593d4c1d5ea45c73b4fd87e
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
Log Message:
-----------
[AMDGPU] Extend ComputePGMRSrc3 to gfx10+. NFCI. (#129289)
ComputePGMRSrc3 exists since gfx90a and gfx10+. Current code
only expects gfx90a. This is NFCI since we do not fill it on
gfx10+ yet.
Commit: a3584fb13eebeb736aba20ed1d0dfa77fc73c552
https://github.com/llvm/llvm-project/commit/a3584fb13eebeb736aba20ed1d0dfa77fc73c552
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC] Fix Windows after #121115 (#129534)
Commit: 705decc860f1e7aa73476463ad98ce2ea293f7da
https://github.com/llvm/llvm-project/commit/705decc860f1e7aa73476463ad98ce2ea293f7da
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/merged-prs.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/version-check.yml
Log Message:
-----------
[Github] Hash Pin Actions in Most Workflows (#129486)
This patch haspins all actions in most of the LLVM Github workflows.
This is something we try to do, but no one has gone through and combed
through all of the workflows before this patch.
Notably, this patch does not bump any major versions of actions just in
case there are subtle breaking changes introduced between versions that
could impact us. Also, this patch omits the libc/libc++ workflows so
that they can be split into separate PRs for the respective subproject
maintainers to review.
Commit: c9aefe10d78276bf59780b6e7dd834fae9ea91e7
https://github.com/llvm/llvm-project/commit/c9aefe10d78276bf59780b6e7dd834fae9ea91e7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github][libc] Hash Pin Actions in Workflows (#129487)
This patch has pins actions in the libc Github workflows. Hash pinning
is a best practice as it ensures we are getting an exact action version,
which can help with reproducibility/reliability. It additionally
alleviates security concerns as an attacker can modify release assets,
potentially giving them access to tokens in privileged workflows.
Commit: 47c255b3e7291fd8a7a6fb9d2a183eaad75d5adb
https://github.com/llvm/llvm-project/commit/47c255b3e7291fd8a7a6fb9d2a183eaad75d5adb
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add several level checks (#128074)" (#129549)
This reverts commit ccf1bfc1d50a70260d200a9137ab7924dac029a8.
Commit: 201208998f65c25eca7b8006b1fb8b05d4b21214
https://github.com/llvm/llvm-project/commit/201208998f65c25eca7b8006b1fb8b05d4b21214
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
Log Message:
-----------
[SPIR-V] Stop using Register to represent target specific virtual registers. (#129362)
These were using the virtual register encoding in Register which
required including Register.h in MC layer code which is a layering
violation.
This also required converting Register with bit 31 set to MCRegister
which should be an error. Register with bit 31 set should only be used
for codegen virtual register. I'd like to add assertions to enforce
this.
Migrate to MCRegister and manually create an encoding with bit 31 set.
WebAssembly also does this.
We could consider adding interfaces to MCRegister for target specific
virtual registers.
Commit: 3ce92e1c4f5436d3fd93fffada520e6be72c7a1e
https://github.com/llvm/llvm-project/commit/3ce92e1c4f5436d3fd93fffada520e6be72c7a1e
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
github: fix empty continuation line; remove trailing whitespace (#129535)
- Trailing whitespace shows up as red on my editor, so remove.
- Docker on my machine warns that having line continuations like:
```
sudo \
foo
```
is deprecated, and will become an error, so fix that up ahead of time.
Commit: 86fc248ff615ae5ce9f2ad10bbf49c9616d0be36
https://github.com/llvm/llvm-project/commit/86fc248ff615ae5ce9f2ad10bbf49c9616d0be36
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
Log Message:
-----------
[gn] port 50317ca13f6ad9
Commit: f3d4d1154799b32512b0fed52c9938f76b9264b5
https://github.com/llvm/llvm-project/commit/f3d4d1154799b32512b0fed52c9938f76b9264b5
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Fix support for dynamic libraries in CLANG_BOLT
Simpler detection of dynamic library operands as the readelf one seems
to be unreliable (works on my setup, not on buildbots).
This is a follow-up to #127020
Commit: 39197938891b954d199473a58e64e237d1da8d46
https://github.com/llvm/llvm-project/commit/39197938891b954d199473a58e64e237d1da8d46
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Avoid repeated hash lookups (NFC) (#129469)
Commit: 7c580893ea662b513da71a3da9ae4ab1b2dafc6b
https://github.com/llvm/llvm-project/commit/7c580893ea662b513da71a3da9ae4ab1b2dafc6b
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/discard.ll
Log Message:
-----------
[NVPTX] Add Intrinsics for discard.* (#128404)
[NVPTX] Add Intrinsics for discard.*
This PR adds intrinsics for all variations of discard.*
* These intrinsics supports generic or global for all variations.
* The lowering is handled from nvvm to nvptx tablegen directly.
* Lit tests are added as part of discard.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA
<https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-discard>_.
---------
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Co-authored-by: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Commit: fc81e264f933aa428db46b57ae08af68942ad476
https://github.com/llvm/llvm-project/commit/fc81e264f933aa428db46b57ae08af68942ad476
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 5d7d66ba0d1a
Commit: e93cd15f9e8ab89774152e26b17d9030d0fe20a5
https://github.com/llvm/llvm-project/commit/e93cd15f9e8ab89774152e26b17d9030d0fe20a5
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/CodeGen/MIR/AArch64/lit.local.cfg
Log Message:
-----------
[win] Enable test/CodeGen/MIR/AArch64 on Windows (#122832)
Not sure why this was disabled in the first place (dates back to
<https://github.com/llvm/llvm-project/commit/fbe9c04c5f72cf3eca39793aafc92071ef13c046>),
but it appears to be working for me.
Commit: 0739ce88efa4481fe03100aa2eee284bc5ff9d81
https://github.com/llvm/llvm-project/commit/0739ce88efa4481fe03100aa2eee284bc5ff9d81
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MC] Port initializeVariantKinds to ARM COFF and SystemZ GOFF
... so that they use the target-specific variantKindDescs instead of the
generic MCExpr one (which will go away as it's error-prone).
Commit: d2c4d1ec48b7c723307121164099fb2fa7d959a9
https://github.com/llvm/llvm-project/commit/d2c4d1ec48b7c723307121164099fb2fa7d959a9
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/fmemprof.cpp
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Export __memprof_default_options_str on Darwin (#128920)
The `-memprof-runtime-default-options` LLVM flag introduced in
https://github.com/llvm/llvm-project/pull/118874 creates the
`__memprof_default_options_str` symbol with `WeakAnyLinkage` on Darwin.
https://github.com/ellishg/llvm-project/blob/fa0202169af23419c4bcbf66eabd1beb6b6e8e34/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp#L573-L576
This ensures Darwin passes `-exported_symbol
___memprof_default_options_str` to the linker so that the runtime
library has visibility into this symbol.
This will replace the earlier PR
https://github.com/llvm/llvm-project/pull/128615
Commit: a704e6587bfd974af053712c6da01fa04d74c31b
https://github.com/llvm/llvm-project/commit/a704e6587bfd974af053712c6da01fa04d74c31b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
Log Message:
-----------
[flang] Added alternative inlining code for hlfir.cshift. (#129176)
Flang generates slower code for `CSHIFT(CSHIFT(PTR(:,:,I),sh1,1),sh2,2)`
pattern in facerec than other compilers. The first CSHIFT can be done
as two memcpy's wrapped in a loop for the second dimension.
This does require creating a temporary array, but it seems to be faster,
than the current hlfir.elemental inlining.
I started with modifying the new index computation in
hlfir.elemental inlining: the new arith.select approach does enable
some vectorization in LLVM, but on x86 it is using gathers/scatters
and does not give much speed-up.
I also experimented with LoopBoundSplitPass
and InductiveRangeCheckElimination for a simple (not chained) CSHIFT
case, but I could not adjust them to split the loop with a condition
on the value of the IV into two loops with disjoint iteration spaces.
I thought if I could do it, I would be able to keep the hlfir.elemental
inlining mostly untouched, and then adjust the hlfir.elemental inlining
heuristics for the facerec case.
Since I was not able to make these pass work for me, I added a special
case inlining for CSHIFT(ARRAY,SH,DIM=1) via hlfir.eval_in_mem.
If ARRAY is not statically known to have the contiguous leading
dimension, there is a dynamic check for contiguity, which allows
exposing it to LLVM and enabling the rewrite of the copy loops
into memcpys. This approach is stepping on the toes of LoopVersioning,
but it is helpful in facerec case.
I measured ~6% speed-up on grace, and ~4% on zen4.
Commit: 44badc9810ede7843c65ac3e32e0820c13eaec85
https://github.com/llvm/llvm-project/commit/44badc9810ede7843c65ac3e32e0820c13eaec85
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - use isSplatValue helper instead of matching specific VBROADCAST opcodes. (#129556)
Commit: 64c26c8f16aeff3b4ef99f171c771c08353cfbdf
https://github.com/llvm/llvm-project/commit/64c26c8f16aeff3b4ef99f171c771c08353cfbdf
Author: jimingham <jingham at apple.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHooks.py
Log Message:
-----------
Fix a bug copying the stop hooks from the dummy target. (#129340)
We didn't also copy over the next stop hook id, which meant we would
overwrite the stop hooks from the dummy target with stop hooks set after
they are copied over.
Commit: 8f4ee42d59976a9343d7576ef9a1fe2cf482a057
https://github.com/llvm/llvm-project/commit/8f4ee42d59976a9343d7576ef9a1fe2cf482a057
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++][test] extend XFAIL clauses to cover Amazon Linux too (#129377)
The default triple of Amazon Linux on AArch64 is aarch64-amazon-linux,
see issue highlighded by PR #109263, somewhat serious linker issues are
encountered if any other triple is being used.
Unfortunately, this makes XFAIL lines like
`XFAIL: target=aarch64{{.*}}-linux-gnu` ineffective, making it
impossible to complete all of the check-cxx on Amazon Linux without
failing.
Commit: a0671758eb6e52a758bd1b096a9b421eec60204c
https://github.com/llvm/llvm-project/commit/a0671758eb6e52a758bd1b096a9b421eec60204c
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
Log Message:
-----------
Reapply [MCExpr] Remove generic getVariantKindName and getVariantKindForName
They are error-prone as MCParser may parse a variant kind,
which cannot be handled by the target.
The replacement in MCAsmInfo should be used instead.
Follow-up to f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Commit: d9ac5d0be6798ed1219ed42db64d8c768547132c
https://github.com/llvm/llvm-project/commit/d9ac5d0be6798ed1219ed42db64d8c768547132c
Author: OverMighty <its.overmighty at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libc/docs/talks.rst
Log Message:
-----------
[libc][docs] Add links to Peter Smith's FOSDEM 2025 talk (#129555)
Commit: f44c18a97d68ff91f76e9c707b92a0929abac88b
https://github.com/llvm/llvm-project/commit/f44c18a97d68ff91f76e9c707b92a0929abac88b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[NFC][CodingStandard] Fix text style for C++ keywords (#128932)
Fix C++ keywords in Restrict Visibility section to use `` (inline
literal) markup to be consistent with the rest of the doc.
Commit: 6e59282235b2ba7b5bbae968cafb15bab9656cff
https://github.com/llvm/llvm-project/commit/6e59282235b2ba7b5bbae968cafb15bab9656cff
Author: ofri frishman <ofri4321 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
A mlir/test/Dialect/Tensor/bubble-up-extract-slice-op.mlir
Log Message:
-----------
[MLIR] Add pattern to bubble up tensor.extract_slice (#126898)
Add a pattern that bubbles up tensor.extract_slice through
tensor.expand_shape, and add a transform op to tensor dialect
to directly use this pattern.
This pattern enables tiling and fusing op chains which contain
tensor.expand_shape if added as a cleanup pattern of tile and fuse
utility.
Without this pattern that would not be possible, as
tensor.expand_shape does not implement the tiling interface.
In addition, registering this pattern as a cleanup pattern for
transform.structured.fuse.
The pattern was first implement in IREE project by
Quinn Dawkins and is being upstreamed.
---------
Co-authored-by: Quinn Dawkins <quinn.dawkins at gmail.com>
Commit: af464c6d53c1873101e312048d35d1daed27e407
https://github.com/llvm/llvm-project/commit/af464c6d53c1873101e312048d35d1daed27e407
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
Log Message:
-----------
[Clang][diagnostics] Fix structured binding shadows template param loc (#129116)
Fix structured binding shadows template parameter location
Fixes: #129060
Commit: ab30df470af91427abf03f99f7f3517129464ca9
https://github.com/llvm/llvm-project/commit/ab30df470af91427abf03f99f7f3517129464ca9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/func-simple.cpp
Log Message:
-----------
[CIR] Upstream floating point literal expressions (#129304)
This change adds support for floating point literal expressions
Commit: 079557c3d4b8f42d6691d4a131bd78963d0c77bd
https://github.com/llvm/llvm-project/commit/079557c3d4b8f42d6691d4a131bd78963d0c77bd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add verifiers for FFT2d and RFFT2d (#129273)
Adds checks for element types and input/output shapes.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 4dd29ebb8dc563be37244612f44537e8eff33c32
https://github.com/llvm/llvm-project/commit/4dd29ebb8dc563be37244612f44537e8eff33c32
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
Log Message:
-----------
[clang][bytecode][NFC] Move incorrect LLVM_PREFERRED_TYPE attribute (#128740)
Looks like this was accidentally added after the bitfield and thus
didn't work.
Commit: 6c9a9d9fe2371e586be8ecba8b9a2d129d1c0226
https://github.com/llvm/llvm-project/commit/6c9a9d9fe2371e586be8ecba8b9a2d129d1c0226
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
A llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
Log Message:
-----------
[AMDGPU] Set inst_pref_size to maximum (#126981)
On gfx11 and gfx12 set initial instruction prefetch size to a
minimum of kernel size and maximum allowed value.
Fixes: SWDEV-513122
Commit: 70b95d16645dfe1e8d76bdf94e791d74ad36e780
https://github.com/llvm/llvm-project/commit/70b95d16645dfe1e8d76bdf94e791d74ad36e780
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][linalg] Retain Op Type of linalg ops in fuseWithReshapeByExpansion pattern (#129128)
This PR preserve linalg Op types for certain named ops such as Fill,
Copy and Transpose instead of fusion always resulting in a generic Op.
---------
Signed-off-by: Nirvedh Meshram <nirvedh at gmail.com>
Commit: 28fc00b10ef72a3573905826ecdee693fd620959
https://github.com/llvm/llvm-project/commit/28fc00b10ef72a3573905826ecdee693fd620959
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
Log Message:
-----------
[GSYM] Use debug line offsets during GSYM creation (#129196)
This patch introduces support for the `DW_AT_LLVM_stmt_sequence`
attribute in the GSYM DWARF transformer. With this change, the DWARF
GSYM creation process can now accurately associate debug information
with the correct functions, even when multiple functions have been
merged together.
The `macho-gsym-merged-callsites-dsym.yaml` test data is regenerated to
include the fixes in the DWARF linker
(https://github.com/llvm/llvm-project/pull/128953) and the test is
updated to check that debug data is correctly associated for merged
functions.
Commit: dc1ff4145a3b3ab8d1bbe71fb05bfe15d8bbd4ae
https://github.com/llvm/llvm-project/commit/dc1ff4145a3b3ab8d1bbe71fb05bfe15d8bbd4ae
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/test/mlir-tblgen/constraint-unique.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][tblgen] Migrate tests to properties for attributes, fix remove*Attr() (#123505)
The only in-tree user of `bit usePropertiesForAttributes = 0;` was a
series of tests for the output of -gen-op-{decls,defs}. This commit
updates those tests to match the rest of the repository.
In the short term, this is intended to enable testing upcoming updates
to collective builders. In the long term, this is a step in the removal
of usePropertiesForAttributes = 0.
One side effect of these tests updates was the realization that the
autogenerated implementations of removeFooAttr() were not returning the
value of the removed attribute. This issue has been addressed and the
tests have been updated to reflect the change. This is the only
functionality change in this PR.
Commit: 25713ed85fd327f4733b2ac6083c23464aa9c646
https://github.com/llvm/llvm-project/commit/25713ed85fd327f4733b2ac6083c23464aa9c646
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
Log Message:
-----------
[HLSL] Add additional overloads for min and max to allow for mixed scalar and vector arguments (#129334)
Add additional overloads for min and max to support
min(vector<T,N>, T) and min(T, vector<T,N>)
max(vector<T,N>, T) and max(T, vector<T,N>)
Add tests
Closes #128231
Commit: 41e58b6737ee8b5fbd019fb6a6986d94c5f40566
https://github.com/llvm/llvm-project/commit/41e58b6737ee8b5fbd019fb6a6986d94c5f40566
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP][NFC]Add a test for 2 spilled vector values spilled in diamond shaped control flow
Commit: 4fd5d935a3d30d20aed7697be5d8bb76dae8eab6
https://github.com/llvm/llvm-project/commit/4fd5d935a3d30d20aed7697be5d8bb76dae8eab6
Author: Brendan Sweeney <brs at eecs.berkeley.edu>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Emitting proper atomic ABI tag when Zalasr is enabled (#121017)
When Zalasr is enabled, it will emit the A7 atomic ABI tag. Zalasr is
the load-acquire and store-release extension, and the reason A7 (and
A6S) exists is to support it.
The A7 atomic ABI is compatible with A6S (which is what is currently
emitted as the tag), but A7 is not compatible with A6C, while A6C and
A6S are compatible.
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-atomic.adoc#risc-v-atomics-mappings
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version
Commit: 83f87212016c3be50484faee3c744a3417df175f
https://github.com/llvm/llvm-project/commit/83f87212016c3be50484faee3c744a3417df175f
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-powerpc64-aix-byval.fir
A flang/test/Fir/struct-passing-ppc64le-byval.fir
A flang/test/Fir/struct-return-powerpc64-aix.fir
A flang/test/Fir/struct-return-ppc64le.fir
Log Message:
-----------
[flang] handle passing bind(c) derived type by value for ppc64le and powerpc64-aix (#128780)
Commit: a9b2e31fb0fbb6ce3cbc4ae2b77301c95647b617
https://github.com/llvm/llvm-project/commit/a9b2e31fb0fbb6ce3cbc4ae2b77301c95647b617
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/collectives05.f90
Log Message:
-----------
[flang] Define CO_REDUCE intrinsic procedure (#125115)
Define the intrinsic `CO_REDUCE` and add semantic checks.
A test was already present but was at `XFAIL`. It has been modified to
take new messages into the output.
Commit: 08dc81bd2917148e119819b3c668d0c870f96bb5
https://github.com/llvm/llvm-project/commit/08dc81bd2917148e119819b3c668d0c870f96bb5
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
Log Message:
-----------
[bazel] fixes to make Telemetry work in lldb
Previously telemetry was optional at build-time in such a way that none
of it was built at all, but llvm/llvm-project at 159b872b3736 changed that
and now it's optional in a different way so we need to have it available
in the bazel BUILD graph.
Commit: 1fc49ff59354ba6f6262018d52ff4e88a54372f8
https://github.com/llvm/llvm-project/commit/1fc49ff59354ba6f6262018d52ff4e88a54372f8
Author: Mirza Halilčević <109971222+mirza-halilcevic at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
M mlir/include/mlir/IR/Types.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/IR/Types.cpp
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-floats-ocp.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add OCP FP8 support for new hardware (#127728)
(Continuing from #106160)
This PR addresses remaining review comments from the original PR.
Original PR Description
---
Upcoming hardware (gfx12 and some future gfx9) will support the OCP
8-bit float formats for their matrix multiplication intrinsics and
conversion operations, retaining existing opcodes and compiler builtins.
This commit adds support for these types to the MLIR wrappers around
such operations, ensuring that the OCP types aren't used to generate
those builtins on hardware that doesn't expect that format and,
conversely, to ensure that the pre-OCP formats aren't used on new
hardware.
---------
Signed-off-by: Mirza Halilcevic <mirza.halilcevic at amd.com>
Co-authored-by: Paul Fuqua <pf at acm.org>
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Commit: 4ca8ea8c972ae05a891687eda6704ec607184fae
https://github.com/llvm/llvm-project/commit/4ca8ea8c972ae05a891687eda6704ec607184fae
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Fix GPU intrinsic helpers incorrectly sign extending (#129560)
Summary:
These return values are actually signed, meaning that casting will
extend it and then all the bits will be one.
Commit: 39402cde6149b5a9f5d48455959df350dfe63017
https://github.com/llvm/llvm-project/commit/39402cde6149b5a9f5d48455959df350dfe63017
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsan] Refactor cast-overflow test (#129460)
This PR cleans up cast-overflow.cpp, more specifically:
1. avoid using undefined value as an exit code (old case `9`)
2. narrowing conversions are allowed to produce `inf` and they are
well-defined. Remove dead code (old case `8`)
3. the same applies to the conversion int -> float16. Remove dead code
(old case `7`)
See also
https://clang.llvm.org/docs/UndefinedBehaviorSanitizer.html#:~:text=%2Dfsanitize%3Dfloat%2Dcast,to%20integer%20types.
Currently ubsan doesn't properly detect UB on float16 -> int casts, I
have a fix for that (will send as a separate PR).
Commit: b971d4d7c80821d648015281b7926ee6f93dccc9
https://github.com/llvm/llvm-project/commit/b971d4d7c80821d648015281b7926ee6f93dccc9
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
M bolt/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Log Message:
-----------
[BOLT][AArch64] Add symbolizer for AArch64 disassembler. NFCI (#127969)
Add AArch64MCSymbolizer that symbolizes `MCInst` operands during
disassembly. The symbolization was previously done in
`BinaryFunction::disassemble()`, but it is also required by
`scanExternalRefs()` for "lite" mode functionality. Hence, similar to
x86, I've implemented the symbolizer interface that uses
`BinaryFunction` relocations to properly create instruction operands. I
expect the result of the disassembly to be identical after the change.
AArch64 disassembler was not calling `tryAddingSymbolicOperand()` for
`MOV` instructions. Fix that. Additionally, the disassembler marks `ldr`
instructions as branches by setting `IsBranch` parameter to true. Ignore
the parameter and rely on `MCPlusBuilder` interface instead.
I've modified `--check-encoding` flag to check symolization of operands
of instructions that have relocations against them.
Commit: 9f879dea2e35a8f4147c64ebcb6d4b61167a110a
https://github.com/llvm/llvm-project/commit/9f879dea2e35a8f4147c64ebcb6d4b61167a110a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port b971d4d7c808
Commit: 87f837cb26f6ab543d70c42f1961b125102bff2c
https://github.com/llvm/llvm-project/commit/87f837cb26f6ab543d70c42f1961b125102bff2c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unneeded classof with VPHeaderRecipe args (NFC).
The extra classof implementation is not needed any longer.
Commit: 2b509ecf2dadcd5ea81b15c85f116c20b9b1f649
https://github.com/llvm/llvm-project/commit/2b509ecf2dadcd5ea81b15c85f116c20b9b1f649
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
[AST] Reorder fields in FunctionTypeBitfields to avoid splitting a field across 32 bit boundary
Fixes #129521.
Commit: 36a2d7bf1bd91f4c611c60708f8637bff18ecdbc
https://github.com/llvm/llvm-project/commit/36a2d7bf1bd91f4c611c60708f8637bff18ecdbc
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[AsmWriter] Combine IsConstant and GetConstant (NFCI) (#129288)
There was an assert in GetConstant checked if Bound is constant.
However, GetConstant was only called when IsConstant==true.
This refactor attempts to get rid of the assert by combining GetConstant
and IsContstant.
Commit: 2cb7b4e0cdd2b7439618622b9dcf2bb8b330fd6a
https://github.com/llvm/llvm-project/commit/2cb7b4e0cdd2b7439618622b9dcf2bb8b330fd6a
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] fix missing dep on //llvm:config in //lldb:Core
Commit: eee3db5421040cfc3eae6e92ed714650a6f741fa
https://github.com/llvm/llvm-project/commit/eee3db5421040cfc3eae6e92ed714650a6f741fa
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
Log Message:
-----------
[SystemZ] Change operand type for CKSM intrstruction. (#129572)
The current definition of the CKSM instruction uses GR64 for the first
operand. However, according to the Principles Of Operation the bits 0-31
of the first operand always remain unchanged. This PR changes the first
operand to GR32 to model this.
This has no further implication as this instruction is not used during
code generation.
Commit: 1c4e0f6a54538972741ab1c7a5fcc5e5efd3d90c
https://github.com/llvm/llvm-project/commit/1c4e0f6a54538972741ab1c7a5fcc5e5efd3d90c
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Pragma.cpp
A clang/test/Modules/clang-pragmas.c
Log Message:
-----------
[clang] Add #pragma clang __debug module_lookup (#129158)
This can be used to trigger implicit module map lookup without also
importing the module. This can be useful for debugging as it avoids
loading the module map from the AST file, which has slightly different
semantics.
Commit: 8f971ca1d939d65ca077ec5f86cd33652d09feee
https://github.com/llvm/llvm-project/commit/8f971ca1d939d65ca077ec5f86cd33652d09feee
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
R flang/include/flang/Lower/DumpEvaluateExpr.h
A flang/include/flang/Semantics/dump-expr.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
R flang/lib/Lower/DumpEvaluateExpr.cpp
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/dump-expr.cpp
Log Message:
-----------
[flang] Move DumpEvaluateExpr from Lower to Semantics (#128723)
Since evaluate::Expr can show up in the parse tree in the semantic
analysis step, make it possible to dump its structure in the Semantics
module.
The Lower module depends on Semantics, so the code is still accessible
in it.
Commit: 2d0eb5df4fb4e028e86310e631789b65cb009bf1
https://github.com/llvm/llvm-project/commit/2d0eb5df4fb4e028e86310e631789b65cb009bf1
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/test/COFF/arm64x-includeoptional.s
Log Message:
-----------
[LLD][COFF] Add support for -includeglob on ARM64X (#129515)
Include symbols from both symbol tables.
Commit: fd9a882ce31cb0a53dba63528c15d76f088854b7
https://github.com/llvm/llvm-project/commit/fd9a882ce31cb0a53dba63528c15d76f088854b7
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
Log Message:
-----------
[bazel] add missing header to bolt build file
Commit: 7d650bf3318b51cee7f89c4792e0f9b36bcdcc46
https://github.com/llvm/llvm-project/commit/7d650bf3318b51cee7f89c4792e0f9b36bcdcc46
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
Log Message:
-----------
[mlir][tosa] Fix several bugs in `DepthwiseConv2DIsMul` (#129210)
This PR fixes several bugs in `DepthwiseConv2DIsMul`:
- The DepthwiseConv2DOp should restrict the types to integer or float to
prevent a crash.
- `notifyMatchFailure` should be called before creating the new
operations.
Commit: f2473bc31eee20bb55afa2890490887541501724
https://github.com/llvm/llvm-project/commit/f2473bc31eee20bb55afa2890490887541501724
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
A lld/test/COFF/arm64x-comm.s
Log Message:
-----------
[LLD][COFF] Support -aligncomm directives on ARM64X (#129513)
Commit: a21ae2f04f529b6b62d83786e867e9d7dc169369
https://github.com/llvm/llvm-project/commit/a21ae2f04f529b6b62d83786e867e9d7dc169369
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGObjCGNU.cpp
Log Message:
-----------
[CodeGen][ObjCGNU] Replace PointerType::getUnqual(Type) with opaque pointer version (NFC) (#128715)
Follow-up to #123569
Commit: d6599fc3b9e1cf1659999e8a755ae1d68bc3b4b3
https://github.com/llvm/llvm-project/commit/d6599fc3b9e1cf1659999e8a755ae1d68bc3b4b3
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_origins.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_origins.ll
Log Message:
-----------
[msan][NFC] Rename NEON tests and fix comment (#127926)
This renames the neon_* tests to be more consistent with the original files that they were forked from. This makes it easier for maintainers to see which test files may need to be ported to MSan.
It also fixes the header comment for llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll (instrumentation was updated in #126136 aka e9e6ba6a5e2a4ca7386861136196903febb9968b, but the comment was not).
Commit: d5cec386c14ac46ee252da29f5bd766db0adb6d0
https://github.com/llvm/llvm-project/commit/d5cec386c14ac46ee252da29f5bd766db0adb6d0
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-print-openacc-cache-construct.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
A clang/test/SemaOpenACC/cache-construct-ast.cpp
A clang/test/SemaOpenACC/cache-construct.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement 'cache' construct AST/Sema
This statement level construct takes no clauses and has no associated
statement, and simply labels a number of array elements as valid for
caching. The implementation here is pretty simple, but it is a touch of
a special case for parsing, so the parsing code reflects that.
Commit: 94fad113070878c37f00699ca9d74b6216910af5
https://github.com/llvm/llvm-project/commit/94fad113070878c37f00699ca9d74b6216910af5
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
Log Message:
-----------
[CodeGen] Replace PointerType::getUnqual(Type) with opaque pointer version (NFC) (#128711)
pointer version (NFC)
Follow-up to #123569
Commit: 8179bcfe56ef3361827a644a1ab4f515ad2583aa
https://github.com/llvm/llvm-project/commit/8179bcfe56ef3361827a644a1ab4f515ad2583aa
Author: Peng Sun <peng.sun at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Make RESCALE op input_unsigned and output_unsigned attributes required (#129339)
Previously, the input_unsigned and output_unsigned attributes on the
RESCALE op were optional. This commit updates them to be required,
ensuring compliance with the TOSA V1.0 Specification.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Co-authored-by: James Ward <james.ward at arm.com>
Commit: 3ff6fb68d7aadf570a15a8a068ce7b24851e136d
https://github.com/llvm/llvm-project/commit/3ff6fb68d7aadf570a15a8a068ce7b24851e136d
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/include/lldb/API/SBProgress.h
M lldb/source/API/SBProgress.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB][SBProgress] Add a finalize method (#128966)
This patch adds a finalize method which destroys the underlying RAII
SBProgress. My primary motivation for this is so I can write better
tests that are non-flaky, but after discussing with @clayborg in my DAP
message improvement patch (#124648) this is probably an essential API
despite that I originally argued it wasn't.
Commit: f9338db2cbd219fb9819d30531dafd3a24e0e00d
https://github.com/llvm/llvm-project/commit/f9338db2cbd219fb9819d30531dafd3a24e0e00d
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
Log Message:
-----------
[lldb][test] XcodeSDKModuleTests: remove non-deterministic source mapping checks (#129526)
This assertion was added to check that `RegisterXcodeSDK` will correctly
update the source mappings of the module. However, the source mapping
will only get updated if the `Host::RunShellCommand` call to `xcrun`
succeeded. Even if `xcrun` failed to find an SDK, the source mappings
would get an entry. But if the shell invocation itself failed, then the
mappings are not updated (see
https://github.com/llvm/llvm-project/blob/f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6/lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm#L424-L444).
This means depending on how slow `xcrun` is on a given host, this test
may fail. On my machine this happens consistently in debug and release
builds.
This patch removes this flakey assertion. We unfortunately lost some
test coverage here but I'm not sure there's great alternatives unless we
either:
1. Mock the `xcrun` call somehow (we could maybe pass a callable around
which defaults to `xcrun` in non-test code?)
2. Make a `xcrun` time-out not an error either?
Commit: da293b850be3fc5b2047769f55823e41b07625c9
https://github.com/llvm/llvm-project/commit/da293b850be3fc5b2047769f55823e41b07625c9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK (#128712)
`GetSDKRoot` uses `xcrun` to find an SDK root path for a given SDK
version string. But if the SDK doesn't exist in the Xcode installations,
but instead lives in the `CommandLineTools`, `xcrun` will fail to find
it. Negative searches for an SDK path cost a lot (a few seconds) each
time `xcrun` is invoked. We do cache negative results in
`find_cached_path` inside LLDB, but we would still pay the price on
every new debug session the first time we evaluate an expression. This
doesn't only cause a noticable delay in running the expression, but also
generates following error:
```
error: Error while searching for Xcode SDK: timed out waiting for shell command to complete
(int) $0 = 42
```
In this patch we avoid these possibly expensive calls to `xcrun` by
checking the `DW_AT_LLVM_sysroot`, and if it exists, using that as the
SDK path. We need an explicit check for the `CommandLineTools` path
before we call `RegisterXcodeSDK`, because that will try to call
`xcrun`. This won't prevent other uses of `GetSDKRoot` popping up that
cause us to make expensive `xcrun` calls, but for now this addresses the
regression in the expression evaluator. We also had to adjust the
`XcodeSDK::Merge` logic to update the sysroot. There is one case for
which this wouldn't make sense: if a CU was compiled with
`CommandLineTools` and a different one with an older internal SDK, in
that case we would update the `CommandLineTools` sysroot with a
`.Internal.sdk` prefix, which won't possibly exist for
`CommandLineTools`. I added a unit-test for this. Not sure if we want to
explicitly detect and disallow this, given it's quite a niche scenario.
rdar://113619904
rdar://113619723
Commit: 186ae8c06ae00d439e5ac4e2a6b80d5aeac7a187
https://github.com/llvm/llvm-project/commit/186ae8c06ae00d439e5ac4e2a6b80d5aeac7a187
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
Log Message:
-----------
[NFC][mlir][linalg] Make conv_3d_ncdhw_fcdhw consistent with 2D variant (#129547)
Other convolutions such as conv_2d_nchw_fchw have a output affine map
with no permutations and the input and the filter map are adjusted
accordingly. This makes conv_3d_ncdhw_fcdhw a stand out so this PR
changes the affine map to be consistent with other variants.
Commit: f98718c9a169d90e676f877c5b6761b22f424b73
https://github.com/llvm/llvm-project/commit/f98718c9a169d90e676f877c5b6761b22f424b73
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
Remove leftover unused variable from #128711
Commit: f457c56240ee293c7ac72c7e6fc8150adb0a4a36
https://github.com/llvm/llvm-project/commit/f457c56240ee293c7ac72c7e6fc8150adb0a4a36
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP][NFC]Update the test to check correctly the spill cost
Commit: 3ce67a81fac301e7a308c7c6c08e0abd883972e9
https://github.com/llvm/llvm-project/commit/3ce67a81fac301e7a308c7c6c08e0abd883972e9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Remove unnecessary use of utostr to print a byte. NFC
We can cast to unsigned instead.
Commit: efb880de11f8fa3646c04032c0a2c9bded1935d7
https://github.com/llvm/llvm-project/commit/efb880de11f8fa3646c04032c0a2c9bded1935d7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Fix incorrect comment. NFC
Commit: 313b71fc1a9ae17ea5ecba8afcb4e5b80e1f4043
https://github.com/llvm/llvm-project/commit/313b71fc1a9ae17ea5ecba8afcb4e5b80e1f4043
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
Log Message:
-----------
[RISCV] Simplify tracking of tracking and encoding of push/pop in RISCVFrameLowering. NFC (#129343)
Previously we calculated the max register id. Then converted it to the number
of registers and encoding. Then converted number of registers to stack
size. Then saved number of registers, encoding, and stack size to
MachineFunctionInfo.
This patch removes the calculation of max register id, and instead
calculates the number of registers. The encoding is removed from
MachineFunctionInfo in favor of converting the number of registers to
encoding at the time of use.
Commit: 3c90c900ba5ef9f0cb5808c73c388d3ee21cb683
https://github.com/llvm/llvm-project/commit/3c90c900ba5ef9f0cb5808c73c388d3ee21cb683
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#129580)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the level
is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256 when
the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so an
error should be raised instead.
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: dfc5f37e3a62a93ce16935cea1d9822bec649a2b
https://github.com/llvm/llvm-project/commit/dfc5f37e3a62a93ce16935cea1d9822bec649a2b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Move onlyFirstLaneUsed to VPWidenInductionRecipe (NFC).
Move onlyFirstLaneUsed from VPWidenIntOrFpInductionRecipe and
VPWidenPointerInduction to VPWidenInductionRecipe. Also mark step value
as having only its first lane used.
Commit: b2ba43a9c1193f1d90ad9d30dada85caebd2c56d
https://github.com/llvm/llvm-project/commit/b2ba43a9c1193f1d90ad9d30dada85caebd2c56d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/generic13.f90
Log Message:
-----------
[flang] Refine checking of type-bound generics (#129292)
I merged a patch yesterday
(https://github.com/llvm/llvm-project/pull/128980) that strengthened
error detection of indistinguishable specific procedures in a type-bound
generic procedure, and broke a couple of tests. Refine the check so that
it doesn't flag valid cases of overridden bindings, and add a thorough
test with all of the boundary cases that I can think of.
Commit: 79a25e11fe119520e7cb70118df18e199217c891
https://github.com/llvm/llvm-project/commit/79a25e11fe119520e7cb70118df18e199217c891
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Evaluate/folding06.f90
M flang/test/Lower/HLFIR/null.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/call27.f90
M flang/test/Semantics/null01.f90
Log Message:
-----------
[flang] Further work on NULL(MOLD=allocatable) (#129345)
Refine handling of NULL(...) in semantics to properly distinguish
NULL(), NULL(objectPointer), NULL(procPointer), and NULL(allocatable)
from each other in relevant contexts.
Add IsNullAllocatable() and IsNullPointerOrAllocatable() utility
functions. IsNullAllocatable() is true only for NULL(allocatable); it is
false for a bare NULL(), which can be detected independently with
IsBareNullPointer().
IsNullPointer() now returns false for NULL(allocatable).
ALLOCATED(NULL(allocatable)) now works, and folds to .FALSE.
These utilities were modified to accept const pointer arguments rather
than const references; I usually prefer this style when the result
should clearly be false for a null argument (in the C sense), and it
helped me find all of their use sites in the code.
Commit: f6e83664e01e8dcb9bf241dd0154ff3adcc2e876
https://github.com/llvm/llvm-project/commit/f6e83664e01e8dcb9bf241dd0154ff3adcc2e876
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/init01.f90
Log Message:
-----------
[flang] Improve two coarray error messages (#129597)
Two messages that complain about local variables mention that they don't
have the SAVE attribute; in both cases, it would be okay if they were
ALLOCATABLE instead. Clarify the messages.
Commit: edb7292a511171fb1fe75f85fc85464b91130a8f
https://github.com/llvm/llvm-project/commit/edb7292a511171fb1fe75f85fc85464b91130a8f
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/AsmPrinter.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
Log Message:
-----------
[mlir] Add use nameloc to OpPrintingFlags (#129584)
Commit: cb4f24b0e5c4e7c463e59120af4f13ab81519047
https://github.com/llvm/llvm-project/commit/cb4f24b0e5c4e7c463e59120af4f13ab81519047
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add several level checks" (#129602)
Reverts llvm/llvm-project#129580
There is a lit test failure reported in
https://lab.llvm.org/buildbot/#/builders/116/builds/11023
Commit: e1fd681837b85563e186f3739623cfa6653a722c
https://github.com/llvm/llvm-project/commit/e1fd681837b85563e186f3739623cfa6653a722c
Author: Douglas Gliner <Douglas.Gliner at sony.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
Bump DIAG_SIZE_LEX since we've hit the limit downstream as of 1c4e0f6.
Commit: 829401fe3ca1486285f5ef32865d189747a91305
https://github.com/llvm/llvm-project/commit/829401fe3ca1486285f5ef32865d189747a91305
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/docs/CIBestPractices.rst
M llvm/docs/Reference.rst
Log Message:
-----------
[Github][Docs] Add CI Best Practices Docs (#129462)
This is something that Tom and I have discussed briefly for a while now,
a doc that lists out all of the best practices we want to adhere to
surrounding CI things along with their associated motivations/any other
relevant info. This patch adds that doc along with three best practices
surrounding Github Workflows that we try and adhere to (although more
work needs to be done to get 100% adherance).
Commit: ee09df8e73d8575542283d8cfe351764af290f96
https://github.com/llvm/llvm-project/commit/ee09df8e73d8575542283d8cfe351764af290f96
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/Dialect/Affine/dma-generate.mlir
Log Message:
-----------
[MLIR][Affine] Switch default option for affine data copy generate pass (#129445)
The more common use of this pass for testing and other purposes is the
pointwise copy generation as opposed to DMA generation. Switch the
default pass option to pointwise copy generation for easier testing. NFC
otherwise.
Users who were relying on `generate-dma` to be on by default will have
to pass it explicitly: `-affine-data-copy-generate='generate-dma=1'`.
Commit: b44fbdee00bbead186baf4109ea7ca440bd8a0b3
https://github.com/llvm/llvm-project/commit/b44fbdee00bbead186baf4109ea7ca440bd8a0b3
Author: Petr Penzin <penzin.dev at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Tune flag for fast vrgather.vv (#124664)
Add tune knob for N*Log2(N) vrgather.vv cost.
Commit: a59b17c8adde34e26b0f101fc2942637b945e1e5
https://github.com/llvm/llvm-project/commit/a59b17c8adde34e26b0f101fc2942637b945e1e5
Author: Derek Schuff <dschuff at chromium.org>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/test/wasm/emit-relocs.s
M lld/wasm/InputChunks.cpp
M lld/wasm/InputChunks.h
M lld/wasm/OutputSections.cpp
M lld/wasm/OutputSections.h
M lld/wasm/Symbols.cpp
Log Message:
-----------
[lld][WebAssembly] Do not emit relocs against dead symbols (#129346)
When emitting relocs with linked output (i.e. --emit-relocs)
skip relocs against dead symbols (which do not appear in the output)
and do not emit them.
Commit: cf05b6e25ac8dcbf6e0ea1524d86bc6d190bf8c0
https://github.com/llvm/llvm-project/commit/cf05b6e25ac8dcbf6e0ea1524d86bc6d190bf8c0
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrOperands.td
A llvm/test/CodeGen/X86/lea-16bit.ll
A llvm/test/CodeGen/X86/lea-8bit.ll
M llvm/utils/TableGen/X86RecognizableInstr.cpp
Log Message:
-----------
[X86] Added support for 8 and 16bit LEA instructions (#122102)
Commit: 4bd34273210329047a7829f1ea4f54c171000c68
https://github.com/llvm/llvm-project/commit/4bd34273210329047a7829f1ea4f54c171000c68
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
IRBuilder: Add FMFSource parameter to CreateMaxNum/CreateMinNum (#129173)
In https://github.com/llvm/llvm-project/pull/112852, we claimed that
llvm.minnum and llvm.maxnum should treat +0.0>-0.0, while libc doesn't
require fmin(3)/fmax(3) for it.
Let's add FMFSource parameter to CreateMaxNum and CreateMinNum, so that
they can be used by CodeGenFunction::EmitBuiltinExpr of Clang.
Commit: c1aebd495be0e468044f716a3a0ff98fccccb2be
https://github.com/llvm/llvm-project/commit/c1aebd495be0e468044f716a3a0ff98fccccb2be
Author: Victor Mustya <victor.mustya at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/opencl-c.h
Log Message:
-----------
[Clang][OpenCL] Wrap image functions with the macro (#129177)
According to the OpenCL C spec, the image functions are optional.
For OpenCL C 1.2, the image functions are guarded by the
`__IMAGE_SUPPORT__` macro. For the OpenCL C 3.0 and later, the
`__opencl_c_images` macro is used.
Commit: 6041c745f32e8fd60ed24e29e7d919d8d1c87ca6
https://github.com/llvm/llvm-project/commit/6041c745f32e8fd60ed24e29e7d919d8d1c87ca6
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
Revert "[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK" (#129621)
Reverts llvm/llvm-project#128712
```
******************** TEST 'lldb-unit :: SymbolFile/DWARF/./SymbolFileDWARFTests/10/14' FAILED ********************
Script(shard):
--
GTEST_OUTPUT=json:/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests-lldb-unit-1021-10-14.json GTEST_SHUFFLE=1 GTEST_TOTAL_SHARDS=14 GTEST_SHARD_INDEX=10 GTEST_RANDOM_SEED=62233 /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests
--
Script:
--
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests --gtest_filter=SDKPathParsingTests/SDKPathParsingMultiparamTests.TestSDKPathFromDebugInfo/6
--
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp:265: Failure
Expected equality of these values:
found_mismatch
Which is: true
expect_mismatch
Which is: false
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp:265
Expected equality of these values:
found_mismatch
Which is: true
expect_mismatch
Which is: false
```
Commit: d654d37c86a4f0dc99c65cbef0624b5533ed724c
https://github.com/llvm/llvm-project/commit/d654d37c86a4f0dc99c65cbef0624b5533ed724c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Correctly report breakpoints as resolved on macOS (#129589)
On macOS, breakpoints are briefly unresolved between process launch and
when the dynamic loader has informed us about the loaded libraries. This
information was being forwarded by lldb-dap, but only partially. In the
event handler, we were listening for the `LocationsAdded` and
`LocationsRemoved` breakpoint events. For the scenario described above,
the latter would trigger and we'd send an event reporting the breakpoint
as unresolved. The problem is that when the breakpoint location is
resolved again, you receive a `LocationsResolved` event, not a
`LocationsAdded` event. As a result, the breakpoint would continue to
show up as unresolved in the DAP client.
I found a test that tried to test part of this behavior, but the test
was broken and disabled. I revived the test and added coverage for the
situation described above.
Fixes #112629
rdar://137968318
Commit: 5bf1f03d1fb4fd4c16029355d5814ebce61ed939
https://github.com/llvm/llvm-project/commit/5bf1f03d1fb4fd4c16029355d5814ebce61ed939
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
Log Message:
-----------
[libc++] Fix assignment in insertion into `vector` (#116001)
Changes:
- Avoid direct assignment in iterator-pair `insert` overload and
`insert_range`, except when the assignment is move assignment.
Commit: f44fb56f62aafff93cd337d8818ead0ad7794d35
https://github.com/llvm/llvm-project/commit/f44fb56f62aafff93cd337d8818ead0ad7794d35
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
Log Message:
-----------
[flang-rt] Set CUDA_SEPARABLE_COMPILATION for PTX library. (#129563)
`CUDA_SEPARABLE_COMPILATION` adds `-rdc=true`, which is needed
for the PTX library build.
Commit: f57756a6406f93b3f579ce4da2b8be3fe211952f
https://github.com/llvm/llvm-project/commit/f57756a6406f93b3f579ce4da2b8be3fe211952f
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Common/erfc-scaled.h
Log Message:
-----------
[flang-rt] Use RT_API_ATTRS for ErfcScaled. (#129598)
As long as it is a host-only function, it cannot be referenced
by the flang-rt's ErfcScaled entry points. With the markup in place,
it is compiling properly by a CUDA compiler.
Commit: bf9bf291a3174a3c7b50ec37ddf5782767827c61
https://github.com/llvm/llvm-project/commit/bf9bf291a3174a3c7b50ec37ddf5782767827c61
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/stable_partition.h
M libcxx/include/algorithm
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/stable_partition.pass.cpp
M libcxx/test/std/algorithms/robust_against_proxy_iterators_lifetime_bugs.pass.cpp
M libcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp
Log Message:
-----------
[libc++] Implement part of P2562R1: constexpr `std::stable_partition` (#128868)
Drive-by changes:
- Enables no-memory case for Clang.
- Enables `robust_re_difference_type.compile.pass.cpp` and
`robust_against_proxy_iterators_lifetime_bugs.pass.cpp` test coverage
for `std::stable_sort` in constant evaluation since C++26. The changes
were missing in the PR making `std::stable_sort` `constexpr`.
Commit: 3963d2148292145543cf83b13ff839a63995fdc2
https://github.com/llvm/llvm-project/commit/3963d2148292145543cf83b13ff839a63995fdc2
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
Log Message:
-----------
[MachineSink] Fix typo in loop sinking (#127133)
Failure to sink a candidate should not block us from attempting to sink
other candidates. There are mechanisms in place to handle the case where
the failed to be sunk instruction uses an instruction that gets sunk (we
do not delete the original instruction corresponding with the sunk
instruction if it still has uses).
Commit: f38ce27c13760d166fda41dbb0ad815f40e4e874
https://github.com/llvm/llvm-project/commit/f38ce27c13760d166fda41dbb0ad815f40e4e874
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[X86] Fix an unused variable warning (NFC)
/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3090:7:
error: unused variable 'IndexType' [-Werror,-Wunused-variable]
EVT IndexType = Index.getValueType();
^
1 error generated.
Commit: 415f89905fa04bdee2f0f5a8886706756699d06e
https://github.com/llvm/llvm-project/commit/415f89905fa04bdee2f0f5a8886706756699d06e
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
Log Message:
-----------
[X86] Remove single-use checks when combining xor and vfmulc/vcfmulc. (#128910)
The current implementation to combine xor patterns for conjugation with
complex multiplies will not perform the transformation when either the
conjugate xor result or other multiplicand have other uses. This change
eliminates both single-use checks.
The transformation will eliminate the xor dependence and hence should be
profitable even if the conjugate is used elsewhere - and more profitable
if the xor is used in multiple fmulc/fcmulc instructions, eventually
going dead.
The check of the other multiplicand isn't required for correctness and
has no apparent performance implications.
Commit: 0ed2945a596991b75e4ca090fe04240abba6012b
https://github.com/llvm/llvm-project/commit/0ed2945a596991b75e4ca090fe04240abba6012b
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/SortIncludesTest.cpp
Log Message:
-----------
[clang-format] Don't sort includes for C# (#129369)
Fixes #106194
Commit: 136f2574ddfe81e73376ada0ea299b67170caf2c
https://github.com/llvm/llvm-project/commit/136f2574ddfe81e73376ada0ea299b67170caf2c
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Lex C++ only keywords as identifiers in C (#129426)
Fix #128847
Commit: 2ca085505996ca16cc79090dbc66d06ac46ed262
https://github.com/llvm/llvm-project/commit/2ca085505996ca16cc79090dbc66d06ac46ed262
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in wrapping function return type (#129374)
Fixes #113766
Commit: 956e56fa6d3d62e1ef1a27bdc9f6be3c0544b9c7
https://github.com/llvm/llvm-project/commit/956e56fa6d3d62e1ef1a27bdc9f6be3c0544b9c7
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#129580) (#129613)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the
level is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256
when the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so an
error should be raised instead.
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: ce1a18e2c714f39fe72cd46aa04faed29ad23cb6
https://github.com/llvm/llvm-project/commit/ce1a18e2c714f39fe72cd46aa04faed29ad23cb6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
clang-tools: Fix sprintf is deprecated warnings (#120517)
Commit: 8476a5d480304bf7bd934c660a159e1c6906a69d
https://github.com/llvm/llvm-project/commit/8476a5d480304bf7bd934c660a159e1c6906a69d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
A llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/X86/eq-or-eq-range-of-2.ll
M llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
M llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
Log Message:
-----------
SplitKit: Fix rematerialization undoing subclass based split (#122110)
This fixes an allocation failure in the new test.
In cases where getLargestLegalSuperClass can inflate the register class,
rematerialization could effectively undo a split which was done to
inflate
the register class, if the defining instruction can only write a
subclass
and the use can read the superclass.
Some of the x86 tests changes look like improvements, but some are
likely regressions.
I'm not entirely sure this is the correct place to fix this. It also
seems more complicated than necessary, but the decision to change
the register class is far removed from the point where the decision
to split the virtual register is made. I'm also also not sure if this
should be considering the register classes of all the use indexes
in getUseSlots, rather than just checking if this use index instruction
reads the register.
Commit: 12b38c3e39512344b9c951406c5023b8a5549182
https://github.com/llvm/llvm-project/commit/12b38c3e39512344b9c951406c5023b8a5549182
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
TableGen: Fix comment typo
Commit: 4670f0d8275a7eacfba46a17d88d3e2d947f5a61
https://github.com/llvm/llvm-project/commit/4670f0d8275a7eacfba46a17d88d3e2d947f5a61
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
Log Message:
-----------
MachineVerifier: Print name of failing subregister index (#129491)
I'm not sure of a good example to test the "does not fully support"
case.
Commit: 50ff49ebbcdc88301070e94b04cb158d040db276
https://github.com/llvm/llvm-project/commit/50ff49ebbcdc88301070e94b04cb158d040db276
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
Clang: ExprConstant use maxnum/minnum for fmax/fmin (#129630)
In APFloat, we have defined maxnum and minnum, so let's use them
directly here.
In `maxnum`/`minnum` of APFloat, we process sNaN, signed-zero as
strictly as possible.
Commit: 3aab3fe56fbd60b49a47ae0f90d96de2cd09fc18
https://github.com/llvm/llvm-project/commit/3aab3fe56fbd60b49a47ae0f90d96de2cd09fc18
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/Analysis.h
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[NPM][NFC] Chain PreservedAnalyses methods (#129505)
Commit: 82d111e8202328d3a04d923cdae19ad29bc79dbc
https://github.com/llvm/llvm-project/commit/82d111e8202328d3a04d923cdae19ad29bc79dbc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode][NFC] Minor cleanups (#129553)
Pull local variables in to the closest scope, remove some unnecessary
calls to getLocation() and remove an outdated comment.
Commit: 6c87ec4f4d083a85ebcfbbda166ad4ba41d5da8d
https://github.com/llvm/llvm-project/commit/6c87ec4f4d083a85ebcfbbda166ad4ba41d5da8d
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
Log Message:
-----------
[AMDGPU][NPM] Port SIModeRegister to NPM (#129014)
Commit: af4ec59f8d2ec127425ed45c0ff67c51679f99ad
https://github.com/llvm/llvm-project/commit/af4ec59f8d2ec127425ed45c0ff67c51679f99ad
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/seqpaircopy.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
Log Message:
-----------
[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509)
Commit: e9fe95acf3b9ead924a6f059c8ca8a8aabc55575
https://github.com/llvm/llvm-project/commit/e9fe95acf3b9ead924a6f059c8ca8a8aabc55575
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Use maxnum/minnum for fmax/fmin (#129643)
Equivalent of https://github.com/llvm/llvm-project/pull/129630 for the
bytecode interpreter.
Commit: 41473162fd886d7db548fb288cf3620570f73c17
https://github.com/llvm/llvm-project/commit/41473162fd886d7db548fb288cf3620570f73c17
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
Log Message:
-----------
[CodeGen][NPM]RAGreedy: Put up include guard in the header (#129510)
Commit: 4fb31e44017bd9ad914fc4c814fbaa60cc18d5b4
https://github.com/llvm/llvm-project/commit/4fb31e44017bd9ad914fc4c814fbaa60cc18d5b4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Use const reference for DebugLoc
Commit: b3d5056c79b5496fc8751630ddd0ac0071cab0af
https://github.com/llvm/llvm-project/commit/b3d5056c79b5496fc8751630ddd0ac0071cab0af
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
A llvm/test/CodeGen/AMDGPU/coalesces-better.mir
A llvm/test/CodeGen/AMDGPU/coalesces-worse.mir
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Try to perform copy to agpr from reg_sequence at the copy (#129463)
SIFoldOperands is frustratingly written in a def-folds-into-use
iteration pattern, with a few random cases starting at the uses.
We were handling this case by looking at the reg_sequence, and finding
the copy. This did not work for the most basic pattern of materializing
a vector constant that started in SGPRs. It just happens there is an
optimization bug in SelectionDAG that produced the expected pattern.
Perform an additional attempt at the fold rooted at the copy. This
mostly shows test improvements. There were some tricky updates to
perform. remaining-virtual-register-operands.ll managed to stop failing
the allocator, so needed to be tricked into failing again. I also do
not understand what schedule-xdl-resource.ll is trying to do for the test
so this changes it to some random output that exists in the debug output.
Commit: 39bf765bb671fa7df3fe6c164cc9532fcb8653bd
https://github.com/llvm/llvm-project/commit/39bf765bb671fa7df3fe6c164cc9532fcb8653bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
DAG: Use phi to create vregs instead of the constant input (#129464)
For most targets, the register class comes from the type so this
makes no difference. For AMDGPU, the selected register class depends
on the divergence of the value. For a constant phi input, this will
always be false. The heuristic for whether to treat the value as
a scalar or vector constant based on the uses would then incorrectly
think this is a scalar use, when really the phi is a copy from S to V.
This avoids an intermediate s_mov_b32 plus a copy in some cases. These
would often, but not always, fold out in mi passes.
This only adjusts the constant input case. It may make sense to do
this for the non-constant case as well.
Commit: 9084d2a0a11d8e12ac02f8870c418073985c2e59
https://github.com/llvm/llvm-project/commit/9084d2a0a11d8e12ac02f8870c418073985c2e59
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/src/stdlib/qsort_pivot.h
Log Message:
-----------
[libc] Add a missing include
This is a fixup for
https://github.com/llvm/llvm-project/commit/da6d5fa79a558b66c281bed3f5ce848a69a65208.
Commit: 2127af80fa46709a563ad7ecc400209f1640f96e
https://github.com/llvm/llvm-project/commit/2127af80fa46709a563ad7ecc400209f1640f96e
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsa] Reformat cast-overflow test. NFC (#129662)
Reformat cast-overflow test. NFC
Commit: a5bbfcf0c9dd48e13951fdb35362e2e3d545dbad
https://github.com/llvm/llvm-project/commit/a5bbfcf0c9dd48e13951fdb35362e2e3d545dbad
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#129653)
Commit: c61c88862805905dfa8a2c2f8c9f8ef7e1874720
https://github.com/llvm/llvm-project/commit/c61c88862805905dfa8a2c2f8c9f8ef7e1874720
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/tools/llvm-mca/CodeRegion.cpp
Log Message:
-----------
[llvm-mca] Avoid repeated hash lookups (NFC) (#129656)
Commit: a619a2e53a9ba09ba18a047b8389bf4dd1912b72
https://github.com/llvm/llvm-project/commit/a619a2e53a9ba09ba18a047b8389bf4dd1912b72
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A clang/test/CodeGen/arm-neon-endianness.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[ARM] Fix lane ordering for AdvSIMD intrinsics on big-endian targets (#127068)
In arm-neon.h, we insert shufflevectors around each intrinsic when the
target is big-endian, to compensate for the difference between the
ABI-defined memory format of vectors (with the whole vector stored as
one big-endian access) and LLVM's target-independent expectations (with
the lowest-numbered lane in the lowest address). However, this code was
written for the AArch64 ABI, and the AArch32 ABI differs slightly: it
requires that vectors are stored in memory as-if stored with VSTM, which
does a series of 64-bit accesses, instead of the AArch64 VSTR, which
does a single 128-bit access. This means that for AArch32 we need to
reverse the lanes in each 64-bit chunk of the vector, instead of in the
whole vector.
Since there are only a small number of different shufflevector orderings
needed, I've split them out into macros, so that this doesn't need
separate conditions in each intrinsic definition.
Commit: d6942d54f677000cf713d2b0eba57b641452beb4
https://github.com/llvm/llvm-project/commit/d6942d54f677000cf713d2b0eba57b641452beb4
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Basic/ABI.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
A clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
Log Message:
-----------
[MS][clang] Add support for vector deleting destructors (#126240)
Whereas it is UB in terms of the standard to delete an array of objects
via pointer whose static type doesn't match its dynamic type, MSVC
supports an extension allowing to do it.
Aside from array deletion not working correctly in the mentioned case,
currently not having this extension implemented causes clang to generate
code that is not compatible with the code generated by MSVC, because
clang always puts scalar deleting destructor to the vftable. This PR
aims to resolve these problems.
Fixes https://github.com/llvm/llvm-project/issues/19772
Commit: aa37a698d4066058d03016ea467230bd039c1eb1
https://github.com/llvm/llvm-project/commit/aa37a698d4066058d03016ea467230bd039c1eb1
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
Log Message:
-----------
[LoopInterchange] Move some processes to another function (NFC) (#129514)
Some post-processing involved in exchanging a pair of loops has been
done separately from `processLoop`, which is a main function that does
the transformation. It's better to consolidate these processes into the
same function. This patch is a preparation of #127474.
Commit: 15770a1e9d0983ee59a8850f2ddd7b57e46dcc5a
https://github.com/llvm/llvm-project/commit/15770a1e9d0983ee59a8850f2ddd7b57e46dcc5a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove dead recipes in entry when merging regions. (NFC)
Also remove recipes in the entry of the region that will be removed.
This makes sure we don't leave any dead users around. NFC at the moment,
but avoids causing issues in the future.
Commit: 23a30e68888e764b2f4d32e51d415b50fa5f5cac
https://github.com/llvm/llvm-project/commit/23a30e68888e764b2f4d32e51d415b50fa5f5cac
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_value.cpp
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsan] Add support for f16 (#129624)
LLVM supports long double <-> f16 conversions so we can remove the old FIXME.
Commit: 80bdfcd411cd8197b0a8b6139b89a87d3a4528fa
https://github.com/llvm/llvm-project/commit/80bdfcd411cd8197b0a8b6139b89a87d3a4528fa
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_memcheck_cost.ll
Log Message:
-----------
[LoopUtils] Don't wrap in getLoopEstimatedTripCount (#129080)
getLoopEstimatedTripCount returns the trip count based on profiling
data, and its documentation says that it could return 0 when the trip
count is zero, but this is not the case: a valid trip count can never be
zero, and it returns 0 when the unsigned ExitCount is incremented by 1
and wraps. Some callers are careful about checking for this zero value
in an std::optional, but it makes for an API with footguns, as a
std::optional return value indicates that a non-nullopt value would be a
valid trip count. Fix this by explicitly returning std::nullopt when the
return value would wrap, and strip additional checks in callers. This
also fixes a minor bug in LoopVectorize.
Commit: 8266cd9f84b5a7d334ade7ff41393458b3789047
https://github.com/llvm/llvm-project/commit/8266cd9f84b5a7d334ade7ff41393458b3789047
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Log Message:
-----------
[clangd] Disable cppcoreguidelines-macro-to-enum clang-tidy checker (#129478)
Clangd does not support its checker because the checker relies on having
seen preprocessor conditionals that occur in the preamble, and clangd
does not currently replay those.
This checker was already disabled under its main name,
modernize-macro-to-enum (https://github.com/clangd/clangd/issues/1464).
This commit disables it under the alternative name
cppcoreguidelines-macro-to-enum as well.
Fixes https://github.com/llvm/llvm-project/issues/127965
Commit: 47fb9c4bb9b057ab45c5228937a2c1fbf51c4f72
https://github.com/llvm/llvm-project/commit/47fb9c4bb9b057ab45c5228937a2c1fbf51c4f72
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Add Name argument to VPWidenPHIRecipe. NFC (#129527)
This allows a different IR name for the generated phi to be used. This
is split off from #118638 and helps remove some of the diffs in it.
Commit: 03505a004ff6909c46d6b8c498a9ffccd47d88a0
https://github.com/llvm/llvm-project/commit/03505a004ff6909c46d6b8c498a9ffccd47d88a0
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
Log Message:
-----------
[RISCV] Enable scalable loop vectorization for fmax/fmin reductions with f16/bf16 type for zvfhmin/zvfbfmin (#129629)
This PR enable scalable loop vectorization for fmax and fmin reductions
with f16/bf16 type when only zvfhmin/zvfbfmin are enabled.
After https://github.com/llvm/llvm-project/pull/128800, we can promote
the fmax/fmin reductions with f16/bf16 type to f32 reductions for
zvfhmin/zvfbfmin.
Commit: 0eaca0412501da82d7f23811003f64624e17cba6
https://github.com/llvm/llvm-project/commit/0eaca0412501da82d7f23811003f64624e17cba6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
AMDGPU: Remove repeated define in base info header
The identical define is repeated on the previous line.
Commit: b7f31044f34036d277f5c6e21ef3a126b5972508
https://github.com/llvm/llvm-project/commit/b7f31044f34036d277f5c6e21ef3a126b5972508
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Transforms/GVN/opt-remarks.ll
Log Message:
-----------
[GVN][NFC] Remove unnecessary assembly output from test (#129670)
This test doesn't check any output from opt, so it can be safely
`disable-output` and thus less redirections.
Commit: a32d5438ac50ef509af9e688f9cd93f1e98d929d
https://github.com/llvm/llvm-project/commit/a32d5438ac50ef509af9e688f9cd93f1e98d929d
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_value.cpp
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
Revert "[compiler-rt][ubsan] Add support for f16 (#129624)"
This reverts commit 23a30e68888e764b2f4d32e51d415b50fa5f5cac.
The commit has broken some build bots.
Commit: 2bef21f24ba932a757a644470358c340f4bcd113
https://github.com/llvm/llvm-project/commit/2bef21f24ba932a757a644470358c340f4bcd113
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)
Add generic DAG combine for ISD::PARTIAL_REDUCE_U/SMLA nodes. Transforms
the DAG from:
PARTIAL_REDUCE_MLA(Acc, MUL(EXT(MulOpLHS), EXT(MulOpRHS)), Splat(1)) to
PARTIAL_REDUCE_MLA(Acc, MulOpLHS, MulOpRHS).
Commit: 7c8b1275bc87f6b5983788a6e603504725b490c9
https://github.com/llvm/llvm-project/commit/7c8b1275bc87f6b5983788a6e603504725b490c9
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/pointers/array-skips-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
Log Message:
-----------
[SPIR-V] Add pass to remove spv_ptrcast intrinsics (#128896)
OpenCL is allowed to cast pointers, meaning they can resolve some type
mismatches this way. In logical SPIR-V, those are restricted. This new
pass legalizes such pointer cast when targeting logical SPIR-V.
For now, this pass supports 3 cases we witnessed:
- loading a vec3 from a vec4*.
- loading a scalar from a vec*.
- loading the 1st element of an array.
---------
Co-authored-by: Steven Perron <stevenperron at google.com>
Commit: 7a06681398a33d53ba6d661777be8b4c1d19acb7
https://github.com/llvm/llvm-project/commit/7a06681398a33d53ba6d661777be8b4c1d19acb7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
Revert "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"
This reverts commit 2bef21f24ba932a757a644470358c340f4bcd113.
Multiple builtbot failures have been reported:
https://github.com/llvm/llvm-project/pull/127083
Commit: ef94d8a0f2d885d1753cd39c1ea76fe21a69d93b
https://github.com/llvm/llvm-project/commit/ef94d8a0f2d885d1753cd39c1ea76fe21a69d93b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129652)
Commit: 9372d1d72ab287d5121ca1961dd416cf51224e62
https://github.com/llvm/llvm-project/commit/9372d1d72ab287d5121ca1961dd416cf51224e62
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#129655)
Commit: 65330e20b189c38ddbb38eb63b15f93262385e73
https://github.com/llvm/llvm-project/commit/65330e20b189c38ddbb38eb63b15f93262385e73
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm-readobj] Avoid repeated hash lookups (NFC) (#129657)
Commit: f319a6546613d65661e1ad1ef1a2a648cefee84b
https://github.com/llvm/llvm-project/commit/f319a6546613d65661e1ad1ef1a2a648cefee84b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
Log Message:
-----------
AMDGPU: Fix broken broken negative test for gfx950 assembler (#129667)
Fix's not rejecting global_load_lds_dwordx3 and x4 on other targets.
The encoded versions of instructions should not touch SubtargetPredicate,
and only AssemblerPredicate.
Commit: 45901ccfcc528849a7079319f1b8ee26939202f0
https://github.com/llvm/llvm-project/commit/45901ccfcc528849a7079319f1b8ee26939202f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
AMDGPU: Remove some overrides of SubtargetPredicate on real instructions (#129668)
AssemblerPredicate is the hack to use for cases where the encoding
change doesn't nicely line up with the subtarget predicate.
Commit: e187fc0ff780c2f6a8e495f9a5d70fbac2341b3b
https://github.com/llvm/llvm-project/commit/e187fc0ff780c2f6a8e495f9a5d70fbac2341b3b
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/docs/Dialects/Linalg/_index.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgDoc.td
Log Message:
-----------
[mlir][linalg] Fix linalg.pack/unpack docs (#129559)
Adds missing relayout ops to Linalg docs tablegen.
Follow-up to #127729
Commit: d0eeeab5575d88498149a66096fda2815c132e3a
https://github.com/llvm/llvm-project/commit/d0eeeab5575d88498149a66096fda2815c132e3a
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[NFC] test for usdot with multiple zext users (#129650)
Currently, usdot is not being generated in loop when zext has multiple. Subsequent patch will improve
this.
Commit: 0fcbf148df9c6d4f1a12eed356697cda665852e5
https://github.com/llvm/llvm-project/commit/0fcbf148df9c6d4f1a12eed356697cda665852e5
Author: AnastasiyaChernikova <anastasiya.chernikova at syntacore.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-load.s
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
Log Message:
-----------
[Exegesis] Implemented strategy for load operation (#113458)
This fix helps to map operand memory to destination registers. If
instruction is load, we can self-alias it in case when instruction
overrides whole address register. For that we use provided scratch
memory.
Commit: e0eb4edad66b3ea3c621c8c9f3298f2d64697bd7
https://github.com/llvm/llvm-project/commit/e0eb4edad66b3ea3c621c8c9f3298f2d64697bd7
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/FixupStatepointCallerSaved.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/X86/statepoint-fixup-call.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop-neg.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop.mir
M llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
M llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef-def.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef.mir
Log Message:
-----------
[CodeGen][NewPM] Port "FixupStatepointCallerSaved" pass to NPM (#129541)
Commit: 77a8770d4976e086f36004a6b8bf09e76d981451
https://github.com/llvm/llvm-project/commit/77a8770d4976e086f36004a6b8bf09e76d981451
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
Reland "[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK" (#129621)"
This reverts commit 6041c745f32e8fd60ed24e29e7d919d8d1c87ca6.
Relands the original patch with the test-case data fixed. Weirldy the PR CI
didn't seem to run the unit-tests? In any case, the problem was an
incorrect expectation in the test-case data. Since we have both public
and internal SDK in that test-case, we should `expect_mismatch` to be
`true`.
Commit: e27b8b2eda767eb59d3d605d288e733b154a48c5
https://github.com/llvm/llvm-project/commit/e27b8b2eda767eb59d3d605d288e733b154a48c5
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Integration/debug-cyclic-derived-type-4.f90
Log Message:
-----------
[flang][debug] Improve handling of cyclic derived types with classes. (#129588)
While checking if a type should be cached or not, we use
`getDerivedType` to peel outer layers and get to the base type. This
function did not peel the `fir.class` which caused the algorithm to
fail.
Fixes #128606.
Commit: 680391f07a45272bb9bfd385cf4c6846b8be32dd
https://github.com/llvm/llvm-project/commit/680391f07a45272bb9bfd385cf4c6846b8be32dd
Author: Discookie <viktor.cseh at ericsson.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix unsupported types always being equal (#129502)
Previously when the framework encountered unsupported values (such as
enum classes), they were always treated as equal when comparing with
`==`, regardless of their actual values being different.
Now the two sides are only equal if there's a Value assigned to them.
Added a Value assignment for `nullptr`, to handle the special case of
`nullptr == nullptr`.
Commit: c7dbf20e66606e7e26a28ad567ff75f3a493d3bd
https://github.com/llvm/llvm-project/commit/c7dbf20e66606e7e26a28ad567ff75f3a493d3bd
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[lldb-dap] Test: disable children return test for all arm architectures (#129409)
amd64 and aarch64 are treated differently
Follows up #106907
Commit: e3c8e17b073bf38e900014ed47230882c407dab8
https://github.com/llvm/llvm-project/commit/e3c8e17b073bf38e900014ed47230882c407dab8
Author: James Chesterman <james.chesterman at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
Reland "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"
This relands commit 7a06681398a33d53ba6d661777be8b4c1d19acb7.
Commit: ec54ec65e5172b624f34a801012fe471ccf5d261
https://github.com/llvm/llvm-project/commit/ec54ec65e5172b624f34a801012fe471ccf5d261
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/dma-generate.mlir
M mlir/test/Dialect/Affine/loop-fusion-3.mlir
M mlir/test/Dialect/Affine/loop-fusion.mlir
Log Message:
-----------
[MLIR][Affine] Improve memref region bounding size and shape computation (#129009)
Improve memref region utility (`getConstantBoundingSizeAndShape`) to get
its constant bounding size and shape using affine expressions/maps by
also considering local variables in the system. Leads to significantly
precise and tighter bounding size and shape in the presence of div/mod
expressions (as evident from the test cases). The approach is now more
robust, proper, and complete. For affine fusion, this leads to private
memrefs of accurate size in several cases. This also impacts other
affine analysis-based passes like data copy generation that use memref
regions.
With contributions from `Vinayaka Bandishti <vinayaka at polymagelabs.com>`
on `getConstantBoundingSizeAndShape` and getConstantBoundOnDimSize`.
Fixes: https://github.com/llvm/llvm-project/issues/46317
Co-authored-by: Vinayaka Bandishti <vinayaka at polymagelabs.com>
Commit: 1e1781bca92c2c6ee05867702b26e88fe3227307
https://github.com/llvm/llvm-project/commit/1e1781bca92c2c6ee05867702b26e88fe3227307
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-split-fcvt.ll
Log Message:
-----------
[LLVM][SVE] Improve code generation for i1 based int_to_fp operations. (#129229)
Rather than extending the predicate we can use it directly to select
between the two possible results.
Commit: c711c65e57fe5e09b8321a675075dac9dbd12f82
https://github.com/llvm/llvm-project/commit/c711c65e57fe5e09b8321a675075dac9dbd12f82
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - attempt to constant fold from constant pool loads (if we're not widening). (#129682)
Commit: da4cbeca6c5e147e7a3e19f1020befa8b119985e
https://github.com/llvm/llvm-project/commit/da4cbeca6c5e147e7a3e19f1020befa8b119985e
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
Log Message:
-----------
[LLVM][SVE] Implement isel for fptoi half/float/double to i1. (#129269)
Also adds an assert that SVE support for strict_fp fp<->int operations
is missing.
The added costs are to maintain the existing values expected by
Analysis/CostModel/AArch64/sve-cast.ll.
Commit: 25479a3c9c55af0f1651bf43b0ad5ec7d572ff34
https://github.com/llvm/llvm-project/commit/25479a3c9c55af0f1651bf43b0ad5ec7d572ff34
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/setcc-lowering.ll
Log Message:
-----------
[X86] setcc-lowering.ll - regenerate VPTERNLOG comment
Commit: 06fc7d68ff816090ea8654a5a0240a4444a8eb6f
https://github.com/llvm/llvm-project/commit/06fc7d68ff816090ea8654a5a0240a4444a8eb6f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Don't error out on incomplete declarations (#129685)
Later operations on these are invalid, but the declaration is fine, if
extern.
Commit: 323112a38de04e4e7b8b7d8406575816f38507ac
https://github.com/llvm/llvm-project/commit/323112a38de04e4e7b8b7d8406575816f38507ac
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based constant splats. (#129550)
There are no dedicated bfloat MOV instructions but we can use the half
variants when the encoding allows (e.g. f16(1.875) == bf16(1.0)).
Commit: 607485f81c8bbfcf91ecb5a71a6323fb2bc367d9
https://github.com/llvm/llvm-project/commit/607485f81c8bbfcf91ecb5a71a6323fb2bc367d9
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[LLVM][SVE] Lower bfloat extends the same as other types. (#129544)
Commit: d9fb3cef5de1d1cd1261ae1753a578df1b9817de
https://github.com/llvm/llvm-project/commit/d9fb3cef5de1d1cd1261ae1753a578df1b9817de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
R llvm/test/CodeGen/AMDGPU/coalesces-better.mir
R llvm/test/CodeGen/AMDGPU/coalesces-worse.mir
Log Message:
-----------
AMDGPU: Remove accidentally committed tests
Commit: 43ec9e18938930546e63db41ecda26d3de30e4ea
https://github.com/llvm/llvm-project/commit/43ec9e18938930546e63db41ecda26d3de30e4ea
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Mark that P2280R4 was approved as a dr in the status page
Commit: b25b38412807615d2e54702435f67b5c5b7170c0
https://github.com/llvm/llvm-project/commit/b25b38412807615d2e54702435f67b5c5b7170c0
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
[mlir] Apply ClangTidy finding (NFC)
prefer using 'override' or (rarely) 'final' instead of 'virtual'
Commit: 66d4294a77dc9ba7a5b94b3d3279a1e76ae026d1
https://github.com/llvm/llvm-project/commit/66d4294a77dc9ba7a5b94b3d3279a1e76ae026d1
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
Revert "[mlir] Apply ClangTidy finding (NFC)"
This reverts commit b25b38412807615d2e54702435f67b5c5b7170c0.
Applied the finding manually and got it wrong.
Commit: cd4c10afea7eaaf87c1830e340863f0bf8745b0b
https://github.com/llvm/llvm-project/commit/cd4c10afea7eaaf87c1830e340863f0bf8745b0b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
[mlir] Apply ClangTidy finding (NFC)
prefer using 'override' or (rarely) 'final' instead of 'virtual'
second attempt
Commit: 53d433e702736f9edfee57ec2c1628c729336866
https://github.com/llvm/llvm-project/commit/53d433e702736f9edfee57ec2c1628c729336866
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Only emit literal_comparison for string literals (#129691)
This is what the current interpreter does as well.
Commit: 22d8ba3dbc732fdf4acf830e741d972be282f827
https://github.com/llvm/llvm-project/commit/22d8ba3dbc732fdf4acf830e741d972be282f827
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getConstVector - use APInt::extractBits instead of shift+mask. NFC.
Commit: b2d70e8796ab68a80567fb794079ee07bb243f6e
https://github.com/llvm/llvm-project/commit/b2d70e8796ab68a80567fb794079ee07bb243f6e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Use Builder to create cast recipes in VPlanTransforms (NFC).
Use VPBuilder in a few more places. This avoids manual insertions and
will make changing the cast recipe easier in the future.
Commit: f838a5e96cb15f3cd70b2f26db0b520004350c7e
https://github.com/llvm/llvm-project/commit/f838a5e96cb15f3cd70b2f26db0b520004350c7e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix diagnostic difference with opaque call cmps (#129702)
Try to dig out the call expression and diagnose this as an opaque call.
Commit: e5d5503e4efa48b61194b1e70e469aba91297bec
https://github.com/llvm/llvm-project/commit/e5d5503e4efa48b61194b1e70e469aba91297bec
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_hypot.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_hypot.cl
A libclc/clc/lib/generic/math/clc_hypot.inc
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_hypot.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/hypot.cl
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move hypot to CLC library; optimize (#129551)
This was already nominally in the CLC library; this commit just formally
moves it over. It simultaneously optimizes it for vector types by
avoiding scalarization.
Commit: 2af0e2f3e6c761ecd3f2dd31d0ae844572fcdce0
https://github.com/llvm/llvm-project/commit/2af0e2f3e6c761ecd3f2dd31d0ae844572fcdce0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python.swig
Log Message:
-----------
Revert "Push down the swig module to avoid an import cycle" (#129714)
Reverts llvm/llvm-project#129135 due to buildbot test failures.
Definitely caused remote Linux to Windows failures
(https://lab.llvm.org/buildbot/#/builders/197/builds/2712), may be the
cause of Windows on Arm failures
https://lab.llvm.org/buildbot/#/builders/141/builds/6744.
Commit: 29dde55c5d03d7285882766795e15ec1e906f6c0
https://github.com/llvm/llvm-project/commit/29dde55c5d03d7285882766795e15ec1e906f6c0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__utility/no_destroy.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__utility/swap.h
Log Message:
-----------
[libc++] Remove a few unused includes in <utility> headers (#129674)
Commit: 9ad515603d97615045470fc4bdc72e1865d2986d
https://github.com/llvm/llvm-project/commit/9ad515603d97615045470fc4bdc72e1865d2986d
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/test/Driver/hip-gz-options.hip
Log Message:
-----------
A more precise matching for the driver test (#129611)
Maybe this fixes issues detected after #128894
Commit: 1d8eb436ca694a9e215066e0b2dbd18b2d3943ea
https://github.com/llvm/llvm-project/commit/1d8eb436ca694a9e215066e0b2dbd18b2d3943ea
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Diagnose member calls on inactive union fields (#129709)
Unless the function is a constructor, which is allowed to do this since
it will activate the member.
Commit: 4c4fd6b03149348cf11af245ad2603d24144a9d5
https://github.com/llvm/llvm-project/commit/4c4fd6b03149348cf11af245ad2603d24144a9d5
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
Log Message:
-----------
[clang] Fix missing diagnostic of declaration use when accessing TypeDecls through typename access (#129681)
We were missing a call to DiagnoseUseOfDecl when performing typename
access.
This refactors the code so that TypeDecl lookups funnel through a helper
which performs all the necessary checks, removing some related
duplication on the way.
Fixes #58547
Differential Revision: https://reviews.llvm.org/D136533
Commit: 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
https://github.com/llvm/llvm-project/commit/1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/big_int.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/quick_sort.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FModTest.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/bcopy_test.cpp
Log Message:
-----------
[libc] Enable -Wconversion for tests. (#127523)
Relates to: #119281
Commit: d1c1ab100a496ada2208a92c37938c3ca8666e24
https://github.com/llvm/llvm-project/commit/d1c1ab100a496ada2208a92c37938c3ca8666e24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129654)
Commit: cd3d10cba512f34deb38d80e7acdf1af6b5d11c9
https://github.com/llvm/llvm-project/commit/cd3d10cba512f34deb38d80e7acdf1af6b5d11c9
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
[mlir][tosa] Add more error_if checks for Resize Op (#129577)
Some of the error_if checks were missed in this PR:
https://github.com/llvm/llvm-project/pull/124956
Add back those tests to check suitable sizes for Resize
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 9c542bcf0a1b243dd39c2ecffdd7331c15ae0fb1
https://github.com/llvm/llvm-project/commit/9c542bcf0a1b243dd39c2ecffdd7331c15ae0fb1
Author: T-Gruber <100079402+T-Gruber at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
Log Message:
-----------
[analyzer] performTrivialCopy triggers checkLocation before binding (#129016)
The triggered callbacks for the default copy constructed instance and
the instance used for initialization now behave in the same way. The LHS
already calls checkBind. To keep this consistent, checkLocation is now
triggered accordingly for the RHS.
Further details on the previous discussion:
https://discourse.llvm.org/t/checklocation-for-implicitcastexpr-of-kind-ck-noop/84729
---------
Authored-by: tobias.gruber <tobias.gruber at concentrio.io>
Commit: 180e305ac8c3c023faaf3fb4cea539d2cb6e311e
https://github.com/llvm/llvm-project/commit/180e305ac8c3c023faaf3fb4cea539d2cb6e311e
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
R mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add more error_if checks for Resize Op" (#129729)
Reverts llvm/llvm-project#129577. Need rebase to fix some errors.
Commit: 54ad11495ecd49171d238fbdb06a2d1ab8f68182
https://github.com/llvm/llvm-project/commit/54ad11495ecd49171d238fbdb06a2d1ab8f68182
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
Log Message:
-----------
[msan][NFC] Add tests for Arm NEON umaxv/uminv (#129661)
This patch precommits tests for the umaxv/uminv intrinsics, which are currently handled suboptimally by visitInstruction.
Future work will update MSan to apply handleVectorReduceIntrinsic.
Commit: 0247a75072874d1238db89a88bed28ceea4c8625
https://github.com/llvm/llvm-project/commit/0247a75072874d1238db89a88bed28ceea4c8625
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
Log Message:
-----------
AMDGPU: Add some tests for folding immediates into subregister uses (#129663)
Commit: aeca2aa19374d7f70f6f84a99510535b854ec15a
https://github.com/llvm/llvm-project/commit/aeca2aa19374d7f70f6f84a99510535b854ec15a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix CallPtr return type check (#129722)
CallExpr::getType() isn't enough here in some cases, we need to use
CallExpr::getCallReturnType().
Commit: 6720465c47303cafcd448c64af97e7b627c399a8
https://github.com/llvm/llvm-project/commit/6720465c47303cafcd448c64af97e7b627c399a8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/test/CodeGenObjC/arc-blocks.m
M clang/test/CodeGenObjC/arc-property.m
M clang/test/CodeGenObjC/arc-weak-property.m
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/arm64-int32-ivar.m
M clang/test/CodeGenObjC/bitfield-ivar-offsets.m
M clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/hidden-visibility.m
M clang/test/CodeGenObjC/interface-layout-64.m
M clang/test/CodeGenObjC/ivar-base-as-invariant-load.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/nontrivial-c-struct-property.m
M clang/test/CodeGenObjC/objc-asm-attribute-test.m
M clang/test/CodeGenObjC/ubsan-bool.m
Log Message:
-----------
[ObjC] Expand isClassLayoutKnownStatically to base classes as long as the implementation of it is known (#85465)
Only NSObject we can trust the layout of won't change even though we
cannot directly see its @implementation
Commit: 43a1a337284703c9460d35a931f1b8c362c72a83
https://github.com/llvm/llvm-project/commit/43a1a337284703c9460d35a931f1b8c362c72a83
Author: Jeremy Kun <jkun at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
Log Message:
-----------
[mlir] add StringRef override for FunctionOpInterface::removeResultAttr (#129651)
A mirror of the corresponding overload for `removeArgAttr(unsigned
index, ::llvm::StringRef name)`
[here](https://github.com/llvm/llvm-project/blob/41473162fd886d7db548fb288cf3620570f73c17/mlir/include/mlir/Interfaces/FunctionInterfaces.td#L451-L454)
Commit: 03677f63a7d3f8bfd50407b5fa2a86f8fbcc162f
https://github.com/llvm/llvm-project/commit/03677f63a7d3f8bfd50407b5fa2a86f8fbcc162f
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
Log Message:
-----------
[MachineScheduler] Optional scheduling of single-MI regions (#129704)
Following 15e295d the machine scheduler no longer filters-out single-MI
regions when emitting regions to schedule. While this has no functional
impact at the moment, it generally has a negative compile-time impact
(see #128739).
Since all targets but AMDGPU do not care for this behavior, this
introduces an off-by-default flag to `ScheduleDAGInstrs` to control
whether such regions are going to be scheduled, effectively reverting
15e295d for all targets but AMDGPU (currently the only target enabling
this flag).
Commit: 3d864c4682fd28624ece3aa2e413e16bf0e3ef3b
https://github.com/llvm/llvm-project/commit/3d864c4682fd28624ece3aa2e413e16bf0e3ef3b
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[LowerTypeTests] Skip declarations when determining Thumb support
When looping over all functions in a module to determine whether any of
them is built with support for B.W, we can skip declarations since those
do not have an associated target-feature attribute.
This was found by the assertion from https://github.com/llvm/llvm-project/pull/129600
Reviewed By: statham-arm
Pull Request: https://github.com/llvm/llvm-project/pull/129599
Commit: 17f0aaac57d006cb1aef09be8eaf2bbdd6f5d0b6
https://github.com/llvm/llvm-project/commit/17f0aaac57d006cb1aef09be8eaf2bbdd6f5d0b6
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Analysis/TargetTransformInfo.cpp
Log Message:
-----------
[TTI] Assert that TargetIRAnalyis is not requested for intrinsics
This catches the bug fixed in https://github.com/llvm/llvm-project/pull/127760
and also finds another call in LowerTypeTests where we request the TTI
for instrinsics instead of skipping them.
Reviewed By: nikic
Pull Request: https://github.com/llvm/llvm-project/pull/129600
Commit: 9a659fac2f40754dcef273f0ee4bb3352e4a6ee9
https://github.com/llvm/llvm-project/commit/9a659fac2f40754dcef273f0ee4bb3352e4a6ee9
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/test/HLFIR/maxval-elemental.fir
Log Message:
-----------
[flang] fix MAXVAL(x%array_comp_with_custom_lower_bounds) (#129684)
The HLFIR inlining of MAXVAL kicks in at O1 and more when the argument
is an array component reference but the implementation did not account
for the rare cases where the array components have non default lower
bounds.
This patch fixes the issue by using `getElementAt` to compute the
element address.
Rename `indices` to `oneBasedIndices` for more clarity.
Commit: cd3acd1bff02d0100cbe74307f29c00a3874bc41
https://github.com/llvm/llvm-project/commit/cd3acd1bff02d0100cbe74307f29c00a3874bc41
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
R llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Remove unused s_barrier_{init,join,leave} instructions (#129548)
Commit: 9e1eaff95b3284ccec71fec70eb9e286c34974c4
https://github.com/llvm/llvm-project/commit/9e1eaff95b3284ccec71fec70eb9e286c34974c4
Author: Iris <0.0 at owo.li>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/init-priority-attr.cpp
Log Message:
-----------
[clang] Fix `gnu::init_priority` attribute handling for reserved values (#121577)
- Added a new diagnostic group `InitPriorityReserved`
- Allow values within the range 0-100 of `init_priority` to be used
outside system library, but with a warning
- Updated relavant tests
Fixes #121108
Commit: 17bfc00f7c4a424d7b5dc6da575865833701fd1a
https://github.com/llvm/llvm-project/commit/17bfc00f7c4a424d7b5dc6da575865833701fd1a
Author: Peilin Ye <yepeilin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/test/CodeGen/BPF/assembler-disassembler-v4.s
A llvm/test/CodeGen/BPF/atomic-load-store.ll
Log Message:
-----------
[BPF] Add load-acquire and store-release instructions under -mcpu=v4 (#108636)
As discussed in [1], introduce BPF instructions with load-acquire and
store-release semantics under -mcpu=v4. Define 2 new flags:
BPF_LOAD_ACQ 0x100
BPF_STORE_REL 0x110
A "load-acquire" is a BPF_STX | BPF_ATOMIC instruction with the 'imm'
field set to BPF_LOAD_ACQ (0x100).
Similarly, a "store-release" is a BPF_STX | BPF_ATOMIC instruction with
the 'imm' field set to BPF_STORE_REL (0x110).
Unlike existing atomic read-modify-write operations that only support
BPF_W (32-bit) and BPF_DW (64-bit) size modifiers, load-acquires and
store-releases also support BPF_B (8-bit) and BPF_H (16-bit). An 8- or
16-bit load-acquire zero-extends the value before writing it to a 32-bit
register, just like ARM64 instruction LDAPRH and friends.
As an example (assuming little-endian):
long foo(long *ptr) {
return __atomic_load_n(ptr, __ATOMIC_ACQUIRE);
}
foo() can be compiled to:
db 10 00 00 00 01 00 00 r0 = load_acquire((u64 *)(r1 + 0x0))
95 00 00 00 00 00 00 00 exit
opcode (0xdb): BPF_ATOMIC | BPF_DW | BPF_STX
imm (0x00000100): BPF_LOAD_ACQ
Similarly:
void bar(short *ptr, short val) {
__atomic_store_n(ptr, val, __ATOMIC_RELEASE);
}
bar() can be compiled to:
cb 21 00 00 10 01 00 00 store_release((u16 *)(r1 + 0x0), w2)
95 00 00 00 00 00 00 00 exit
opcode (0xcb): BPF_ATOMIC | BPF_H | BPF_STX
imm (0x00000110): BPF_STORE_REL
Inline assembly is also supported.
Add a pre-defined macro, __BPF_FEATURE_LOAD_ACQ_STORE_REL, to let
developers detect this new feature. It can also be disabled using a new
llc option, -disable-load-acq-store-rel.
Using __ATOMIC_RELAXED for __atomic_store{,_n}() will generate a "plain"
store (BPF_MEM | BPF_STX) instruction:
void foo(short *ptr, short val) {
__atomic_store_n(ptr, val, __ATOMIC_RELAXED);
}
6b 21 00 00 00 00 00 00 *(u16 *)(r1 + 0x0) = w2
95 00 00 00 00 00 00 00 exit
Similarly, using __ATOMIC_RELAXED for __atomic_load{,_n}() will generate
a zero-extending, "plain" load (BPF_MEM | BPF_LDX) instruction:
int foo(char *ptr) {
return __atomic_load_n(ptr, __ATOMIC_RELAXED);
}
71 11 00 00 00 00 00 00 w1 = *(u8 *)(r1 + 0x0)
bc 10 08 00 00 00 00 00 w0 = (s8)w1
95 00 00 00 00 00 00 00 exit
Currently __ATOMIC_CONSUME is an alias for __ATOMIC_ACQUIRE. Using
__ATOMIC_SEQ_CST ("sequentially consistent") is not supported yet and
will cause an error:
$ clang --target=bpf -mcpu=v4 -c bar.c > /dev/null
bar.c:1:5: error: sequentially consistent (seq_cst) atomic load/store is
not supported
1 | int foo(int *ptr) { return __atomic_load_n(ptr, __ATOMIC_SEQ_CST); }
| ^
...
Finally, rename those isST*() and isLD*() helper functions in
BPFMISimplifyPatchable.cpp based on what the instructions actually do,
rather than their instruction class.
[1]
https://lore.kernel.org/all/20240729183246.4110549-1-yepeilin@google.com/
Commit: 25a29cef311efea03d50cc715f5b20e685c16d1a
https://github.com/llvm/llvm-project/commit/25a29cef311efea03d50cc715f5b20e685c16d1a
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Switch zero point of avgpool2d to input variable type (#128983)
This commit changes the TOSA operator AvgPool2d's zero point attributes
to inputs to align with TOSA 1.0 spec.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: bbbdb23c33ef56a518072754f4dc4d123655276d
https://github.com/llvm/llvm-project/commit/bbbdb23c33ef56a518072754f4dc4d123655276d
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
Log Message:
-----------
[DirectX] Set module-level flag `LowPrecisionPresent` in DXIL Shader Flags Analysis (#129109)
Fixes #114561
Commit: 6018930ef1fa62315c3e02b8b8b775056bd5224d
https://github.com/llvm/llvm-project/commit/6018930ef1fa62315c3e02b8b8b775056bd5224d
Author: Nick Fitzgerald <fitzgen at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lld/test/wasm/initial-heap.test
M lld/test/wasm/mutable-global-exports.s
A lld/test/wasm/page-size.s
M lld/test/wasm/shared-memory.yaml
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SymbolTable.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lld/wasm/Writer.cpp
M lld/wasm/WriterUtils.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[lld][WebAssembly] Support for the custom-page-sizes WebAssembly proposal (#128942)
This commit adds support for WebAssembly's custom-page-sizes proposal to
`wasm-ld`. An overview of the proposal can be found
[here](https://github.com/WebAssembly/custom-page-sizes/blob/main/proposals/custom-page-sizes/Overview.md).
In a sentence, it allows customizing a Wasm memory's page size, enabling
Wasm to target environments with less than 64KiB of memory (the default
Wasm page size) available for Wasm memories.
This commit contains the following:
* Adds a `--page-size=N` CLI flag to `wasm-ld` for configuring the
linked Wasm binary's linear memory's page size.
* When the page size is configured to a non-default value, then the
final Wasm binary will use the encodings defined in the
custom-page-sizes proposal to declare the linear memory's page size.
* Defines a `__wasm_first_page_end` symbol, whose address points to the
first page in the Wasm linear memory, a.k.a. is the Wasm memory's page
size. This allows writing code that is compatible with any page size,
and doesn't require re-compiling its object code. At the same time,
because it just lowers to a constant rather than a memory access or
something, it enables link-time optimization.
* Adds tests for these new features.
r? @sbc100
cc @sunfishcode
Commit: b8a66f50b487577e19a5d05bc86690ff60fe9141
https://github.com/llvm/llvm-project/commit/b8a66f50b487577e19a5d05bc86690ff60fe9141
Author: Alex <alejandro.duran at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M offload/plugins-nextgen/host/dynamic_ffi/ffi.h
Log Message:
-----------
[OFFLOAD] Update ffi_cif structure to match libffi (#128756)
The ffi_cif structure defined in the wrapper header is smaller than the
actual structure in libffi which results in other structures being
overwritten when libffi is called, and finally in a segfault.
The patch updates the structure to the correct layout as specified in
ffi.h
Commit: 863260523f97069d4cc45f1876f49b3392526d07
https://github.com/llvm/llvm-project/commit/863260523f97069d4cc45f1876f49b3392526d07
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Simplify code using getRealVLen() [NFC]
Commit: 0f869cc336a8155da7b095d0ca704dc8b6777092
https://github.com/llvm/llvm-project/commit/0f869cc336a8155da7b095d0ca704dc8b6777092
Author: Dominik Steenken <dost at de.ibm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
[SystemZ] Make I5 operand of R[INOX]SGB(Z)? optional (#129512)
The I5 operand of the instructions in RIE-f format is optional and
assumed 0 when not specified. This was not properly modeled thus far,
and is corrected with this PR. In addition, assembly and disassembly
tests are updated to reflect these changes
Commit: c8f4c35a6624c23632fbca7f5f384655ef4811f0
https://github.com/llvm/llvm-project/commit/c8f4c35a6624c23632fbca7f5f384655ef4811f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
Log Message:
-----------
AMDGPU: Correctly handle folding immediates into subregister use operands (#129664)
This fixes a miscompile where a 64-bit materialize incorrectly folds
into
a sub1 use operand.
We currently do not see many subregister use operands. Incidentally,
there are also SIFoldOperands bugs that prevent this fold from
appearing here. Pre-fix folding of 32-bit subregister uses from 64-bit
materializes, in preparation for future patches.
The existing APIs are awkward since they expect to have a fully formed
instruction with operands to use, and not something new which needs
to be created.
Commit: 6e28700ab1d876a9b01647782ce3c0ed4d8e0bb4
https://github.com/llvm/llvm-project/commit/6e28700ab1d876a9b01647782ce3c0ed4d8e0bb4
Author: John Harrison <harjohn at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/IOStream.cpp
Log Message:
-----------
[lldb-dap] Improving EOF handling on stream input and adding new unit tests (#129581)
This should improve the handling of EOF on stdin and adding some new
unit tests to malformed requests.
Commit: 0a93bc7d7a4428652286097be33466cd154fcf3e
https://github.com/llvm/llvm-project/commit/0a93bc7d7a4428652286097be33466cd154fcf3e
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
Log Message:
-----------
[AMDGPU] Debug dump for AMDGPU resource usage (#122952)
Commit: 9295b03e2a08410f69923f1200b669a0a3fe5daf
https://github.com/llvm/llvm-project/commit/9295b03e2a08410f69923f1200b669a0a3fe5daf
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
Log Message:
-----------
[RISCV] Fix a typo in fixed_m1_in_m2_tail test [nfc]
When I added these, they were supposed to be sub-vector inserts, but since
I got a couple index values wrong, they were instead general shuffles.
Commit: 6f256145c00cef851b2b439e240fbc3eed9413a6
https://github.com/llvm/llvm-project/commit/6f256145c00cef851b2b439e240fbc3eed9413a6
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR] Clean up warnings (#129604)
Previous CIR commits have introduced a few warnings. This change fixes
those.
There are still warnings present when building with GCC because GCC
warns about virtual functions being hidden in the mlir::OpConversion
classes. A separate discussion will be required to decide what should be
done about those.
Commit: f9a6ea44895ea14da27ad1b2e78df3f54bf0c327
https://github.com/llvm/llvm-project/commit/f9a6ea44895ea14da27ad1b2e78df3f54bf0c327
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
A libc/utils/MPCWrapper/mpc_inc.h
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
A utils/bazel/third_party_build/mpc.BUILD
Log Message:
-----------
[libc][bazel] Add BUILD targets for complex functions and tests. (#129618)
This involved a little bit of yak shaving because one of the new tests
depends on MPC, and we didn't have targets for it yet, so I ended up
needing to add a similar setup to what we have for MPFR.
Commit: ee4bc5a8ca94e915a40daddd79237bf3b7520bf9
https://github.com/llvm/llvm-project/commit/ee4bc5a8ca94e915a40daddd79237bf3b7520bf9
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
Log Message:
-----------
[RISCV] Remove Last Traces of User Interrupts (#129300)
These were left over from when Craig removed
`__attribute__((interrupt("user")))` support in
05d0caef6081e1a6cb23a5a5afe43dc82e8ca558.
The tests change "interrupt"="user" into "interrupt"="machine" as they
are still intending to be interrupt tests. ISelLowering will now reject
"interrupt"="user". The docs no longer mention "user" as a possible
interrupt attribute argument.
Commit: d38380d3d808183652c1e9be34e3a2476ed6ea70
https://github.com/llvm/llvm-project/commit/d38380d3d808183652c1e9be34e3a2476ed6ea70
Author: Lei Wang <wlei at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[CSSPGO] Fix redundant reading of profile metadata (#129609)
Fix a build speed regression due to repeated reading of profile
metadata. Before the function `readFuncMetadata(ProfileHasAttribute,
Profiles)` reads the metadata for all the functions(`Profiles`),
however, it's actually used for on-demand loading, it can be called for
multiple times, which leads to redundant reading that causes the build
speed regression. Now fix it to read the metadata only for the new
loaded functions(functions in the `FuncsToUse`).
Commit: 540d7ddb152164c9969aa05344caebe3cb129096
https://github.com/llvm/llvm-project/commit/540d7ddb152164c9969aa05344caebe3cb129096
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][py] Plumb OpPrintingFlags::printNameLocAsPrefix() through the C/Python APIs (#129607)
Commit: 423862f3d53a27aafa449cc8eb639ad29390083f
https://github.com/llvm/llvm-project/commit/423862f3d53a27aafa449cc8eb639ad29390083f
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing dep after 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Commit: 6ca2a9f2df281354b74bdd80b1600140243d9220
https://github.com/llvm/llvm-project/commit/6ca2a9f2df281354b74bdd80b1600140243d9220
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen] Use Register in SDep interface. NFC (#129734)
Commit: c8dd8522faff572b5823304d66cdb625b6b8b6bc
https://github.com/llvm/llvm-project/commit/c8dd8522faff572b5823304d66cdb625b6b8b6bc
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Use early return to simplify costShuffleViaVRegSplitting [nfc]
Commit: 1b46db77765bb0a25d784924a9785d9686cf67e0
https://github.com/llvm/llvm-project/commit/1b46db77765bb0a25d784924a9785d9686cf67e0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
Log Message:
-----------
[ctxprof] ProfileWriter abstraction (#129590)
Introduce a `ProfileWriter` abstraction to replace the callback passed to `__llvm_ctx_profile_fetch`. Subsequent changes will add support for flat profile collection (as in, collection of non-contextual profile for those functions not under a contextual root), which require also a change in the profile format. The abstraction makes it easy to add "write flat" - related capabilities without constantly complicating the signature of `__llvm_ctx_profile_fetch`.
Commit: 5cc033b5f2ac0f257ee6c7fd457da0425dc64d37
https://github.com/llvm/llvm-project/commit/5cc033b5f2ac0f257ee6c7fd457da0425dc64d37
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] fshr true16 pattern (#129085)
true16 pattern for fshr.
GlobalIsel will be enabled latter when merge_value selection is
supported in true16 mode
Commit: 855178af99ac6597f3ae09c3c9b7edbc37b28009
https://github.com/llvm/llvm-project/commit/855178af99ac6597f3ae09c3c9b7edbc37b28009
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP]Fix/improve getSpillCost analysis
Previous implementation may took some extra time, when walked over the
same instructions several times. And also it did not include proper
analysis for cross-basic-block use of the vectorized values. This
version fixes it.
It walks over the tree and checks the deps between entries and their
operands. If there are non-vectorized calls in between, it adds
a single(!) spill cost, because the vector value should be
spilled/reloaded only once.
Also, this version caches analysis for each entries, which are detected,
and do not repeats it, uses data, found during previous analysis for
previous nodes.
Also, it has the internal limit. If the number of instructions
between nodes and their operands is too big (> than ScheduleRegionSizeBudget / VectorizableTree.size()), it is considered that the spill is required. It allows to improve compile time.
Reviewers: preames, RKSimon, mikhailramalho
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/129258
Commit: d6301b218c6698ceb0db1753c8de480d37d11cf8
https://github.com/llvm/llvm-project/commit/d6301b218c6698ceb0db1753c8de480d37d11cf8
Author: Jan Voung <jvoung at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Revert "[clang][dataflow] Fix unsupported types always being equal" (#129761)
Reverts llvm/llvm-project#129502
seeing new crashes around
https://github.com/google/crubit/blob/859520eca82d60a169fb85cdbf648c57d0a14a99/nullability/test/smart_pointers_diagnosis.cc#L57
Would like some time to investigate.
Commit: 1440f02259abf585f0c2965bd4ececf0f3499405
https://github.com/llvm/llvm-project/commit/1440f02259abf585f0c2965bd4ececf0f3499405
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/test/Transforms/Scalarizer/min-bits.ll
Log Message:
-----------
[Scalarizer] Ensure valid VectorSplits for each struct element in `visitExtractValueInst` (#128538)
Fixes #127739
The `visitExtractValueInst` is missing a check that was present in
`splitCall` / `visitCallInst`.
This check ensures that each struct element has a VectorSplit, and that
each VectorSplit contains the same number of elements packed per
fragment.
---------
Co-authored-by: Jay Foad <jay.foad at amd.com>
Commit: df1c8ba26c423230a26169c23fff86b4c806730a
https://github.com/llvm/llvm-project/commit/df1c8ba26c423230a26169c23fff86b4c806730a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
Log Message:
-----------
[RISCV][CostModel] Add additional deinterleave tests with EMUL>1
Commit: 42429fedf9198b4a6d7ec51251f6e2bfa1a8385e
https://github.com/llvm/llvm-project/commit/42429fedf9198b4a6d7ec51251f6e2bfa1a8385e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Simplify costShuffleViaVRegSplitting [nfc] (#129766)
This code goes to some length to cost the subvector extracts, but by
construction, all of the subvector extracts are subregister extracts
from a vector register group and thus have zero cost. As a result, none
of this code is needed.
Commit: 4c2d1b4c53def85e16d3612b92379a347d76baf0
https://github.com/llvm/llvm-project/commit/4c2d1b4c53def85e16d3612b92379a347d76baf0
Author: David Green <david.green at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
Log Message:
-----------
[AArch64] Add test for scalar copysign. NFC
Commit: b08769c3ec7ef486fd9b8a315856af53c5a58957
https://github.com/llvm/llvm-project/commit/b08769c3ec7ef486fd9b8a315856af53c5a58957
Author: youngd007 <davidayoung at meta.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-completeness-json-output.s
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-cu-lists-json-output.s
Log Message:
-----------
Modify dwarf verification JSON to include detailed counts by sub-category (#128018)
To help make better use of dwarfdump verification for identifying and
fixing issues with debug information, the JSON will now emit details
(sub-categories) where relevant. First modification concerns missing
tags as those were recently missing for BOLT debug names.
Test:
test files for JSON output were previously added, so modify here to
expect the new JSON keys. One test has sub-categories and another is
empty.
ninja check-llvm-tools-llvm-dwarfdump
Also build the tool and run with a local executable to verify.
ninja llvm-dwarfdump
Commit: a12744ff05bbc2d0de711afb8b3a1c7a03a33914
https://github.com/llvm/llvm-project/commit/a12744ff05bbc2d0de711afb8b3a1c7a03a33914
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/swap_ranges.h
M libcxx/include/__bit_reference
A libcxx/test/benchmarks/algorithms/swap_ranges.bench.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::swap_ranges for vector<bool>::iterator (#121150)
This PR optimizes the performance of `std::ranges::swap_ranges` for
`vector<bool>::iterator`, addressing a subtask outlined in issue #64038.
The optimizations yield performance improvements of up to **611x** for
aligned range swap and **78x** for unaligned range swap comparison.
Additionally, comprehensive tests covering up to 4 storage words (256
bytes) with odd and even bit sizes are provided, which validate the
proposed optimizations in this patch.
Commit: ed5cd8d4642e6918bd64cae01cfe7056c6153da9
https://github.com/llvm/llvm-project/commit/ed5cd8d4642e6918bd64cae01cfe7056c6153da9
Author: Michael Jones <michaelrj at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/src/__support/big_int.h
M libc/src/string/memory_utils/generic/byte_per_byte.h
Log Message:
-----------
[libc] Fix casts for arm32 after Wconversion (#129771)
Followup to #127523
There were some test failures on arm32 after enabling Wconversion. There
were some tests that were failing due to missing casts. Also I changed
BigInt's `safe_get_at` back to being signed since it needed the ability
to be negative.
Commit: 7b596ce362829281ea73b576774ce90bb212138d
https://github.com/llvm/llvm-project/commit/7b596ce362829281ea73b576774ce90bb212138d
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
[lldb] Fix ObjectFileJSON to section addresses. (#129648)
ObjectFileJSON sections didn't work, they were set to zero all of the
time. Fixed the bug and fixed the test to ensure it was testing real
values.
Commit: 9b1604065e9b0754c20faff567c647964e93db69
https://github.com/llvm/llvm-project/commit/9b1604065e9b0754c20faff567c647964e93db69
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
Log Message:
-----------
[flang-rt] Move unit-map.cpp to host-only sources list. (#129763)
This file is not enabled for the offload builds.
This patch aligns the list with flang/runtime/CMakeLists.txt
(that is about to be removed).
Commit: fa072bd29a109be424e6f4521823529750a55efe
https://github.com/llvm/llvm-project/commit/fa072bd29a109be424e6f4521823529750a55efe
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/Lowering/basic.cpp
A clang/test/CIR/Lowering/func-simple.cpp
M clang/test/CIR/Lowering/global-var-simple.cpp
Log Message:
-----------
[CIR] Add lowering for Func, Return, Alloca, Load, and Store (#129571)
Add support for lowering recently upstreamed CIR ops to LLVM IR.
Commit: e697c99b63224069daa3814f536a69fecab8cd4e
https://github.com/llvm/llvm-project/commit/e697c99b63224069daa3814f536a69fecab8cd4e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
A llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
Log Message:
-----------
[AMDGPU] Add custom MachineValueType entries for buffer fat poiners (#127692)
The old hack of returning v5/v6i32 for the fat and strided buffer
pointers was causing issuse during vectorization queries that expected
to be able to construct a VectorType from the return value of `MVT
getPointerType()`. On example is in the test attached to this PR, which
used to crash.
Now, we define the custom MVT entries, the 160-bit
amdgpuBufferFatPointer and 192-bit amdgpuBufferStridedPointer, which are
used to represent ptr addrspace(7) and ptr addrspace(9) respectively.
Neither of these types will be present at the time of lowering to a
SelectionDAG or other MIR - MVT::amdgpuBufferFatPointer is eliminated by
the LowerBufferFatPointers pass and amdgpu::bufferStridedPointer is not
currently used outside of the SPIR-V translator (which does its own
lowering).
An alternative solution would be to add MVT::i160 and MVT::i192. We
elect not to do this now as it would require changes to unrelated code
and runs the risk of breaking any SelectionDAG code that assumes that
the MVT series are all powers of two (and so can be split apart and
merged back together) in ways that wouldn't be obvious if someone tried
to use MVT::i160 in codegen. If i160 is added at some future point,
these custom types can be retired.
Commit: 27901cec0e76d2cbf648b3b63d5b2fec1d46bb9c
https://github.com/llvm/llvm-project/commit/27901cec0e76d2cbf648b3b63d5b2fec1d46bb9c
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
Add subsection and permissions support to ObjectFileJSON. (#129801)
This patch adds the ability to create subsections in a section and
allows permissions to be specified.
Commit: e739ce2e10e60a2f3363b1ba26c388c7d7aa7bd4
https://github.com/llvm/llvm-project/commit/e739ce2e10e60a2f3363b1ba26c388c7d7aa7bd4
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/include/string
M libcxx/test/std/strings/strings.erasure/erase.pass.cpp
M libcxx/test/std/strings/strings.erasure/erase_if.pass.cpp
Log Message:
-----------
[libc++] Add missed `constexpr` to `erase(_if)` in `<string>` (#129666)
`std::erase(_if)` for `basic_string` were made `constexpr` in C++20 by
cplusplus/draft at 2c1ab9775cc53e848a1efff4f9976455538994d4 as follow-up
changes of P0980R1.
This patch implements the missed changes that were not tracked in a
specific paper.
Commit: 2068a18c86ab0f6f80e268dc3bc1a5329ee51715
https://github.com/llvm/llvm-project/commit/2068a18c86ab0f6f80e268dc3bc1a5329ee51715
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
Log Message:
-----------
[ctxprof][nfc] Prepare CtxProfAnalysis for flat profiles (#129623)
Mostly remove the equivalence "no contexts == no CtxProfAnalysis result", and instead check explicitly there are no contextual profiles.
Commit: dec4cae131a7bfca490e82cb181a8df21dad790b
https://github.com/llvm/llvm-project/commit/dec4cae131a7bfca490e82cb181a8df21dad790b
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
Log Message:
-----------
[msan][NFC] Add expand-experimental-reductions.ll (#129768)
Forked from llvm/test/CodeGen/Generic/expand-experimental-reductions.ll
Handled suboptimally by visitInstruction:
- llvm.vector.reduce.smax
- llvm.vector.reduce.smin
- llvm.vector.reduce.umax
- llvm.vector.reduce.umin
- llvm.vector.reduce.fmax
- llvm.vector.reduce.fmin
Commit: 8aafbfdc3aa439e578f8d617a478634dd61b0349
https://github.com/llvm/llvm-project/commit/8aafbfdc3aa439e578f8d617a478634dd61b0349
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
Log Message:
-----------
[msan][NFC] Add arm64-vmax.ll tests (#129760)
Forked from llvm/test/CodeGen/AArch64/arm64-vmax.ll
Pairwise instructions which are handled incorrectly by heuristics:
- llvm.aarch64.neon.fmaxp (floating-point maximum pairwise)
- llvm.aarch64.neon.fminp
- llvm.aarch64.neon.fmaxnmp (floating-point maximum number pairwise)
- llvm.aarch64.neon.fminnmp
- llvm.aarch64.neon.smaxp
- llvm.aarch64.neon.sminp
- llvm.aarch64.neon.umaxp
- llvm.aarch64.neon.uminp
Future work should consider whether handlePairwiseShadowOrIntrinsic is a
more appropriate handler.
Other instructions which are handled correctly by heuristics:
- llvm.aarch64.neon.fmax
- llvm.aarch64.neon.fmin
- llvm.aarch64.neon.smax
- llvm.aarch64.neon.smin
- llvm.aarch64.neon.umax
- llvm.aarch64.neon.umin
Commit: b41baafbc79b950db178102322a7d0de76b58081
https://github.com/llvm/llvm-project/commit/b41baafbc79b950db178102322a7d0de76b58081
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-readtapi/compare-left-single-inline.test
M llvm/test/tools/llvm-readtapi/compare-mismatched-inlines.test
M llvm/test/tools/llvm-readtapi/compare-multiple-inlines.test
M llvm/test/tools/llvm-readtapi/compare-right-single-inline.test
M llvm/tools/llvm-readtapi/DiffEngine.cpp
M llvm/tools/llvm-readtapi/DiffEngine.h
Log Message:
-----------
[readtapi] Condense output when comparing tbd files with mismatched inlined libraries (#129754)
Previously, when an inlined library existed in TBD file A but not in file B, all of the inlined library's attributes were printed. This is noisy since the important detail is the complete contents are missing. Instead, only print the install name of the inlined library and the marker for which the input file exists in.
Commit: 91aac7c379fb92348593d51e3f2d9e490ff67526
https://github.com/llvm/llvm-project/commit/91aac7c379fb92348593d51e3f2d9e490ff67526
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
Log Message:
-----------
AMDGPU: Handle s_add_u32 in eliminateFrameIndex (#129628)
We can fold frame indexes directly into existing immediate operands,
just like is already done for s_add_i32. We happen to use s_add_i32 in
the 32-bit add case, but s_add_u32 appears in the a 64-bit add sequence
of a flat pointer if an addrpacecast source is a frame index.
This avoids, but does not address a failure exposed after
a3165398db0736588daedb07650195502592e567 where two literal operands
end up in the final instruction. The underlying issue still exists for
some instructions without special handling in eliminateFrameIndex.
Commit: 2ae5dedd7a211869c2682b05baefe8e46cdd3c40
https://github.com/llvm/llvm-project/commit/2ae5dedd7a211869c2682b05baefe8e46cdd3c40
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
Log Message:
-----------
[mlir][tosa] Update ControlFlow variable names to match with TOSA v1.0 spec (#129790)
Commit: 2b5ac43359645fe3921fd8dedd93b59a8442cd9c
https://github.com/llvm/llvm-project/commit/2b5ac43359645fe3921fd8dedd93b59a8442cd9c
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update RFFT2D description to align with TOSA v1.0 spec (#129789)
Commit: 3b38992de1a23f0608a53b2fea9fef836ab0a5c8
https://github.com/llvm/llvm-project/commit/3b38992de1a23f0608a53b2fea9fef836ab0a5c8
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update AVG_POOL2D description to align with TOSAv1.0 Spec (#129782)
Commit: 95c64b7ee6158a8a4e90638af383ab8826b03a14
https://github.com/llvm/llvm-project/commit/95c64b7ee6158a8a4e90638af383ab8826b03a14
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Reduce readfirstlane for single demanded vector element (#128647)
If we are only extracting a single element, rewrite the intrinsic call
to use the element type. We should extend this to arbitrary extract
shuffles.
Commit: ab6cc6b7b3a3de5e6f5999601f0d40ab2b2819e2
https://github.com/llvm/llvm-project/commit/ab6cc6b7b3a3de5e6f5999601f0d40ab2b2819e2
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve40.f90
M flang/test/Semantics/symbol09.f90
Log Message:
-----------
[flang] Allow nested scopes for implied DO loops with DATA statements (#129410)
Previously, nested scopes for implied DO loops with DATA statements were
disallowed, which meant that the following code couldn't compile due to
re-use of `j` loop variable name:
DATA (a(i),(b(i,j),j=1,3),(c(i,j),j=1,3),i=0,4)/
This change allows nested scopes implied DO loops, which allows the code
above to compile.
Tests modified to in accordance with this change:
Semantics/resolve40.f90, Semantics/symbol09.f90
Commit: 30fd3c6286bf439c4f8982dbd1c1445e42f317b8
https://github.com/llvm/llvm-project/commit/30fd3c6286bf439c4f8982dbd1c1445e42f317b8
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
Log Message:
-----------
[msan][NFC] Add missing sanitize_memory attribute to arm64-umaxv.ll/arm64-uminv.ll (#129810)
Fixes https://github.com/llvm/llvm-project/pull/129661
Commit: 68427bc8d808a8f70ed345278fc498a1e0b5a8d2
https://github.com/llvm/llvm-project/commit/68427bc8d808a8f70ed345278fc498a1e0b5a8d2
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Parse/ParseCXXInlineMethods.cpp
A clang/test/Modules/try-func-body.cppm
Log Message:
-----------
[C++20] [Modules] Support generating in-class defined function with try-catch body (#129212)
See the example:
```
export module func;
class C {
public:
void member() try {
} catch (...) {
}
};
```
We woudln't generate the definition for `C::member` but we should. Since
the function is non-inline in modules.
This turns out to be an oversight in parser to me. Since the try-catch
body is relatively rare, so maybe we just forgot it.
Commit: 3e53aeae94cfe98486ae3186a3eb627b69b51b77
https://github.com/llvm/llvm-project/commit/3e53aeae94cfe98486ae3186a3eb627b69b51b77
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Log Message:
-----------
AMDGPU: Make frame index folding logic consistent with eliminateFrameIndex (#129633)
This adds handling of s_add_u32, which is handled and removes handling of
s_or_b32 and s_and_b32, which are not. I was working on handling them
in #102345, but need to finish that patch. This fixes a regression
exposed by a3165398db0736588daedb07650195502592e567 where the
final instruction would use two literals.
Commit: a6adb63d35308e07e131fee9b1b3aadfca9f507f
https://github.com/llvm/llvm-project/commit/a6adb63d35308e07e131fee9b1b3aadfca9f507f
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/Transforms/GVN/malloc-load-removal.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/pr14166.ll
Log Message:
-----------
[GVN][NFC] Remove triple from some tests (#129724)
These tests should not require triple.
Commit: c1468e9cbca1002a24772af1a0e7a771f93f6910
https://github.com/llvm/llvm-project/commit/c1468e9cbca1002a24772af1a0e7a771f93f6910
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCXX/function-template-specialization.cpp
Log Message:
-----------
[Clang] Don't give up on an unsuccessful function instantiation (#126723)
For constexpr function templates, we immediately instantiate them upon
reference. However, if the function isn't defined at the time of
instantiation, even though it might be defined later, the instantiation
would forever fail.
This patch corrects the behavior by popping up failed instantiations
through PendingInstantiations, so that we are able to instantiate them
again in the future (e.g. at the end of TU.)
Fixes https://github.com/llvm/llvm-project/issues/125747
Commit: 27a8501acc38f9802ec0d4b2e7a50d3ed1721b97
https://github.com/llvm/llvm-project/commit/27a8501acc38f9802ec0d4b2e7a50d3ed1721b97
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
Log Message:
-----------
[msan][NFC] Add f16c-intrinsics.ll tests (#129807)
Forked from llvm/test/CodeGen/X86/f16c-intrinsics.ll
Handled by visitInstruction:
- llvm.x86.vcvtps2ph.128/256
Commit: 6d93280aabc2fd132f54e5aa615d25abeadabe7b
https://github.com/llvm/llvm-project/commit/6d93280aabc2fd132f54e5aa615d25abeadabe7b
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
Log Message:
-----------
[msan][NFC] Add tests for Arm NEON smaxv/sminv (#129741)
This patch precommits tests for the smaxv/sminv intrinsics, which are
currently handled suboptimally by visitInstruction.
These are the signed versions of umaxv/uminv
(https://github.com/llvm/llvm-project/pull/129661).
Future work will update MSan to apply handleVectorReduceIntrinsic.
Commit: 92a307357a2f0d28e313649b5170f3ce61501426
https://github.com/llvm/llvm-project/commit/92a307357a2f0d28e313649b5170f3ce61501426
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/BitTracker.cpp
M llvm/lib/Target/Hexagon/BitTracker.h
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.h
Log Message:
-----------
[Hexagon] Remove some unused header files. NFC (#129649)
Commit: 58c869682ac260cbd4e1818b08c4557fd6025aed
https://github.com/llvm/llvm-project/commit/58c869682ac260cbd4e1818b08c4557fd6025aed
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64] Generate usdot instruction with multiple zext users in loop (#129718)
Currently, `partial_reduce(acc,mul(sext, zext))` is reduced to `usdot`
in loop only if `zext` has single user i.e. `mul`
If there are two partial reduce equations in loop body such as:
```
partial_reduce1(acc1,mul1(sext1, zext))
partial_reduce2(acc2,mul2(sext2, zext))
```
and `zext` has no other users other than `mul1`/`mul2`, then this won't
result in `usdot` instructions.
This patch checks if multiple users of `zext`, like above, satisfy the
same set of conditions as for a single user so that `usdot` instructions
are generated.
Commit: 9ee4883c61c767a79e15782efd8a3fad5071e6c6
https://github.com/llvm/llvm-project/commit/9ee4883c61c767a79e15782efd8a3fad5071e6c6
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
Log Message:
-----------
[HLSL] Reorganize aliased intrinsics into their own file (#129619)
- fixes #129616
- alphabetize the or intrinsic
Commit: fcb65ad2a2cb54990fb6171a5e357eb6a00b4705
https://github.com/llvm/llvm-project/commit/fcb65ad2a2cb54990fb6171a5e357eb6a00b4705
Author: Eric Wang <rufeer at outlook.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M bolt/runtime/hugify.cpp
Log Message:
-----------
[BOLT] Fix kernel version check for THP in hugify (#129380)
BOLT --hugify does not work in kernel 6.x.
Co-authored-by: rfwang07 <wangrufeng5 at huawei.com>
Commit: 1506f2e0ef9fda9d907f56238f56c3f140ac9c4b
https://github.com/llvm/llvm-project/commit/1506f2e0ef9fda9d907f56238f56c3f140ac9c4b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 9ee4883c61c7
Commit: b488ce0a677b42179198ea00bc6e860baa9874e3
https://github.com/llvm/llvm-project/commit/b488ce0a677b42179198ea00bc6e860baa9874e3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
A llvm/test/Transforms/PGOProfile/memprof-call-site-at-alloc-site.ll
Log Message:
-----------
[memprof] Improve call site matching (#129770)
Suppose we have a call instruction satisfying:
- AllocInfoIter != LocHashToAllocInfo.end()
- CallSitesIter != LocHashToCallSites.end()
- !isAllocationWithHotColdVariant(CI->getCalledFunction(), TLI)
In this case this patch, we would take:
if (AllocInfoIter != LocHashToAllocInfo.end()
but end up discarding the opportunity because of the call to
isAllocationWithHotColdVariant.
This can happen in C++ code like:
new Something[100];
which is lowered to two calls -- new and the constructor.
This patch fixes the problem by falling back to the call site
annotation if we have !isAllocationWithHotColdVariant.
Commit: 024362f413dbfcf8188003762c9cc299f274d76e
https://github.com/llvm/llvm-project/commit/024362f413dbfcf8188003762c9cc299f274d76e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Insert a space after kw_new by default (#129634)
This effectively reverts dbc4d281bd6954362ccfc0747893ceaae842671b.
Fix #54703
Commit: 3f121558705ac7c9ae2398baca5a2d764ce022fd
https://github.com/llvm/llvm-project/commit/3f121558705ac7c9ae2398baca5a2d764ce022fd
Author: John Harrison <harjohn at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
A lldb/tools/lldb-dap/Protocol.cpp
A lldb/tools/lldb-dap/Protocol.h
Log Message:
-----------
[lldb-dap] Creating well defined structures for DAP messages. (#129155)
This adds a new `Protocol.{h,cpp}` for defining structured types that
represent Debug Adapter Protocol messages.
This adds static types to define well structure messages for the
protocol. This iteration includes only the basic `Event`, `Request` and
`Response` types.
These types help simplify and improve the validation of messages and
give us additional static type checks on the overall structure of DAP
messages, compared to today where we tend to use `llvm::json::Value`
directly.
In a follow-up patch I plan on adding more types as need to allow for
incrementally migrating raw `llvm::json::Value` usage to well defined
types.
---------
Co-authored-by: Adrian Vogelsgesang <adrian.vogelsgesang at tum.de>
Commit: 736205d8605dea4bddd3f8ec90beffd62149ba40
https://github.com/llvm/llvm-project/commit/736205d8605dea4bddd3f8ec90beffd62149ba40
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 3f121558705a
Commit: 27757fb87429c89a65bb5e1f619ad700928db0fd
https://github.com/llvm/llvm-project/commit/27757fb87429c89a65bb5e1f619ad700928db0fd
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
A clang/test/CodeGenCXX/cxx23-p2280r4.cpp
Log Message:
-----------
[Clang] Treat constexpr-unknown value as invalid in `EvaluateAsInitializer` (#128409)
It is an alternative to
https://github.com/llvm/llvm-project/pull/127525.
Close https://github.com/llvm/llvm-project/issues/127475.
Commit: efb966e9295cdee8178591ae9d81e4b76dd138db
https://github.com/llvm/llvm-project/commit/efb966e9295cdee8178591ae9d81e4b76dd138db
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
Log Message:
-----------
[MIRParser] Use Register::id(). Pass Twine by reference. NFC
Commit: 89812985358784b16fb66928ad4da411386f4720
https://github.com/llvm/llvm-project/commit/89812985358784b16fb66928ad4da411386f4720
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
Move PowerPC-specific absolute MCSymbolRefExpr::VariantKind to PPCMCExpr
This cleans up @l @ha optimization in PPCAsmParser and is also the first
step toward removing VK_PPC_* from the generic MCSymbolRefExpr::VariantKind.
Basically we ensure that @l @ha family modifiers always lead to
PPCMCExpr and avoid MCSymbolRefExpr::VariantKind. This allows us
to delete a lot of switch statements that involve a long list of VK_PPC_LO/VK_PPC_HI/...
Commit: 40c65e858957eee4bc563f432beb0e08fe383b7c
https://github.com/llvm/llvm-project/commit/40c65e858957eee4bc563f432beb0e08fe383b7c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129821)
Commit: 77cf6ecf785871ea051116eb8f40062914bcb06f
https://github.com/llvm/llvm-project/commit/77cf6ecf785871ea051116eb8f40062914bcb06f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
[AMDGPU] Don't store an immediate in a Register. NFC
Commit: 310529065ae9680a9827742e16dd6dd51f00a4f8
https://github.com/llvm/llvm-project/commit/310529065ae9680a9827742e16dd6dd51f00a4f8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
Log Message:
-----------
clang: Regenerate test checks (#129834)
The previous checks missed the new metadata at the end of the line.
Regenerate to avoid future spurious diffs.
Commit: 065529270734deff1456b839a0155abc98e94b7f
https://github.com/llvm/llvm-project/commit/065529270734deff1456b839a0155abc98e94b7f
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
Log Message:
-----------
[SPIR-V] Fix an issue with casting types in debug-info extension implementation (#129721)
This PR fixes an issue in debug-info extension implementation (namely, a
wrong assumption that all pointee types are basic types). The reproducer
is added to an existing test case of "pointers with debug-info".
Commit: fc7482e369cc5aae0e2c4d7082ab8bc060a0bc3c
https://github.com/llvm/llvm-project/commit/fc7482e369cc5aae0e2c4d7082ab8bc060a0bc3c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
Log Message:
-----------
[lldb-dap] Return a std::optional<bool> from GetBoolean (NFC) (#129818)
Return a std::optional<bool> from GetBoolean so you can distinguish
between the value not being present and it being explicitly set to true
or false. All existing uses are replaced by calling
`value_or(fail_value`).
Motivated by #129753
Commit: f1dbc45210cec766bed7dd320ed9420484ac3ec6
https://github.com/llvm/llvm-project/commit/f1dbc45210cec766bed7dd320ed9420484ac3ec6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
Log Message:
-----------
[MLGO] Properly Handle Counting Evictions of Candidates
This patch makes it so that onEviction actually gets called when the
model ends up selecting the candidate to evict. Where we were handling
this previously ended up being dead code as we would return earlier with
MCRegister::NoRegister.
Fixes #129841.
Commit: 107fe0ec6cb36dca6bfafbfdf2996ce38d84e5bd
https://github.com/llvm/llvm-project/commit/107fe0ec6cb36dca6bfafbfdf2996ce38d84e5bd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/references.cpp
Log Message:
-----------
[clang][bytecode] Fix a crash in CheckConstantExpression (#129752)
The APValue we generated for a pointer with a LValueReferenceType base
had an incorrect lvalue path attached.
The attached test case is extracted from libc++'s regex.cpp.
Commit: 6eefadd8efc0584211cb5283e0acc00a45588242
https://github.com/llvm/llvm-project/commit/6eefadd8efc0584211cb5283e0acc00a45588242
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile73-a.f90
A flang/test/Semantics/Inputs/modfile73-b.f90
A flang/test/Semantics/Inputs/modfile73-c.f90
A flang/test/Semantics/modfile73.f90
Log Message:
-----------
[flang][Semantics] Ensure deterministic mod file output (#129669)
This PR is a follow-up to #128655.
It adds another test to ensure deterministic ordering in `.mod` files
and includes related changes to prevent non-deterministic ordering
caused by iterating over a set ordered by heap pointers. This issue is
particularly noticeable when using Flang as a library and compiling the
same files multiple times.
The reduced test case is as minimal as possible. We were unable to
reproduce the issue with a smaller set of files.
Commit: a0a904e9467cfa8f980c31181caf6be402065b19
https://github.com/llvm/llvm-project/commit/a0a904e9467cfa8f980c31181caf6be402065b19
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Collect shuffle mask for the lane not by createSequentialMask (#129830)
If there are the shuffle mask <1, u, u, u, 2, u, u, u> with factor 4. we
should have the shuffle mask <1, 2> for lane 0 and <u, u> for lane 1,
and so on. Since we use createSequentialMask to create the shuffle mask,
the shuffle mask for lane 1 would be <u, 0>(dervied from <u, u+1>). This
leads to poor code generation.
Commit: 652de78f67083ddd298a3ebb808dacae80eb25ee
https://github.com/llvm/llvm-project/commit/652de78f67083ddd298a3ebb808dacae80eb25ee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Generalise lowerShuffleAsSpecificZeroOrAnyExtend to handle sign extension (#129063)
Minor refactor to support lowering shuffles by SIGN_EXTEND in a future patch - all this patch does so far is replace the AnyExt flag that chose between ANY_EXTEND/ZERO_EXTEND with an extension opcode (no calls use SIGN_EXTEND yet).
Commit: f4878cb916127498e04819e810b4aefca65e7348
https://github.com/llvm/llvm-project/commit/f4878cb916127498e04819e810b4aefca65e7348
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Log Message:
-----------
[DAG] Add ShuffleVectorSDNode::getSplatMaskIndex static helper (#129731)
Move ShuffleVectorSDNode::getSplatIndex implementation into getSplatMaskIndex static helper, and covert getSplatIndex into a wrapper similar to isSplat
Commit: efc2f6912dbe610d376000f03474de974d710e12
https://github.com/llvm/llvm-project/commit/efc2f6912dbe610d376000f03474de974d710e12
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#129825)
Commit: efdd66034f455f3f493d4b1e4ed265b67470af01
https://github.com/llvm/llvm-project/commit/efdd66034f455f3f493d4b1e4ed265b67470af01
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129826)
Commit: e24bcfbe5fbc1350592ac2f9e9fd75c575586c24
https://github.com/llvm/llvm-project/commit/e24bcfbe5fbc1350592ac2f9e9fd75c575586c24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Support/BalancedPartitioning.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#129827)
Commit: 3e59710604e84d563962f259fef8b8a18c23f04e
https://github.com/llvm/llvm-project/commit/3e59710604e84d563962f259fef8b8a18c23f04e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Log Message:
-----------
[X86] Add test coverage for #129276
Commit: 0953706bfd2faefbb4514ed8643087fb327983c5
https://github.com/llvm/llvm-project/commit/0953706bfd2faefbb4514ed8643087fb327983c5
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing dep after 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Commit: 36cd60144b15dd35c8e0081100421c3511242e02
https://github.com/llvm/llvm-project/commit/36cd60144b15dd35c8e0081100421c3511242e02
Author: Yevhen Babiichuk (DustDFG) <dfgdust at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M bolt/utils/docker/Dockerfile
Log Message:
-----------
[BOLT] Remove unexisting targets from bolt dockerfile (#122321)
`perf2bolt` and `llvm-boltdiff` are now not separate targets but just
symlinks to `llvm-bolt` created when you install `llvm-bolt` itself so
when you try to build it ninja reports there are no targets for both of
them
Commit: 5c375c3283fcd2bf4f98fe8627658e056e25dc44
https://github.com/llvm/llvm-project/commit/5c375c3283fcd2bf4f98fe8627658e056e25dc44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Fix worklist management in simplifyDemandedVectorEltsIntrinsic
Fixes bot sanitizer error, but it does leave behind a dead instruction
if there is a bundle for some reason.
Commit: 59169036ca0e064612886713d609873f776e85db
https://github.com/llvm/llvm-project/commit/59169036ca0e064612886713d609873f776e85db
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGen/excess-embed-data.c
A clang/test/Sema/excess-embed-data.c
Log Message:
-----------
[clang] Fix crash when #embed data does not fit into an array (#129567)
Tune SemaInit code handling #embed to take into account how many array
elements remains to initialize.
Also issue a warning/error message when the array/struct is at the end
but there is still #embed data left.
Fixes https://github.com/llvm/llvm-project/issues/128987
Commit: 7302e1b94edb2de459a72b3e452d4f3be2d795eb
https://github.com/llvm/llvm-project/commit/7302e1b94edb2de459a72b3e452d4f3be2d795eb
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/TemporaryStorage.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/vector-subscripts-codegen.fir
Log Message:
-----------
[flang] implement simple pointer assignments inside FORALL (#129522)
The semantic of pointer assignments inside FORALL requires evaluating
the targets (RHS) and pointer variables (LHS) of all iterations before
evaluating the assignments.
In practice, if the compiler can prove that the RHS and LHS evaluations
are not impacted by the assignments, the evaluation of the FORALL
assignment statement can be done in a single loop. However, if the
compiler cannot prove this, it needs to "save" the addresses of the
targets and/or the pointer descriptors of each iterations before doing
the assignments.
This patch implements the most common cases where there is no lower bound
spec, no bounds remapping, the LHS is not polymorphic, and the RHS is
not NULL.
The HLFIR operation used to represent assignments inside FORALL can be
used for pointer assignments to (the only difference being that the LHS
is a descriptor address).
The analysis for intrinsic assignment can be reused, with the
distinction that the RHS data is not read during the assignment.
The logic that is used to save LHS in intrinsic assignments inside
FORALL is extracted to be used for the RHS of pointer assignments when
needed (saving a descriptor value).
Pointer assignment LHS are just descriptor addresses and are saved as
int_ptr values.
Commit: d1bcac06c7c11699e7931bb7315a1bb9b9784179
https://github.com/llvm/llvm-project/commit/d1bcac06c7c11699e7931bb7315a1bb9b9784179
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Lexer/cxx-features.cpp
Log Message:
-----------
[Clang] Bump `__cpp_constexpr` to `202002L` in C++20 mode (#129814)
Per P2493R0 and SD6, `__cpp_constexpr` of value `202002L` indicates that
P1330R0 "Changing the active member of a union inside constexpr" is
implemented, which is true for Clang 9 and later.
Commit: 3fed3bfef2f620d9423733298ee1e99d6c7d3068
https://github.com/llvm/llvm-project/commit/3fed3bfef2f620d9423733298ee1e99d6c7d3068
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Fix getting references to local function ptrs (#129852)
This is the same thing we do for globals and parameters.
Commit: e1cea0d9289db8f2f0d433c1712ad08d5176dbb0
https://github.com/llvm/llvm-project/commit/e1cea0d9289db8f2f0d433c1712ad08d5176dbb0
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][TTI] Remove unused ReductionFlags. NFC (#129858)
No in-tree targets currently use it in the
preferInLoopReduction/preferPredicatedReductionSelect TTI hooks. It
looks like it used to be used in LoopUtils, at least in
8ca60db40bd944dc5f67e0f200a403b4e03818ea, but I presume it was replaced
by RecurrenceDescriptor.
Commit: a98707e285e08bbf20785bfe54190feab7eb3c91
https://github.com/llvm/llvm-project/commit/a98707e285e08bbf20785bfe54190feab7eb3c91
Author: Zhenyang Xu <639610709 at qq.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
Log Message:
-----------
[AggressiveInstCombine] Merge consecutive loads of mixed sizes (#129263)
Proof: https://alive2.llvm.org/ce/z/r7M-Sf
Closes: #128134
Commit: ea15e8b16eacdf2fb3a9715c5fc753b62fdfd516
https://github.com/llvm/llvm-project/commit/ea15e8b16eacdf2fb3a9715c5fc753b62fdfd516
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Modules/external-but-not-type-external.cppm
Log Message:
-----------
[C++20] [Modules] Avoid use-but-not-defined error
See the attached test for example.
Commit: 5e54c9231465f8d80a8a8ff76ab792c6be370215
https://github.com/llvm/llvm-project/commit/5e54c9231465f8d80a8a8ff76ab792c6be370215
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
Log Message:
-----------
[VPlan] Fix crash when unrolling in-loop reduction chains (#129840)
If an in-loop reduction is chained e.g.
WIDEN-REDUCTION-PHI ir<%rdx> = phi ir<0>, ir<%add2>
REDUCE ir<%add1> = ir<%rdx> + reduce.add (ir<%x>)
REDUCE ir<%add2> = ir<%add1> + reduce.add (ir<%y>)
When we try to unroll the second add reduction, we crash because we
currently expect the chain to be a VPReductionPHIRecipe, when in fact
it's the previous reduction. This relaxes the cast to a dyn_cast, so we
end up unrolling to:
WIDEN-REDUCTION-PHI ir<%rdx> = phi ir<0>, ir<%add2>
WIDEN-REDUCTION-PHI ir<%rdx>.1 = phi ir<0>, ir<%add2>.1, ir<1>
WIDEN-REDUCTION-PHI ir<%rdx>.2 = phi ir<0>, ir<%add2>.2, ir<2>
WIDEN-REDUCTION-PHI ir<%rdx>.3 = phi ir<0>, ir<%add2>.3, ir<3>
REDUCE ir<%add1> = ir<%rdx> + reduce.add (ir<%x>)
REDUCE ir<%add1>.1 = ir<%rdx>.1 + reduce.add (ir<%x>.1)
REDUCE ir<%add1>.2 = ir<%rdx>.2 + reduce.add (ir<%x>.2)
REDUCE ir<%add1>.3 = ir<%rdx>.3 + reduce.add (ir<%x>.3)
REDUCE ir<%add2> = ir<%add1> + reduce.add (ir<%y>)
REDUCE ir<%add2>.1 = ir<%add1>.1 + reduce.add (ir<%y>.1)
REDUCE ir<%add2>.2 = ir<%add1>.2 + reduce.add (ir<%y>.2)
REDUCE ir<%add2>.3 = ir<%add1>.3 + reduce.add (ir<%y>.3)
This fixes a crash when building 525.x264_r from SPEC CPU 2017 on
AArch64 with -mllvm -prefer-inloop-reductions
Commit: b673a59c9ae5583aa08a8d34a48f9409b660d826
https://github.com/llvm/llvm-project/commit/b673a59c9ae5583aa08a8d34a48f9409b660d826
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/popcount.ll
Log Message:
-----------
[AArch64] Add BE test coverage for popcount. NFC
For #129843
Commit: c8583e8f388d092637c159c9a25b8abc70b1ca41
https://github.com/llvm/llvm-project/commit/c8583e8f388d092637c159c9a25b8abc70b1ca41
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
Log Message:
-----------
[Xtensa] Fix build (NFC)
Commit: ba1da5cd43055f0d75c36b02e60ac57e3651aa33
https://github.com/llvm/llvm-project/commit/ba1da5cd43055f0d75c36b02e60ac57e3651aa33
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/CSKY/fpu/fp16-promote.ll
Log Message:
-----------
[CSKY] Update fp16-promote.ll test (NFC)
Update it for the libcall change in #126880.
Commit: 53c157939e5ac9acc8e1f8853325a021bc925501
https://github.com/llvm/llvm-project/commit/53c157939e5ac9acc8e1f8853325a021bc925501
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-phi.ll
Log Message:
-----------
[StackProtector] Fix phi handling in HasAddressTaken() (#129248)
Despite the name, the HasAddressTaken() heuristic identifies not only
allocas that have their address taken, but also those that have accesses
that cannot be proven to be in-bounds.
However, the current handling for phi nodes is incorrect. Phi nodes are
only visited once, and will perform the analysis using whichever
(remaining) allocation size is passed the first time the phi node is
visited. If it is later visited with a smaller remaining size, which may
lead to out of bounds accesses, it will not be detected.
Fix this by keeping track of the smallest seen remaining allocation size
and redo the analysis if it is decreased. To avoid degenerate cases
(including via loops), limit the number of allowed decreases to a small
number.
Commit: e1c9c842cb43a9a264ba442fb6c87d95ebc6d8e2
https://github.com/llvm/llvm-project/commit/e1c9c842cb43a9a264ba442fb6c87d95ebc6d8e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
Support: Fix program error test failures when using fork (#129252)
Commit: a614f2b489caa19001b2f44784514a6226f79cb7
https://github.com/llvm/llvm-project/commit/a614f2b489caa19001b2f44784514a6226f79cb7
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Fix domtree verification in NewPM
Use DTU.getDomTree() to make sure the DTU if flushed.
Commit: dd662d8028de628f569a62887378e4ed48d57fb9
https://github.com/llvm/llvm-project/commit/dd662d8028de628f569a62887378e4ed48d57fb9
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV] Handle ADD in RISCVInstrInfo::isCopyInstrImpl (#81123)
Split out from #77610 and features a test, as a buggy version of this
caused a regression when landing that patch (the previous version had a
typo picking the wrong register as the source).
This is also motivated by future changes to MachineCopyPropagation which will use this information to determine if we have been left with a nop mv.
Commit: 8c0e9adc5c1f4b1deba06d6af25c75d0c8da0557
https://github.com/llvm/llvm-project/commit/8c0e9adc5c1f4b1deba06d6af25c75d0c8da0557
Author: Guojin <he.guojin at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/DLTIAttrs.td
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/Target/LLVMIR/Import/data-layout.ll
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/data-layout.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
Log Message:
-----------
[MLIR][DLTI] Add mangling style (#125875)
Add mangling style as a spec entry to datalayout, and implemented
importing and exporting LLVM IR to MLIR (LLVM dialect).
Its represented as string as the scope of this PR is to preserve info
from LLVM IR, so client in MLIR still need to map deduce the meaning of
the string, like "e" means ELF, "o" for Mach-O, etc.
it addresses one of issues mentioned in this
[issue](https://github.com/llvm/llvm-project/issues/126046)
Commit: 15edf8725a8044e5cb681a5773e0ada1249690cb
https://github.com/llvm/llvm-project/commit/15edf8725a8044e5cb681a5773e0ada1249690cb
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/locale
M libcxx/include/module.modulemap
A libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
Log Message:
-----------
[libc++] Optimize num_put integral functions (#120859)
```
-------------------------------------------------------
Benchmark old new
-------------------------------------------------------
BM_num_put<bool> 76.2 ns 32.0 ns
BM_num_put<long> 76.9 ns 33.1 ns
BM_num_put<long long> 77.9 ns 34.2 ns
BM_num_put<unsigned long> 78.4 ns 33.1 ns
BM_num_put<unsigned long long> 78.0 ns 34.4 ns
BM_num_put<double> 224 ns 228 ns
BM_num_put<long double> 239 ns 230 ns
BM_num_put<const void*> 68.7 ns 35.1 ns
```
Fixes #40109.
Commit: 0ae1f0a31062f2447c04ec99ec0933cd71c21224
https://github.com/llvm/llvm-project/commit/0ae1f0a31062f2447c04ec99ec0933cd71c21224
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/pointer-default-init.f90
Log Message:
-----------
[flang] Rely on global initialization for simpler derived types (#114002)
Currently, all derived types are initialized through `_FortranAInitialize`, which is functionally correct, but bears poor runtime performance. This patch falls back on global initialization for "simpler" derived types to speed up the initialization.
Commit: 0228b778a45ca6a45c6efeae6c820b0e3f186282
https://github.com/llvm/llvm-project/commit/0228b778a45ca6a45c6efeae6c820b0e3f186282
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/ARM/llvm.modf.ll
Log Message:
-----------
[SDAG] Add missing SoftenFloatRes legalization for FMODF (#129264)
This is needed on some ARM platforms.
Commit: 6262d67446474c29a3a03544fff9b2109b7274da
https://github.com/llvm/llvm-project/commit/6262d67446474c29a3a03544fff9b2109b7274da
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Check subtarget feature in getBrCond (#129859)
The function currently only checks to see if we compare against an
immediate before selecting the two branch immediate instructions that
are a part of the XCVbi vendor extension. This works at the moment since
there are no other extensions that have a branch immediate instruction.
It would be better if we explicitly check if the XCVbi extension is enabled
before returning the appropriate instruction.
This is also done in preparation for the branch immediate instructions
that are a part of the Xqcibi vendor extension from Qualcomm.
Commit: 844a1d52a8f5dff032cbf58288675ad1e678d609
https://github.com/llvm/llvm-project/commit/844a1d52a8f5dff032cbf58288675ad1e678d609
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/IR/Instructions.cpp
A llvm/test/Transforms/DCE/op_bundles.ll
M llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
[IR] Return correct memory effects for `convergencectrl` (#129874)
`convergencectrl` doesn't imply any memory access.
Closes https://github.com/llvm/llvm-project/issues/129856.
Commit: adb5d6aeae8234be7ef535dbbab9b8e9bd340d4f
https://github.com/llvm/llvm-project/commit/adb5d6aeae8234be7ef535dbbab9b8e9bd340d4f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] use lowerShuffleWithPERMV helper to create VPERMV/VPERMV3 nodes (#129882)
This allows us to make use of the extra canonicalization that lowerShuffleWithPERMV performs
Commit: 760eeac6a22e49a3100c530dd130a7202ae0a56b
https://github.com/llvm/llvm-project/commit/760eeac6a22e49a3100c530dd130a7202ae0a56b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_frexp.inc
Log Message:
-----------
[libclc] Reduce bithacking in CLC frexp (#129871)
Also replace some magic constants with named ones.
Checking against FP zero and using isnan and isinf functions allows the
optimizer to create one unified @llvm.is.fpclass intrinsic. This results
in fewer more canonical IR instructions.
Commit: f5d2996d292c2f91694a28c039abd52e667c64e5
https://github.com/llvm/llvm-project/commit/f5d2996d292c2f91694a28c039abd52e667c64e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
Log Message:
-----------
AMDGPU: Fix trying to query end iterator for DebugLoc (#129886)
Commit: e122483762b44c7f4386165099ff2a404705d7d4
https://github.com/llvm/llvm-project/commit/e122483762b44c7f4386165099ff2a404705d7d4
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
M llvm/test/CodeGen/AArch64/alloca.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
Log Message:
-----------
[Aarch64] [ISel] Don't save vaargs registers if vaargs are unused (#126780)
Commit: bdbc434498016ee22c06983c8b2725c169326b66
https://github.com/llvm/llvm-project/commit/bdbc434498016ee22c06983c8b2725c169326b66
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Ignore function calls with depth > 0... (#129887)
... when checking for a potential constant expression. This is also what
the current interpreter does.
Commit: 5223ddd83fb184716d0201450ee9818e5f92efb6
https://github.com/llvm/llvm-project/commit/5223ddd83fb184716d0201450ee9818e5f92efb6
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/ThinLTO/X86/ctxprof.ll
M llvm/test/Transforms/EliminateAvailableExternally/transform-to-local.ll
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-bad-subctx.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-counters.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-section.yaml
R llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-vector.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid.yaml
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util-negative.test
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util.test
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
Log Message:
-----------
[ctxprof] Prepare profile format for flat profiles (#129626)
The profile format has now a separate section called "Contexts" - there will be a corresponding one for flat profiles. The root has a separate tag because, in addition to not having a callsite ID as all the other context nodes have under it, it will have additional fields in subsequent patches.
The rest of this patch amounts to a bit of refactorings in the reader/writer (for better reuse later) and tests fixups.
Commit: 04d4314456938fa78fe7020291a514db350e23a0
https://github.com/llvm/llvm-project/commit/04d4314456938fa78fe7020291a514db350e23a0
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
Log Message:
-----------
[RISCV] Fix a typo in fixed_m2_in_m4_tail test [nfc]
When I added these, they were supposed to be sub-vector inserts, but since
I got a couple index values wrong, they were instead general shuffles.
This is the same as 9295b0 - I apparently copied the same typo to another
test case.
Commit: a5377240696fa736be5ef6ff226d83761e462dc2
https://github.com/llvm/llvm-project/commit/a5377240696fa736be5ef6ff226d83761e462dc2
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fixed-length-fcopysign.ll
Log Message:
-----------
[LLVM][DAGCombine] Remove combiner-vector-fcopysign-extend-round. (#129878)
This option was added to improve test coverage for SVE lowering code
that is impossible to reach otherwise. Given it is not possible to
trigger a bug without it and the generated code is universally worse
with it, I figure the option has no value and should be removed.
Commit: 9925359fee00561be93ab0b886250e73ec627174
https://github.com/llvm/llvm-project/commit/9925359fee00561be93ab0b886250e73ec627174
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][llvm][openmp]Add Initializer clause to OMP.td (#129540)
Then use this in the Flang compiler for parsing the OpenMP declare
reduction.
This has no real functional change to the existing code, it's only
moving the declaration itself around.
A few tests has been updated, to reflect the new type names.
Commit: f8ba0df8781a9f2d0b54fcd6b06a47a06234a4c4
https://github.com/llvm/llvm-project/commit/f8ba0df8781a9f2d0b54fcd6b06a47a06234a4c4
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
Log Message:
-----------
[clang][deps] Remove dependency on llvm targets from lib DependencyScanning (#129774)
In d64eccf we split the object file reader from the writer and removed
the dependency on clangCodeGen from the dependency scanner. However, we
were still initializing all the llvm targets, which was needed for
writing object file pcms but not reading them. This caused us to link
more llvm target code than necessary. Shrinks clangd by nearly 50% for
me.
rdar://144790713
Commit: 7e10ecd29acc582ae03c75a896e90e0664908645
https://github.com/llvm/llvm-project/commit/7e10ecd29acc582ae03c75a896e90e0664908645
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Remove optional for pad_const and remove input_zp attr for PadOp (#129336)
Always generated pad_const and remove input_zp attr for PadOp.
- Co-authored-by: Udaya Ranga <udaya.ranga at arm.com>
- Co-authored-by: Tai Ly <tai.ly at arm.com>
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: e04f4cce85e08760d513abca4276542aa1363593
https://github.com/llvm/llvm-project/commit/e04f4cce85e08760d513abca4276542aa1363593
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Add check for invalid tosa.rescale parameters (#129606)
* mlir::tosa::computeMultiplierAndShift returns a boolean, depending on
validity of the shift value
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tom Allsop <tom.allsop at arm.com>
Commit: 6c4febee2992d206e95e2ed2294fe216739af1cb
https://github.com/llvm/llvm-project/commit/6c4febee2992d206e95e2ed2294fe216739af1cb
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
A lldb/include/lldb/Host/MemoryMonitor.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/MemoryMonitor.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
A lldb/source/Host/macosx/objcxx/MemoryMonitorMacOSX.mm
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Implement a MemoryMonitor (#129332)
This implements a memory monitor for macOS, Linux and Windows. It
registers a callback that invokes `SBDebugger::MemoryPressureDetected`
when a low memory event is detected. This is motivated by the new
server mode, where the lldb-dap process will live across multiple
debug sessions and will use more memory due to caching.
Commit: f39e81e4db9276f13bc3066be6bf27c55f958b7e
https://github.com/llvm/llvm-project/commit/f39e81e4db9276f13bc3066be6bf27c55f958b7e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn build] Port 6c4febee2992
Commit: 6e749f597f7bcea8de80e78d0161f4efc2c14ded
https://github.com/llvm/llvm-project/commit/6e749f597f7bcea8de80e78d0161f4efc2c14ded
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Adjust RISCVVectorMaskDAGMutation to look for copy to V0 (#129296)
This mutation was introduced in 01a15dca0 with the goal of avoiding many
copies from V1-v31 to v0 immediately before a mask consuming
instruction. I noticed in a workload that this was not applying to
vmv.s.x (which we use for short vector masks). We'd had a whitelist of
instructions. Instead, we can directly inspect the user of the current
node to see if it's a copy to V0. This isn't quite precise (as the mask
producing instruction could already be scheduled fairly far from it's
single use), but is probably good enough.
As with all schedule changes, results are mixed. Some significant
improvements, some regressions.
Commit: 88736f5944a004153e2c071fb6db68dd4d3773fd
https://github.com/llvm/llvm-project/commit/88736f5944a004153e2c071fb6db68dd4d3773fd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
Log Message:
-----------
[BPF] Avoid repeated map lookups (NFC) (#129820)
Commit: fb9329ce15a96f568a0b0707cce1177aa5d31aff
https://github.com/llvm/llvm-project/commit/fb9329ce15a96f568a0b0707cce1177aa5d31aff
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129822)
Commit: 7bd492ffe84b549bc0f3b26e3aab973fa81069a5
https://github.com/llvm/llvm-project/commit/7bd492ffe84b549bc0f3b26e3aab973fa81069a5
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/test/ClangScanDeps/modules-context-hash-cwd.c
M clang/test/ClangScanDeps/modules-debug-dir.c
Log Message:
-----------
[clang dependency scanning] Make Current Working Directory Optimization Off by Default (#129809)
https://github.com/llvm/llvm-project/pull/124786 implemented current
working directory (CWD) optimization and the optimization was on by
default. We have discovered that build system needs to be compatible
with the CWD optimization and default off is a better behavior. The
build system needs to be aware that the current working directory is
ignored. Without a good way of notifying the build system, it is less
risky to default to off. This PR implement the change.
rdar://145860213
Commit: b53e75711c284d08b7377385c6f2a037842c0d5b
https://github.com/llvm/llvm-project/commit/b53e75711c284d08b7377385c6f2a037842c0d5b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
Log Message:
-----------
[lldb-dap] Replace Get{Signed,Unsigned} with GetInteger<T> (NFC) (#129823)
Replace Get{Signed,Unsigned} with GetInteger<T> and return std::optional
so you can distinguish between the value not being present and it being
explicitly set to the previous fail_value. All existing uses are
replaced by calling value_or(fail_value).
Continuation of #129818
Commit: 39c454af01fd272166e5379ffc4d4d6b32d7bbee
https://github.com/llvm/llvm-project/commit/39c454af01fd272166e5379ffc4d4d6b32d7bbee
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
Log Message:
-----------
[TTI] getScalingFactorCost should return InstructionCost::getInvalid() instead of -1. (#129802)
Historically this function return an int with negative values meaning
invalid. It was migrated to InstructionCost in 43ace8b5ce07a, but the
code was not updated to return invalid cost instead of -1. In that
commit, the caller in LSR was updated to assert that the cost is valid
instead of positive. We should return invalid instead of a negative
value so LSR will assert if the cost isn't valid.
Commit: 58670aa79a7e4129b89186a5076b08bef4564aa6
https://github.com/llvm/llvm-project/commit/58670aa79a7e4129b89186a5076b08bef4564aa6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
This focuses on the common interfaces and tablegen. More changes
are needed to individual targets.
Commit: d4ab3df320f9eebf11cc5fb600a0919f93678abe
https://github.com/llvm/llvm-project/commit/d4ab3df320f9eebf11cc5fb600a0919f93678abe
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
Log Message:
-----------
[AArch64] Fix SVE scalar fcopysign lowering without neon. (#129787)
Without this we can try to generate invalid instructions or create
illegal types. This patch generates a SVE fcopysign instead and use its
lowering. BF16 is left out of the moment as it doesn't lower
successfully (but could use the same code as fp16).
Commit: c3c1230e731af9e989c4235e451d3d4b35adc512
https://github.com/llvm/llvm-project/commit/c3c1230e731af9e989c4235e451d3d4b35adc512
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinTypeInterfaces.h
M mlir/include/mlir/IR/OpAsmInterface.td
A mlir/include/mlir/IR/OpAsmSupport.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/IR/BuiltinDialect.cpp
Log Message:
-----------
[mlir][NFC] Migrate to OpAsmAttrInterface for some Builtin Attributes for alias (#128191)
After the introduction of `OpAsmAttrInterface` for alias in #124721, the
natural thought to exercise it would be migrating the MLIR existing
alias generation method, i.e. `OpAsmDialectInterface`, to use the new
interface.
There is a `BuiltinOpAsmDialectInterface` that generates aliases for
`AffineMapAttr` and `IntegerSetAttr`, and these attributes could be
migrated to use `OpAsmAttrInterface`.
However, the tricky part is that `OpAsmAttrInterface` lives in
`OpImplementation.h`. If `BuiltinAttributes.h` includes that, it would
become a cyclic inclusion.
Note that only BuiltinAttribute/Type would face such issue as outside
user can just include `OpImplementation.h` (see downstream example
https://github.com/google/heir/pull/1437)
The dependency is introduced by the fact that `OpAsmAttrInterface` uses
`OpAsmDialectInterface::AliasResult`.
The solution to is: Put the `AliasResult` in `OpAsmSupport.h` that all
interfaces can include that header safely. The API wont break as
`mlir::OpAsmDialectInterface::AliasResult` is a typedef of this class.
Commit: 74df2032d467618a9aab085120539e306f21bcc0
https://github.com/llvm/llvm-project/commit/74df2032d467618a9aab085120539e306f21bcc0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M .github/workflows/docs.yml
M .github/workflows/issue-write.yml
Log Message:
-----------
[Github] Bump old action versions (#129833)
These two actions are particularly old, and should be updated to the
latest version. Doing this in a specific commit to easily roll back if
things break and to get as much testing done as possible within the jobs
triggered as a part of these changes.
Commit: 5d8b4ea97b174d6d80dbdeaabf5a3664d99e6a19
https://github.com/llvm/llvm-project/commit/5d8b4ea97b174d6d80dbdeaabf5a3664d99e6a19
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap] Fix: disableASLR launch argument not working. (#129753)
Fixes #94338
Commit: e51331cb9a2d5dcb427d7ba3dea04f611114535b
https://github.com/llvm/llvm-project/commit/e51331cb9a2d5dcb427d7ba3dea04f611114535b
Author: Takuto Ikuta <atetubou at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/include/module.modulemap
Log Message:
-----------
[libcxx] Export directory_iterator in module build (#129195)
This is workaround for the link error like https://crbug.com/390537876.
Might be related to https://github.com/llvm/llvm-project/issues/120108
too.
Commit: db70d760829258b9687ecd0d7ea959256e028334
https://github.com/llvm/llvm-project/commit/db70d760829258b9687ecd0d7ea959256e028334
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add more verifiers for the following operators (#127923)
For ConcatOp this commit also enhances the verifier by
checking 4 another conditions:
- The input list is not empty
- The axis value is within range of the input shapes
- All inputs have the same rank
- All non concatenate axis dims have the same value
For MatmulOp:
- Checked input a, bs tensor type, element types
For the following operators, added the verifySameElementTypes check.
- PadOp
- SliceOp
- TileOp
- ReshapeOp
- TransposeOp
- GatherOp
- ScatterOp
- MaxPool2dOp
- ReverseOp
- SelectOp
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 03da079968845e1f1312d09ff4e2ecee1933552e
https://github.com/llvm/llvm-project/commit/03da079968845e1f1312d09ff4e2ecee1933552e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_memcheck_cost.ll
Log Message:
-----------
[LoopUtils] Saturate at INT_MAX when estimating TC (#129683)
getLoopEstimatedTripCount returns std::nullopt when the trip count would
overflow the return type, but since it is an estimate anyway, we might
as well saturate at UINT_MAX, improving results.
Commit: 878a64f94a264ea4b564d6063614ddb0b5da3f6c
https://github.com/llvm/llvm-project/commit/878a64f94a264ea4b564d6063614ddb0b5da3f6c
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectCast.h
M lldb/include/lldb/ValueObject/ValueObjectChild.h
M lldb/include/lldb/ValueObject/ValueObjectConstResult.h
M lldb/include/lldb/ValueObject/ValueObjectDynamicValue.h
M lldb/include/lldb/ValueObject/ValueObjectMemory.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/include/lldb/ValueObject/ValueObjectSyntheticFilter.h
M lldb/include/lldb/ValueObject/ValueObjectVTable.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/source/API/SBType.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Core/Value.cpp
M lldb/source/DataFormatters/TypeFormat.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/Language/CPlusPlus/CxxStringTypes.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppUniquePointer.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectCast.cpp
M lldb/source/ValueObject/ValueObjectConstResult.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/source/ValueObject/ValueObjectMemory.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
M lldb/source/ValueObject/ValueObjectVTable.cpp
M lldb/source/ValueObject/ValueObjectVariable.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/class-type-nullptr-deref.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug-types-signature-loop.s
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
Log Message:
-----------
[lldb] Upgrade CompilerType::GetBitSize to return llvm::Expected (#129601)
This patch pushes the error handling boundary for the GetBitSize()
methods from Runtime into the Type and CompilerType APIs. This makes it
easier to diagnose problems thanks to more meaningful error messages
being available. GetBitSize() is often the first thing LLDB asks about a
type, so this method is particularly important for a better user
experience.
rdar://145667239
Commit: 9f0a912a4619ebca977f7da36cd2fb7ba56f71ce
https://github.com/llvm/llvm-project/commit/9f0a912a4619ebca977f7da36cd2fb7ba56f71ce
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
Log Message:
-----------
[mlir][test][sve] Add e2e test for linalg.pack + linalg.unpack (#129696)
This patch adds an e2e test for the `linalg.pack` + `linalg.unpack` pair
with a dynamic inner tile size that's tied to SVE's "vscale":
```mlir
%c4 = arith.constant 4 : index
%vs = vector.vscale
%tile_size = arith.muli %c4, %vs : index
```
This means that the actual size of the corresponding inner and outer
tile size will depend on the runtime value of "vscale".
To make the new test deterministic (and to make it easier to
experiment), I have hard-coded the value of "vscale" to 2 via (2 x 128
bits = 256 bits):
```mlir
`func.call @setArmVLBits(%c256) : (i32) -> ()
```
This can be relaxed at a later time or played with when experimenting
locally with e.g. QEMU.
NOTE: Vectorization has not been enabled yet (scalable vectorization of
`linalg.unpack` is still WIP).
Commit: e49180d84c4d8b25fa944e494f4f292479eec1f6
https://github.com/llvm/llvm-project/commit/e49180d84c4d8b25fa944e494f4f292479eec1f6
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
A llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
A llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
A llvm/test/CodeGen/RISCV/xqccmp-cm-popretz.mir
A llvm/test/CodeGen/RISCV/xqccmp-cm-push-pop.mir
A llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
A llvm/test/CodeGen/RISCV/xqccmp-with-float.ll
A llvm/test/CodeGen/RISCV/xqccmp_mvas_mvsa.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
Log Message:
-----------
[RISCV] Xqccmp Code Generation (#128815)
This adds support for Xqccmp to the following passes:
- Prolog Epilog Insertion - reusing much of the existing push/pop logic,
but extending it to cope with frame pointers and reorder the CFI
information correctly.
- Move Merger - extending it to support the `qc.` variants of the
double-move instructions.
- Push/Pop Optimizer - extending it to support the `qc.` variants of the
pop instructions.
The testing is based on existing Zcmp tests, but I have put them in
separate files as some of the Zcmp tests were getting quite long.
Commit: 6d4f8b1dbfd21811351bec205154992afddbc5ea
https://github.com/llvm/llvm-project/commit/6d4f8b1dbfd21811351bec205154992afddbc5ea
Author: Steven Perron <stevenperron at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL] Fix resource wrapper declaration (#129100)
The resource wrapper should have internal linkage because it contains a
handle to the global resource, and it not the actual global.
Makeing this changed exposed that we were zeroinitializing the resouce,
which is a problem. The handle cannot be zeroinitialized. This is
changed to use poison instead.
Fixes https://github.com/llvm/llvm-project/issues/122767.
---------
Co-authored-by: Helena Kotas <hekotas at microsoft.com>
Commit: 35622a93bb034ad5c56e3a490060648b35ba49f1
https://github.com/llvm/llvm-project/commit/35622a93bb034ad5c56e3a490060648b35ba49f1
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
[mlir][ODS] Add a generated builder that takes the Properties struct (#124713)
This commit adds builders of the form
```
static void build(..., [TypeRange resultTypes],
ValueRange operands, const Properties &properties,
ArrayRef<NamedAttribute> discardableAttributes = {},
[unsigned numRegions]);
```
to go alongside the existing
result/operands/[inherent + discardable attribute list] collective
builders.
This change is intended to support a refactor to the declarative rewrite
engine to make it populate the `Properties` struct instead of creating a
`DictionaryAttr`, thus enabling rewrite rules to handle non-`Attribute`
properties.
More generally, this means that generic code that would previously call
`getAttrs()` to blend together inherent and discardable attributes can
now use `getProperties()` and `getDiscardableAttrs()` separately, thus
removing the need to serialize everything into a temporary
`DictionaryAttr`.
Commit: 2bbe30bf358e369b5262aac7608f3704fc66c58b
https://github.com/llvm/llvm-project/commit/2bbe30bf358e369b5262aac7608f3704fc66c58b
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/call-intrin.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] llvm.call_intrinsic: support operand/result attributes (#129640)
Basically catch up with llvm.call and add support for translate and
import to LLVM IR.
This PR is split into two commits in case it's easier to review the
refactoring part, which comes first (happy to split the PR if
necessary).
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 02f024ca97403e8dff55ca4feebe78009d9ea8f3
https://github.com/llvm/llvm-project/commit/02f024ca97403e8dff55ca4feebe78009d9ea8f3
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
Log Message:
-----------
[LLDB-DAP] SBDebugger don't prefix title on progress updates (#124648)
In my last DAP patch (#123837), we piped the DAP update message into the
update event. However, we had the title embedded into the update
message. This makes sense for progress Start, but makes the update
message look pretty wonky.
Instead, we only use the title when it's the first message, removing the
duplicate title problem.
Commit: ab811e75734a77247dae6df1579fa6f29394f200
https://github.com/llvm/llvm-project/commit/ab811e75734a77247dae6df1579fa6f29394f200
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/parity.ll
M llvm/test/CodeGen/AArch64/popcount.ll
Log Message:
-----------
[AArch64] Fix BE popcount casts. (#129879)
A bitcast, being defined as a load and a store, can change the lane
order. We need to use a NVCAST instead to keep the lanes out of the
VADDV the same in big-endian. The extracting from a v2i64 vector is
to keep the types of the nvcast legal, but also allow us to replace a
lane mov with a mov 0.
Fixes #129843
Commit: 44c6a23789b3ddd93b49405a7561ddf5024265e8
https://github.com/llvm/llvm-project/commit/44c6a23789b3ddd93b49405a7561ddf5024265e8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
A flang/test/Lower/OpenMP/real10.f90
Log Message:
-----------
[flang][OpenMP][AMDGPU] Allow REAL(10) to compile on AMDGPU (#129742)
This will allow the following code to compile
```
program p
real(10) :: x
!$omp target
continue
!$omp end target
end
```
Commit: c017cdf0714afcccca3338529134f3792d9287f6
https://github.com/llvm/llvm-project/commit/c017cdf0714afcccca3338529134f3792d9287f6
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
[Clang][ASTMatcher] Improve matching isDerivedFrom base in case of multi aliases exists (#126793)
Previously in case of multiable aliases exists for the same base we just
accept the first one
https://github.com/llvm/llvm-project/blob/2cf6663d3c86b065edeb693815e6a4b325045cc2/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L1290-L1297
For example
```
struct AnInterface {};
typedef AnInterface UnusedTypedef;
typedef AnInterface Base;
class AClass : public Base {};
```
`cxxRecordDecl(isDerivedFrom(decl().bind("typedef")))` typedef will be
bonded to `UnusedTypedef`
But if we changed the order now it will point to the right one
```
struct AnInterface {};
typedef AnInterface Base;
typedef AnInterface UnusedTypedef;
class AClass : public Base {};
```
`cxxRecordDecl(isDerivedFrom(decl().bind("typedef")))` typedef will be
bonded to `Base`
This PR improve the matcher to prioritise the alias that has same
desugared name as the base, if not then just accept the first one.
Fixes: #126498
Commit: 46236f4c3dbe11e14fe7ac1f4b903637efedfecf
https://github.com/llvm/llvm-project/commit/46236f4c3dbe11e14fe7ac1f4b903637efedfecf
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb] Add missing type conversion for Windows
Commit: da61b0ddc5dcc8f1ac64eaddabdbfec5aa23f22b
https://github.com/llvm/llvm-project/commit/da61b0ddc5dcc8f1ac64eaddabdbfec5aa23f22b
Author: Augie Fackler <augie at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/big_int.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/quick_sort.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FModTest.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/bcopy_test.cpp
Log Message:
-----------
Revert "[libc] Enable -Wconversion for tests. (#127523)"
This reverts commit 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6 because it
changed the 1st parameter of adjust() to be unsigned, but libc itself
calls adjust() with a negative argument in align_backward() in
op_generic.h.
Commit: 275eab91edba816b5c98828c53b7f21afd97dbd9
https://github.com/llvm/llvm-project/commit/275eab91edba816b5c98828c53b7f21afd97dbd9
Author: Vy Nguyen <vyng at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[LLDB]Fix test crash (#129921)
Use the `SubsystemRAII` to unregister the fake manager at end of tests
(Should fix https://github.com/llvm/llvm-project/issues/129910)
Commit: 77363f7518f7696fe18b9f824b4474aaf299b447
https://github.com/llvm/llvm-project/commit/77363f7518f7696fe18b9f824b4474aaf299b447
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libc/startup/gpu/CMakeLists.txt
Log Message:
-----------
[libc] Allow building the GPU targets that don't have CRT (#129945)
Summary:
If there's no subdirectory we can't make an alias. This allows it to at
least continue.
Commit: d1abbb4dc5071e379d048f98b096260ed899ae44
https://github.com/llvm/llvm-project/commit/d1abbb4dc5071e379d048f98b096260ed899ae44
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-doconc.cuf
Log Message:
-----------
[flang][cuda] Change induction variable from i32 to index for doconcurrent inside cuf kernel directive (#129924)
Use `index` instead of `i32` for induction variables for doconcurrent
inside cuf kernel directive. Regular do loop inside cuf kernel directive
also uses `index`:
```
cuf.kernel<<<*, *>>> (%arg0 : index) = ...
```
Commit: aea74034ebd9b630e24d82872ef632086907600c
https://github.com/llvm/llvm-project/commit/aea74034ebd9b630e24d82872ef632086907600c
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/test/Dialect/LLVMIR/call-intrin.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] Add elementtype attribute (#129918)
These are very common when using intrinsics (e.g. ARM NEON).
For more context: ClangIR has currently been blocked on such intrinsics
emission because of this lacking capability.
Commit: 45759fe5b49148aa724d9d58d03e507938c7d218
https://github.com/llvm/llvm-project/commit/45759fe5b49148aa724d9d58d03e507938c7d218
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
Log Message:
-----------
[AMDGPU] Filter candidates of LiveRegOptimizer for profitable cases (#124624)
It is known that for vector whose element fits in i16 will be split and
scalarized in SelectionDag's type legalizer
(see SIISelLowering::getPreferredVectorAction).
LRO attempts to undo the scalarizing of vectors across basic block
boundary and shoehorn Values in VGPRs. LRO is beneficial for operations
that natively work on illegal vector types to prevent flip-flopping
between unpacked and packed. If we know that operations on vector will
be split and scalarized, then we don't want to shoehorn them back to
packed VGPR.
Operations that we know to work natively on illegal vector types usually
come in the form of intrinsics (MFMA, DOT8), buffer store, shuffle, phi
nodes to name a few.
Commit: 5422e2c68107650c33f39e6224d1ff0064467550
https://github.com/llvm/llvm-project/commit/5422e2c68107650c33f39e6224d1ff0064467550
Author: Amara Emerson <amara at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/prefetch-darwin-no-fold-global.ll
Log Message:
-----------
[AArch64][GlobalISel] On Darwin don't fold globals into the offset of prefetches.
ld64 doesn't currently support the PAGEOFF relocations on anything but load/stores
so we need to bail-out here to fix the build failures on greendragon.
rdar://145495288
Commit: f2bebdc6883ffa19d2eb75528e028c1bd04ce6af
https://github.com/llvm/llvm-project/commit/f2bebdc6883ffa19d2eb75528e028c1bd04ce6af
Author: lntue <lntue at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/explogxf.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction_double_fma.h
M libc/src/math/generic/range_reduction_double_nofma.h
Log Message:
-----------
[libc][math] Add skip accurate pass option for exp*, log*, and powf functions. (#129831)
Commit: b5e70d06827189cc701b4b02213549cee60c5160
https://github.com/llvm/llvm-project/commit/b5e70d06827189cc701b4b02213549cee60c5160
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
Log Message:
-----------
[lldb-dap] Use LLDB_INVALID_LINE_NUMBER & LLDB_INVALID_COLUMN_NUMBER (#129948)
Consistently use LLDB_INVALID_LINE_NUMBER & LLDB_INVALID_COLUMN_NUMBER
when parsing line and column numbers respectively.
Commit: 4b454afc45cdd69ad7d8d6bdba785b00bda7808c
https://github.com/llvm/llvm-project/commit/4b454afc45cdd69ad7d8d6bdba785b00bda7808c
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
Convert unreachable return statement into llvm_unreachable (#129627)
Static analysis flags the final return statement in `ReadExtensionBlock`
as unreachable and indeed it is since there is no way to exit the
`while(true)` loop besides a *return statement*.
So I am converting it into a `llvm_unreachable` to explicitly document
this.
Commit: 5b3ba261c49bee35debdd54e23a6a181126f798e
https://github.com/llvm/llvm-project/commit/5b3ba261c49bee35debdd54e23a6a181126f798e
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaStmt.cpp
M clang/test/Sema/for.c
Log Message:
-----------
[Clang] [Sema] Allow non-local/non-variable declarations in for loop (#129737)
Currently, we error on non-variable or non-local variable declarations
in `for` loops such as `for (struct S {}; 0; ) {}`. However, this is
valid in C23, so this patch changes the error to a compatibilty warning
and also allows this as an extension in earlier language modes. This
also matches GCC’s behaviour.
Commit: b4ecebe745ddebf30449435203deeb6463ecf9f0
https://github.com/llvm/llvm-project/commit/b4ecebe745ddebf30449435203deeb6463ecf9f0
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
A clang/test/SemaHLSL/BuiltIns/AddUint64-errors.hlsl
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
A llvm/test/CodeGen/DirectX/UAddc.ll
A llvm/test/CodeGen/DirectX/UAddc_errors.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
Log Message:
-----------
[HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (#127137)
Fixes #99205.
- Implements the HLSL intrinsic `AddUint64` used to perform unsigned
64-bit integer addition by using pairs of unsigned 32-bit integers
instead of native 64-bit types
- The LLVM intrinsic `uadd_with_overflow` is used in the implementation
of `AddUint64` in `CGBuiltin.cpp`
- The DXIL op `UAddc` was defined in `DXIL.td`, and a lowering of the
LLVM intrinsic `uadd_with_overflow` to the `UAddc` DXIL op was
implemented in `DXILOpLowering.cpp`
Notes:
- `__builtin_addc` was not able to be used to implement `AddUint64` in
`hlsl_intrinsics.h` because its `CarryOut` argument is a pointer, and
pointers are not supported in HLSL
- A lowering of the LLVM intrinsic `uadd_with_overflow` to SPIR-V
[already
exists](https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll)
- When lowering the LLVM intrinsic `uadd_with_overflow` to the `UAddc`
DXIL op, the anonymous struct type `{ i32, i1 }` is replaced with a
named struct type `%dx.types.i32c`. This aspect of the implementation
may be changed when issue #113192 gets addressed
- Fixes issues mentioned in the comments on the original PR #125319
---------
Co-authored-by: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Co-authored-by: Farzon Lotfi <farzonlotfi at microsoft.com>
Co-authored-by: Chris B <beanz at abolishcrlf.org>
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: 12c5a46c300eedb6cafc68b987abb9c1fa913e96
https://github.com/llvm/llvm-project/commit/12c5a46c300eedb6cafc68b987abb9c1fa913e96
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Fix incorrect condition on ballot
Summary:
Somehow these got the `!` dropped and it wasn't tested because the
existing test only used the 32-bit variant.
Commit: c28c5089628a443e0f848c2860f5e59e68efe301
https://github.com/llvm/llvm-project/commit/c28c5089628a443e0f848c2860f5e59e68efe301
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/ranges_stable_partition.h
M libcxx/include/algorithm
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/ranges_stable_partition.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_dangling.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_omitting_invoke.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_proxy_iterators.pass.cpp
Log Message:
-----------
[libc++] Implement part of P2562R1: constexpr `ranges::stable_partition` (#129839)
Commit: 45ca613c135ea7b5fbc63bff003f20bf20f62081
https://github.com/llvm/llvm-project/commit/45ca613c135ea7b5fbc63bff003f20bf20f62081
Author: Prabhuk <prabhukr at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/Mangle.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[clang] Use TargetInfo to decide Mangling for C (#129920)
Instead of hardcoding the decision on what mangling scheme to use based
on targets, use TargetInfo to make the decision.
Commit: 213028556419cb734be5aadcfd9798b40a8ebc31
https://github.com/llvm/llvm-project/commit/213028556419cb734be5aadcfd9798b40a8ebc31
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Lower/Cuda.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/CUDA/cuda-pointer.cuf
Log Message:
-----------
[flang][cuda] Make sure allocator id is set for pointer allocate (#129950)
Commit: 560cfd509916cd75bcd79143a91def5f3d8b9ba1
https://github.com/llvm/llvm-project/commit/560cfd509916cd75bcd79143a91def5f3d8b9ba1
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
c-index-test: fix buffer overflow (#129922)
We should not try to overwrite the pointer of struct, also need to add 1
for end of line.
Commit: f4ba2bf236c1f6243420ae4872accc350af98624
https://github.com/llvm/llvm-project/commit/f4ba2bf236c1f6243420ae4872accc350af98624
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-num-agpr.ll
Log Message:
-----------
AMDGPU: Add amdgpu-agpr-alloc attribute to control AGPR allocation (#128034)
This provides a range to decide how to subdivide the vector register
budget on gfx90a+. A single value declares the minimum AGPRs that
should be allocatable. Eventually this should replace amdgpu-no-agpr.
I want this primarily for testing agpr allocation behavior. We should
have a heuristic try to detect a reasonable number of AGPRs to keep
allocatable.
Commit: a216358ce7e8c4b8b4f99f92426a94e558c6ffed
https://github.com/llvm/llvm-project/commit/a216358ce7e8c4b8b4f99f92426a94e558c6ffed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-num-agpr.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/spill-regpressure-less.mir
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
Log Message:
-----------
AMDGPU: Replace amdgpu-no-agpr with amdgpu-agpr-alloc (#129893)
This performs the minimal replacment of amdgpu-no-agpr to
amdgpu-agpr-alloc=0. Most of the test diffs are due to the new
attribute sorting later alphabetically.
We could do better by trying to perform range merging in the attributor,
and trying to pick non-0 values.
Commit: 27e686c788246d6586e38542cf95a987fde63b2b
https://github.com/llvm/llvm-project/commit/27e686c788246d6586e38542cf95a987fde63b2b
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
A libcxx/test/std/containers/sequences/vector.bool/reference/ctor_no_default.compile.pass.cpp
A libcxx/test/std/utilities/template.bitset/bitset.members/reference.ctor_no_default.compile.pass.cpp
Log Message:
-----------
[libc++] Verify that LWG4140 is implemented (#128624)
According to the commit history, the constructors removed by LWG4140
have never been added to libc++.
Existence of non-public or deleted default constructor is observable,
this patch tests that there's no such default constructor at all.
Commit: c14d3dff97ca5a11be693b265fefc11afb026573
https://github.com/llvm/llvm-project/commit/c14d3dff97ca5a11be693b265fefc11afb026573
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
Log Message:
-----------
[msan][NFCI] Add tests for Arm NEON vector load (#125267)
Forked from llvm/test/CodeGen/AArch64/arm64-ld1.ll
Incorrectly handled by handleUnknownInstruction:
- llvm.aarch64.neon.ld1x2, llvm.aarch64.neon.ld1x3,
llvm.aarch64.neon.ld1x4
- llvm.aarch64.neon.ld2, llvm.aarch64.neon.ld3, llvm.aarch64.neon.ld4
- llvm.aarch64.neon.ld2lane, llvm.aarch64.neon.ld3lane,
llvm.aarch64.neon.ld4lane
- llvm.aarch64.neon.ld2r, llvm.aarch64.neon.ld3r, llvm.aarch64.neon.ld4r
Commit: e4c3d258b7a1f335cfd3a90bcf3d28ea220c999d
https://github.com/llvm/llvm-project/commit/e4c3d258b7a1f335cfd3a90bcf3d28ea220c999d
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
[NFC][c-index-test] factor data len out (#129971)
Follow up of #129922
Commit: 463a0964f4b3a0a327e46df82e792d1abe5c91a3
https://github.com/llvm/llvm-project/commit/463a0964f4b3a0a327e46df82e792d1abe5c91a3
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Remove the TODO for fmaximum/fminimum from the tests. (NFC) (#129969)
https://reviews.llvm.org/D156069 has supported it.
Commit: 316f68f7f250b0a5de1d7cbe06a97a5901af6057
https://github.com/llvm/llvm-project/commit/316f68f7f250b0a5de1d7cbe06a97a5901af6057
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/bswap-shift.ll
Log Message:
-----------
[RISCV] Remove the TODO for folding bswap and shift from the test. (NFC) (#129972)
https://reviews.llvm.org/D122655 has supported it.
Commit: a22881c9db07daa0e6a02f6be016a74742bc0654
https://github.com/llvm/llvm-project/commit/a22881c9db07daa0e6a02f6be016a74742bc0654
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M compiler-rt/include/orc_rt/c_api.h
Log Message:
-----------
[ORC-RT] Fix type name in comment. NFC.
Commit: f905bf3e1ef860c4d6fe67fb64901b6bbe698a91
https://github.com/llvm/llvm-project/commit/f905bf3e1ef860c4d6fe67fb64901b6bbe698a91
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/tools/lli/lli.cpp
Log Message:
-----------
[ORC] Remove the Triple argument from LLJITBuilder::ObjectLinkingLayerCreator.
ExecutionSession can provide the Triple, so this argument has been redundant
for a while, and no in-tree clients use it.
Commit: c72ebeeb7f1cebb481243cce3a5b18f548a9d930
https://github.com/llvm/llvm-project/commit/c72ebeeb7f1cebb481243cce3a5b18f548a9d930
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
Log Message:
-----------
ADT: Switch to a raw pointer for DoubleAPFloat::Floats.
In order for the union APFloat::Storage to permit access to the
semantics field when another union member is stored there, all members
of Storage must be standard layout. This is not necessarily the case
for DoubleAPFloat which may be non-standard layout because there is no
requirement that its std::unique_ptr member is standard layout. Fix this
by converting Floats to a raw pointer.
Reviewers: arsenm
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/129981
Commit: c861c1a046eb8c1e546a8767e0010904a3c8c385
https://github.com/llvm/llvm-project/commit/c861c1a046eb8c1e546a8767e0010904a3c8c385
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/tools/lli/lli.cpp
Log Message:
-----------
Revert "[ORC] Remove the Triple argument from LLJITBuilder::ObjectLinking..."
This reverts commit f905bf3e1ef860c4d6fe67fb64901b6bbe698a91 while I fix
some compile errors reported on the buildbots (see e.g.
https://lab.llvm.org/buildbot/#/builders/53/builds/13369).
Commit: a6ccda28f7569c1a03620d7520de7cfadc11f4a5
https://github.com/llvm/llvm-project/commit/a6ccda28f7569c1a03620d7520de7cfadc11f4a5
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
Log Message:
-----------
[clang-format][NFC] Use better names for a couple of data members
Commit: 75f6fe2ee5eb3e966cd4c335abd018921d6337d3
https://github.com/llvm/llvm-project/commit/75f6fe2ee5eb3e966cd4c335abd018921d6337d3
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Log Message:
-----------
[MC] Remove unneeded MCSymbolRefExpr::create overload and add comments
The StringRef overload is often error-prone as users might forget to
register the MCSymbol.
Add comments to MCTargetExpr and MCSymbolRefExpr::VariantKind.
In the distant future the VariantKind parameter might be removed.
Commit: 038fff3f249a25ae3f598f3e4951d9f57b30fbce
https://github.com/llvm/llvm-project/commit/038fff3f249a25ae3f598f3e4951d9f57b30fbce
Author: chrisPyr <32153107+chrisPyr at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryData.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/FrameOptimizer.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/StokeInfo.cpp
M bolt/lib/Passes/TailDuplication.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/tools/bat-dump/bat-dump.cpp
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/merge-fdata/merge-fdata.cpp
Log Message:
-----------
[NFC][BOLT] Make file-local cl::opt global variables static (#126472)
#125983
Commit: b18e5b6a36399f11ba1152875b6892900c5afdaf
https://github.com/llvm/llvm-project/commit/b18e5b6a36399f11ba1152875b6892900c5afdaf
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/tools/lli/lli.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
Log Message:
-----------
Re-apply "[ORC] Remove the Triple argument from LLJITBuilder::..." with fixes.
This re-applies f905bf3e1ef860c4d6fe67fb64901b6bbe698a91, which was reverted in
c861c1a046eb8c1e546a8767e0010904a3c8c385 due to compiler errors, with a fix for
MLIR.
Commit: 6e7e46cafeccab761d31e6404ceb0cdef4c18bd4
https://github.com/llvm/llvm-project/commit/6e7e46cafeccab761d31e6404ceb0cdef4c18bd4
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
A llvm/test/MC/RISCV/xqcibm-invalid.s
A llvm/test/MC/RISCV/xqcibm-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcibm (Bit Manipulation) extension (#129504)
This extension adds thirty eight bit manipulation instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.6
This patch adds assembler only support.
Co-authored-by: Sudharsan Veeravalli <quic_svs at quicinc.com>
Commit: a28daa7c1a059a164cc6cc344f02b1a92f858c30
https://github.com/llvm/llvm-project/commit/a28daa7c1a059a164cc6cc344f02b1a92f858c30
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
Log Message:
-----------
[BOLT][AArch64] Keep relocations for linker-relaxed instructions. NFCI (#129980)
We used to filter out relocations corresponding to NOP+ADR instruction
pairs that were a result of linker "relaxation" optimization. However,
these relocations will be useful for reversing the linker optimization.
Keep the relocations and ignore them while symbolizing ADR instruction
operands.
Commit: 7e5821bae80db3f3f0fe0d5f8ce62f79e548eed5
https://github.com/llvm/llvm-project/commit/7e5821bae80db3f3f0fe0d5f8ce62f79e548eed5
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/AST/AttrIterator.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/Analysis/CFG.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
A clang/test/Analysis/cxx23-assume-attribute.cpp
M clang/test/Analysis/out-of-bounds-new.cpp
Log Message:
-----------
Reapply "[analyzer] Handle [[assume(cond)]] as __builtin_assume(cond)" (#129234)
This is the second attempt to bring initial support for [[assume()]] in
the Clang Static Analyzer.
The first attempt (#116462) was reverted in
2b9abf0db2d106c7208b4372e662ef5df869e6f1 due to some weird failure in a
libcxx test involving `#pragma clang loop vectorize(enable)
interleave(enable)`.
The failure could be reduced into:
```c++
template <class ExecutionPolicy>
void transform(ExecutionPolicy) {
#pragma clang loop vectorize(enable) interleave(enable)
for (int i = 0; 0;) { // The DeclStmt of "i" would be added twice in the ThreadSafety analysis.
// empty
}
}
void entrypoint() {
transform(1);
}
```
As it turns out, the problem with the initial patch was this:
```c++
for (const auto *Attr : AS->getAttrs()) {
if (const auto *AssumeAttr = dyn_cast<CXXAssumeAttr>(Attr)) {
Expr *AssumeExpr = AssumeAttr->getAssumption();
if (!AssumeExpr->HasSideEffects(Ctx)) {
childrenBuf.push_back(AssumeExpr);
}
}
// Visit the actual children AST nodes.
// For CXXAssumeAttrs, this is always a NullStmt.
llvm::append_range(childrenBuf, AS->children()); // <--- This was not meant to be part of the "for" loop.
children = childrenBuf;
}
return;
```
The solution was simple. Just hoist it from the loop.
I also had a closer look at `CFGBuilder::VisitAttributedStmt`, where I also spotted another bug.
We would have added the CFG blocks twice if the AttributedStmt would have both the `[[fallthrough]]` and the `[[assume()]]` attributes. With my fix, it will only once add the blocks. Added a regression test for this.
Co-authored-by: Vinay Deshmukh <vinay_deshmukh AT outlook DOT com>
Commit: fe56c4c01972edc51c415c4f410739bbec9f7d13
https://github.com/llvm/llvm-project/commit/fe56c4c01972edc51c415c4f410739bbec9f7d13
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
[MC] Remove unneeded VK_None argument from MCSymbolRefExpr::create. NFC
Commit: 87976ca45f4fa983ef92bf8f43a54472ec354e00
https://github.com/llvm/llvm-project/commit/87976ca45f4fa983ef92bf8f43a54472ec354e00
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
Log Message:
-----------
[M68k] Suppress compilation warning `enumerated mismatch in conditional expression`. (NFC)
Commit: a6151f4e237075919c12a120c391a8b6c6a5000c
https://github.com/llvm/llvm-project/commit/a6151f4e237075919c12a120c391a8b6c6a5000c
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M mlir/docs/PatternRewriter.md
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/unittests/IR/PatternMatchTest.cpp
Log Message:
-----------
[mlir][IR] Move `match` and `rewrite` functions into separate class (#129861)
The vast majority of rewrite / conversion patterns uses a combined
`matchAndRewrite` instead of separate `match` and `rewrite` functions.
This PR optimizes the code base for the most common case where users
implement a combined `matchAndRewrite`. There are no longer any `match`
and `rewrite` functions in `RewritePattern`, `ConversionPattern` and
their derived classes. Instead, there is a `SplitMatchAndRewriteImpl`
class that implements `matchAndRewrite` in terms of `match` and
`rewrite`.
Details:
* The `RewritePattern` and `ConversionPattern` classes are simpler
(fewer functions). Especially the `ConversionPattern` class, which now
has 5 fewer functions. (There were various `rewrite` overloads to
account for 1:1 / 1:N patterns.)
* There is a new class `SplitMatchAndRewriteImpl` that derives from
`RewritePattern` / `OpRewritePatern` / ..., along with a type alias
`RewritePattern::SplitMatchAndRewrite` for convenience.
* Fewer `llvm_unreachable` are needed throughout the code base. Instead,
we can use pure virtual functions. (In cases where users previously had
to implement `rewrite` or `matchAndRewrite`, etc.)
* This PR may also improve the number of [`-Woverload-virtual`
warnings](https://discourse.llvm.org/t/matchandrewrite-hiding-virtual-functions/84933)
that are produced by GCC. (To be confirmed...)
Note for LLVM integration: Patterns with separate `match` / `rewrite`
implementations, must derive from `X::SplitMatchAndRewrite` instead of
`X`.
---------
Co-authored-by: River Riddle <riddleriver at gmail.com>
Commit: 687854aea8fdb20525af749069cf19bf612eaf2b
https://github.com/llvm/llvm-project/commit/687854aea8fdb20525af749069cf19bf612eaf2b
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
Log Message:
-----------
[MC] Remove unneeded VK_None argument from MCSymbolRefExpr::create. NFC
Commit: bae6644e1227b2555f92b1962dac6c2444eaaaf2
https://github.com/llvm/llvm-project/commit/bae6644e1227b2555f92b1962dac6c2444eaaaf2
Author: Lu Weining <luweining at loongson.cn>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/test/CodeGen/LoongArch/lasx/inline-asm-operand-modifier.ll
Log Message:
-----------
[LoongArch] Relax the restrictions of inlineasm operand modifier 'u' and 'w' (#129864)
- Allow 'u' and 'w' on LASX, LSX or floating point register operands.
- Also add missing description in LangRef.
Fixes #129863.
Commit: c6e2cbe5fd1ee446664c8e7d596c6dcd576052f3
https://github.com/llvm/llvm-project/commit/c6e2cbe5fd1ee446664c8e7d596c6dcd576052f3
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
Log Message:
-----------
[LV] Regenerate select-cmp-predicated.ll with UTC. NFC
The main select-cmp.ll tests seem to be generated with UTC after
it should probably be converted to UTC beforehand.
Commit: 1987d180125f77ca892bc93f108f9e23027725f5
https://github.com/llvm/llvm-project/commit/1987d180125f77ca892bc93f108f9e23027725f5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] isFreeToSplitVector - use a SDValue instead of SDNode argument. NFC. (#129906)
Every caller was having to call getNode() - so move that insider the helper.
Commit: 6311e3fcc8539cf0f474b28f82a465e83013a792
https://github.com/llvm/llvm-project/commit/6311e3fcc8539cf0f474b28f82a465e83013a792
Author: Narayan <32898329+vortex73 at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/InstCombine/compute-sign-bits-bitcast.ll
Log Message:
-----------
[ValueTracking] ComputeNumSignBitsImpl - add basic handling of BITCAST nodes (#127218)
When a wider scalar/vector type containing all sign bits is bitcast to a
narrower vector type, we can deduce that the resulting narrow elements
will also be all sign bits. This matches existing behavior in
SelectionDAG and helps optimize cases involving SSE intrinsics where
sign-extended values are bitcast between different vector types.
The current implementation fails to recognize that an arithmetic right
shift is redundant when applied to elements that are already known to be
all sign bits. This PR improves ComputeNumSignBitsImpl to track this
information through bitcasts, enabling the optimization of such cases.
```
%ext = sext <1 x i1> %cmp to <1 x i8>
%sub = bitcast <1 x i8> %ext to <4 x i2>
%sra = ashr <4 x i2> %sub, <i2 1, i2 1, i2 1, i2 1>
; Can be simplified to just:
%sub = bitcast <1 x i8> %ext to <4 x i2>
```
Closes #87624
Commit: 8e0a63ddad26c26501a7d9639b470665afadcf40
https://github.com/llvm/llvm-project/commit/8e0a63ddad26c26501a7d9639b470665afadcf40
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/docs/Canonicalization.md
Log Message:
-----------
[mlir][docs] Add docs on canonicalizers being folders or patterns (#129517)
If a transformation should be a canonicalization is an orthogonal
question to if a transformation should be implemented as a
`RewritePattern` or a `fold` method. The later is an implementation
detail.
This patch adds a suggestion to always implement a canonicalization as a
`fold` pattern if possible, as they are a restricted subset of a
`RewritePattern`.
This has been a common source of confusion, as to when to implement a
canonicalization as a fold method or a RewritePattern.
Commit: a2b05761724e5243056988d9d6bf1a5a94715b74
https://github.com/llvm/llvm-project/commit/a2b05761724e5243056988d9d6bf1a5a94715b74
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/libclc.pc.in
Log Message:
-----------
[libclc] Stop installing CLC headers (#126908)
The libclc headers are an implementation detail and are not intended to
be used by others as OpenCL headers. The only artifacts of libclc we
want to publish are the LLVM bytecode libraries.
As the headers have been incidentally broken by recent changes, this
commit takes the step to stop installing the headers at all. Downstreams
can use clang's own OpenCL headers, and/or its -fdeclare-opencl-builtins
flag.
Fixes #119967.
Commit: d61d2197390161db86b48d044970f48132139ccb
https://github.com/llvm/llvm-project/commit/d61d2197390161db86b48d044970f48132139ccb
Author: lakshayk-nv <lakshayk at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
Adding support in llvm-exegesis for Aarch64 for handling FPR64/128, PPR16 and ZPR128 reg class. (#127564)
Current implementation (for Aarch64) in llvm-exegesis only supports
GRP32 and GPR64 bit register class, thus for opcodes variants which used
FPR64/128, PPR16 and ZPR128, llvm-exegesis throws warning "setReg is not
implemented". This code will handle the above register class and
initialize the registers using appropriate base instruction class.
Commit: 620c38371de46d45e9095936c823e3e40a2c5f64
https://github.com/llvm/llvm-project/commit/620c38371de46d45e9095936c823e3e40a2c5f64
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
Log Message:
-----------
[mlir][nfc] De-duplicate tests from `Type::isIntOrFloat` (#129710)
This PR makes sure that we always use `Type::isIntOrFloat` rather than
re-implementing this condition inline. Also, it removes `isScalarType`
that effectively re-implemented this method.
Commit: 2c7e7b5627c5848e747904fb29b8ad700170ae59
https://github.com/llvm/llvm-project/commit/2c7e7b5627c5848e747904fb29b8ad700170ae59
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
Log Message:
-----------
[X86] Extend shuf128(concat(x,y),concat(z,w)) -> shuf128(widen(y),widen(w)) folds to peek through bitcasts (#129896)
Peek through bitcasts when looking for freely accessible upper subvectors
Commit: 0cceac6bbdf800b04c3325e1134a8b25b6d1a0bb
https://github.com/llvm/llvm-project/commit/0cceac6bbdf800b04c3325e1134a8b25b6d1a0bb
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libcxx/include/__concepts/class_or_enum.h
M libcxx/include/__concepts/swappable.h
Log Message:
-----------
[libc++] Remove a few unused includes from <__concepts/*> (#129883)
Commit: f01e760c08365426de95f02dc2c2dc670eb47352
https://github.com/llvm/llvm-project/commit/f01e760c08365426de95f02dc2c2dc670eb47352
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/sve-fixed-length-offsets.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
Log Message:
-----------
[AArch64][SVE] Improve fixed-length addressing modes. (#129732)
When compiling VLS SVE, the compiler often replaces VL-based offsets
with immediate-based ones. This leads to a mismatch in the allowed
addressing modes due to SVE loads/stores generally expecting immediate
offsets relative to VL. For example, given:
```c
svfloat64_t foo(const double *x) {
svbool_t pg = svptrue_b64();
return svld1_f64(pg, x+svcntd());
}
```
When compiled with `-msve-vector-bits=128`, we currently generate:
```gas
foo:
ptrue p0.d
mov x8, #2
ld1d { z0.d }, p0/z, [x0, x8, lsl #3]
ret
```
Instead, we could be generating:
```gas
foo:
ldr z0, [x0, #1, mul vl]
ret
```
Likewise for other types, stores, and other VLS lengths.
This patch achieves the above by extending `SelectAddrModeIndexedSVE`
to let constants through when `vscale` is known.
Commit: 979c275097a642e9b96c6b0a12f013c831af3a6e
https://github.com/llvm/llvm-project/commit/979c275097a642e9b96c6b0a12f013c831af3a6e
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
M flang/lib/Frontend/FrontendActions.cpp
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/LTO/legacy/LTOModule.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/TargetSelect.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/ValueSymbolTable.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/TargetRegistry.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/IRObjectFile.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/Internalize.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/tools/bugpoint/BugDriver.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/Analysis/LazyCallGraphTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfUtils.cpp
M llvm/unittests/DebugInfo/LogicalView/CodeViewReaderTest.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
M llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.cpp
M llvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/CodeGen/PerfMonitor.cpp
Log Message:
-----------
[IR] Store Triple in Module (NFC) (#129868)
The module currently stores the target triple as a string. This means
that any code that wants to actually use the triple first has to
instantiate a Triple, which is somewhat expensive. The change in #121652
caused a moderate compile-time regression due to this. While it would be
easy enough to work around, I think that architecturally, it makes more
sense to store the parsed Triple in the module, so that it can always be
directly queried.
For this change, I've opted not to add any magic conversions between
std::string and Triple for backwards-compatibilty purses, and instead
write out needed Triple()s or str()s explicitly. This is because I think
a decent number of them should be changed to work on Triple as well, to
avoid unnecessary conversions back and forth.
The only interesting part in this patch is that the default triple is
Triple("") instead of Triple() to preserve existing behavior. The former
defaults to using the ELF object format instead of unknown object
format. We should fix that as well.
Commit: b941d90c4de204631509176fea603762eef795d3
https://github.com/llvm/llvm-project/commit/b941d90c4de204631509176fea603762eef795d3
Author: Trevor Gross <tmgross at umich.edu>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/win-fp128.c
Log Message:
-----------
[clang] Pass fp128 indirectly and return in xmm0 on Windows (#115052)
Clang currently passes and returns `__float128` in vector registers on
MinGW targets, which is LLVM's default ABI for `fp128`. However, the
Windows x86-64 calling convention [1] states the following:
__m128 types, arrays, and strings are never passed by immediate
value. Instead, a pointer is passed to memory allocated by the
caller. Structs and unions of size 8, 16, 32, or 64 bits, and __m64
types, are passed as if they were integers of the same size. Structs
or unions of other sizes are passed as a pointer to memory allocated
by the caller. For these aggregate types passed as a pointer,
including __m128, the caller-allocated temporary memory must be
16-byte aligned.
Based on the above it sounds like `__float128` should be passed
indirectly. Thus, change `f128` passing to use the stack and make the
return in xmm0 explicit. This is the identical to `i128`, and passing is
the same as GCC.
Regarding return values, the documentation states:
A scalar return value that can fit into 64 bits, including the __m64
type, is returned through RAX. Non-scalar types including floats,
doubles, and vector types such as __m128, __m128i, __m128d are
returned in XMM0.
This makes it sound like it should be acceptable to return `__float128`
in xmm0; however, GCC returns `__float128` on the stack. That above ABI
statement as well as consistency with `i128` (which is returned in xmm0)
mean that it would likely be better for GCC to change its return ABI to
match Clang rather than the other way around, so that portion is left
as-is.
Clang's MSVC targets do not support `__float128` or `_Float128`, but
these changes would also apply there if it is eventually enabled.
With [2] which should land around the same time, LLVM will also
implement this ABI so it is not technically necessary for Clang to make
a change here as well. This is sill done in order to be consistent with
other types, and to allow calling convention-aware optimizations at all
available optimization layers (@rnk mentioned possible reuse of stack
arguments). An added benefit is readibility of the LLVM IR since it more
accurately reflects what the lowered assembly does.
[1]:
https://learn.microsoft.com/en-us/cpp/build/x64-calling-convention?view=msvc-170
[2]: https://github.com/llvm/llvm-project/pull/128848
Commit: 86cf4ed7e9510a6828e95e8b36893eec116c9cf9
https://github.com/llvm/llvm-project/commit/86cf4ed7e9510a6828e95e8b36893eec116c9cf9
Author: David Green <david.green at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Speedups for CombineBaseUpdate. (#129725)
This attempts to put limits onto CombineBaseUpdate for degenerate cases
like #127477. The biggest change is to add a limit to the number of base
updates to check in CombineBaseUpdate. 64 is hopefully plenty high
enough for most runtime unrolled loops to generate postinc where they
are beneficial.
It also moves the check for isValidBaseUpdate later so that it only
happens if we will generate a valid instruction. The 1024 limit to
hasPredecessorHelper comes from the X86 backend, which uses the same
limit.
I haven't added a test case as it would need to be very big and my
attempts at generating a smaller version did not show anything useful.
Fixes #127477.
Commit: edfc89df1aa57f4231078a1ac7fac55fcebab149
https://github.com/llvm/llvm-project/commit/edfc89df1aa57f4231078a1ac7fac55fcebab149
Author: John McIver <john.mciver.iii at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Add select freeze poison store tests [NFC] (#129775)
Commit: 4554b300510be86ccf91754a496bdefea899acd2
https://github.com/llvm/llvm-project/commit/4554b300510be86ccf91754a496bdefea899acd2
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update ConstOp to use Tosa_Tensor (#129959)
Since we already defined Tosa_Tensor in TosaTypesBase.td, updated
ConstOp to use that.
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 4f46b75fb0d7ac100afa3af112135d8b52633236
https://github.com/llvm/llvm-project/commit/4f46b75fb0d7ac100afa3af112135d8b52633236
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constrained_shapes.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add expected output shape check to argmax verifier (#129870)
Fixes some test cases which incorrectly declared the output shape and
added a negative test case.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: c662a9d303a9579c6b71b8abaf0068bee73de5ba
https://github.com/llvm/llvm-project/commit/c662a9d303a9579c6b71b8abaf0068bee73de5ba
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/iX-ext-split.ll
Log Message:
-----------
[InstCombine] recognize missed i128 split optimization (#129363)
This pr fixes #126056, recognising a split i128 extension optimization.
Proof for working optimization:
```llvm
define i128 @src(i32 noundef %x) {
entry:
%coerce.sroa.0.0.extract.trunc = sext i32 %x to i64
%0 = ashr i32 %x, 31
%coerce.sroa.2.0.extract.trunc = sext i32 %0 to i64
%x.sroa.2.0.insert.ext.i = zext i64 %coerce.sroa.2.0.extract.trunc to i128
%x.sroa.2.0.insert.shift.i = shl nuw i128 %x.sroa.2.0.insert.ext.i, 64
%x.sroa.0.0.insert.ext.i = zext i64 %coerce.sroa.0.0.extract.trunc to i128
%x.sroa.0.0.insert.insert.i = or disjoint i128 %x.sroa.2.0.insert.shift.i, %x.sroa.0.0.insert.ext.i
ret i128 %x.sroa.0.0.insert.insert.i
}
define i128 @tgt(i32 noundef %x) {
%x.sroa.0.0.insert.insert.i = sext i32 %x to i128
ret i128 %x.sroa.0.0.insert.insert.i
}
```
Commit: a685045b9fb4218a4a57f765b0642c3074eebdd8
https://github.com/llvm/llvm-project/commit/a685045b9fb4218a4a57f765b0642c3074eebdd8
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/AsmParser/CMakeLists.txt
Log Message:
-----------
[AsmParser] Add dependency on TargetParser
Try to fix share libs build after #129868.
Commit: cd1d9a8fab05524a27ffdb251f6def37786b5cc1
https://github.com/llvm/llvm-project/commit/cd1d9a8fab05524a27ffdb251f6def37786b5cc1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/X86/math-builtins.c
M clang/test/CodeGen/aix-builtin-mapping.c
M clang/test/CodeGen/builtin-attributes.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGen/math-libcalls.c
Log Message:
-----------
Reland "[clang] Lower modf builtin using `llvm.modf` intrinsic" (#129885)
Reverts llvm/llvm-project#127987
Original description:
This updates the existing modf[f|l] builtin to be lowered via the
llvm.modf.* intrinsic (rather than directly to a library call).
The legalization issues exposed by the original PR (#126750) should have
been fixed in #128055 and #129264.
Commit: 6e57326c61e77fe257d8a16adf9389231ea7c6ac
https://github.com/llvm/llvm-project/commit/6e57326c61e77fe257d8a16adf9389231ea7c6ac
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Conversion/MeshToMPI/CMakeLists.txt
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/test/Conversion/MeshToMPI/convert-mesh-to-mpi.mlir
A mlir/test/Conversion/MeshToMPI/convert-shardshape-to-mpi.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Tensor/mesh-spmdization.mlir
Log Message:
-----------
[mlir][mesh, mpi] More on MeshToMPI (#129048)
- do not create MPI operations if no halo exchange is needed
- allow returning sharding information through `!mesh.sharding`
(gets converted into a tuple of tensors)
- lowering `mesh.shard_shape` including fixes to the operation itself
- global symbol `static_mpi_rank` replaced by an DLTI attribute
(now aligned with MPIToLLVM)
- smaller fixes and some minor cleanup
---------
Co-authored-by: Christian Ulmann <christianulmann at gmail.com>
Commit: 8eec3d77a93aa3111426a2988fc0a3ac927899a0
https://github.com/llvm/llvm-project/commit/8eec3d77a93aa3111426a2988fc0a3ac927899a0
Author: ita-sc <ivan.tetyushkin at syntacore.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/test/API/lit.cfg.py
Log Message:
-----------
[lldb][tests] Add ability to run API tests with qemu-user simulator (#89765)
Commit: f7c0f33d6fd3aebdbfc1ca9408fa13169c31c95c
https://github.com/llvm/llvm-project/commit/f7c0f33d6fd3aebdbfc1ca9408fa13169c31c95c
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/tools/lto/CMakeLists.txt
Log Message:
-----------
[lto] Add TargetParser dependency
To fix the shared libs build after #129868.
Commit: 9deed7d2ef3a147c4e8410910967fde601359039
https://github.com/llvm/llvm-project/commit/9deed7d2ef3a147c4e8410910967fde601359039
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Fix some more coding standard violations (#130046)
Commit: 4f469ae046d14fad2411a2afb9dd30620ad729ae
https://github.com/llvm/llvm-project/commit/4f469ae046d14fad2411a2afb9dd30620ad729ae
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
[offload] Fix build after Module::getTargetTriple() change
Adjust for #129868.
Commit: 2ec16ee28b87511ae7897bd38e5fab37b015661a
https://github.com/llvm/llvm-project/commit/2ec16ee28b87511ae7897bd38e5fab37b015661a
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVM/NVVM/Target.cpp
Log Message:
-----------
[mlir][target] Adjust the start position of the moduleToObject timer (#129835)
As title. To avoid `Ungrouped Timers` when the target is `Assembly `.
Commit: 5faa4130b9bad0ba31585d9b4b0e929a40e6326a
https://github.com/llvm/llvm-project/commit/5faa4130b9bad0ba31585d9b4b0e929a40e6326a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
Log Message:
-----------
AMDGPU: Add gfx950 cost model tests for minimum and maximum (#130029)
Commit: 5ce4045384d7c2544185b0dbcb6222d06beb47dc
https://github.com/llvm/llvm-project/commit/5ce4045384d7c2544185b0dbcb6222d06beb47dc
Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
Log Message:
-----------
[mlir][nfc] Fix typo in LIT RUN line
Failing bot:
* https://lab.llvm.org/buildbot/#/builders/17/builds/6269
The offending test was added in:
* https://github.com/llvm/llvm-project/pull/129696
To fix this, use:
* `%mcr_aarch64_cmd` (which is what we used for ArmSVE e2e tests),
Instead of:
* `mlir-cpu-runner` (which was renamed to `mlir-runner` in #123776).
Committed without review due to being a trivial test update; if this
needs discussion, please ping me or leave a comment on GitHub.
Commit: 556a64507b3ae4ee3b998c47eb5451a60235bcb1
https://github.com/llvm/llvm-project/commit/556a64507b3ae4ee3b998c47eb5451a60235bcb1
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp
Log Message:
-----------
[MLIR][NFC] Retire let constructor for GPU (#129849)
`let constructor` is legacy (do not use in tree!) since the table gen
backend emits most of the glue logic to build a pass.
Commit: 1a3dc8e9c7b5cc498fe99fd2288c7436510e46ae
https://github.com/llvm/llvm-project/commit/1a3dc8e9c7b5cc498fe99fd2288c7436510e46ae
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorToAllocTensor.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OptimizeAllocationLiveness.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
Log Message:
-----------
[MLIR][NFC] Retire let constructor for Bufferization (#129850)
`let constructor` is legacy (do not use in tree!) since the table gen
backend emits most of the glue logic to build a pass.
Commit: d9af34f499822df41a9dbe85cf8179ff167694dc
https://github.com/llvm/llvm-project/commit/d9af34f499822df41a9dbe85cf8179ff167694dc
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/examples/Kaleidoscope/Chapter8/toy.cpp
Log Message:
-----------
[Kaleidoscope] Adjust after Module Triple change
Adjust for #129868.
Commit: dc9d217f0c211297f055c32d7b9005a1adbf2f62
https://github.com/llvm/llvm-project/commit/dc9d217f0c211297f055c32d7b9005a1adbf2f62
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s
Log Message:
-----------
[llvm-exegesis] Follow up of #127564: fix test. NFC. (#130072)
We don't need to run llvm-exegesis for the regression tests, just dump
the object code, so this adds option
--benchmark-phase=assemble-measured-code to achieve that.
Commit: 20d955ce2aa23373e58ea203e8f399082d61307b
https://github.com/llvm/llvm-project/commit/20d955ce2aa23373e58ea203e8f399082d61307b
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
Log Message:
-----------
[mlir] Remove extra ';' outside of a function (NFC)
/llvm-project/mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp:70:2:
error: extra ';' outside of a function is incompatible with C++98 [-Werror,-Wc++98-compat-extra-semi]
};
^
1 error generated.
Commit: 156cdcf2ffc9a5f851e1b340891172462938b5ea
https://github.com/llvm/llvm-project/commit/156cdcf2ffc9a5f851e1b340891172462938b5ea
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/test/CodeGen/assignment-tracking/assignment-tracking.cpp
M clang/test/CodeGen/assignment-tracking/memcpy-fragment.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/long-double-x87.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/structured-bindings.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/var-not-alloca-sized.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/sroa-alloca-offset.ll
Log Message:
-----------
[Assignment Tracking] Replace `undef` debug info with `poison` (#129755)
`undef` debug info can be replaced with `poison` debug info.
Commit: 9501275a351063a55b6a0e017d3630a26c0d9da9
https://github.com/llvm/llvm-project/commit/9501275a351063a55b6a0e017d3630a26c0d9da9
Author: vigbalu <70995650+vigbalu at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M openmp/libompd/gdb-plugin/ompd/ompd_handles.py
Log Message:
-----------
[OMPD] Remove deprecated/unused module that is causing error (#127434) (#129999)
Fixes https://github.com/llvm/llvm-project/issues/127434
Commit: 5ee1c0b7148571ed9d60e447b66fb0f35de14576
https://github.com/llvm/llvm-project/commit/5ee1c0b7148571ed9d60e447b66fb0f35de14576
Author: Trevor Gross <tmgross at umich.edu>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/X86/X86CallingConv.td
A llvm/test/CodeGen/X86/fp128-abi.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
M llvm/test/CodeGen/X86/scalar-fp-to-i64.ll
Log Message:
-----------
[windows] Always pass fp128 arguments indirectly (#128848)
LLVM currently expects `__float128` to be both passed and returned in
xmm registers on Windows. However, this disagrees with the Windows
x86-64 calling convention [1], which indicates values larger than 64
bits should be passed indirectly.
Update LLVM's default Windows calling convention to pass `fp128`
directly. Returning in xmm0 is unchanged since this seems like a
reasonable extrapolation of the ABI. With this patch, the calling
convention for `i128` and `f128` is the same.
GCC passes `__float128` indirectly, which this also matches. However, it
also returns indirectly, which is not done here. I intend to attempt a
GCC change to also return in `xmm0` rather than making that change here,
given the consistency with `i128`.
This corresponds to the frontend change in [2], see more details there.
[1]:
https://learn.microsoft.com/en-us/cpp/build/x64-calling-convention?view=msvc-170
[2]: https://github.com/llvm/llvm-project/pull/115052
Commit: e2911aa2c254c071c2ab898a69c69ba8c94586f8
https://github.com/llvm/llvm-project/commit/e2911aa2c254c071c2ab898a69c69ba8c94586f8
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/loop-directive.f90
A flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
Log Message:
-----------
[Flang][OpenMP] Fix crash when loop index var is pointer or allocatable (#129717)
Use hlfir dereferencing for pointers and allocatables and use hlfir
assign. Also, change the code updating IV in lastprivate.
Note: This is a small change. Modifications in existing tests are
changes from fir.store to hlfir.assign.
Fixes #121290
Commit: 29ff168363fa9a41f04b19a9afe5930330f35b4c
https://github.com/llvm/llvm-project/commit/29ff168363fa9a41f04b19a9afe5930330f35b4c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/Contributing.rst
M llvm/docs/GitHub.rst
Log Message:
-----------
[llvm][docs] Extend docs on GitHub's "squash and merge" (#129497)
>From what I’ve observed, some contributors are still unaware that in LLVM, the
PR summary - not the commit messages - is used as the final commit message when
merging. This is especially unclear to those without commit access, as only
users with commit access can edit the commit message before merging.
This PR clarifies that policy and consolidates all relevant information into
`GitHub.rst`, ensuring it is no longer split between `GitHub.rst` and
`Contributing.rst`.
Note, a big part of this change is merely moving text between the docs.
Commit: 8c61ef17c3aefd13eaf75f401aa8f3c7dd5d4a12
https://github.com/llvm/llvm-project/commit/8c61ef17c3aefd13eaf75f401aa8f3c7dd5d4a12
Author: kadir çetinkaya <kadircet at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/CodeComplete.h
Log Message:
-----------
[clangd] Explicitly block until async task completes (#130077)
We started seeing some use-after-frees starting with
https://github.com/llvm/llvm-project/pull/125433.
This patch ensures we explicitly block for the async task, if there's
one, before destructing `std::future`, independent of the stdlib
implementation.
Commit: 5d1029b4a87f36a394c169b89b26a74d17f7ff01
https://github.com/llvm/llvm-project/commit/5d1029b4a87f36a394c169b89b26a74d17f7ff01
Author: hanbeom <kese111 at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-selects.ll
Log Message:
-----------
[VectorCombine] Handle shuffle of selects (#128032)
(shuffle(select(c1,t1,f1)), (select(c2,t2,f2)), m)
-> (select (shuffle c1,c2,m), (shuffle t1,t2,m), (shuffle f1,f2,m))
The behaviour of SelectInst on vectors is the same as for
`V'select[i] = Condition[i] ? V'True[i] : V'False[i]`.
If a ShuffleVector is performed on two selects, it will be like:
`V'[mask] = (V'select[i] = Condition[i] ? V'True[i] : V'False[i])`
That's why a ShuffleVector with two SelectInst is equivalent to
first ShuffleVector Condition/True/False and then SelectInst that
result.
This patch implements the transforming described above.
Proof: https://alive2.llvm.org/ce/z/97wfHp
Fixes #120775
Commit: 512ef4c7e36d1a61ad6e6c0a5a340de127b67961
https://github.com/llvm/llvm-project/commit/512ef4c7e36d1a61ad6e6c0a5a340de127b67961
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
Log Message:
-----------
[X86] Fold VPERMV(MASK,CONCAT(LO,HI)) -> VPERMV3(WIDEN(LO),MASK',WIDEN(HI)) (#129708)
If the VPERMV node is shuffling a source that is concatenated from separate subvectors, attempt to shuffle from the separate subvectors directly using an equivalent VPERMV3 node
Commit: 59e0704a52cfa7f829c7eb25db0f7b1e13e44418
https://github.com/llvm/llvm-project/commit/59e0704a52cfa7f829c7eb25db0f7b1e13e44418
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Remove RegisterEncoding from SIInsertWaitcnts. NFC. (#130056)
The information in this struct seemed useless. VGPR0 and SGPR0 were
always 0. VGPRL and SGPRL were only used in assertions.
Commit: 7358973df1b53785cace2e3431d141078dc53e7c
https://github.com/llvm/llvm-project/commit/7358973df1b53785cace2e3431d141078dc53e7c
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Expr.cpp
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[CLANG-CL] Remove the 'static' specifier for _FUNCTION_ in MSVC mode. (#128184)
The macro `FUNCTION` is returning the `static` specifier for static
templated functions. It's not the case for MSVC.
See https://godbolt.org/z/KnhWhqs47
Clang-cl is returning:
`__FUNCTION__ static inner::C<class A>::f`
`__FUNCTION__ static inner::C<class A>::f`
for the reproducer.
Commit: 9ea2da5758ee96ae7b8b3f914939ea1224af2cde
https://github.com/llvm/llvm-project/commit/9ea2da5758ee96ae7b8b3f914939ea1224af2cde
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
Log Message:
-----------
[NFC][LLVM] Refactor llvm/test/CodeGen/AArch64/sve{2}-fcopysign.ll
Commit: 4022d78591d3ad417731fae2a16035126ff2ca7e
https://github.com/llvm/llvm-project/commit/4022d78591d3ad417731fae2a16035126ff2ca7e
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
Log Message:
-----------
[lldb] Fix compile error. (#130091)
Followup to
https://github.com/llvm/llvm-project/commit/878a64f94a264ea4b564d6063614ddb0b5da3f6c
Commit: b21663cb5ba9d1ba157a8461c55a35b1a8712a43
https://github.com/llvm/llvm-project/commit/b21663cb5ba9d1ba157a8461c55a35b1a8712a43
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SplitKit.cpp
A llvm/test/CodeGen/ARM/splitkit-remat-regclass-constraint-regression.ll
M llvm/test/CodeGen/ARM/splitkit.ll
M llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
M llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
A llvm/test/CodeGen/X86/splitkit-remat-broken-subreg-constraint.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
Log Message:
-----------
SplitKit: Take register class directly from instruction definition (#129727)
This fixes an expensive chesk failure after 8476a5d480304. The issue
was essentially that getRegClassConstraintEffectForVReg was not doing
anything useful, sometimes. If the register passed to it is not present
in the instruction, it is a no-op and returns the original classe. The
Edit->getReg() register may not be the register as it appears in either
the use or def instruction. It may be some split register, so take
the register directly from the instruction being rematerialized.
Also directly query the constraint from the def instruction, with a
hardcoded operand index. This isn't ideal, but all the other
rematerialize
code makes the same assumption.
So far I've been unable to reproduce this with a standalone MIR test. In
the
original case, stop-before=greedy and running the one pass is not
working.
Commit: 09e010001773d7d7efc0cafe78d3c8899d8bc45d
https://github.com/llvm/llvm-project/commit/09e010001773d7d7efc0cafe78d3c8899d8bc45d
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/temp/temp.pre/p6.cpp
Log Message:
-----------
[Clang] use parameter location for abbreviated function templates (#129139)
Fixes #46386
---
When an abbreviated function template appears in an `extern "C"` block
and all template parameters are invented,
`TemplateParams->getTemplateLoc()` becomes invalid, leading to an
incorrect error location. These changes ensure that the error points to
the parameter's location when the template location is invalid.
Commit: 0aa92d23b206e20fb1e19f4fc0d05d2d293f404f
https://github.com/llvm/llvm-project/commit/0aa92d23b206e20fb1e19f4fc0d05d2d293f404f
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
Log Message:
-----------
[AMDGPU] Run DL builtin tests for new GFX (#130054)
Commit: bbabf4e2b81ff729d549f588ffe9fe8b470178d3
https://github.com/llvm/llvm-project/commit/bbabf4e2b81ff729d549f588ffe9fe8b470178d3
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU][NFC] Update name for BVH Intersect Ray (#130036)
Co-authored-by: Ivan Kosarev <ivan.kosarev at amd.com>
Commit: 4e6721b70d2ea6ba9231092a92b3a6924ebf0ab9
https://github.com/llvm/llvm-project/commit/4e6721b70d2ea6ba9231092a92b3a6924ebf0ab9
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[llvm] Fix an unused variable warning
Commit: d6c0839c9c823754fb84e47c5bacf1a3b3d0f618
https://github.com/llvm/llvm-project/commit/d6c0839c9c823754fb84e47c5bacf1a3b3d0f618
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Reduce size of SGPR arrays in SIInsertWaitcnts. NFC. (#130097)
Commit: 8eeeddb5ed525bc41ddf96c96c509c32963e3a84
https://github.com/llvm/llvm-project/commit/8eeeddb5ed525bc41ddf96c96c509c32963e3a84
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx-splat.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/cast-vsel.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-pavg.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/icmp-pow2-mask.ll
M llvm/test/CodeGen/X86/insertelement-var-index.ll
M llvm/test/CodeGen/X86/memset-inline.ll
M llvm/test/CodeGen/X86/memset-nonzero.ll
M llvm/test/CodeGen/X86/pr46527.ll
M llvm/test/CodeGen/X86/pr62014.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
M llvm/test/CodeGen/X86/vec_set-H.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-unsigned-cmp.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/widened-broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
For vXi16 patterns that lower to splats, ensure that PSHUFW mask splats to the entire LW/HW i64 half and then create a wide PSHUFD mask that splats the whole i64 element - this encourages further combines without depending on any unused elements from undef shuffle mask elements.
Fixes #129276
Commit: 757554ee26aff867290162100b2cc9941a206e17
https://github.com/llvm/llvm-project/commit/757554ee26aff867290162100b2cc9941a206e17
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/rcp-contract-rsq.ll
Log Message:
-----------
Regenerate checks in test/Transforms/InstCombine/AMDGPU/. NFC.
Commit: be5149a3158cbce3051629e450950ccb96926365
https://github.com/llvm/llvm-project/commit/be5149a3158cbce3051629e450950ccb96926365
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#129895)
Commit: 4703f8b6610a13b549c1b8aefe90d0f8975fea1e
https://github.com/llvm/llvm-project/commit/4703f8b6610a13b549c1b8aefe90d0f8975fea1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
clang/HIP: Use generic builtins for f32 exp and log (#129638)
Stop using ocml declarations which are just a shim around the
intrinsics.
Commit: df1e102e2a6b0e0f1ecf28c58a4a51dbcbe74360
https://github.com/llvm/llvm-project/commit/df1e102e2a6b0e0f1ecf28c58a4a51dbcbe74360
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/AST/DeclOpenACC.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclOpenACC.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/ParserOpenACC/parse-constructs.cpp
A clang/test/SemaOpenACC/routine-construct-ast.cpp
A clang/test/SemaOpenACC/routine-construct.cpp
M clang/test/SemaOpenACC/unimplemented-construct.c
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] implement AST/Sema for 'routine' construct with argument
The 'routine' construct has two forms, one which takes the name of a
function that it applies to, and another where it implicitly figures it
out based on the next declaration. This patch implements the former with
the required restrictions on the name and the function-static-variables
as specified.
What has not been implemented is any clauses for this, any of the A.3.4
warnings, or the other form.
Commit: 9189d84abbfc643db0053200c1c2e16b1e78e8f9
https://github.com/llvm/llvm-project/commit/9189d84abbfc643db0053200c1c2e16b1e78e8f9
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
Log Message:
-----------
[NFC] Change the return type of `getTraversalScope` to `ArrayRef`
This is only used in 2 places, both just to search through the list, so
returning a copy was wasteful. This patch changes it to return an
`ArrayRef` so that a copy isn't made.
Commit: 78281fd12c9f5c46b95d9399ae72ca357812ecee
https://github.com/llvm/llvm-project/commit/78281fd12c9f5c46b95d9399ae72ca357812ecee
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
Revert "[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#129895)"
This reverts commit be5149a3158cbce3051629e450950ccb96926365.
It caused build failures in the openmp-offload-amdgpu-runtime buildbot
and others.
Commit: 5bb112feaeab99018f7ae2c59620d557f2b958ae
https://github.com/llvm/llvm-project/commit/5bb112feaeab99018f7ae2c59620d557f2b958ae
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
Log Message:
-----------
[NFC][OpenACC] Fix unused variable warning from df1e102e
Looks like I did a dyn_cast when all I needed was an isa! This patch
fixes that up.
Commit: ff993f9a4c23cfaae54f2a2708bed23954b8d9c0
https://github.com/llvm/llvm-project/commit/ff993f9a4c23cfaae54f2a2708bed23954b8d9c0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libcxx/include/forward_list
M libcxx/include/list
Log Message:
-----------
[libc++] Remove identity casts in <{forward_,}list> (#130049)
Commit: 32f543760c7f44c4c7d18bc00a3a1d8860c42bff
https://github.com/llvm/llvm-project/commit/32f543760c7f44c4c7d18bc00a3a1d8860c42bff
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
Revert "[mlir][ODS] Add a generated builder that takes the Properties struct" (#130117)
Reverts llvm/llvm-project#124713.
Builders involving sanitizers are failing:
https://lab.llvm.org/buildbot/#/builders/169/builds/9106.
Commit: 1182be503d584c402aba58ea5807bc11feba20ae
https://github.com/llvm/llvm-project/commit/1182be503d584c402aba58ea5807bc11feba20ae
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
Log Message:
-----------
[SLP]Fix a crash for buildvector nodes with parent phi nodes with same incoming blocks
If trying to find matching buildvector node for another nodes, and both
nodes are used by vectorized phi nodes and are coming from the same
parent block, this nodes should be considered matched to avoid a crash.
Commit: 3ccacc4e44afa66f20dd6430bc7ff966cc670708
https://github.com/llvm/llvm-project/commit/3ccacc4e44afa66f20dd6430bc7ff966cc670708
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/LTO/X86/coro.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
Log Message:
-----------
Revert "[LTO][Pipelines][Coro] De-duplicate Coro passes" (#129977)
Reverts llvm/llvm-project#128654
Breaks FatLTO
https://github.com/llvm/llvm-project/pull/128654#issuecomment-2700053700
Commit: ea59d17a2afc087315e68dca59f608d4ed73c300
https://github.com/llvm/llvm-project/commit/ea59d17a2afc087315e68dca59f608d4ed73c300
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-partial-undef.ll
Log Message:
-----------
[X86] getFauxShuffleMask - always match insert_subvector(insert_subvector(undef,sub,0),sub,c) 'subvector splat' patterns (#130115)
The plan is to remove the vXi64 cross lane shuffle constraint entirely, but this special 'splat' case was easy to handle while I fight the remaining regressions.
Commit: bfea84946d860ac5cae978323597556268c90f7a
https://github.com/llvm/llvm-project/commit/bfea84946d860ac5cae978323597556268c90f7a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
Log Message:
-----------
clang: Hack around opencl enqueue_block using wrong ABI for aggregrate (#130011)
EmitAggExprToLValue started wrapping the temporary alloca in an
addrspacecast
at some point. We take the direct type from this as the pointer argument
for the
runtime function type, but this isn't correct. Technically, we should be
querying
the target's ABI for what IR to produce for this sequence. The
assumption seems to
always have been that this will be indirectly passed with byval (or
byref).
I started working on a patch to go through the ABI handling, but it
seems to
require more time and/or clang expertise than I have at the moment.
Commit: 3c74262604f72914df970a6de7f057f9d24d7668
https://github.com/llvm/llvm-project/commit/3c74262604f72914df970a6de7f057f9d24d7668
Author: Augie Fackler <augie at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] add missing deps in mlir
Commit: 15ba2ce7ac9ba2f827271c8fe93f6f3e8219f734
https://github.com/llvm/llvm-project/commit/15ba2ce7ac9ba2f827271c8fe93f6f3e8219f734
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/pr41619.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
Log Message:
-----------
InferAddressSpaces: Replace undef with poison in tests (#130083)
Commit: 35842f354ecc9105de44bc1b5a8d6d90b53b8d49
https://github.com/llvm/llvm-project/commit/35842f354ecc9105de44bc1b5a8d6d90b53b8d49
Author: Augie Fackler <augie at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] add missing another missing dep in mlir
Commit: 5ae19fad3f1a73577cb8446b2b88eea5b3d0c8f0
https://github.com/llvm/llvm-project/commit/5ae19fad3f1a73577cb8446b2b88eea5b3d0c8f0
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
M mlir/test/IR/print-attr-type-aliases.mlir
M mlir/test/IR/recursive-type.mlir
M mlir/test/lib/Dialect/Test/TestDialectInterfaces.cpp
Log Message:
-----------
[mlir] Allow trailing digit for alias in AsmPrinter (#127993)
When generating aliases from `OpAsm{Dialect,Type,Attr}Interface`, the
result would be sanitized and if the alias provided by the interface has
a trailing digit, AsmPrinter would attach an underscore to it to
presumably prevent confliction.
#### Motivation
There are two reasons to motivate the change from the old behavior to
the proposed behavior
1. If the type/attribute can generate unique alias from its content,
then the extra trailing underscore added by AsmPrinter will be strange
```mlir
func.func @add(%ct: !ct_L0_) -> !ct_L0_
%ct_0 = bgv.add %ct, %ct : (!ct_L0_, !ct_L0_) -> !ct_L0_
%ct_1 = bgv.add %ct_0, %ct_0 : (!ct_L0_, !ct_L0_) -> !ct_L0_
%ct_2 = bgv.add %ct_1, %ct_1 : (!ct_L0_, !ct_L0_) -> !ct_L0_
return %ct_2 : !ct_L0_
}
```
Which aesthetically would be better if we have `(!ct_L0, !ct_L0) ->
!ct_L0`
2. The Value name behavior is that, for the first instance, use no
suffix `_N`, which can be similarly applied to alias name. See the IR
above where the first one is called `%ct` and others are called `%ct_N`.
See `uniqueValueName` for detail.
#### Conflict detection
```mlir
!test.type<a = 3> // suggest !name0
!test.type<a = 4> // suggest !name0
!test.another<b = 3> // suggest !name0_
!test.another<b = 4> // suggest !name0_
```
The conflict detection is based on `nameCounts` in `initializeAliases`,
where
In the original way, the first two will get sanitized to `!name0_` and
`initializeAlias` can assign unique id `0, 1, 2, 3` to them.
In the current way, the `initializeAlias` uses `usedAliases` to track
which name has been used, and use such information to generate a suffix
id that will make the printed alias name unique.
The result for the above example is `!name0, !name0_1, !name0_,
!name0_2` now.
Commit: c8898b09f9cc8b2d8df37c40b1d7c5ab868cd9db
https://github.com/llvm/llvm-project/commit/c8898b09f9cc8b2d8df37c40b1d7c5ab868cd9db
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/pointer.cpp
M flang/include/flang/Runtime/pointer.h
Log Message:
-----------
[flang][rt] Use allocator registry to allocate the pointer payload (#129992)
pointer allocation is done through `AllocateValidatedPointerPayload`.
This function was not updated to use the registered allocators in the
descriptor to perform the allocation. This patch makes use of the
allocator.
The footer word is not set and not checked for allocator other than the
default one. The support will likely come in a follow up patch but this
will necessitate more functions to be registered to be able to set and
get the footer value when the allocation in on the device.
Commit: 0222b5544e44ca8332fbf0e11948502d6abd887f
https://github.com/llvm/llvm-project/commit/0222b5544e44ca8332fbf0e11948502d6abd887f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129987)
Commit: afe14bb0e4c5694bf92e88112bef9f99d29430a9
https://github.com/llvm/llvm-project/commit/afe14bb0e4c5694bf92e88112bef9f99d29430a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#129990)
Commit: abcab4f7baed5a231b38fba4ef47ae5c69fba7de
https://github.com/llvm/llvm-project/commit/abcab4f7baed5a231b38fba4ef47ae5c69fba7de
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/tools/llvm-dwarfdump/Statistics.cpp
Log Message:
-----------
[llvm-dwarfdump] Avoid repeated hash lookups (NFC) (#129991)
Commit: 92dfc0ffc33414a14b3190e194c142cc99bbd61a
https://github.com/llvm/llvm-project/commit/92dfc0ffc33414a14b3190e194c142cc99bbd61a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-elf.cpp
Log Message:
-----------
[llvm-jitlink] Avoid repeated hash lookups (NFC) (#129993)
Commit: 3158525afdc3677457712963ef45c83f4f8f900f
https://github.com/llvm/llvm-project/commit/3158525afdc3677457712963ef45c83f4f8f900f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
Log Message:
-----------
[SLP]Fix non-determinism in reused elements analysis
Need to use consistent storages for unique elements, when going to
iterate over them to avoid non-determinism in reused elements analysis.
Fixes #130082
Commit: 93b022944c04634eb30689cb72f0fe0ac2cb5f0d
https://github.com/llvm/llvm-project/commit/93b022944c04634eb30689cb72f0fe0ac2cb5f0d
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
Log Message:
-----------
[OpenACC] fix 'loop' restriction of auto/seq/independent
We previously allowed duplicates of auto/seq/independent on a 'loop'
construct. This is disallowed by the restriction (which says exactly one
of...), so this patch ensures they are disallowed.
Commit: 31845cf06c2b1555a0bcf6adc116cc17469978e5
https://github.com/llvm/llvm-project/commit/31845cf06c2b1555a0bcf6adc116cc17469978e5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
R llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
Log Message:
-----------
Revert "[SLP]Fix non-determinism in reused elements analysis"
This reverts commit 3158525afdc3677457712963ef45c83f4f8f900f to fix
a bug revealed in https://lab.llvm.org/buildbot/#/builders/123/builds/14930
Commit: cc98b35d0d7eaedbf003163bb401d6ffbd51d5da
https://github.com/llvm/llvm-project/commit/cc98b35d0d7eaedbf003163bb401d6ffbd51d5da
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
Log Message:
-----------
[AMDGPU] Masked load vectortype test (#129703)
Commit: 6d89c042e3f28c1c5b8fd1ac5512df7020c9739b
https://github.com/llvm/llvm-project/commit/6d89c042e3f28c1c5b8fd1ac5512df7020c9739b
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove dead AnyOf reduction case in VPReductionRecipe. NFCI (#130048)
>From what I understand, we only create VPReductionRecipes for in-loop
reductions, and we don't currently support in-loop AnyOf reductions.
We only create VPReductionRecipes in the !PhiR->isInLoop() section of
adjustRecipesForReductions, and this comment from the initial patch
seems to confirm this
https://reviews.llvm.org/D108136#anchor-inline-1038338, so I think we
can remove this check in the condition logic.
I checked compiling SPEC 2017 with -prefer-inloop-predicates and the
added assertion doesn't trigger.
Commit: 68b1fe86283bd8ea7356fa9cbc126fe56178ab2d
https://github.com/llvm/llvm-project/commit/68b1fe86283bd8ea7356fa9cbc126fe56178ab2d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LivePhysRegs.h
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/LivePhysRegs.cpp
Log Message:
-----------
[LivePhysRegs] Use MCRegister instead of MCPhysReg in interface. NFC
Commit: d0b8f5d8b3e11b283695558c3bcdea7629e9838b
https://github.com/llvm/llvm-project/commit/d0b8f5d8b3e11b283695558c3bcdea7629e9838b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterBankInfo.h
M llvm/lib/CodeGen/RegisterBankInfo.cpp
Log Message:
-----------
[RegisterBankInfo] Use MCRegister instead of Register for getMinimalPhysRegClass. NFC
Commit: bdf50f029232d30e820dfc222bee8eecd3945155
https://github.com/llvm/llvm-project/commit/bdf50f029232d30e820dfc222bee8eecd3945155
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/DetectDeadLanes.h
M llvm/include/llvm/CodeGen/ExecutionDomainFix.h
M llvm/include/llvm/CodeGen/LiveRangeCalc.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/AllocationOrder.h
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/Localizer.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveRangeCalc.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/OptimizePHIs.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
Log Message:
-----------
[CodeGen] Use Register or MCRegister. NFC
Commit: 81089f0fd16e4eaae06f1a4be9611303c4f1cabf
https://github.com/llvm/llvm-project/commit/81089f0fd16e4eaae06f1a4be9611303c4f1cabf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/LiveIntervalUnion.cpp
M llvm/lib/CodeGen/LivePhysRegs.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MachineStableHash.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
Log Message:
-----------
[CodeGen] Use Register::id(). NFC
Commit: c628e8e9ea86a225af846875740d0189f7cd3722
https://github.com/llvm/llvm-project/commit/c628e8e9ea86a225af846875740d0189f7cd3722
Author: apple-fcloutier <75502309+apple-fcloutier at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/format-strings.c
Log Message:
-----------
[clang] Fix FP -Wformat in functions with 2+ attribute((format)) (#129954)
When defining functions with two or more format attributes, if the
format strings don't have the same format family, there is a false
positive warning that the incorrect kind of format string is being
passed at forwarded format string call sites.
This happens because we check that the format string family of each
format attribute is compatible before we check that we're using the
associated format parameter. The fix is to move the check down one
scope, after we've established that we are checking the right parameter.
Tests are updated to include a true negative and a true positive of this
situation.
Commit: 6e2fd4b269d0bd971e904aa07fddff19a7ec13bb
https://github.com/llvm/llvm-project/commit/6e2fd4b269d0bd971e904aa07fddff19a7ec13bb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
Log Message:
-----------
[ScheduleDAGInstrs] Use Register. NFC
Commit: ba9aeedf8e4b0ae3a62ee5a2234205b203f1286f
https://github.com/llvm/llvm-project/commit/ba9aeedf8e4b0ae3a62ee5a2234205b203f1286f
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/ranges_stable_sort.h
M libcxx/include/algorithm
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/ranges.stable.sort.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_dangling.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_omitting_invoke.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_proxy_iterators.pass.cpp
M libcxx/test/support/test_iterators.h
Log Message:
-----------
[libc++] Implement part of P2562R1: constexpr `ranges::stable_sort` (#128860)
Drive-by: Enables test coverage for `ranges::stable_sort` with proxy
iterators, and changes "constexpr in" to "constexpr since" in comments
in `<algorithm>`.
Commit: 16e051f0b9ad855e356073c32da6aecfcadf03c8
https://github.com/llvm/llvm-project/commit/16e051f0b9ad855e356073c32da6aecfcadf03c8
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/EHContGuardCatchret.cpp
A llvm/lib/CodeGen/EHContGuardTargets.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
M llvm/test/CodeGen/AArch64/cfi-fixup-multi-block-prologue.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
M llvm/test/CodeGen/AArch64/split-deadloop.mir
M llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
M llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
M llvm/test/CodeGen/AArch64/wineh9.mir
M llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir
M llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
M llvm/test/CodeGen/ARM/jump-table-dbg-value.mir
M llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
M llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
M llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
M llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir
M llvm/test/CodeGen/MIR/X86/exception-function-state.mir
M llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
M llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/stack-slot-coloring.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir
M llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir
M llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
M llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
M llvm/test/CodeGen/X86/align-basic-block-sections.mir
M llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir
M llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir
M llvm/test/CodeGen/X86/amx_tile_pair_copy.mir
M llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir
M llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir
M llvm/test/CodeGen/X86/apx/domain-reassignment.mir
M llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
M llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
M llvm/test/CodeGen/X86/break-false-dep-crash.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/CodeGen/X86/domain-reassignment.mir
M llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
M llvm/test/CodeGen/X86/peephole-test-after-add.mir
M llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
M llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir
M llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
M llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir
M llvm/test/MachineVerifier/verify-inlineasmbr.mir
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[win] NFC: Rename `EHCatchret` to `EHCont` to allow for EH Continuation targets that aren't `catchret` instructions (#129953)
This change splits out the renaming and comment updates from #129612 as a non-functional change.
Commit: c4c29b95a6e6809017e71e85f33faecfe85d88b2
https://github.com/llvm/llvm-project/commit/c4c29b95a6e6809017e71e85f33faecfe85d88b2
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
Log Message:
-----------
Revert "[NFC] Change the return type of `getTraversalScope` to `ArrayRef`"
This reverts commit 9189d84abbfc643db0053200c1c2e16b1e78e8f9.
ASan catches that someone actually DOES modify the collection somewhere
it looks.
Commit: 52552ce53babc1078c2d38587bb77609852bc0a2
https://github.com/llvm/llvm-project/commit/52552ce53babc1078c2d38587bb77609852bc0a2
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/AnnotateHighlightings.cpp
M clang/include/clang/AST/ASTContext.h
Log Message:
-----------
Reapply "[NFC] Change the return type of `getTraversalScope` to `ArrayRef`"
vitalybuka identified a fix here that fixes the issue, and lets us make
fewer copies! This applies his patch plus reapplys the original.
This reverts commit c4c29b95a6e6809017e71e85f33faecfe85d88b2.
Commit: 9ecb0f58ebb4faa2410dd8ee1fe4d2187aa3fbfc
https://github.com/llvm/llvm-project/commit/9ecb0f58ebb4faa2410dd8ee1fe4d2187aa3fbfc
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/bool-compare.c
M clang/test/Sema/parentheses.cpp
M clang/test/SemaCXX/bool-compare.cpp
M clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp
M clang/test/SemaTemplate/typo-dependent-name.cpp
M clang/test/SemaTemplate/typo-template-name.cpp
Log Message:
-----------
[Clang][diagnostics] Improve the diagnostics for chained comparisons (#129285)
Improve the diagnostics for chained comparisons to report actual
expressions and operators
Fixes #129069
Commit: 37aad2c1196ea3de242d855cfe38bc25a65d6f5e
https://github.com/llvm/llvm-project/commit/37aad2c1196ea3de242d855cfe38bc25a65d6f5e
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
Log Message:
-----------
[AMDGPU][NFC] Update premerged test from #129703 to reflect upstream (#130154)
Commit: a24523ac8dc07f3478311a5969184b922b520395
https://github.com/llvm/llvm-project/commit/a24523ac8dc07f3478311a5969184b922b520395
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/AST/ByteCode/cxx1z.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx98.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/p7.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.list/p7-0x.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg10xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg21xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/expr/expr.const/p3-0x.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p1-11.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p1.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p5.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.type/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p8-1y.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/multi-level-substitution.cpp
M clang/test/CXX/temp/temp.deduct/p9.cpp
M clang/test/CXX/temp/temp.param/p1.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/CXX/temp/temp.param/p15-cxx0x.cpp
M clang/test/CXX/temp/temp.param/p8-cxx20.cpp
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.constexpr/p2.cpp
M clang/test/CXX/temp/temp.spec/cxx1y-variable-template-no-body.cpp
M clang/test/CXX/temp/temp.spec/part.spec.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p20.cpp
M clang/test/Misc/integer-literal-printing.cpp
M clang/test/Modules/malformed-constraint-template-non-type-parm-decl.cpp
M clang/test/Modules/missing-body-in-import.cpp
M clang/test/Modules/template-default-args.cpp
M clang/test/Parser/MicrosoftExtensions.cpp
M clang/test/Parser/cxx-template-argument.cpp
M clang/test/Parser/cxx-template-template-recovery.cpp
M clang/test/Parser/cxx1z-class-template-argument-deduction.cpp
M clang/test/SemaCXX/access-base-class.cpp
M clang/test/SemaCXX/alias-template.cpp
M clang/test/SemaCXX/anonymous-struct.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression.cpp
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx98-compat-flags.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/implicit-member-functions.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaCXX/type-trait-common-type.cpp
M clang/test/SemaCXX/undefined-internal.cpp
M clang/test/SemaCXX/warn-deprecated-specializations-in-system-headers.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaObjCXX/parameterized_classes_subst.mm
M clang/test/SemaTemplate/alias-templates.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/default-arguments.cpp
M clang/test/SemaTemplate/instantiate-member-pointers.cpp
M clang/test/SemaTemplate/instantiate-template-template-parm.cpp
M clang/test/SemaTemplate/instantiation-default-1.cpp
M clang/test/SemaTemplate/instantiation-default-2.cpp
M clang/test/SemaTemplate/instantiation-dependence.cpp
M clang/test/SemaTemplate/instantiation-depth-defarg.cpp
M clang/test/SemaTemplate/instantiation-depth-exception-spec.cpp
M clang/test/SemaTemplate/instantiation-depth.cpp
M clang/test/SemaTemplate/ms-unqualified-base-class.cpp
M clang/test/SemaTemplate/nested-template.cpp
M clang/test/SemaTemplate/partial-spec-instantiate.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/test/SemaTemplate/temp_arg.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx11.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx2c.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/SemaTemplate/temp_arg_type.cpp
Log Message:
-----------
[clang] Implement instantiation context note for checking template parameters (#126088)
Instead of manually adding a note pointing to the relevant template
parameter to every relevant error, which is very easy to miss, this
patch adds a new instantiation context note, so that this can work using
RAII magic.
This fixes a bunch of places where these notes were missing, and is more
future-proof.
Some diagnostics are reworked to make better use of this note:
- Errors about missing template arguments now refer to the parameter
which is missing an argument.
- Template Template parameter mismatches now refer to template
parameters as parameters instead of arguments.
It's likely this will add the note to some diagnostics where the
parameter is not super relevant, but this can be reworked with time and
the decrease in maintenance burden makes up for it.
This bypasses the templight dumper for the new context entry, as the
tests are very hard to update.
This depends on #125453, which is needed to avoid losing the context
note for errors occuring during template argument deduction.
Commit: a907246fb29bd74dc025beb87a2ef1858a8d0dae
https://github.com/llvm/llvm-project/commit/a907246fb29bd74dc025beb87a2ef1858a8d0dae
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/CommandGuide/clang.rst
Log Message:
-----------
[Clang][Docs][NFC] Correct documentation for the CPATH environment variable (#129113)
Clang's prior documentation for the `CPATH` environment variable stated that
paths it specifies are added as system header search paths. The actual behavior
is that such paths are treated as though they were passed via `-I` options at
the end of the driver command line and are thus added as non-system (user)
header search paths.
The documentation additionally claimed that empty path entries in the `CPATH`
environment variable are ignored. This was also incorrect; Clang treats empty
entries as nominating the compiler's current working directory; as though `.`
was specified.
Clang's behavior is consistent with gcc as documented at
https://gcc.gnu.org/onlinedocs/gcc/Environment-Variables.html#index-CPATH.
This change aligns Clang's documentation with the behavior actually observed.
Additional editorial changes are included to clarify that the related
`C_INCLUDE_PATH`, `CPLUS_INCLUDE_PATH`, `OBJC_INCLUDE_PATH`, and
`OBJCPLUS_INCLUDE_PATH` environment variables specify additional paths that
are treated as system header search paths (in contrast to `CPATH`).
Fixes issue #49742.
Commit: 4959025bbc9e64cc58a1dfa0d9fe1c7162b3ade3
https://github.com/llvm/llvm-project/commit/4959025bbc9e64cc58a1dfa0d9fe1c7162b3ade3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
Log Message:
-----------
[SLP]Fix non-determinism in reused elements analysis
Need to use consistent storages for unique elements, when going to
iterate over them to avoid non-determinism in reused elements analysis.
Fixes #130082
Commit: 0efaad00a9fc595ecd861f027a5908c4484e04be
https://github.com/llvm/llvm-project/commit/0efaad00a9fc595ecd861f027a5908c4484e04be
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lld/COFF/Writer.cpp
R lld/test/COFF/arm64x-guardcf.s
Log Message:
-----------
Revert "[LLD][COFF] Support CF guards on ARM64X (#128440)"
This reverts commit 14bab65cbfb2bf9a410c3ce206a6b7a273441f26.
It causes lld-link to crash, posted repro at https://github.com/llvm/llvm-project/pull/128440#issuecomment-2702493683.
Commit: 710de09f17866c75e1b971059b3cb735fbbee408
https://github.com/llvm/llvm-project/commit/710de09f17866c75e1b971059b3cb735fbbee408
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIROpsEnums.h
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
A clang/include/clang/CIR/Interfaces/CIROpInterfaces.h
A clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/Interfaces/CMakeLists.txt
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CMakeLists.txt
A clang/lib/CIR/Interfaces/CIROpInterfaces.cpp
M clang/lib/CIR/Interfaces/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/IR/global-var-linkage.cir
M clang/test/CIR/IR/global.cir
A clang/test/CIR/global-var-linkage.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Upstream global variable linkage types (#129072)
This change implements variable linkage types in ClangIR except for
common linkage which requires Comdat support.
---------
Co-authored-by: Morris Hafner <mhafner at nvidia.com>
Co-authored-by: Henrich Lauko <xlauko at mail.muni.cz>
Commit: d01a06b844cca2000137b7257025d22d0adcfa80
https://github.com/llvm/llvm-project/commit/d01a06b844cca2000137b7257025d22d0adcfa80
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Testing/CMakeLists.txt
Log Message:
-----------
[clang][test] Fix shared build after Module Triple change. NFC
Commit: 6701669835113ff571f9d3230d7a4857c61d5e12
https://github.com/llvm/llvm-project/commit/6701669835113ff571f9d3230d7a4857c61d5e12
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Log Message:
-----------
[mlir][vector][nfc] Replace `failure()` with `notifyMatchFailure()` (#129278)
Updates some instances of plain `return failure();` in VectorToSCF.cpp
with `return notifyMatchFailure();` and a description (usually copied
from the nearby comment).
There's many more "plain" `return failure();` left, but ATM I only
have the cycles for the ones updated here.
Commit: d10dca6ba73c057e7c24624cd62ada8d75ecfd46
https://github.com/llvm/llvm-project/commit/d10dca6ba73c057e7c24624cd62ada8d75ecfd46
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Vector/vector-mask-lowering-transforms.mlir
Log Message:
-----------
[mlir][Vector] Move vector.insert canonicalizers for DenseElementsAttr to folders (#128040)
This PR moves vector.insert canonicalizers for DenseElementsAttr (splat
and non splat case) to folders. Folders are local, and it's always
better to implement a folder than a canonicalizer.
This PR is mostly NFC-ish, because the functionality mostly remains
same, but is now run as part of a folder, which is why some tests are
changed, because GreedyPatternRewriter tries to fold by default.
Commit: 1a09adae9ffc1267f79b6c9a656da38812bcbdff
https://github.com/llvm/llvm-project/commit/1a09adae9ffc1267f79b6c9a656da38812bcbdff
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libc/docs/headers/index.rst
M libc/docs/headers/math/index.rst
R libc/docs/headers/math/stdfix.rst
A libc/docs/headers/stdfix.rst
Log Message:
-----------
[libc] Add link to stdfix.h on headers page (#129138)
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: a17a155081fc758b20a44c7f036a970471b08b8a
https://github.com/llvm/llvm-project/commit/a17a155081fc758b20a44c7f036a970471b08b8a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-restart-preempted-jobs.yaml
Log Message:
-----------
[Github][libc++] Prefer ubuntu-24.04 over ubuntu-latest (#129949)
This patch replaces all instances of ubuntu-latest with ubuntu-24.04
based on the guidelines in the LLVM CI best practices doc
(https://llvm.org/docs/CIBestPractices.html).
Commit: 0ce4b685d2f46b389887aeb8d1d16d5d15f7ecce
https://github.com/llvm/llvm-project/commit/0ce4b685d2f46b389887aeb8d1d16d5d15f7ecce
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/merged-prs.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-request-release-note.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/version-check.yml
Log Message:
-----------
[Github] Prefer ubuntu-24.04 over ubuntu-latest (#129936)
This patch replaces all instances of ubuntu-latest with ubuntu-24.04
(outside of the entries in libc++) based on the guidelines in the LLVM
CI best practices doc (https://llvm.org/docs/CIBestPractices.html).
Commit: 7a44ff13d97475f0de38c8799dec86be0d0de0ac
https://github.com/llvm/llvm-project/commit/7a44ff13d97475f0de38c8799dec86be0d0de0ac
Author: Dmitry Sidorov <dmitry.sidorov at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-empty-md.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
Log Message:
-----------
[SPIR-V] Add SPV_INTEL_memory_access_aliasing extension (#129800)
Spec can be found here https://github.com/intel/llvm/pull/15225
TODO for future patches:
- During spec review need to decide whether only FunctionCall or Atomic
instructions can be decorated and if not - move the code around adding
handling for other instructions;
- Handle optional string metadata;
- Handle LLVM atomic instructions;
- Handle SPIR-V friendly atomic calls returning via sret argument.
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov at intel.com>
Commit: 1df59b381746ecf36d638404092e0aeedddf0a58
https://github.com/llvm/llvm-project/commit/1df59b381746ecf36d638404092e0aeedddf0a58
Author: Michael Jones <michaelrj at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for float16 math (#129965)
Add targets for some float16 math functions that were missing them, but
mostly add targets for the smoke tests.
Commit: 5f70ed5bdad826e3842da3ce86e54bef8df95dbe
https://github.com/llvm/llvm-project/commit/5f70ed5bdad826e3842da3ce86e54bef8df95dbe
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
Log Message:
-----------
[nfc] Small fixups (coding style) post- PR #129626 (#129935)
Commit: d58c793673095195c46366fe19f151a68a029820
https://github.com/llvm/llvm-project/commit/d58c793673095195c46366fe19f151a68a029820
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/lib/Pass/Pass.cpp
Log Message:
-----------
Pass: Do not use llvm::array_pod_sort to sort OpPassManagers.
OpPassManager contains a field of type std::unique_ptr which
is not guaranteed to be trivially relocatable so we cannot use
llvm::array_pod_sort.
Reviewers: River707, joker-eph
Reviewed By: joker-eph
Pull Request: https://github.com/llvm/llvm-project/pull/129968
Commit: 00f3089c2e394f219e1a78e5cc39f9bfd5a8a8e2
https://github.com/llvm/llvm-project/commit/00f3089c2e394f219e1a78e5cc39f9bfd5a8a8e2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use PatternMatch in emitTransformedIndex (NFC) (#130081)
Commit: ddffb74afd870d284ba07f1cf6c67117a8ab8b33
https://github.com/llvm/llvm-project/commit/ddffb74afd870d284ba07f1cf6c67117a8ab8b33
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
Log Message:
-----------
[LV] Strip unreachable SCEV-check blocks (#130079)
emitSCEVChecks checks if SCEVCheckCond matches zero, and returns
nullptr. However, it sets SCEVCheckCond as used before it does this,
which prevents it from being removed during cleanup, resulting in
unreachable blocks being emitted. Fix this.
Commit: c9e250af8e4a6b8e83ad4a3b6216f8229e00aff5
https://github.com/llvm/llvm-project/commit/c9e250af8e4a6b8e83ad4a3b6216f8229e00aff5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[LoopUtils] Rename a var in addDiffRuntimeChecks (NFC) (#130128)
Commit: 1b75b9e665ee3c43de85c25f8d5f10d4efb3ca39
https://github.com/llvm/llvm-project/commit/1b75b9e665ee3c43de85c25f8d5f10d4efb3ca39
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/ParserOpenACC/parse-constructs.cpp
M clang/test/SemaOpenACC/routine-construct-ast.cpp
A clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/test/SemaOpenACC/routine-construct.cpp
M clang/test/SemaOpenACC/unimplemented-construct.c
Log Message:
-----------
[OpenACC] Handle sema for gang, worker, vector, seq clauses on routine
These 4 clauses are mutually exclusive, AND require at least one of
them. Additionally, gang has some additional restrictions in that only
the 'dim' specifier is permitted. This patch implements all of this, and
ends up refactoring the handling of each of these clauses for
readabililty.
Commit: 72376e19df71bf7232e10896b80e19a29df5bd57
https://github.com/llvm/llvm-project/commit/72376e19df71bf7232e10896b80e19a29df5bd57
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unused VPWidenIntrinsicRecipe constructor (NFC)
Commit: 1073a23ca089cc63b7cf9ed811cfed451c9631ff
https://github.com/llvm/llvm-project/commit/1073a23ca089cc63b7cf9ed811cfed451c9631ff
Author: Paige Lewis <51000738+pxigelewis at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
Log Message:
-----------
Updating variable names (#130136)
Updating variable names within the SystemZAsmParser to comply with
naming conventions.
Co-authored-by: Paige Lewis <paige.lewis at ibm.com>
Commit: 50219c8af22f9b1b7b3c6e584ded75611f612abf
https://github.com/llvm/llvm-project/commit/50219c8af22f9b1b7b3c6e584ded75611f612abf
Author: Marcus Boay <marcusboay at hotmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.h
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
Log Message:
-----------
[PowerPC] [NFC] Refine PowerPC GISel files according to clang-tidy checks (#129780)
Code cleanup for PowerPC GISel files such as renaming header guards and
removing unused includes.
Commit: 5b9e1a57580c2589b84b2c37474795656574b7e1
https://github.com/llvm/llvm-project/commit/5b9e1a57580c2589b84b2c37474795656574b7e1
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86Operand.h
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrOperands.td
M llvm/test/MC/X86/I386-32.s
M llvm/test/MC/X86/I386-64.s
M llvm/test/MC/X86/intel-syntax.s
M llvm/test/MC/X86/validate-inst-intel.s
M llvm/utils/TableGen/X86RecognizableInstr.cpp
Log Message:
-----------
[X86][AsmParser] Improve rel8 validation (#126073)
* Check the size of immediate operand of rel8
* Rename AbsMem16 related names to AbsMemMode16 to disambiguate mem size
and mode checks.
Commit: 996092d5a508c02d52cfc2be550f1cf57e9ae648
https://github.com/llvm/llvm-project/commit/996092d5a508c02d52cfc2be550f1cf57e9ae648
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
[flang] probably convert Fortran logical to i1 in expanding hlfir.maxloc/hlfir.minloc opcodes (#129791)
If mask is a scalar, it always converts to !fir.box<!fir.array<1xi1>>.
The wrong value may be picked up when passing to the function
on the big endian platform. This patch is to do the conversion
based on the original type of the mask and convert the value to
i1 after the load.
Commit: 7d8da04c26bffd9da4461eef181df39c46292fa3
https://github.com/llvm/llvm-project/commit/7d8da04c26bffd9da4461eef181df39c46292fa3
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/SemaOpenACC/routine-construct-ast.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'nohost' construct AST/Sema
'nohost' is only valid on routine, and states that the compiler
shouldn't compile this routine for the host. It has no arguments, so no
checking is required besides putting it in the AST.
Commit: 73b2ad51f46e67d00cbc7394a2c1cf9b3316cf92
https://github.com/llvm/llvm-project/commit/73b2ad51f46e67d00cbc7394a2c1cf9b3316cf92
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[www] Add papers from Graz
These are the papers accepted at the recent WG14 meeting in Graz which
impact the compiler.
Commit: 22eab44aaee11106eccdffa66fef160b4876c845
https://github.com/llvm/llvm-project/commit/22eab44aaee11106eccdffa66fef160b4876c845
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[www] Update for Clang 20 release
Commit: 9a0e652ec7e38b4ae18b744071d4d3906210bc04
https://github.com/llvm/llvm-project/commit/9a0e652ec7e38b4ae18b744071d4d3906210bc04
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
Log Message:
-----------
[www] Update the C++ status pages for Clang 20
Commit: 542d52b1e8a0a7e04538f608487603124c70e1ab
https://github.com/llvm/llvm-project/commit/542d52b1e8a0a7e04538f608487603124c70e1ab
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/include/lldb/Expression/IRExecutionUnit.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/CMakeLists.txt
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
A lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
A lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.h
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
Log Message:
-----------
[lldb][Expression] Allow specifying a preferred ModuleList for lookup during expression evaluation (#129733)
The `TestMemoryHistory.py`/`TestReportData.py` are currently failing on
the x86 macOS CI (started after we upgraded the Xcode SDK on that
machien). The LLDB ASAN utility expression is failing to run with
following error:
```
(lldb) image lookup -n __asan_get_alloc_stack
1 match found in /usr/lib/system/libsystem_sanitizers.dylib:
Address: libsystem_sanitizers.dylib[0x00007ffd11e673f7] (libsystem_sanitizers.dylib.__TEXT.__text + 11287)
Summary: libsystem_sanitizers.dylib`__asan_get_alloc_stack
1 match found in /Users/michaelbuch/Git/lldb-build-main-no-modules/lib/clang/21/lib/darwin/libclang_rt.asan_osx_dynamic.dylib:
Address: libclang_rt.asan_osx_dynamic.dylib[0x0000000000009ec0] (libclang_rt.asan_osx_dynamic.dylib.__TEXT.__text + 34352)
Summary: libclang_rt.asan_osx_dynamic.dylib`::__asan_get_alloc_stack(__sanitizer::uptr, __sanitizer::uptr *, __sanitizer::uptr, __sanitizer::u32 *) at asan_debugging.cpp:132
(lldb) memory history 'pointer'
Assertion failed: ((uintptr_t)addr == report.access.address), function __asan_get_alloc_stack, file debugger_abi.cpp, line 62.
warning: cannot evaluate AddressSanitizer expression:
error: Expression execution was interrupted: signal SIGABRT.
The process has been returned to the state before expression evaluation.
```
The reason for this is that the system sanitizer dylib and the locally
built libclang_rt contain the same symbol `__asan_get_alloc_stack`, and
depending on the order in which they're loaded, we may pick the one from
the wrong dylib (this probably changed during the buildbot upgrade and
is why it only now started failing). Based on discussion with @wrotki we
always want to pick the one that's in the libclang_rt dylib if it was
loaded, and libsystem_sanitizers otherwise.
This patch addresses this by adding a "preferred lookup context list" to
the expression evaluator. Currently this is only exposed in the
`EvaluateExpressionOptions`. We make it a `SymbolContextList` in case we
want the lookup contexts to be contexts other than modules (e.g., source
files, etc.). In `IRExecutionUnit` we make it a `ModuleList` because it
makes the symbol lookup implementation simpler and we only do module
lookups here anyway. If we ever need it to be a `SymbolContext`, that
transformation shouldn't be too difficult.
Commit: a7a65a824ed6cb9dec6b4b858c8479b2da5e9752
https://github.com/llvm/llvm-project/commit/a7a65a824ed6cb9dec6b4b858c8479b2da5e9752
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/descriptor.cpp
Log Message:
-----------
[flang] explicitly cast the pointer to void* in std::memcpy calls (NFC) (#129946)
This patch is to add the explicit cast to the first argument of std::memcpy.
Commit: 1493f420600b4a4284a6bb08f1867ecb7bebdcbb
https://github.com/llvm/llvm-project/commit/1493f420600b4a4284a6bb08f1867ecb7bebdcbb
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[OpenACC] Add test changes missed in 7d8da04
Looks like I did a bad job with git and ended up having some failed
tests! This should fix those.
Commit: 5f6b058c6a52bfc6b79b1ed0ece815a63ff75c96
https://github.com/llvm/llvm-project/commit/5f6b058c6a52bfc6b79b1ed0ece815a63ff75c96
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
Log Message:
-----------
[DirectX] Match DXC when storing `RWBuffer<float>` (#129911)
Update the lowering of `llvm.dx.resource.store.typedbuffer` to match DXC
and repeat the first element in cases where we are storing fewer than 4
elements.
Fixes #128110
Commit: f3effc24004a99c6167680a66b1f95bde3c268f4
https://github.com/llvm/llvm-project/commit/f3effc24004a99c6167680a66b1f95bde3c268f4
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3347.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to N3347
This paper made it a constraint violation to have a tentative
definition with internal linkage which is not completed by the end of
the translation unit.
This has been diagnosed as an error since at least Clang 3.0, so no
changes are needed.
Commit: 3492245ac07ca68f434035c6577f55c790270354
https://github.com/llvm/llvm-project/commit/3492245ac07ca68f434035c6577f55c790270354
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Sema/SemaRISCV.cpp
A clang/test/Sema/riscv-interrupt-attr-qci.c
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
A llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
A llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
Log Message:
-----------
[RISCV] QCI Interrupt Support (#129957)
This change adds support for `qci-nest` and `qci-nonest` interrupt
attribute values. Both of these are machine-mode interrupts, which use
instructions in Xqciint to push and pop A- and T-registers (and a few
others) from the stack.
In particular:
- `qci-nonest` uses `qc.c.mienter` to save registers at the start of the
function, and uses `qc.c.mileaveret` to restore those registers and
return from the interrupt.
- `qci-nest` uses `qc.c.mienter.nest` to save registers at the start of
the function, and uses `qc.c.mileaveret` to restore those registers and
return from the interrupt.
- `qc.c.mienter` and `qc.c.mienter.nest` both push registers ra, s0
(fp), t0-t6, and a0-a10 onto the stack (as well as some CSRs for the
interrupt context). The difference between these is that
`qc.c.mienter.nest` re-enables M-mode interrupts.
- `qc.c.mileaveret` will restore the registers that were saved by
`qc.c.mienter(.nest)`, and return from the interrupt.
These work for both standard M-mode interrupts and the non-maskable
interrupt CSRs added by Xqciint.
The `qc.c.mienter`, `qc.c.mienter.nest` and `qc.c.mileaveret`
instructions are compatible with push and pop instructions, in as much
as they (mostly) only spill the A- and T-registers, so we can use the
`Zcmp` or `Xqccmp` instructions to spill the S-registers. This
combination (`qci-(no)nest` and `Xqccmp`/`Zcmp`) is not implemented in
this change.
The `qc.c.mienter(.nest)` instructions have a specific register storage
order so they preserve the frame pointer convention linked list past the
current interrupt handler and into the interrupted code and frames if
frame pointers are enabled.
Co-authored-by: Pankaj Gode <quic_pgode at quicinc.com>
Commit: 462eb7e28ef4507b16a4b45efb356bc6a3523615
https://github.com/llvm/llvm-project/commit/462eb7e28ef4507b16a4b45efb356bc6a3523615
Author: DianQK <dianqk at dianqk.net>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Analysis/ValueTracking/phi-self.ll
Log Message:
-----------
[ValueTracking] Skip incoming values that are the same as the phi in `isGuaranteedNotToBeUndefOrPoison` (#130111)
Fixes (keep it open) #130110.
If the incoming value is PHI itself, we can skip this. If we can
guarantee that the other incoming values are neither undef nor poison,
then we can also guarantee that the value isn't either. If we cannot
guarantee that, it makes no sense in calculating it.
Commit: 27c788de759472316169795fa06d592221ac602e
https://github.com/llvm/llvm-project/commit/27c788de759472316169795fa06d592221ac602e
Author: John Harrison <harjohn at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
Log Message:
-----------
[lldb-dap] Restore the override FD used by the output redirect on stop. (#129964)
While running lldb-dap over stdin/stdout the `stdout` and `stderr` FD's
are replaced with a pipe that is reading the output to forward to the
dap client. During shutdown we were not properly restoring those FDs,
which means if any component attempted to write to stderr it would
trigger a SIGPIPE due to the pipe being closed during the shutdown
process. This can happen if we have an error reported from the
`DAP::Loop` call that would then log to stderr, such as an error parsing
a malformed DAP message or if lldb-dap crashed and it was trying to
write the stack trace to stderr.
There is one place we were not handling an `llvm::Error` if there was no
logging setup that could trigger this condition.
To address this, I updated the OutputRedirector to restore the FD to the
prior state when `Stop` is called.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: eac734aab6b62518a0cd7aa3b20a990fef360b2c
https://github.com/llvm/llvm-project/commit/eac734aab6b62518a0cd7aa3b20a990fef360b2c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libc/docs/headers/stdfix.rst
Log Message:
-----------
[libc][docs] Fix libc docs build post #129138 (#130184)
The docs build action was failing with libc due to checks.rst not
existing in the expected path. This patch adjusts the path to the actual
path which seems to make everything happy. It seems like this did not
show up before as stdfix.rst was not included in a place that actually
caused it to get picked up by sphinx.
Commit: e4157218584bd7f02a3345a4473c9e5937f068e8
https://github.com/llvm/llvm-project/commit/e4157218584bd7f02a3345a4473c9e5937f068e8
Author: John Harrison <harjohn at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/OutputRedirector.cpp
Log Message:
-----------
[lldb-dap] Correct the variable name from a half finished merge. (#130186)
Commit: 472c2e3578e35e157c58d7011edecd3390a3087f
https://github.com/llvm/llvm-project/commit/472c2e3578e35e157c58d7011edecd3390a3087f
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/test/Conversion/TosaToArith/tosa-to-arith.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor-invalid.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/constant-reciprocal-fold.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Update value to values for ConstOp and ConstShapeOp (#129943)
Updated the dialect to match TOSA v1.0 specification for ConstOp and
ConstShapeOp (https://www.mlplatform.org/tosa/tosa_spec.html#_const).
Also updated lit tests
---------
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: 29d3fc3f11d272a72ac255af9277c740f26c3dfc
https://github.com/llvm/llvm-project/commit/29d3fc3f11d272a72ac255af9277c740f26c3dfc
Author: aankit-ca <quic_aankit at quicinc.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/test/CodeGen/Hexagon/autohvx/fp-to-int.ll
M llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
A llvm/test/CodeGen/Hexagon/isel/extract-subvec.ll
Log Message:
-----------
[HEXAGON] Fix hvx-isel for extract_subvector op (#129672)
Fixes a crash with extract_subvectors in Hexagon backend seen when the
source vector is a vector-pair and result vector is not hvx vector size.
LLVM Issue: https://github.com/llvm/llvm-project/issues/128775
Fixes #128775
---------
Co-authored-by: aankit-quic <aankit at quicinc.com>
Commit: 93f0f3d33be596321730e9194cf24a73a75ce702
https://github.com/llvm/llvm-project/commit/93f0f3d33be596321730e9194cf24a73a75ce702
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
A clang/test/Sema/shift-bool.cpp
Log Message:
-----------
[Clang] add -Wshift-bool warning to handle shifting of bool (#127336)
Fixes #28334
---
This PR introduces the `-Wshift-bool` warning to detect and warn against
shifting `bool` values using the `>>` operator. Shifting a `bool`
implicitly converts it to an `int`, which can lead to unintended
behavior.
Commit: 813325e5d44c01f50aaca035629fcba8157fd5c0
https://github.com/llvm/llvm-project/commit/813325e5d44c01f50aaca035629fcba8157fd5c0
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
Log Message:
-----------
[Clang][NFC] Change uses of getAs() to castAs() where the target type is assured. (#130188)
Static analysis identified two uses of `getAs()` for which the result
pointer was unconditionally dereferenced. Source code inspection
confirmed that the target type is assured by prior checks. This change
replaces these uses of `getAs()` with `castAs()`.
The first case, in `clang/lib/CodeGen/Targets/AArch64.cpp`, performs a
cast to `BuiltinType` following a check for `isBuiltinType()`.
The second case, in `clang/lib/Sema/SemaTemplateVariadic.cpp`, performs
a cast to `PackExpansionType` on the result of a call to `getAsType()`
on an object of type `TemplateArgument` following confirmation that
`isPackExpansion()` returned true and that `getKind()` returned
`TemplateArgument::Type`. Inspection of `isPackExpansion()` revealed
that it only returns true when the template argument kind is
`TemplateArgument::Type` if `isa<PackExpansionType>(getAsType())` is
true.
Commit: bf129547153433ae66dd526032c734238ca5168d
https://github.com/llvm/llvm-project/commit/bf129547153433ae66dd526032c734238ca5168d
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
[AMDGPU] Whitelist all intrinsics (#130150)
For code maintainability -- this may result in cases where we are
applying the optimization where it is not profitable, but those are
likely to be rare.
Commit: 6916438b65ee26ac75684dfceb4bdb7e87841ff7
https://github.com/llvm/llvm-project/commit/6916438b65ee26ac75684dfceb4bdb7e87841ff7
Author: Derek Schuff <dschuff at chromium.org>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/test/CodeGen/WebAssembly/libcalls.ll
Log Message:
-----------
[WebAssembly] Add Libcall signatures for modf and variants (#130201)
Clang now lowers modf/modff/modfl as builtins using the llvm.modf
intrinsic.
Commit: 410a5b151888131b727826d9b030b7df134dacc9
https://github.com/llvm/llvm-project/commit/410a5b151888131b727826d9b030b7df134dacc9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
Log Message:
-----------
Local: Handle noalias.addrspace in copyMetadataForLoad (#130123)
Commit: 9a65dc95133fba5e05eda3bb7b14f061d56dcd0b
https://github.com/llvm/llvm-project/commit/9a65dc95133fba5e05eda3bb7b14f061d56dcd0b
Author: Ajay Raj <127104337+ajayrajsaini at users.noreply.github.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/sysexits-macros.h
A libc/include/sysexits.h.def
A libc/include/sysexits.yaml
Log Message:
-----------
Add sysexits.h header with BSD exit codes (total-18) (#126112)
This pull request adds a new header file, SysExits.h, to the LLVM
project. The header includes 18 BSD exit code.
Commit: f0c2c71d2c4094fe64d6c765330ee72c14deda20
https://github.com/llvm/llvm-project/commit/f0c2c71d2c4094fe64d6c765330ee72c14deda20
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove dead checks for subregister def mismatch (#130084)
Commit: 397696bb3d26c1298bf265e4907b0b6416ad59c9
https://github.com/llvm/llvm-project/commit/397696bb3d26c1298bf265e4907b0b6416ad59c9
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
A lldb/test/API/macosx/no-nlist-memory-module/Makefile
A lldb/test/API/macosx/no-nlist-memory-module/TestNoNlistsDylib.py
A lldb/test/API/macosx/no-nlist-memory-module/has-nlists.c
A lldb/test/API/macosx/no-nlist-memory-module/main.c
A lldb/test/API/macosx/no-nlist-memory-module/no-nlist-sect.s
A lldb/test/API/macosx/no-nlist-memory-module/no-nlists.c
Log Message:
-----------
[lldb][Mach-O] Don't read symbol table of specially marked binary (#129967)
We have a binary image on Darwin that has no code, only metadata. It has
a large symbol table with many external symbol names that will not be
needed in the debugger. And it is possible to not have this binary on
the debugger system - so lldb must read all of the symbol names out of
memory, one at a time, which can be quite slow.
We're adding a section __TEXT,__lldb_no_nlist, to this binary to
indicate that lldb should not read the nlist symbols for it when we are
reading out of memory. If lldb is run with an on-disk version of the
binary, we will load the symbol table as we normally would, there's no
benefit to handling this binary differently.
I added a test where I create a dylib with this specially named section,
launch the process. The main binary deletes the dylib from the disk so
lldb is forced to read it out of memory. lldb attaches to the binary,
confirms that the dylib is present in the process and is a memory
Module. If the binary is not present, or lldb found the on-disk copy
because it hasn't been deleted yet, we delete the target, flush the
Debugger's module cache, sleep and retry, up to ten times. I create the
specially named section by compiling an assembly file that puts a byte
in the section which makes for a bit of a messy Makefile (the pre-canned
actions to build a dylib don't quite handle this case) but I don't think
it's much of a problem. This is a purely skipUnlessDarwin test case.
rdar://146167816
Commit: 1b284c50818ac034693518655142c6c2056a9597
https://github.com/llvm/llvm-project/commit/1b284c50818ac034693518655142c6c2056a9597
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
Log Message:
-----------
AMDGPU: Fix gfx950 ashr pk i8/u8 patterns (#130040)
The correct version of the pattern got lost in a merge somewhere
Commit: a6e69db52ff7891febf88642179175e3bf91628e
https://github.com/llvm/llvm-project/commit/a6e69db52ff7891febf88642179175e3bf91628e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove subreg def check for insert_subreg (#130085)
Commit: c22db56d7766fe704298b81b548fa6004a9d312c
https://github.com/llvm/llvm-project/commit/c22db56d7766fe704298b81b548fa6004a9d312c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/test/CodeGen/X86/pr41619.ll
Log Message:
-----------
PeepholeOpt: Remove subreg def check for bitcast (#130086)
Subregister defs are illegal in SSA. Surprisingly this enables folding
into subregister insert patterns in one test.
Commit: 3304a430f291e31c6b71ff73a1b44f51456dca56
https://github.com/llvm/llvm-project/commit/3304a430f291e31c6b71ff73a1b44f51456dca56
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_math.h
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
clang/HIP: Do not call ocml in scalbln implementations (#129639)
I do not understand why this was calling the float version with
an implicit cast from the long. Just clamp to the bounds of int,
and use the generic ldexp (this is also how musl does it, except
scalbnf is the base implementation there).
Somehow INT_MIN was also not defined, so deal with that.
Commit: 00fdc5297e2ac325eeaa08e1bc8ebe3b8b5f7977
https://github.com/llvm/llvm-project/commit/00fdc5297e2ac325eeaa08e1bc8ebe3b8b5f7977
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/test/API/macosx/no-nlist-memory-module/Makefile
Log Message:
-----------
Add LDFLAGS to fix bot failure
a CI bot is failing with my manual $(LD) invocations,
I see another test invoking ld like this which also
passes $LDFLAGS, let's see if that does it.
Commit: ca0850f916a75a16264798fe7b7be08fdb892c97
https://github.com/llvm/llvm-project/commit/ca0850f916a75a16264798fe7b7be08fdb892c97
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
Log Message:
-----------
[lldb] Objective-C runtime: Work around a bug in the shared cache builder (#130209)
where it can overflow a 2GB offset by just a little bit by applying a
heuristic.
rdar://145888306
Commit: 4a0212b9fcaab05900628bc58d3ec019d0a570bf
https://github.com/llvm/llvm-project/commit/4a0212b9fcaab05900628bc58d3ec019d0a570bf
Author: Rifet-c <aleksandr.levin at codasip.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
Log Message:
-----------
[CodeGen] Combine two loops in SlotIndexes.cpp file (#127631)
Merged two loops that were iterating over the same machine basic block
into one, also did some minor readability improvements (variable
renaming, commenting and absorbing if condition into a variable)
Commit: cec36e279cb871dd011e105e0c9d3edccd0dcad9
https://github.com/llvm/llvm-project/commit/cec36e279cb871dd011e105e0c9d3edccd0dcad9
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/test/API/macosx/no-nlist-memory-module/Makefile
Log Message:
-----------
Revert "Add LDFLAGS to fix bot failure"
This reverts commit 00fdc5297e2ac325eeaa08e1bc8ebe3b8b5f7977.
Commit: 82af9888dbbcd248ec4d41968c53135e12e13454
https://github.com/llvm/llvm-project/commit/82af9888dbbcd248ec4d41968c53135e12e13454
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
R lldb/test/API/macosx/no-nlist-memory-module/Makefile
R lldb/test/API/macosx/no-nlist-memory-module/TestNoNlistsDylib.py
R lldb/test/API/macosx/no-nlist-memory-module/has-nlists.c
R lldb/test/API/macosx/no-nlist-memory-module/main.c
R lldb/test/API/macosx/no-nlist-memory-module/no-nlist-sect.s
R lldb/test/API/macosx/no-nlist-memory-module/no-nlists.c
Log Message:
-----------
Revert "[lldb][Mach-O] Don't read symbol table of specially marked binary (#129967)"
This reverts commit 397696bb3d26c1298bf265e4907b0b6416ad59c9.
This breaks the macOS CI bots, I need to use $LDFLAGS in the $LD
invocation when building the dylib to get the dylibs to build on
the CI bots. But I've added "-lno-nlists -lhas-nlists" to the LDFLAGS
for the main binary in the same directory, so using LDFLAGS will
result in a compile error for the dylibs. I'll need to build the
dylibs in a subdir with a different Makefile, will reland with that
change in a bit.
Commit: 0a63eb882a7d7630357adb6d101e08930e625e1f
https://github.com/llvm/llvm-project/commit/0a63eb882a7d7630357adb6d101e08930e625e1f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
Log Message:
-----------
[TargetRegisterInfo][ARM] Use MCRegister in isInlineAsmReadOnlyReg interface. NFC (#130149)
Commit: 49bb51ed91b8f9a6bfa41d5e408ea5a928983f74
https://github.com/llvm/llvm-project/commit/49bb51ed91b8f9a6bfa41d5e408ea5a928983f74
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
Log Message:
-----------
[RISCV][LibCall] Add libcall for i64 -> bf16 (#130024)
Add support for lowering i64 -> bf16 with libcall.
Commit: 7a7fe6e8ca1c37826d2502a7e55b6008b3f44f77
https://github.com/llvm/llvm-project/commit/7a7fe6e8ca1c37826d2502a7e55b6008b3f44f77
Author: Augie Fackler <augie at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] fix libc deps for 542d52b1e8a0a7e04538f608487603124c70e1ab
Commit: c95dc2d439a0d2384dcd8dd81ea0028262acecff
https://github.com/llvm/llvm-project/commit/c95dc2d439a0d2384dcd8dd81ea0028262acecff
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
Log Message:
-----------
[clang][test] Fix -DBUILD_SHARED_LIBS build by adding depency on Targ… (#130105)
…etParser from clangTesting
Commit 979c275097a642e9b96c6b0a12f013c831af3a6e (#129868) introduced a
dependency on the llvm::Triple::Triple in `lookupTarget`. This is part
of TargetParser, which wasn't listed in
clang/lib/Testing/CMakeLists.txt. This broke the
-DBUILD_SHARED_LIBS=True builds.
Fixes #130112
Commit: ca39a029b66e3f6d8b70fb3fe437d5c024643d6d
https://github.com/llvm/llvm-project/commit/ca39a029b66e3f6d8b70fb3fe437d5c024643d6d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Fix 'gpuintrin.h' match when included with no arch set (#129927)
Summary:
These require `+ptx` features to be set even though they're guarded by
the `__nvvm_reflect`. Rather than figure out how to hack around that
with the `target` attribute I'm just going to disable it for 'generic'
builds and use the slow version for now.
Commit: 94c937d32195693bdcac34260d156b4ea55ca9d6
https://github.com/llvm/llvm-project/commit/94c937d32195693bdcac34260d156b4ea55ca9d6
Author: Augie Fackler <augie at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] fix lldb deps some more
Commit: e5c5e621e65b124d6d7231fc5715b1f54016f81e
https://github.com/llvm/llvm-project/commit/e5c5e621e65b124d6d7231fc5715b1f54016f81e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
Log Message:
-----------
[gn] Make sync script sync .mm files too
Motivated by #129332, which added a new .mm file that didn't get
autosynced.
Commit: 2e53856bdaa1e5a9bcde0a5b7b1ff9362265bd37
https://github.com/llvm/llvm-project/commit/2e53856bdaa1e5a9bcde0a5b7b1ff9362265bd37
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/macosx/objcxx/BUILD.gn
Log Message:
-----------
[gn build] Port 6c4febee2992
Commit: 7425af4b7aaa31da10bd1bc7996d3bb212c79d88
https://github.com/llvm/llvm-project/commit/7425af4b7aaa31da10bd1bc7996d3bb212c79d88
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
A llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
A llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir
Log Message:
-----------
AMDGPU: Add pseudoinstruction for agpr or vgpr constants (#130042)
Commit: f5eeeec4d3f492a1d879a1b5cd8ae6befe786f77
https://github.com/llvm/llvm-project/commit/f5eeeec4d3f492a1d879a1b5cd8ae6befe786f77
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[MachinePipeliner] Use Register. NFC (#130165)
Commit: d5cef39d7411b3c48e5c2160f1e4711edc24dcd3
https://github.com/llvm/llvm-project/commit/d5cef39d7411b3c48e5c2160f1e4711edc24dcd3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/attr-require-constant-initialization.cpp
Log Message:
-----------
[Clang] Make '-Wglobal-constructors` work on the GNU attributes (#129917)
Summary:
The `-Wglobal-constructors` option is useful for restricting the usage
of global constructors / destructors. However, it currently ignores the
attributes that introduce global constructors, meaning that the module
can still have ctors if `-Werror` is set. If this is intentional by the
user, I believe it would be more correct to push the diagnostic.
Commit: 5b1c281fca01373c95d9ddf59bdb59e9ae2ae4ff
https://github.com/llvm/llvm-project/commit/5b1c281fca01373c95d9ddf59bdb59e9ae2ae4ff
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
Log Message:
-----------
[LLDB][Docstrings] Fix some poorly formatted Docstrings (#129605)
I was looking earlier on the public doc website, and noticed the
markdown was very badly mangled for this recent docstring that I added.
So I'm dropping the backticks and just leaving the snippet.
Commit: 2bd9f268b498191e3ce1802b8ce6eb734f8fe856
https://github.com/llvm/llvm-project/commit/2bd9f268b498191e3ce1802b8ce6eb734f8fe856
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-splatvector-s64-rv32.mir
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
Log Message:
-----------
[RISCV] Fix typo. +Zve64x -> zve64x.
Commit: 93b3cbadc2b624f5daf0ce000684c3c154d0aca4
https://github.com/llvm/llvm-project/commit/93b3cbadc2b624f5daf0ce000684c3c154d0aca4
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
Log Message:
-----------
[RISCV] Remove the TODO for lowering f32 libcall on RV64 with lp64 abi. (NFC)
The unnecessary extension doesn't exist anymore after https://reviews.llvm.org/D65497.
Commit: 8839ba418760a8482b356eeaf76bec0a002b10d1
https://github.com/llvm/llvm-project/commit/8839ba418760a8482b356eeaf76bec0a002b10d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
Log Message:
-----------
[Instrumentation] Avoid repeated hash lookups (NFC) (#129988)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 55f86cf02336e0a1bce81403296cce6d4cfbb1e4
https://github.com/llvm/llvm-project/commit/55f86cf02336e0a1bce81403296cce6d4cfbb1e4
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
A clang/test/CodeGen/RISCV/pr129995.cc
Log Message:
-----------
[RISCV][clang] Fix wrong VLS CC detection (#130107)
RISCVABIInfo::detectVLSCCEligibleStruct should early exit if VLS calling
convention is not used, however the sentinel value was not set to
correctly, it should be zero instead of one.
Commit: 478e5161406a781afc41e15bf942fb5df6672067
https://github.com/llvm/llvm-project/commit/478e5161406a781afc41e15bf942fb5df6672067
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M flang/include/flang/Lower/Cuda.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Lower/CUDA/cuda-pointer.cuf
Log Message:
-----------
[flang][cuda] Sync double descriptor after c_f_pointer call (#130194)
After a global device pointer is set through `c_f_pointer`, we need to
sync the double descriptor so the version on the device is also up to
date.
Commit: f984b472c421cbbb7e160965e703c023a86cb6e8
https://github.com/llvm/llvm-project/commit/f984b472c421cbbb7e160965e703c023a86cb6e8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M .github/workflows/issue-write.yml
Log Message:
-----------
[Github] Revert bumping actions-script version in issue-write
This patch reverts that upgrade which was performed in
74df2032d467618a9aab085120539e306f21bcc0. This broke the workflow, presumably
due to the breaking changes introduced in v5 of this action.
This is a stop-gap for #130211.
Commit: 2c8b2dc3f4fa6f1cdccbed2b194fa6c62f6267cb
https://github.com/llvm/llvm-project/commit/2c8b2dc3f4fa6f1cdccbed2b194fa6c62f6267cb
Author: Lang Hames <lhames at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M compiler-rt/include/orc_rt/c_api.h
M compiler-rt/lib/orc/coff_platform.cpp
M compiler-rt/lib/orc/common.h
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/macho_platform.cpp
M compiler-rt/lib/orc/run_program_wrapper.cpp
M compiler-rt/lib/orc/tests/unit/c_api_test.cpp
M compiler-rt/lib/orc/tests/unit/wrapper_function_utils_test.cpp
M compiler-rt/lib/orc/wrapper_function_utils.h
Log Message:
-----------
[ORC-RT] Rename 'orc_rt_*CWrapper*' types and functions to 'orc_rt_*Wrapper*'.
The orc_rt_ prefix implies C API anyway (the C++ API should use the orc_rc::
namespace), so the 'C' is redundant here.
Commit: 267403442264959f6b06e227ff450c385f4b3ef2
https://github.com/llvm/llvm-project/commit/267403442264959f6b06e227ff450c385f4b3ef2
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-cuid-hash.hip
Log Message:
-----------
Reland "[HIP] Use original file path for CUID" (#111885)
This patch fixes the buildbots failure of lit tests on MacOS. Since
clang driver options depend on toolchain, we cannot hardcode CUID hash.
On MacOS there is an extra -mlinker-version= option.
Commit: f3dc358953a13caf7521fc615a08f6317930351c
https://github.com/llvm/llvm-project/commit/f3dc358953a13caf7521fc615a08f6317930351c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/XCore/dwarf_debug.ll
M llvm/test/DebugInfo/X86/inline-seldag-test.ll
Log Message:
-----------
[MC] output inlined-at debug info (#106230)
Currently MC print source location of instructions in comments in
assembly when debug info is available, however, it does not include
inlined-at locations when a function is inlined.
For example, function foo is defined in header file a.h and is called
multiple times in b.cpp. If foo is inlined, current assembly will only
show its instructions with their line numbers in a.h. With inlined-at
locations, the assembly will also show where foo is called in b.cpp.
This patch adds inlined-at locations to the comments by using
DebugLoc::print. It makes the printed source location info consistent
with those printed by machine passes.
Commit: e15545cad8297ec7555f26e5ae74a9f0511203e7
https://github.com/llvm/llvm-project/commit/e15545cad8297ec7555f26e5ae74a9f0511203e7
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/clause-validity01.f90
A flang/test/Semantics/OpenMP/single03.f90
A flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/threadprivate04.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP] Allow copyprivate and nowait on the directive clauses (#127769)
Issue:
- Single construct used to throw a semantic error for copyprivate and
nowait clause when used in the single directive.
- Also, the copyprivate with nowait restriction has been removed from
OpenMP 6.0
Fix:
- Allow copyprivate and nowait on both single and end single directive
- Allow at most one nowait clause
- Throw a warning when the same list item is used in the copyprivate clause
on the end single directive
>From Reference guide (OpenMP 5.2, 2.10.2):
```
!$omp single [clause[ [,]clause] ... ]
loosely-structured-block
!$omp end single [end-clause[ [,]end-clause] ...]
clause:
copyprivate (list)
nowait
[...]
end-clause:
copyprivate (list)
nowait
```
Towards: https://github.com/llvm/llvm-project/issues/110008
Commit: 9543e9e9270e01f2c7311b571246c6ea105bcdb0
https://github.com/llvm/llvm-project/commit/9543e9e9270e01f2c7311b571246c6ea105bcdb0
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A flang/lib/Lower/OpenMP/ClauseFinder.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
Log Message:
-----------
[flang][OpenMP] Handle pre-detemined `lastprivate` for `simd` (#129507)
This PR tries to fix `lastprivate` update issues in composite
constructs. In particular, pre-determined `lastprivate` symbols are
attached to the wrong leaf of the composite construct (the outermost
one). When using delayed privatization (should be the default mode in
the future), this results in trying to update the `lastprivate` symbol
in the wrong construct (outside the `omp.loop_nest` op).
For example, given the following input:
```fortran
!$omp target teams distribute parallel do simd collapse(2) private(y_max)
do i=x_min,x_max
do j=y_min,y_max
enddo
enddo
```
Without the fixes introduced in this PR, the `DataSharingProcessor`
tries to generate the `lastprivate` update ops in the `parallel` op
since this is the op for which the DSP instance is created.
The fix consists of 2 main parts:
1. Instead of creating a single DSP instance, one instance is created
for the leaf constructs that might need privatization (whether for
explicit, implicit, or pre-determined symbols).
2. When generating the `lastprivate` comparison ops, we don't directly
use the SSA values of the UBs and steps. Instead, we regenerated these
SSA values from the original loop bounds' expressions. We have to do
this to avoid using `host_eval` values in the `lastprivate` comparison
logic which is illegal.
Commit: 95767a9903208e545badd920a1a16e5476ae09f9
https://github.com/llvm/llvm-project/commit/95767a9903208e545badd920a1a16e5476ae09f9
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUOps.td
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUTypes.td
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/python/mlir/dialects/NVGPUOps.td
Log Message:
-----------
[mlir][nvgpu] separate ops, types, attribute definitions in NVGPU dialect. (#129846)
It is hoped that the Ops, Types, and Attribute of the NVGPU dialect can
be defined in separate files.If downstream projects extend NVGPU and
define other Ops, the types and attributes will be used.This PR was
raised to avoid including the definition of NVGPU Ops.
Commit: 3664b4e2d5800eca5c8253a3915b87fa12ea7ebc
https://github.com/llvm/llvm-project/commit/3664b4e2d5800eca5c8253a3915b87fa12ea7ebc
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Remove special handling of C++ access specifiers in C (#129983)
This effectively reverts d1aed486efc6d35a81ca4acbabb4203c4b91cda9
because of
#129426.
Commit: c8fd7a8a3aa1c13a71e0b90d0c60743d4901bcf4
https://github.com/llvm/llvm-project/commit/c8fd7a8a3aa1c13a71e0b90d0c60743d4901bcf4
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-flat.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-ctx-only.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-flat-first.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-flat-only.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid.yaml
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util-negative.test
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util.test
Log Message:
-----------
[ctxprof] Profile section for flat profiles (#129932)
A section for flat profiles (i.e. non-contextual). This is useful for debugging or for intentional cases where a root isn't identified.
This patch adds the reader/writer support. `compiler-rt` changes follow in a subsequent change.
Commit: 21b261102504c97fc0b81c101898c0f1c1a7e79c
https://github.com/llvm/llvm-project/commit/21b261102504c97fc0b81c101898c0f1c1a7e79c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
Log Message:
-----------
AMDGPU Add baseline tests for shufflevector of physreg copy combine
Commit: 1a31bb38a4bb2bc94fbbb43fe04d878cb4a5a05b
https://github.com/llvm/llvm-project/commit/1a31bb38a4bb2bc94fbbb43fe04d878cb4a5a05b
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
A lldb/test/API/macosx/no-nlist-memory-module/Makefile
A lldb/test/API/macosx/no-nlist-memory-module/NoNlists.mk
A lldb/test/API/macosx/no-nlist-memory-module/TestNoNlistsDylib.py
A lldb/test/API/macosx/no-nlist-memory-module/has-nlists.c
A lldb/test/API/macosx/no-nlist-memory-module/main.c
A lldb/test/API/macosx/no-nlist-memory-module/no-nlist-sect.s
A lldb/test/API/macosx/no-nlist-memory-module/no-nlists.c
Log Message:
-----------
[lldb][Mach-O] Don't read symbol table of specially marked binary (#129967)
We have a binary image on Darwin that has no code, only metadata. It has
a large symbol table with many external symbol names that will not be
needed in the debugger. And it is possible to not have this binary on
the debugger system - so lldb must read all of the symbol names out of
memory, one at a time, which can be quite slow.
We're adding a section __TEXT,__lldb_no_nlist, to this binary to
indicate that lldb should not read the nlist symbols for it when we are
reading out of memory. If lldb is run with an on-disk version of the
binary, we will load the symbol table as we normally would, there's no
benefit to handling this binary differently.
I added a test where I create a dylib with this specially named section,
launch the process. The main binary deletes the dylib from the disk so
lldb is forced to read it out of memory. lldb attaches to the binary,
confirms that the dylib is present in the process and is a memory
Module. If the binary is not present, or lldb found the on-disk copy
because it hasn't been deleted yet, we delete the target, flush the
Debugger's module cache, sleep and retry, up to ten times. I create the
specially named section by compiling an assembly file that puts a byte
in the section which makes for a bit of a messy Makefile (the pre-canned
actions to build a dylib don't quite handle this case) but I don't think
it's much of a problem. This is a purely skipUnlessDarwin test case.
Relanding this change with a restructured Makefiles for the test case
that should pass on the CI bots.
rdar://146167816
Commit: ed6bde93f050b9314e54ecbc69c08ab78f4251af
https://github.com/llvm/llvm-project/commit/ed6bde93f050b9314e54ecbc69c08ab78f4251af
Author: Valentin Churavy <v.churavy at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
M llvm/test/CodeGen/X86/atomic-idempotent.ll
Log Message:
-----------
[X86] Use fence(seq_cst) in IdempotentRMWIntoFencedLoad (#126521)
This extends this optimization for scenarios where the subtarget
has `!hasMFence` or we have SyncScope SingleThread, by avoiding
the direct usage of `llvm.x64.sse2.mfence`.
Commit: 289471931480bf17ee8c2b2c62dd3c6218137b4e
https://github.com/llvm/llvm-project/commit/289471931480bf17ee8c2b2c62dd3c6218137b4e
Author: John Harrison <harjohn at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
Log Message:
-----------
[lldb-dap] Updating naming and documentation to follow style guide. (#130202)
Updating the naming and adding documentation to better follow the style
guide.
Commit: c02019141cfe4e2bacdfa67262e84eee838f2e38
https://github.com/llvm/llvm-project/commit/c02019141cfe4e2bacdfa67262e84eee838f2e38
Author: Kiran Kumar T P <50909805+kiranktp at users.noreply.github.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A flang/test/Lower/OpenMP/Todo/taskloop-cancel.f90
Log Message:
-----------
[LLVM-FLANG] [OpenMP] [Taskloop] - Add test case with cancel construct inside taskloop (#129862)
Added a test case with cancel construct inside taskloop. Currently
taskloop lowering is not supported so below error is issued: "not yet
implemented: Taskloop construct"
Once the lowering patch is merged, todo error should be issued for
cancel construct. "not yet implemented: OpenMPCancelConstruct"
Commit: bedb9077c38cf01a3f9303d68599ea95677be5b7
https://github.com/llvm/llvm-project/commit/bedb9077c38cf01a3f9303d68599ea95677be5b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
Log Message:
-----------
[RISCV] Simplify how we find combinable cm.pop+ret. (#130204)
Instead of scanning the whole basic block for a POP, find the RET and
then look backwards for the POP. Using getFirstTerminator, we can do
this with less code and it's probably faster.
Commit: 733ad3fdebf782be5afffdb8310a0ce15675086c
https://github.com/llvm/llvm-project/commit/733ad3fdebf782be5afffdb8310a0ce15675086c
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
M llvm/lib/LTO/LTOBackend.cpp
A llvm/test/LTO/RISCV/lit.local.cfg
A llvm/test/LTO/RISCV/riscv-ilp32e.ll
Log Message:
-----------
[LTO] Override TargetABI from module flags if present when creating TargetMachine (#126497)
…argetMachine
RISC-V's data layout is determined by the ABI, not just the target
triple. However, the TargetMachine is created using the data layout from
the target triple, which is not always correct. This patch uses the
target ABI from the module and passes it to the TargetMachine, ensuring
that the data layout is set correctly according to the ABI.
The same problem will happen with other targets like MIPS, but
unfortunately, MIPS didn't emit the target-abi into the module flags, so
this patch only fixes the issue for RISC-V.
NOTE: MIPS with -mabi=n32 can trigger the same issue.
Another possible solution is add new parameter to the TargetMachine
constructor, but that would require changes in all the targets.
Commit: d933882ed369a68d118ca661488bb2c89028a2de
https://github.com/llvm/llvm-project/commit/d933882ed369a68d118ca661488bb2c89028a2de
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Add test for CWG2285 "Issues with structured bindings" (#126421)
The resolution of [CWG2285](https://wg21.link/cwg2285) adds the point of
declaration of a structured binding, and was implemented in
https://github.com/llvm/llvm-project/commit/bdb84f374cde7736ca68d5db2c2ecf5468346710
.
Drive-by changes: modify comment and diagnostic messages mentioned in
CWG2285.
Commit: 5997cdb4bcace6d24e7c2fa04dd4f726c48cc561
https://github.com/llvm/llvm-project/commit/5997cdb4bcace6d24e7c2fa04dd4f726c48cc561
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
Log Message:
-----------
AMDGPU: Switch an undef in a test for poison
Commit: e4cbbd323c98c9d67c393f00d5a255c60a06025e
https://github.com/llvm/llvm-project/commit/e4cbbd323c98c9d67c393f00d5a255c60a06025e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
Log Message:
-----------
AMDGPU: Switch a test to generated checks
Commit: f611c22cb5b6b45d98591e8952e565c738a20ea3
https://github.com/llvm/llvm-project/commit/f611c22cb5b6b45d98591e8952e565c738a20ea3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/ImplicitNullChecks.cpp
Log Message:
-----------
[ImplicitNullChecks] Use Register. NFC
Commit: 1873f5567ad460995fb3f3cdd51058a03a8044e2
https://github.com/llvm/llvm-project/commit/1873f5567ad460995fb3f3cdd51058a03a8044e2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
M llvm/lib/CodeGen/MIRVRegNamerUtils.h
Log Message:
-----------
[MIRVRegNamerUtils] Use Register. NFC
Commit: 39a4da20d88d797824f0e7be0f732ccaf0c7eee4
https://github.com/llvm/llvm-project/commit/39a4da20d88d797824f0e7be0f732ccaf0c7eee4
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/test/API/functionalities/asan/TestReportData.py
Log Message:
-----------
[lldb][asan] Add temporary logging to ReportRetriever
`TestReportData.py` is failing on the macOS CI with:
```
Traceback (most recent call last):
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1784, in test_method
return attrvalue(self)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 148, in wrapper
return func(*args, **kwargs)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/asan/TestReportData.py", line 28, in test_libsanitizers_asan
self.asan_tests(libsanitizers=True)
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/asan/TestReportData.py", line 60, in asan_tests
self.expect(
File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2490, in expect
self.fail(log_msg)
AssertionError: Ran command:
"thread list"
Got output:
Process 3474 stopped
* thread #1: tid = 0x38b5e9, 0x00007ff80f563b52 libsystem_kernel.dylib`__pthread_kill + 10, queue = 'com.apple.main-thread', stop reason = signal SIGABRT
Expecting sub string: "stopped" (was found)
Expecting sub string: "stop reason = Use of deallocated memory" (was not found)
Process should be stopped due to ASan report
```
There isn't much to go off of in the log, so adding more to help us debug this.
Commit: f83eeacc9d344eaac117fe55c4d084954216d5ba
https://github.com/llvm/llvm-project/commit/f83eeacc9d344eaac117fe55c4d084954216d5ba
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix a warning
This patch fixes:
llvm/lib/Target/X86/X86ISelLowering.cpp:31886:11: error: unused
variable 'M' [-Werror,-Wunused-variable]
Commit: 59245b4d228867a0fade4e51335bd4a62528ca73
https://github.com/llvm/llvm-project/commit/59245b4d228867a0fade4e51335bd4a62528ca73
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/ImplicitNullChecks.cpp
Log Message:
-----------
[ImplicitNullChecks] Use Register. NFC
Commit: fc4bce3289e54208dcdbd007a1b05ef2eca78b1d
https://github.com/llvm/llvm-project/commit/fc4bce3289e54208dcdbd007a1b05ef2eca78b1d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
Log Message:
-----------
[MachineTraceMetrics] Use Register::id(). NFC
Commit: 6b094020c29d27296b5c80103bdeb0db8ccc6d21
https://github.com/llvm/llvm-project/commit/6b094020c29d27296b5c80103bdeb0db8ccc6d21
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.h
Log Message:
-----------
[CriticalAntiDepBreaker] Use Register and MCRegister. NFC
Commit: a21cfca320bddeef120618ceff9563778b5cbd94
https://github.com/llvm/llvm-project/commit/a21cfca320bddeef120618ceff9563778b5cbd94
Author: Matthias Springer <me at m-sp.org>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/docs/DialectConversion.md
M mlir/docs/PatternRewriter.md
M mlir/docs/Tutorials/QuickstartRewrites.md
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
Log Message:
-----------
[mlir][IR] Deprecate `match` and `rewrite` functions (#130031)
Deprecate the `match` and `rewrite` functions. They mainly exist for
historic reasons. This PR also updates all remaining uses of in the MLIR
codebase.
This is addressing a
[comment](https://github.com/llvm/llvm-project/pull/129861#pullrequestreview-2662696084)
on an earlier PR.
Note for LLVM integration: `SplitMatchAndRewrite` will be deleted soon,
update your patterns to use `matchAndRewrite` instead of separate
`match` / `rewrite`.
---------
Co-authored-by: Jakub Kuderski <jakub at nod-labs.com>
Commit: 170c0dac4488f9cfbc67e9593ebe6ad01cfa8f32
https://github.com/llvm/llvm-project/commit/170c0dac4488f9cfbc67e9593ebe6ad01cfa8f32
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/unaligned-buffer.ll
M llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll
Log Message:
-----------
[AMDGPU] Fix edge case of buffer OOB handling (#115479)
Strengthen out-of-bounds guarantees for buffer accesses by disallowing
buffer accesses with alignment lower than natural alignment.
This is needed to specifically address the edge case where an access
starts out-of-bounds and then enters in-bounds, as the hardware would
treat the entire access as being out-of-bounds. This is normally not
needed for most users, but at least one graphics device extension
(VK_EXT_robustness2) has very strict requirements - in-bounds accesses
must return correct value, and out-of-bounds accesses must return zero.
The direct consequence of the patch is that a buffer access at negative
address is not merged by load-store-vectorizer with one at a positive
address, which fixes a CTS test.
Targets that do not care about the new behavior are advised to use the
new target feature relaxed-buffer-oob-mode that maintains the state from
before the patch.
Commit: fc1450c5976461ce30f662731c4c381bf80bf5e2
https://github.com/llvm/llvm-project/commit/fc1450c5976461ce30f662731c4c381bf80bf5e2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
Log Message:
-----------
[CriticalAntiDepBreaker] Attempt to fix MSVC build error. NFC
Commit: 6cb2f6de9b3cf0e72b7d45c9fc149457b3462ca3
https://github.com/llvm/llvm-project/commit/6cb2f6de9b3cf0e72b7d45c9fc149457b3462ca3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#130235)
Commit: 3a67c7c6f7f6d41adf4487d099c1225c31caf8c3
https://github.com/llvm/llvm-project/commit/3a67c7c6f7f6d41adf4487d099c1225c31caf8c3
Author: zhaohui <1178824043 at qq.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/uninitialized.cpp
Log Message:
-----------
[Clang] Check for uninitialized use in lambda within CXXOperatorCallExpr (#129198)
Track whether a LambdaExpr is an immediate operand of a
CXXOperatorCallExpr using a new flag, isInCXXOperatorCall. This enables
special handling of capture initializations to detect uninitialized
variable uses, such as in `S s = [&]() { return s; }();`.
Fix #128058
Commit: 94714fb3032fb4707c70f12a5f246bbaadaa73b2
https://github.com/llvm/llvm-project/commit/94714fb3032fb4707c70f12a5f246bbaadaa73b2
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/type_traits
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_pod.deprecated.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_pod.pass.cpp
Log Message:
-----------
[libc++] Deprecate `is_pod(_v)` since C++20 (#129471)
Previously, commit 042f07eed8c1acba19ea04310137bee12b18045a claimed that
P0767R1 was implemented in LLVM 7.0, but no deprecation warning was
implemented. This patch adds the missing warnings.
Commit: 749d68bdfe97c6dd29fb9f7e4a7f63854ecef295
https://github.com/llvm/llvm-project/commit/749d68bdfe97c6dd29fb9f7e4a7f63854ecef295
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
Log Message:
-----------
[CriticalAntiDepBreaker] Fix another MSVC build error. NFC
Commit: 5048a0858beb15bdd203dee89dd4df9b2a72ba5f
https://github.com/llvm/llvm-project/commit/5048a0858beb15bdd203dee89dd4df9b2a72ba5f
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
A llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/load-store-pair.ll
Log Message:
-----------
[RISCV] Generate MIPS load/store pair instructions (#124717)
Introduce RISCVLoadStoreOptimizer MIR Pass that will do the
optimization. The load/store pairing pass identifies adjacent load/store
instructions operating on consecutive memory locations and merges them
into a single paired instruction.
This is part of MIPS extensions for the p8700 CPU.
Production of ldp/sdp instructions is OFF by default, since it is
beneficial for -Os only in the case of p8700 CPU.
Commit: 951353de62c33645d8eabd35df091fdacb649b61
https://github.com/llvm/llvm-project/commit/951353de62c33645d8eabd35df091fdacb649b61
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port 5048a0858beb
Commit: bd5f29c0081ffe03e6a9cf43bca471e7f82fe71d
https://github.com/llvm/llvm-project/commit/bd5f29c0081ffe03e6a9cf43bca471e7f82fe71d
Author: Tejas Vipin <alissxlace at proton.me>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
A llvm/test/tools/llvm-objcopy/strip-error-handling.test
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
[llvm-strip] Let llvm-strip continue on encountering an error (#129531)
This change means that llvm-strip no longer exits immediately upon
encountering an error when modifying a file and will instead continue
modifying the other inputs. Fixes #129412
Commit: d7f409d39ae0525ea3474f7a8e01d7510a36e44f
https://github.com/llvm/llvm-project/commit/d7f409d39ae0525ea3474f7a8e01d7510a36e44f
Author: Zentrik <llvm.zentrik at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/tools/llvm-jitlistener/llvm-jitlistener.cpp
Log Message:
-----------
[JITListener] Fix build after Module::getTargetTriple() change (#130152)
Adjust for #129868.
Commit: aa1d2cc5d7a18318f5014eecde1ac88ba762e70a
https://github.com/llvm/llvm-project/commit/aa1d2cc5d7a18318f5014eecde1ac88ba762e70a
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
R llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/XCore/dwarf_debug.ll
M llvm/test/DebugInfo/X86/inline-seldag-test.ll
Log Message:
-----------
Revert "[MC] output inlined-at debug info (#106230)"
This reverts commit f3dc358953a13caf7521fc615a08f6317930351c.
This causes a large compile-time regression:
https://llvm-compile-time-tracker.com/compare.php?from=267403442264959f6b06e227ff450c385f4b3ef2&to=f3dc358953a13caf7521fc615a08f6317930351c&stat=instructions:u
Commit: b32cf76d8fa073b95fbb2ad5c45be117332006d3
https://github.com/llvm/llvm-project/commit/b32cf76d8fa073b95fbb2ad5c45be117332006d3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GuardWidening.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#129989)
Commit: 17aac7ccf92e606fcf8c69ee11cdcf16ca2724b8
https://github.com/llvm/llvm-project/commit/17aac7ccf92e606fcf8c69ee11cdcf16ca2724b8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#130236)
Commit: 616f277640129ff37d4005737a62acbd60d06ca1
https://github.com/llvm/llvm-project/commit/616f277640129ff37d4005737a62acbd60d06ca1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#130237)
Commit: bcec6c5325a401c3af507b2de649097bba4815d7
https://github.com/llvm/llvm-project/commit/bcec6c5325a401c3af507b2de649097bba4815d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#130238)
Commit: 8bf13afd4a97ba2eefca0a7f44edea97ffee97fc
https://github.com/llvm/llvm-project/commit/8bf13afd4a97ba2eefca0a7f44edea97ffee97fc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#130239)
Commit: 8a855d63bae5467163f261ffcb8018698332eed5
https://github.com/llvm/llvm-project/commit/8a855d63bae5467163f261ffcb8018698332eed5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#130241)
Commit: eb4a7052f64ef22c87a402a198f21f30da379af8
https://github.com/llvm/llvm-project/commit/eb4a7052f64ef22c87a402a198f21f30da379af8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/Driver/hip-partial-link.hip
Log Message:
-----------
clang/HIP: Remove requires system-linux from some driver tests (#112842)
Commit: 9c08e650cd83e3e891dd2972ae1852ae1763c7ff
https://github.com/llvm/llvm-project/commit/9c08e650cd83e3e891dd2972ae1852ae1763c7ff
Author: Georgiy Samoylov <g.samoylov at syntacore.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/main.cpp
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
Log Message:
-----------
[lldb] Adapt llgs tests for RISC-V (#130034)
Some lldb tests from llgs category fail on RISC-V target due to lack of
necessary condition checks. This patch adapts these tests by taking into
account the peculiarities of the RISC-V architecture
Commit: 40e245a9aac02e0bbb6b44287bc13c80a68d37b3
https://github.com/llvm/llvm-project/commit/40e245a9aac02e0bbb6b44287bc13c80a68d37b3
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/TemporaryStorage.h
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling-character.f90
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling.f90
Log Message:
-----------
[flang] add support for procedure pointer assignment inside FORALL (#130114)
Very similar to object pointer assignment, the difference is the SSA
types of the LHS (!fir.ref<!fir.boxproc<()->()>> and RHS
(!fir.boxproc<()->()).
The RHS must be saved as simple address, not descriptors (it is not
possible to make CFI descriptor out of procedure entity).
Commit: c687d78b3a7121e4c4ec6ee4992f2d72e3ce9279
https://github.com/llvm/llvm-project/commit/c687d78b3a7121e4c4ec6ee4992f2d72e3ce9279
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/Driver/linker-wrapper.c
Log Message:
-----------
clang: Switch linker-wrapper test to unsupported windows (#130247)
Works fine on macos, so expand the tested hosts. This should work
on windows too, but it's been a pain debugging the error on the bot.
Commit: 52bc812a10d14c6c9d704d8a0d52b9a91a9f19bd
https://github.com/llvm/llvm-project/commit/52bc812a10d14c6c9d704d8a0d52b9a91a9f19bd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
[X86] combineConcatVectorOps - concat(shuffle(x,y,m1),shuffle(x,y,m2)) -> shuffle(concat(x,x),concat(y,y),m3) on VBMI targets (#130134)
With VBMI we are guaranteed to support cross-lane 256-bit shuffles, so subvector splats should always be cheap.
Fixes #116931
Commit: 21610e3ecc8bc727f99047e544186b35b1291bcd
https://github.com/llvm/llvm-project/commit/21610e3ecc8bc727f99047e544186b35b1291bcd
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
R llvm/test/CodeGen/AArch64/sve-fixed-length-offsets.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
Log Message:
-----------
Revert "[AArch64][SVE] Improve fixed-length addressing modes." (#130263)
This reverts commit f01e760c08365426de95f02dc2c2dc670eb47352.
Commit: 180f8032f0f67faf2a73791ee37a87cb8560135c
https://github.com/llvm/llvm-project/commit/180f8032f0f67faf2a73791ee37a87cb8560135c
Author: Michael Jabbour <117195239+michael-jabbour-sonarsource at users.noreply.github.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Modules/modules-merge-enum.m
Log Message:
-----------
[clang] Fix ASTWriter crash after merging named enums (#114240)
Clang already removes parsed enumerators when merging typedefs to
anonymous enums. This is why the following example decl used to be
handled correctly while merging, and ASTWriter behaves as expected:
```c
typedef enum { Val } AnonEnum;
```
However, the mentioned mechanism didn't handle named enums. This leads
to stale declarations in `IdResolver`, causing an assertion violation in
ASTWriter ``Assertion `DeclIDs.contains(D) && "Declaration not
emitted!"' failed`` when a module is being serialized with the following
example merged enums:
```c
typedef enum Enum1 { Val_A } Enum1;
enum Enum2 { Val_B };
```
The PR applies the same mechanism in the named enums case.
Additionally, I dropped the call to
`getLexicalDeclContext()->removeDecl` as it was causing a wrong
odr-violation diagnostic with anonymous enums.
Might be easier to to review commit by commit. Any feedback is
appreciated.
### Context
This fixes frontend crashes that were encountered when certain
Objective-C modules are included on Xcode 16. For example, by running
`CC=/path/to/clang-19 xcodebuild clean build` on a project that contains
the following Objective-C file:
```c
#include <os/atomic.h>
int main() {
return memory_order_relaxed;
}
```
This crashes the parser in release, when ASTReader tries to load the
enumerator declaration.
Commit: e9de91e989de2b61ded7f471b48453eddf77ca29
https://github.com/llvm/llvm-project/commit/e9de91e989de2b61ded7f471b48453eddf77ca29
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
Log Message:
-----------
[AMDGPU] Add safe-smem-prefetch SubtargetFeature off by default (#130050)
S_PREFETCH_* instructions may cause host to terminate process in case of
the invalid address.
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: bd3bde8900a05d2418f680bb19fced189a564efd
https://github.com/llvm/llvm-project/commit/bd3bde8900a05d2418f680bb19fced189a564efd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/mfence.ll
Log Message:
-----------
[X86] mfence.ll - add COMMON prefix + replace X32 with X86 prefix
We try to only use X32 for gnux32 triple
Noticed while reviewing #106555
Commit: 5239f6777a485b30b77e7ec775c7022028659d9f
https://github.com/llvm/llvm-project/commit/5239f6777a485b30b77e7ec775c7022028659d9f
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Analysis/CostModel.cpp
M llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/RISCV/cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-expandload-compressstore.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel][Test] Replace multiple flags with `-intrinsic-cost-strategy` (#128885)
This replaces the `-prefer-intrinsic-cost` and
`type-based-intrinsic-cost` flags with a single
`-intrinsic-cost-strategy=<strategy>` flag.
The possible strategies are:
* `instruction-cost`
- Use TargetTransformInfo::getInstructionCost()
* `intrinsic-cost`
- Use TargetTransformInfo::getIntrinsicInstrCost()
* `type-based-intrinsic-cost`
- Calculate the intrinsic cost based only on argument types
Commit: dc69eae1c47a0545ae8c3129e44a8fa662612d7c
https://github.com/llvm/llvm-project/commit/dc69eae1c47a0545ae8c3129e44a8fa662612d7c
Author: Lucas Duarte Prates <lucas.prates at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-ar/extract.test
M llvm/test/tools/llvm-ar/print.test
Log Message:
-----------
[llvm-ar] Fix darwin-related tests' XFAIL annotation (#130144)
The tests updated by this commit are expected to fail when targetting a
darwin platform. As they rely on target detection based on the host,
this is currently checked by using the `XFAIL: system-darwin`
annotation.
This approach becomes a problem when trying to run such tests on a
cross-compiling build of clang on a darwin platform. When no darwin
targets are included in the build, the XFAIL will still apply even
though the target used is not related to the darwin platform, and the
tests will unexpectedly pass.
To fix this issue, this patch updates the condition used by the tests'
XFAIL annotation to `target={{.*}}-darwin{{.*}}`, ensuring they only are
xfailed when the relevant target is used.
Commit: af755af2003464f1cb9268de86b34d373cc6ac2d
https://github.com/llvm/llvm-project/commit/af755af2003464f1cb9268de86b34d373cc6ac2d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Handle demanded subvectors for readfirstlane (#128648)
Commit: 68578b38cf22eb4a3c46ccd6d6a31e536b0b8cc9
https://github.com/llvm/llvm-project/commit/68578b38cf22eb4a3c46ccd6d6a31e536b0b8cc9
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
[Offload][AMDGPU] LLVM_ENABLE_RUNTIMES=flang-rt for amdgpu-offload-* (#129692)
Enable the LLVM_ENABLE_RUNTIMES=flang-rt build of the Fortran runtime
for the amdgpu-offload-* buildbots. This pre-population cmake cache
files is referred to by the llvm-zorg annotated builder factory
[script](https://github.com/llvm/llvm-zorg/blob/872f477610d83821c9f1368c969006789b21011b/zorg/buildbot/builders/annotated/amdgpu-offload-cmake.py#L26).
The corresponding change in llvm-zorg is
https://github.com/llvm/llvm-zorg/pull/402
Commit: de9cee1c97882dc69a20ac688d20a84f831b62c6
https://github.com/llvm/llvm-project/commit/de9cee1c97882dc69a20ac688d20a84f831b62c6
Author: Vy Nguyen <vyng at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Telemetry.h
M lldb/source/Core/Telemetry.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[LLDB][Telemetry]Define telemetry::CommandInfo (#129354)
and collect telemetry about a command's execution.
*NOTE: Please consider this PR a DRAFT ( Waiting on PR/127696 to be
submitted. )
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: f7daa9d302a82f35c3b9ed4cede23ab808462b4f
https://github.com/llvm/llvm-project/commit/f7daa9d302a82f35c3b9ed4cede23ab808462b4f
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/irbuilder_nested_openmp_parallel_empty.c
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M clang/test/OpenMP/taskgroup_codegen.cpp
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
Log Message:
-----------
[mlir][OpenMP] fix crash outlining infinite loop (#129872)
Previously an extra block was created by splitting the previous exit
block. This produced incorrect results when the outlined region
statically never terminated because then there wouldn't be a valid exit
block for the outlined region, this caused this newly added block to
have an incoming edge from outside of the outlining region, which caused
outlining to fail.
So far as I can tell this extra block no longer serves any purpose. The
comment says it is supposed to collate multiple control flow edges into
one place, but the code as it is now does not achieve this. In fact, as
can be seen from the changes to lit tests, this block was not actually
outlined in the end. This is because there are actually two code
extractors: one in the callback for creating a parallel op which is used
to find what the input/output variables are (which does have this block
added to it), and another one which actually does the outlining (which
this block was not added to).
Tested with the gfortran and fujitsu test suites.
Fixes #112884
Commit: 08a89bb02ec4a4de8ad9bd94e28701d635b1f876
https://github.com/llvm/llvm-project/commit/08a89bb02ec4a4de8ad9bd94e28701d635b1f876
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lsfe.ll
Log Message:
-----------
[AArch64] Codegen for 16/32/64-bit floating-point atomicrmw ops (#125686)
Codegen for AArch64 16/32/64-bit floating-point atomic read-modify-write
operations (`atomicrmw {fadd,fmin,fmax}`) using LD{B}FADD, LD{B}FMAX and
LD{B}FMIN atomic instructions.
Commit: e296fb8ff6255b97db9ff6cd941acc730164b38f
https://github.com/llvm/llvm-project/commit/e296fb8ff6255b97db9ff6cd941acc730164b38f
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
Revert "[Offload][AMDGPU] LLVM_ENABLE_RUNTIMES=flang-rt for amdgpu-offload-*" (#130274)
Reverts llvm/llvm-project#129692
The builder amdgpu-offload-rhel-8-cmake-build-only fails because its
version of Ninja is too old. At least Ninja 1.10 is required for its
support for dependencies between Fortran modules.
https://lab.llvm.org/buildbot/#/builders/204/builds/2696
Commit: f8cf007b4cdc975e44c94c2a3276023b7816cd74
https://github.com/llvm/llvm-project/commit/f8cf007b4cdc975e44c94c2a3276023b7816cd74
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/matrix-multiply.ll
Log Message:
-----------
[X86] matrix-multiply.ll - add common AVX1+2 check prefix
Commit: 4136395ddc66e05ffe1a7630060e88c586a44f6d
https://github.com/llvm/llvm-project/commit/4136395ddc66e05ffe1a7630060e88c586a44f6d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Regenerate test checks in instcombine test
Passed precheck before 844a1d52a8f5dff032cbf58288675ad1e678d609
started deleting the dead instructions
Commit: 90e421516ee29ed475a052d0f5e96c2447e700d7
https://github.com/llvm/llvm-project/commit/90e421516ee29ed475a052d0f5e96c2447e700d7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[Offload] Always consider `flto` on for AMDGPU (#129118)
Summary:
Previously we turned this off, but that led to a regression in some of
the option handling. I would argue that handling LTO by default was
incorrect bheavior, but for AMDGPU people were used to this default, so
we pass it by default. `-fno-lto` overrides.
Commit: 995c0f7bb7cac218cc0f7ca1cacb077d202c4d02
https://github.com/llvm/llvm-project/commit/995c0f7bb7cac218cc0f7ca1cacb077d202c4d02
Author: Augie Fackler <augie at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[bazel] update mlir python deps for 95767a9903208e545badd920a1a16e5476ae09f9
Commit: 9d191f11825875cb21363b1e1a9303e06fa1316c
https://github.com/llvm/llvm-project/commit/9d191f11825875cb21363b1e1a9303e06fa1316c
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Fix RFFT2D verifier for width=1 (#130279)
Current formula assumes width is a multiple of 2 but TOSA only requires
a power of 2, which 1 is.
Commit: 81168e2dc1c2069178b1acd5e302be99d7fb0e45
https://github.com/llvm/llvm-project/commit/81168e2dc1c2069178b1acd5e302be99d7fb0e45
Author: Jan Voung <jvoung at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Add test for crash repro and clean up const accessor handling (#129930)
Add test for https://github.com/llvm/llvm-project/issues/125589
The crash is actually incidentally fixed by
https://github.com/llvm/llvm-project/pull/128437 since it added a branch
for the reference case and would no longer fall through when the return
type is a reference to a pointer.
Clean up a bit as well:
- make the fallback for early returns more consistent (check if
returning optional and call transfer function for that case)
- check RecordLoc == nullptr in one place
- clean up extra spaces in test
- clean up parameterization in test of `std::` vs `$ns::$`
Commit: e22579a6752801a5d3ced59c7a2e2499d547c657
https://github.com/llvm/llvm-project/commit/e22579a6752801a5d3ced59c7a2e2499d547c657
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
[mlir][TOSA] Fix linalg lowering of depthwise conv2d (#130282)
Current lowering for tosa.depthwise_conv2d assumes if both zero points
are zero then it's a floating-point operation by hardcoding the use of a
arith.addf in the lowered code. Fix code to check for the element type
to decide what add operation to use.
Commit: 2c8b824ff562d4d0a6cd38310991425d03bc6f70
https://github.com/llvm/llvm-project/commit/2c8b824ff562d4d0a6cd38310991425d03bc6f70
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3478.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3478
This paper made it a constraint violation for a TU to end with an
unterminated multiline comment. This is something Clang has always
diagnosed as an error.
Commit: 9fc3310798be5afd265ff6ad7274c0d02487f5df
https://github.com/llvm/llvm-project/commit/9fc3310798be5afd265ff6ad7274c0d02487f5df
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/Lexer.cpp
A clang/test/C/C2y/n3411.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Implement WG14 N3411 (#130180)
This paper (https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3411.pdf)
allows a source file to end without a newline. Clang has supported this
as a conforming extension for a long time, so this suppresses the
diagnotic in C2y mode but continues to diagnose as an extension in
earlier language modes. It also continues to diagnose if the user passes
-Wnewline-eof explicitly.
Commit: 308f933f75bcf92881c14e00e81d2d41a2893d7c
https://github.com/llvm/llvm-project/commit/308f933f75bcf92881c14e00e81d2d41a2893d7c
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Fix bazel build after 95767a9903208e545badd920a1a16e5476ae09f9. (#130283)
Commit: 90f45a15abbde1435c800c588c78c5a01b5db388
https://github.com/llvm/llvm-project/commit/90f45a15abbde1435c800c588c78c5a01b5db388
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/if-clause.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/metadirective-v50.f90
M flang/test/Parser/OpenMP/metadirective.f90
Log Message:
-----------
[flang][OpenMP] Implement OmpDirectiveName, use in OmpDirectiveSpecif… (#130121)
…ication
The `OmpDirectiveName` class has a source in addition to wrapping the
llvm::omp::Directive.
Commit: 5b3f50ead1473ae7f8695e02f26635a7ea89a6aa
https://github.com/llvm/llvm-project/commit/5b3f50ead1473ae7f8695e02f26635a7ea89a6aa
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim nonconformance to WG14 N3418
This paper makes it a constraint violation to form a UCN via token
concatenation. Clang does not conform to it and the paper goes in the
opposite direction of where C++ went with P2621R3 which was adopted for
C++26.
Commit: d31a7dde485461f564a6ae995a3fd58b2aa1bfa5
https://github.com/llvm/llvm-project/commit/d31a7dde485461f564a6ae995a3fd58b2aa1bfa5
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/pointer-default-init.f90
Log Message:
-----------
Revert " [flang] Rely on global initialization for simpler derived types" (#130278)
Reverts llvm/llvm-project#114002
This causes a regression building cam4_r from spec2017
Commit: 659cca78a1f849e6ba2279946cc8434612200305
https://github.com/llvm/llvm-project/commit/659cca78a1f849e6ba2279946cc8434612200305
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
Revert "[mlir][TOSA] Fix linalg lowering of depthwise conv2d (#130282)"
This reverts commit e22579a6752801a5d3ced59c7a2e2499d547c657.
Commit: 50a0931ccd82a7e4541650744363c87d9e0e5496
https://github.com/llvm/llvm-project/commit/50a0931ccd82a7e4541650744363c87d9e0e5496
Author: Augie Fackler <augie at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] update lldb deps for 39a4da20d88d797824f0e7be0f732ccaf0c7eee4
Commit: 8da48b4003ca9d458493714b8a7b5ac2d6af9089
https://github.com/llvm/llvm-project/commit/8da48b4003ca9d458493714b8a7b5ac2d6af9089
Author: Augie Fackler <augie at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] update lldb deps for de9cee1c97882dc69a20ac688d20a84f831b62c6
Commit: 40ee5a0bcc333f2df5427bfaba73f2dc83c0ae19
https://github.com/llvm/llvm-project/commit/40ee5a0bcc333f2df5427bfaba73f2dc83c0ae19
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3481.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3481
This paper made it a constraint violation to have an incomplete type
during lvalue conversion. Previously, this was undefined behavior.
Clang has always diagnosed this for non-void incomplete types. However,
Clang does allow derefencing a void pointer (with a diagnostic, so we
still meet the conformance requirements), but not for a value
computation.
Commit: b47dac609bbd7697db5287f628b431dac661dc23
https://github.com/llvm/llvm-project/commit/b47dac609bbd7697db5287f628b431dac661dc23
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/lib/Parser/parse-tree.cpp
Log Message:
-----------
[flang][OpenMP] Remove pessimizing move introduced in 90f45a15ab
This unbreaks the builders that diagnose this situation:
error: moving a temporary object prevents copy elision [-Werror,-Wpess
imizing-move]
341 | static OmpClauseList empty{std::move(decltype(OmpClauseList:
:v){})};
| ^
Commit: d19218e507b5613b9708ce0cd38aceb282a9d812
https://github.com/llvm/llvm-project/commit/d19218e507b5613b9708ce0cd38aceb282a9d812
Author: John Brawn <john.brawn at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
A llvm/test/CodeGen/AArch64/fp16_fast_math.ll
A llvm/test/CodeGen/ARM/fp16_fast_math.ll
M llvm/test/CodeGen/ARM/vecreduce-fmax-legalization-soft-float.ll
M llvm/test/CodeGen/ARM/vecreduce-fmin-legalization-soft-float.ll
Log Message:
-----------
[SelectionDAG] Preserve fast math flags when legalizing/promoting (#130124)
When we have a floating-point operation that a target doesn't support
for a given type, but does support for a wider type, then there are two
ways this can be handled:
* If the target doesn't have any registers at all of this type then
LegalizeTypes will convert the operation.
* If we do have registers but no operation for this type, then the
operation action will be Promote and it's handled in PromoteNode.
In both cases the operation at the wider type, and the conversion
operations to and from that type, should have the same fast math flags
as the original operation.
This is being done in preparation for a DAGCombine patch which makes use
of these fast math flags.
Commit: 1c1140c4cf7d4fde5de4b20c6b993bab9060d9fc
https://github.com/llvm/llvm-project/commit/1c1140c4cf7d4fde5de4b20c6b993bab9060d9fc
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/SemaOpenACC/routine-construct-ast.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[OpenACC] Enable 'device_type' for 'routine'
There is a slightly different list for routine on which clauses are
permitted after it (like the rest of the constructs), but this
implements and tests them to make sure we get them right.
Commit: d1bd1c7e825d190fc47cd06956c381cc0f70fba8
https://github.com/llvm/llvm-project/commit/d1bd1c7e825d190fc47cd06956c381cc0f70fba8
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3496.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3496
This was a clarification for C23's N2412, primarily about the
BOOL_WIDTH macro. It should expand to the number of bits in the value
representation, not the object representation. Clang 20 implements the
correct value.
Commit: 5685def507ed7c95bf93572e5cf8c30efbc7d99b
https://github.com/llvm/llvm-project/commit/5685def507ed7c95bf93572e5cf8c30efbc7d99b
Author: Peng Sun <peng.sun at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Convert RESCALE op multiplier and shift from attributes to inputs (#129720)
Commit: 67960e5c08629bb78c147bd0a86764967448b33c
https://github.com/llvm/llvm-project/commit/67960e5c08629bb78c147bd0a86764967448b33c
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
A clang/test/CodeGen/openacc-noop-decl.c
Log Message:
-----------
[OpenACC] Ensure decl OpenACC constructs don't crash
I initially implemented codegen to be a 'no-op' for these declarations,
which I thought was properly implemented. However, when they are a
top-level decl, we have a separate switch. This patch makes sure they
are properly emitted at top-level as a no-op, and adds a test for both
top-level and not top-level.
Commit: 0a41fb71f12624f470b8489f997cbe43b188e0a1
https://github.com/llvm/llvm-project/commit/0a41fb71f12624f470b8489f997cbe43b188e0a1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/CodeGen/vector.c
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/Sema/types.c
A clang/test/Sema/vector-ast.cpp
Log Message:
-----------
[Clang] Treat `ext_vector_type` as a regular type attribute (#130177)
Summary:
This attribute is mostly borrowed from OpenCL, but is useful in general
for accessing the LLVM vector types. Previously the only way to use it
was through typedefs. This patch changes that to allow use as a regular
type attribute, similar to address spaces.
Commit: 494bf26736f49db3a1932ef6067b2fc1737d78be
https://github.com/llvm/llvm-project/commit/494bf26736f49db3a1932ef6067b2fc1737d78be
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a link to the paper to a release note; NFC
Commit: dd9a2f0677312beb6785c2790b54836959046e96
https://github.com/llvm/llvm-project/commit/dd9a2f0677312beb6785c2790b54836959046e96
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M libc/src/__support/big_int.h
M libc/src/__support/math_extras.h
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_uc_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ui_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ul_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ull_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_us_test.cpp
Log Message:
-----------
[libc] `first_trailing_one(0)` should be `0`. (#130155)
Fix this minor bug. See more context at #129892.
Commit: db5e4016c0332e7e5c0950414bb0b252975663ed
https://github.com/llvm/llvm-project/commit/db5e4016c0332e7e5c0950414bb0b252975663ed
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[CostModel] Add type-based cost model for get.active.lane.mask intrinsic (#130132)
I recently realised that we return an invalid cost when requesting
the type-based cost for the get.active.lane.mask intrinsic. I've
fixed that in this patch by reusing the existing code for the
non-type-based model.
Commit: d6a4828c8a37ff9eee5da745a8a012657fe2af98
https://github.com/llvm/llvm-project/commit/d6a4828c8a37ff9eee5da745a8a012657fe2af98
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Special-case ConstantExpr in if conditions (#130294)
This happens a lot with `if constexpr` with a condition based on a
template param. In those cases, the condition is a ConstantExpr with a
value already set, so we can use that and ignore the other branch.
Commit: c6b9d5ce76a155b682b1562122f43166aaa6391d
https://github.com/llvm/llvm-project/commit/c6b9d5ce76a155b682b1562122f43166aaa6391d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/Driver/hip-partial-link.hip
Log Message:
-----------
clang/HIP: Use regex for final path separator in hip-partial-link.hip (#130291)
Somehow this passed the precheck test on the windows bot, but is
failing in precheck of unrelated PRs
Commit: 3ed4daf9a749fe8590ad291f63fabce48fb4135f
https://github.com/llvm/llvm-project/commit/3ed4daf9a749fe8590ad291f63fabce48fb4135f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/AST/TypePrinter.cpp
Log Message:
-----------
[Clang] Add missing printer for vector type attribute
Commit: 0ee8f699780569d7a6b94d61cd833285bb67eca1
https://github.com/llvm/llvm-project/commit/0ee8f699780569d7a6b94d61cd833285bb67eca1
Author: hanbeom <kese111 at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-selects.ll
Log Message:
-----------
[VectorCombine] Fix invalid shuffle cost argument of foldShuffleOfSelects (#130281)
In the previous code (#128032), it specified the destination vector as the
getShuffleCost argument. Because the shuffle mask specifies the indices
of the two vectors specified as elements, the maximum value is twice the
size of the source vector. This causes a problem if the destination
vector is smaller than the source vector and specify an index in the
mask that exceeds the size of the destination vector.
Fix the problem by correcting the previous code, which was using wrong
argument in the Cost calculation.
Fixes #130250
Commit: 718c4ed8a0d69948ab4b53e3c8666fd72613b7f7
https://github.com/llvm/llvm-project/commit/718c4ed8a0d69948ab4b53e3c8666fd72613b7f7
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/source-kind.fir
Log Message:
-----------
[flang] [NFCI] Using getSource instead of getOriginalDef (#128984)
As discussed in past MRs, this change removes the use of getOriginalDef
to use getSource instead to gather data from an indirection.
Commit: 99c6342b5e71098197f12066fd628865793e6300
https://github.com/llvm/llvm-project/commit/99c6342b5e71098197f12066fd628865793e6300
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AArch64/arm64ec-eh.ll
M llvm/test/CodeGen/AArch64/landingpad-ifcvt.ll
M llvm/test/CodeGen/X86/seh-except-restore.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
Log Message:
-----------
[win] Fix EH Cont Guard targets when SEH personality is used (#129612)
There were two issues when `/guard:ehcont` is enabled with the SEH
personality on Windows:
1. As @namazso correctly identified, we bail out of
`WinException::endFunction` early for `MSVC_TableSEH` with funclets,
expecting the exception data to be emitted in `endFunclet`, but
`endFunclet` didn't copy the EHCont metadata from the function to the
module.
2. The SEH personality requires that the basic block containing the
`catchpad` is the target, not the `catchret`.
Fixes #64585
Commit: 5c9d0a26d9462487e7db5e58f2307371154d6117
https://github.com/llvm/llvm-project/commit/5c9d0a26d9462487e7db5e58f2307371154d6117
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[LinkerWrapper] Try to fix testing on Windows (#130285)
Summary:
Thanks to @Meinersbur for finding this. The `:` character used in AMD's
target-id's is invalid on windows. This patch replaces them with `-`.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 259624bf6d47b1dccebb3948aadf849d55f96404
https://github.com/llvm/llvm-project/commit/259624bf6d47b1dccebb3948aadf849d55f96404
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
[EquivClasses] Introduce members iterator-helper (#130139)
Commit: c53e527bf8d79c6f05325d9246f66e765d784f9c
https://github.com/llvm/llvm-project/commit/c53e527bf8d79c6f05325d9246f66e765d784f9c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lld/COFF/Chunks.h
M lld/test/COFF/build-id-sym.s
Log Message:
-----------
[LLD][COFF] Implement ECExportThunkChunk::classof (NFC) (#130106)
Allows using `dyn_cast_or_null` in `maybeAddAddressTakenFunction` in #128440.
Commit: 86dfd90193da027b34162f1bdb3ed61620aae10e
https://github.com/llvm/llvm-project/commit/86dfd90193da027b34162f1bdb3ed61620aae10e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
Revert "[EquivClasses] Introduce members iterator-helper" (#130313)
This reverts commit 259624bf6d, as it causes a build failure.
Commit: afbbca5c9d0b9063287a22b52e2be5ab6690c4ce
https://github.com/llvm/llvm-project/commit/afbbca5c9d0b9063287a22b52e2be5ab6690c4ce
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MemoryMapper.h
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
Log Message:
-----------
[z/OS] Add call to shmctl() to release shared memory on z/OS (#130163)
This PR will solve the issue with leaking shared memory we have after running llvm lit test on z/OS.
In particular llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp was causing the leak.
Commit: 445c43d71206cd7dca237657c62cfa3b46787cac
https://github.com/llvm/llvm-project/commit/445c43d71206cd7dca237657c62cfa3b46787cac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/iX-ext-split.ll
Log Message:
-----------
[InstCombine] Add test for missing (or (zext x), (shl (ashr x, bw-1))) -> (sext x) case
#129363 handled all the cases where there was a sext for the original source value, but not for cases where the source is already half the size of the destination type
Another regression noticed in #76524
Commit: d4754db15d44b3000918952dae9a09aac496de80
https://github.com/llvm/llvm-project/commit/d4754db15d44b3000918952dae9a09aac496de80
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/test/Analysis/AliasAnalysis/source-kind.fir
Log Message:
-----------
Test fix: Adding REQUIRES: asserts (#130314)
Commit: fb0891387ae8a1593f6835eeaa44dc4891fcf6ee
https://github.com/llvm/llvm-project/commit/fb0891387ae8a1593f6835eeaa44dc4891fcf6ee
Author: John Brawn <john.brawn at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
[SelectionDAG] Clean up some redundant setting of node flags (NFC) (#130307)
PR #130124 added a use of FlagInserter to the start of
SelectionDAGLegalize::PromoteNode, making some of the places where we
set flags be redundant, so remove them. The places where the setting of
flags remains are in non-floating-point operations.
Commit: ce9e1d3c15ed6290f1cb07b482939976fa8115cd
https://github.com/llvm/llvm-project/commit/ce9e1d3c15ed6290f1cb07b482939976fa8115cd
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/source/Core/DataFileCache.cpp
M llvm/include/llvm/Support/Caching.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Support/Caching.cpp
M llvm/tools/gold/gold-plugin.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/Caching.cpp
Log Message:
-----------
Modify the localCache API to require an explicit commit on CachedFile… (#115331)
…Stream.
CachedFileStream has previously performed the commit step in its
destructor, but this means its only recourse for error handling is
report_fatal_error. Modify this to add an explicit commit() method, and
call this in the appropriate places with appropriate error handling for
the location.
Currently the destructor of CacheStream gives an assert failure in Debug
builds if commit() was not called. This will help track down any
remaining uses of the API that assume the old destructior behaviour. In
Release builds we fall back to the previous behaviour and call
report_fatal_error if the commit fails.
Commit: a2b3dafcdfbf3cdeea8a722fe47402df69c20221
https://github.com/llvm/llvm-project/commit/a2b3dafcdfbf3cdeea8a722fe47402df69c20221
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/finite-libcalls.ll
Log Message:
-----------
[X86][NFC] Updated POW/EXP*/LOG* functions testcases (#129677)
- Added GlobalISel runs as precommit testcase for G_POW/G_EXP*/G_LOG*.
- Removed unused tag MISSED.
Commit: 6fa1bfad65edefe3f4c17740f05297d34e833b47
https://github.com/llvm/llvm-project/commit/6fa1bfad65edefe3f4c17740f05297d34e833b47
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
Fix amdgpu-arch for dll name on Windows (#101350)
Recently HIP runtime changed dll name to amdhip64_n.dll on Windows,
where n is ROCm major version number.
Fix amdgpu-arch to search for amdhip64_n.dll on Windows.
Commit: 5668c7bb9085fafba4e2925113464f6227ef7be4
https://github.com/llvm/llvm-project/commit/5668c7bb9085fafba4e2925113464f6227ef7be4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Add more interfaces for __ldca, __ldcs, __ldlu and __ldcv (#130218)
Commit: 8eb9b947af267f38ad53cfc67a41c5c3d978aa27
https://github.com/llvm/llvm-project/commit/8eb9b947af267f38ad53cfc67a41c5c3d978aa27
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/test/CIR/CodeGen/basic.cpp
A clang/test/CIR/CodeGen/local-vars.cpp
M clang/test/CIR/Lowering/basic.cpp
A clang/test/CIR/Lowering/local-vars.cpp
Log Message:
-----------
[CIR] Emit init of local variables (#130164)
Local variable initialization was previously being ignored. This change
adds support for initialization of scalar variables with constant values
and introduces the constant emitter framework.
Commit: c59713c2d83dddfb08f23c210e054ae54beb856e
https://github.com/llvm/llvm-project/commit/c59713c2d83dddfb08f23c210e054ae54beb856e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port ce9e1d3c15ed
Commit: ca1833b91e45595a3728e90b3714566588c8abae
https://github.com/llvm/llvm-project/commit/ca1833b91e45595a3728e90b3714566588c8abae
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-private-llvm.mlir
Log Message:
-----------
[mlir][OpenMP] cast address space of private variables (#130301)
Fixes #130159
The problem is that the alloca created for the private variable uses the
default alloca address space in that module, but the function the
pointer is being passed to expects a different address space, leading to
a type missmatch in the function argument.
I know nothing about how AMDGPU is supposed to work. I based this
solution on code from createDeviceArgumentAccessor(). Please could
somebody from AMD confirm this solution is appropriate.
Commit: ca582b1684c5f719b202b01d8727e9f8f4f1c3ec
https://github.com/llvm/llvm-project/commit/ca582b1684c5f719b202b01d8727e9f8f4f1c3ec
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Add FP8 lit tests (#127730)
Add FP8 lit tests to the following operators:
ARGMAX
AVGPOOL
CONV2D
CONV3D
DEPTHWISE_CONV2D
MATMUL
MAX_POOL2D
TRANSPOSE_CONV2D
CONST
CAST
CONCAT
PAD
RESHAPE
REVERSE
SLICE
TILE
TRANSPOSE
GATHER
SCATTER
Signed-off-by: Tai Ly <tai.ly at arm.com>
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 96f369791d6c146ccadb03e7f9d6b1be37990425
https://github.com/llvm/llvm-project/commit/96f369791d6c146ccadb03e7f9d6b1be37990425
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update the description section for CastOp to align with TOSA v1.0 spec (#129958)
Updated the description section to include all data types and match the
ordering with the spec.
https://www.mlplatform.org/tosa/tosa_spec.html#_cast
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: df79000896101acc9b8d7435e59f767b36c00ac8
https://github.com/llvm/llvm-project/commit/df79000896101acc9b8d7435e59f767b36c00ac8
Author: Augie Fackler <augie at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Debuginfod/Debuginfod.cpp
Log Message:
-----------
[clangd] fix warning by adding missing parens
Commit: 106c96462f2411ae8e84764feeb11246b997a169
https://github.com/llvm/llvm-project/commit/106c96462f2411ae8e84764feeb11246b997a169
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Change MatMul zero-point to inputs (#129785)
* Change zero-point attributes to inputs
* Fix relevant mlir tests
* Enhance ShardingInterface in MatMul
Signed-off-by: Udaya Ranga <udaya.ranga at arm.com>
Co-authored-by: Udaya Ranga <udaya.ranga at arm.com>
Commit: 8a43bc2c0989864f2635b4f79bb2d453a15cfd9a
https://github.com/llvm/llvm-project/commit/8a43bc2c0989864f2635b4f79bb2d453a15cfd9a
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/call-argument-attributes.ll
Log Message:
-----------
[MLIR][LLVMIR] Import: fix llvm.call attribute inheritance (#130221)
`inst->getFnAttr(Kind)` fallbacks to check if the parent has an
attribute, which breaks roundtriping the LLVM IR. This change actually
checks only in the call attribute list (no fallback to parent queries).
It's possible to argue that this small optimization isn't harmful, but
seems too early if it's breaking roundtrip behavior.
Commit: 50cfdf545e83ad92b614e98350d44ecdaeb755ae
https://github.com/llvm/llvm-project/commit/50cfdf545e83ad92b614e98350d44ecdaeb755ae
Author: Corbin Robeck <corbin.robeck at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add Scale Convert Packed (B)FP8 <-> (B)F16 Support for GFX950 (#130300)
Add Rocdl support for the following GFX950 instructions:
CVT_SCALE_PK_FP8_F16
CVT_SCALE_PK_BF8_F16
CVT_SCALE_PK_FP8_BF16
CVT_SCALE_PK_BF8_BF16
CVT_SCALE_SR_FP8_F16
CVT_SCALE_SR_BF8_F16
CVT_SCALE_SR_FP8_BF16
CVT_SCALE_SR_BF8_BF16
CVT_SCALE_PK_F16_FP8
CVT_SCALE_PK_F16_BF8
CVT_SCALE_F16_FP8
CVT_SCALE_F16_BF8
Commit: 2619c2ed584cdf3b38e6743ed3c785223f06e3f7
https://github.com/llvm/llvm-project/commit/2619c2ed584cdf3b38e6743ed3c785223f06e3f7
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
Revert "[mlir][tosa] Change MatMul zero-point to inputs" (#130330)
Reverts llvm/llvm-project#129785. Need rebase.
Commit: 813bbe055df2357efd42eaf1f3e7f5926a071941
https://github.com/llvm/llvm-project/commit/813bbe055df2357efd42eaf1f3e7f5926a071941
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][linalg] Allow fusing reshapes with non-parallel operands (#130148)
Removes the condition that checks that operand is not indexed by
reduction iterators which allows for more fine-grained control via the
reshape fusion control function. For example, users could allow fusing
reshapes expand the M/N dims of a matmul but not the K dims (or preserve
the current behavior by not fusing at all).
---------
Signed-off-by: Ian Wood <ianwood2024 at u.northwestern.edu>
Commit: 6a42dc694cffb4658ef72db308cfae7bfbba16b5
https://github.com/llvm/llvm-project/commit/6a42dc694cffb4658ef72db308cfae7bfbba16b5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Simplify emitULEB128 in DecoderEmitter.cpp. NFC (#130214)
Instead of returning the number of bytes emitted, just take the iterator
by reference so the increments in emitULEB128 will update the copy in
the caller.
Also pass the iterator by reference to emitNumToSkip so we don't need a
separate I += 3 in the caller.
Commit: 4bc3592bd2cb5fae6dfb5b3958727bae4115a800
https://github.com/llvm/llvm-project/commit/4bc3592bd2cb5fae6dfb5b3958727bae4115a800
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[MachinePipeliner] Fix use-after-free coping values of the same DenseMap (#130311)
After #130165.
In the code: `VRMap[CurStageNum][Def] = VRMap[CurStageNum][LoopVal]`
`VRMap[CurStageNum][LoopVal]` calculates a reference before
`VRMap[CurStageNum][Def]` which may rehash the DenseMap.
Then the reference can be dead.
Commit: 78631ac51b6b590d89031b1af0e14adc5f6d96f7
https://github.com/llvm/llvm-project/commit/78631ac51b6b590d89031b1af0e14adc5f6d96f7
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[Flang] explicitly link the pthread library when building shared flang-rt. (#129956)
This patch is to explicitly link the pthread library when building
shared flang-rt.
On AIX, for example, it needs to link in `libpthread.a` explicitly in
order to resolve the references to those `pthread_*` functions in
`include/flang-rt/runtime/lock.h`
Commit: 3a228a33c4cb55b56ecc45bee1ae02efba341b56
https://github.com/llvm/llvm-project/commit/3a228a33c4cb55b56ecc45bee1ae02efba341b56
Author: Michael Jones <michaelrj at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Main f16 test targets, new f16 funcs (#130208)
This patch adds acosf16 and asinf16 which I missed last patch, and also
the primary math tests for the float16 functions.
Commit: b19ed9c0435c5f7c89cba40285df3a1395a782fd
https://github.com/llvm/llvm-project/commit/b19ed9c0435c5f7c89cba40285df3a1395a782fd
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaStmt.cpp
A clang/test/C/C2y/n3409.c
M clang/test/Sema/generic-selection-type-extension.c
M clang/test/Sema/generic-selection.c
M clang/test/SemaCXX/generic-selection.cpp
Log Message:
-----------
[C2y] Implement WG14 N3409 (#130299)
This paper removes UB around use of void expressions. Previously, code
like this had undefined behavior:
```
void foo(void) {
(void)(void)1;
extern void x;
x;
}
```
and this is now well-defined in C2y. Functionally, this now means that
it is valid to use `void` as a `_Generic` association.
Commit: fefb6858da42053268b53c07aff8e1cf84dc1ada
https://github.com/llvm/llvm-project/commit/fefb6858da42053268b53c07aff8e1cf84dc1ada
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang][Docs] Fix ``ext_vector_type`` code block documentation
Commit: 868c409d38fe01cc403bb2b93b716b119d2dde10
https://github.com/llvm/llvm-project/commit/868c409d38fe01cc403bb2b93b716b119d2dde10
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
Log Message:
-----------
Reapply "[LLD][COFF] Support CF guards on ARM64X (#128440)"
Both native and EC views share table chunks. Ensure relevant symbols are
set in both symbol tables.
Commit: b0baa1d8bd68a2ce2f7c5f2b62333e410e9122a1
https://github.com/llvm/llvm-project/commit/b0baa1d8bd68a2ce2f7c5f2b62333e410e9122a1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/tools/gold/gold-plugin.cpp
Log Message:
-----------
[gold] Fix compilation (#130334)
After #115331.
Commit: 0ea02e77218d8aee37bc1a7c776caeeff468dc39
https://github.com/llvm/llvm-project/commit/0ea02e77218d8aee37bc1a7c776caeeff468dc39
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
A clang/test/C/C2y/n3410.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim nonconformance to WG14 N3410
This paper made it a constraint violation for the same identifier
within a TU to have both internal and external linkage. It was
previously UB.
Clang does not correctly diagnose the constraint in some cases,
documented in the added test case.
Commit: 11b1f154be2e4641ae588097f92d3a89e855e03a
https://github.com/llvm/llvm-project/commit/11b1f154be2e4641ae588097f92d3a89e855e03a
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Other/print-prof-data.ll
Log Message:
-----------
Optionally print `!prof` metadata inline (#130303)
Inspired by PR #127944, this patch adds an option to print profile metadata inline with respect to the instruction (or function) it annotates - this saves one time from having to search up and down large textual modules to find this info.
Commit: 8c130b11cb27364f96e36740b3a62832b192cb62
https://github.com/llvm/llvm-project/commit/8c130b11cb27364f96e36740b3a62832b192cb62
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
Update the C status page for N3409
This was implemented in b19ed9c0435c5f7c89cba40285df3a1395a782fd but I
forgot to update the website at the same time.
Commit: 1b01f058f4d013f5cdea7b926b7aa4bcfc81cfac
https://github.com/llvm/llvm-project/commit/1b01f058f4d013f5cdea7b926b7aa4bcfc81cfac
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
Log Message:
-----------
[NVPTX] Make GlobalUniqueCallSite a member of NVPTXISelLowering (#130212)
This change moves GlobalUniqueCallSite into NVPTXISelLowering. In
processes where multiple compilations occur, this makes call site
enumeration local to individual compilation, which ensures that call
site numbers are consistently sequential within each compilation and is
independent of other compilations happening in parallel.
Commit: cb3ce30ca813b4158b93756e465fa0afe71bfc49
https://github.com/llvm/llvm-project/commit/cb3ce30ca813b4158b93756e465fa0afe71bfc49
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[VPlan] Fold NOT into predicate of wide compares. (#129430)
Add simplification to fold negation into a compare, if the negation is
the only user of the compare. This removes a number of redundant
negations.
Alive2 Proofs for FPCMP test changes: https://alive2.llvm.org/ce/z/WGDz9U
PR: https://github.com/llvm/llvm-project/pull/129430
Commit: dfbadfc5e5bc9d18f2c9fef0462715f24409dc79
https://github.com/llvm/llvm-project/commit/dfbadfc5e5bc9d18f2c9fef0462715f24409dc79
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Change MatMul zero-point to inputs (#130332)
* Change zero-point attributes to inputs
* Fix relevant mlir tests
* Enhance ShardingInterface in MatMul
Signed-off-by: Udaya Ranga <udaya.ranga at arm.com>
Co-authored-by: Udaya Ranga <udaya.ranga at arm.com>
Commit: 5ff43550fa2aa3b93aa7310b8e435ba9e1338486
https://github.com/llvm/llvm-project/commit/5ff43550fa2aa3b93aa7310b8e435ba9e1338486
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/tools/amdgpu-arch/AMDGPUArch.cpp
M clang/tools/amdgpu-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
Revert "Fix amdgpu-arch for dll name on Windows (#101350)"
This reverts commit 6fa1bfad65edefe3f4c17740f05297d34e833b47.
Revert it due to breaking buildbot:
Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\tools\amdgpu-arch\AMDGPUArchByHIP.cpp(104):
error C2039: 'parse': is not a member of 'llvm::VersionTuple'
https://lab.llvm.org/buildbot/#/builders/46/builds/13184
Commit: 6cc8b0bef07f4270303bec0fc203f251a2fde262
https://github.com/llvm/llvm-project/commit/6cc8b0bef07f4270303bec0fc203f251a2fde262
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/test/API/functionalities/asan/TestMemoryHistory.py
M lldb/test/API/functionalities/asan/TestReportData.py
Log Message:
-----------
[lldb][test] Skip libsanitizers tests for now (#130305)
These are macOS tests only and are currently failing on the x86_64 CI
and on arm64 on recent versions of macOS/Xcode.
The tests are failing because we're stopping in:
```
Process 17458 stopped
* thread #1: tid = 0xbda69a, 0x00000002735bd000
libsystem_malloc.dylib`purgeable_print_self.cold.1, stop reason = EXC_BREAKPOINT (code=1, subcode=0x2735bd000)
```
instead of the libsanitizers library. This seems to be related to
`-fsanitize-trivial-abi` support
Skip these for now until we figure out the root cause.
Commit: dcda314b6c04a5f5558054df5ea7c02fb6fd9cbb
https://github.com/llvm/llvm-project/commit/dcda314b6c04a5f5558054df5ea7c02fb6fd9cbb
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Fix atmoicxor lowering to accept arrays (#130331)
The first agrument can be an address of a scalare, an array element or
even just the address of the first element of an array. Update lowering
to not trigger elemental lowering.
Commit: 21d973dbb335547848b77c01b106734942893693
https://github.com/llvm/llvm-project/commit/21d973dbb335547848b77c01b106734942893693
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
Reland [EquivClasses] Introduce members iterator-helper (#130319)
Changes: Fix the expectations in EquivalenceClassesTest.MemberIterator,
also fixing a build failure.
Commit: 8dd160f4767f971572eac065c8650d9202ff5bf9
https://github.com/llvm/llvm-project/commit/8dd160f4767f971572eac065c8650d9202ff5bf9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
Revert "[VPlan] Fold NOT into predicate of wide compares." (#130347)
Reverts llvm/llvm-project#129430
this seems to have introduced a divergence between legacy and
VPlan-based cost model
https://lab.llvm.org/buildbot/#/builders/30/builds/17159
Commit: f1178815d2435fdbe9eb5491ff52663e78c8ef7a
https://github.com/llvm/llvm-project/commit/f1178815d2435fdbe9eb5491ff52663e78c8ef7a
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
R flang/test/Lower/OpenMP/Todo/from-expectation-modifier.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-close.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-ompxhold.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-present.f90
R flang/test/Lower/OpenMP/Todo/to-expectation-modifier.f90
A flang/test/Lower/OpenMP/map-modifiers.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
M offload/test/Inputs/target-use-dev-ptr.c
M offload/test/offloading/fortran/target-use-dev-ptr.f90
A offload/test/offloading/fortran/target_map_ompx_hold.f90
A offload/test/offloading/fortran/target_map_present_fail.f90
A offload/test/offloading/fortran/target_map_present_success.f90
A offload/test/offloading/fortran/usm_map_close.f90
Log Message:
-----------
[Flang][OpenMP][MLIR] Implement close, present and ompx_hold modifiers for Flang maps (#129586)
This PR adds an initial implementation for the map modifiers close,
present and ompx_hold, primarily just required adding the appropriate
map type flags to the map type bits. In the case of ompx_hold it
required adding the map type to the OpenMP dialect. Close has a bit of a
problem when utilised with the ALWAYS map type on descriptors, so it is
likely we'll have to make sure close and always are not applied to the
descriptor simultaneously in the future when we apply always to the
descriptors to facilitate movement of descriptor information to device
for consistency, however, we may find an alternative to this with
further investigation. For the moment, it is a TODO/Note to keep track
of it.
Commit: d90423e310482bdbc731242fa25dcb3dd44e69de
https://github.com/llvm/llvm-project/commit/d90423e310482bdbc731242fa25dcb3dd44e69de
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M libc/test/src/stdlib/SortingTest.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Minor cleanup to remove unused dependencies. (#130348)
* strcpy doesn't need to depend on memcpy
* qsort_test_helper has been generalized and doesn't need to depend on
qsort.
This is a small cleanup to unblock the work outlined in #130327.
Commit: 993cbead9e5c2385b93b7931b74c5d83dbadeb34
https://github.com/llvm/llvm-project/commit/993cbead9e5c2385b93b7931b74c5d83dbadeb34
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
A llvm/test/DebugInfo/Generic/subrange_type.ll
Log Message:
-----------
Two fixes for DISubrangeType (#130345)
My previous patch to add DISubrangeType (#126772) had a couple of minor
errors. This patch corrects them.
1. When using a DISubrangeType as an array index type, the wrong tag was
written into the DIE.
2. I'd intended for subranges to use bit strides, not byte strides --
but neglected to actually implement this. Ada needs bit strides.
This patch adds a new test that checks both these things.
Finally, this patch adds some documentation for DISubrangeType.
Commit: c419acdf82d3b33cf151f78865469cf155ddf372
https://github.com/llvm/llvm-project/commit/c419acdf82d3b33cf151f78865469cf155ddf372
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Recognize CXXUnresolvedConstructExpr as a safe origin. (#130258)
Handle CXXUnresolvedConstructExpr in tryToFindPtrOrigin so that
constructing Ref, RefPtr, CheckedRef, CheckedPtr, ... constructed in
such a way that its type is unresolved at AST level will be still
treated as a safe pointer origin.
Also fix a bug in isPtrOfType that it was not recognizing
DeducedTemplateSpecializationType.
Commit: 356bbb0b2527ba929ac239596b361d257a411d2a
https://github.com/llvm/llvm-project/commit/356bbb0b2527ba929ac239596b361d257a411d2a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[NFC][IR] Use auto instead of explicit type (#130351)
Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
Commit: e4a6e2eb7176e677eb9a9c45913a284d374d60c5
https://github.com/llvm/llvm-project/commit/e4a6e2eb7176e677eb9a9c45913a284d374d60c5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[NFC][IR] Remove redundant .empty() check (#130352)
Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
Commit: d8e8892ddfe4ba1e3b7f859134766ef942bc0ba2
https://github.com/llvm/llvm-project/commit/d8e8892ddfe4ba1e3b7f859134766ef942bc0ba2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[NFC][ThinLTO] Avoid temporary std::string (#130353)
Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
Commit: e3076c6f3df8e5611406426f6c93b38c8a721a4b
https://github.com/llvm/llvm-project/commit/e3076c6f3df8e5611406426f6c93b38c8a721a4b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[NFC][IR] Use emplace instead of insert (#130360)
Preparation for for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
Commit: b2563028cf8285f1e77f6bdba9268cd92cd9355e
https://github.com/llvm/llvm-project/commit/b2563028cf8285f1e77f6bdba9268cd92cd9355e
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Add alloc_size knowledge to the 2-param span constructor warning (#114894)
We can take advantage of the attribute `alloc_size`. For example,
```
void * malloc(size_t size) __attribute__((alloc_size(1)));
std::span<char>{(char *)malloc(x), x}; // this is safe
```
rdar://136634730
Commit: 76e9b2a6142af1a6560bfaca261c200fbb7014d0
https://github.com/llvm/llvm-project/commit/76e9b2a6142af1a6560bfaca261c200fbb7014d0
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[libc][bazel] Introduce libc_test_library macros. (#130355)
Use it instead of libc_support_library macros for all helper libraries
that are used for unit tests. See #130327 for the rationale why we want
to do this. With this change, we can additionally ensure that no
testonly library will end up being a dependency of production libraries.
Commit: 23a44b925a7599301c5ae92e03dc7e1067385961
https://github.com/llvm/llvm-project/commit/23a44b925a7599301c5ae92e03dc7e1067385961
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
Log Message:
-----------
[NFC] Add additional checks to test for vec_pack_to_short_fp32 (#130324)
Update test in prep for IR changes that will be introduced in
https://github.com/llvm/llvm-project/pull/129923
Commit: 0ea52234fc3510463df2d8718404cede874e9b5e
https://github.com/llvm/llvm-project/commit/0ea52234fc3510463df2d8718404cede874e9b5e
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
A clang/test/Driver/HLSL/metal-converter.hlsl
Log Message:
-----------
[DXC] Add `-metal` flag to DXC driver (#130173)
This adds a flag to the DXC driver to enable calling the metal shader
converter if it is available to convert the final shader output for
metal.
Commit: 8ac359ba0d7ec1f1e7334a50405f0f20983b997a
https://github.com/llvm/llvm-project/commit/8ac359ba0d7ec1f1e7334a50405f0f20983b997a
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/docs/use/symbolfilejson.rst
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
Add complete ObjectFileJSON support for sections. (#129916)
Sections now support specifying:
- user IDs
- file offset/size
- alignment
- flags
- bool values for fake, encrypted and thread specific sections
Commit: 829e8993e5998f69fe04d23a815aeab51de9a4c5
https://github.com/llvm/llvm-project/commit/829e8993e5998f69fe04d23a815aeab51de9a4c5
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Lower __LDCA, __LDCS, __LDLU, __LDCV, __LDCG with arrays (#130357)
Commit: ae42f071032b29821beef6a33771258086bbbb1c
https://github.com/llvm/llvm-project/commit/ae42f071032b29821beef6a33771258086bbbb1c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Allow array pointer for atomicexch and atomiccas (#130363)
Commit: 0db702ac8e06911478615ac537f75ac778817c04
https://github.com/llvm/llvm-project/commit/0db702ac8e06911478615ac537f75ac778817c04
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
Log Message:
-----------
[NFC][IR] Wrap std::set into CfiFunctionIndex (#130361)
Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
We need a data structure to lookup by GUID.
Wrapping allow us to change implementation
with minimal changes to users.
Commit: ecec7d15a7024dbeb81cb7e7be814750d6615d20
https://github.com/llvm/llvm-project/commit/ecec7d15a7024dbeb81cb7e7be814750d6615d20
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
Log Message:
-----------
DAG: Use phi in alloca constant case to create virtual registers (#130254)
This is a follow up from 39bf765bb671fa7df3fe6c164cc9532fcb8653bd,
for the other case handled here. We would create CopyToReg marked
as uniform, even though the end phi would need to use VGPRs due
to another divergent input. There's no directly observable change in
the final output of the new test, but it does hit this case.
Commit: 8ce612ff702bf78137e3cea0544351d4826f9f69
https://github.com/llvm/llvm-project/commit/8ce612ff702bf78137e3cea0544351d4826f9f69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/rewrite-undef-for-phi.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
AMDGPU: Replace undef phi inputs with poison in tests (#130267)
I think the chance of this changing the tests in meaningful ways
is very low. This was perl with a few minor adjustments to a few
tests that produce new undefs. Only one test had a minor codegen
change with the switch, which I dropped from the change.
Commit: ab87206c4b95aa0b5047facffb5f78f7fe6ac269
https://github.com/llvm/llvm-project/commit/ab87206c4b95aa0b5047facffb5f78f7fe6ac269
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/finite-libcalls.ll
Log Message:
-----------
[X86][GlobalISel] Enable POW/EXP*/LOG* functions with libcall mapping (#130328)
Commit: 76393d3863bf7394edb69fb6a371b9a1c2c09ff6
https://github.com/llvm/llvm-project/commit/76393d3863bf7394edb69fb6a371b9a1c2c09ff6
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M clang/test/CodeGenCXX/wasm-eh.cpp
Log Message:
-----------
[WebAssembly] Rename functions in wasm-eh.cpp (#130220)
I think it is generally better for tests have some descriptive function
names so that we can insert new tests in the middle and don't have to
renumber all tests.
Also recently I added a (named) test to this file in #129020 so I think
it's consistent for other tests to be named.
Commit: 15869a861b598b06f3888dcc12882b8bb2325671
https://github.com/llvm/llvm-project/commit/15869a861b598b06f3888dcc12882b8bb2325671
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
Log Message:
-----------
[AMDGPU][MC] Don't crash on decoding invalid SOP1 ssrc0 operands. (#130302)
These are encoded as 8-bit fields.
Commit: a5588b6d20590a10db0f1a2046fba4d9f205ed68
https://github.com/llvm/llvm-project/commit/a5588b6d20590a10db0f1a2046fba4d9f205ed68
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/strings.yaml
M libc/src/strings/CMakeLists.txt
A libc/src/strings/ffs.cpp
A libc/src/strings/ffs.h
A libc/src/strings/ffsl.cpp
A libc/src/strings/ffsl.h
A libc/src/strings/ffsll.cpp
A libc/src/strings/ffsll.h
M libc/test/src/strings/CMakeLists.txt
A libc/test/src/strings/ffs_test.cpp
A libc/test/src/strings/ffsl_test.cpp
A libc/test/src/strings/ffsll_test.cpp
Log Message:
-----------
[libc] implement `strings/ffs` (#129892)
This patch adds the `strings/ffs` function.
ref: https://pubs.opengroup.org/onlinepubs/9799919799/functions/ffs.html
Closes: #122054.
Commit: 5bc166728abe3c80a271d3883d12805161b96335
https://github.com/llvm/llvm-project/commit/5bc166728abe3c80a271d3883d12805161b96335
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
Revert "Reland [EquivClasses] Introduce members iterator-helper" (#130380)
Reverts llvm/llvm-project#130319
Multiple bot failures.
Commit: cf1964af5a461196904b663ede04c26555fcff69
https://github.com/llvm/llvm-project/commit/cf1964af5a461196904b663ede04c26555fcff69
Author: R <rqou at berkeley.edu>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
A flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Integration/OpenMP/private-global.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/forall/character-1.f90
Log Message:
-----------
[flang] In AllocMemOp lowering, convert types for calling malloc on 32-bit (#129308)
Although 32-bit targets are currently not officially supported, add a type conversion in the AllocMemOp lowering when calling the `malloc` function on 32-bit targets. This fixes a type mismatch, and this fix makes it easier to potentially support such targets in the future.
This involves making sure the `LLVMTypeConverter` has the necessary information to know the target bit width.
Co-authored-by: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Commit: d8747eac36fb4f965de3cef252227be775a59959
https://github.com/llvm/llvm-project/commit/d8747eac36fb4f965de3cef252227be775a59959
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Translation: honor frame-pointer fn attribute (#130335)
Commit: 3121da52aa788199185585aa11f3d55b03adc93d
https://github.com/llvm/llvm-project/commit/3121da52aa788199185585aa11f3d55b03adc93d
Author: R <rqou at berkeley.edu>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
R flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Integration/OpenMP/private-global.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/forall/character-1.f90
Log Message:
-----------
Revert "[flang] In AllocMemOp lowering, convert types for calling malloc on 32-bit (#129308)"
This reverts commit cf1964af5a461196904b663ede04c26555fcff69.
This causes breakage on all the non-x86 buildbots as they don't have the i686
target enabled. This was missed in pre-commit CI.
Commit: 7dd5f2327955458f0aaf1c8cf27dbd684c0a3453
https://github.com/llvm/llvm-project/commit/7dd5f2327955458f0aaf1c8cf27dbd684c0a3453
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[NFC][LTO] Move GUID calculation into CfiFunctionIndex (#130370)
Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
Commit: ff033d1f28c6ea9ccced2a2c979395d3bef8aeec
https://github.com/llvm/llvm-project/commit/ff033d1f28c6ea9ccced2a2c979395d3bef8aeec
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Use reference instead of pointer for FilterChooser in Filter. NFC
Commit: 942fb038910036965ffe56cc53fd882eddbc6cba
https://github.com/llvm/llvm-project/commit/942fb038910036965ffe56cc53fd882eddbc6cba
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Translation: honor target-features fn attribute (#130343)
Commit: 7602d781b03427052c44537fa4b9c2a6da15697c
https://github.com/llvm/llvm-project/commit/7602d781b03427052c44537fa4b9c2a6da15697c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/test/Driver/hip-partial-link.hip
Log Message:
-----------
clang/HIP: Use regex for final path separator in hip-partial-link, again (#130371)
Commit: d08cf7900d2aaff9e7483ea74a58871edbdc45f2
https://github.com/llvm/llvm-project/commit/d08cf7900d2aaff9e7483ea74a58871edbdc45f2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/CodeGen/builtin-constant-p.c
M clang/test/CodeGenCXX/builtin-constant-p.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_constant_p (#130143)
Use the regular code paths for interpreting.
Add new instructions: `StartSpeculation` will reset the diagnostics
pointers to `nullptr`, which will keep us from reporting any diagnostics
during speculation. `EndSpeculation` will undo this.
The rest depends on what `Emitter` we use.
For `EvalEmitter`, we have no bytecode, so we implement `speculate()` by
simply visiting the first argument of `__builtin_constant_p`. If the
evaluation fails, we push a `0` on the stack, otherwise a `1`.
For `ByteCodeEmitter`, add another instrucion called `BCP`, that
interprets all the instructions following it until the next
`EndSpeculation` instruction. If any of those instructions fails, we
jump to the `EndLabel`, which brings us right before the
`EndSpeculation`. We then push the result on the stack.
Commit: 6f7570c200aa1ee9af9d1eb7a378d56264ee297e
https://github.com/llvm/llvm-project/commit/6f7570c200aa1ee9af9d1eb7a378d56264ee297e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-macro.hpp
Log Message:
-----------
[clang-tidy][misc-use-internal-linkage] fix false positives for function or variable in header file which contains macro expansion (#129594)
When check whether in main file, spelling loc will lead to `<scratch
space>`. instead, expansion loc is close to loc after preprocess. It is
suitable to analyze linkage.
Commit: f5789824900d61a8fbabe17c4449ff2e31d24ad4
https://github.com/llvm/llvm-project/commit/f5789824900d61a8fbabe17c4449ff2e31d24ad4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Remove unnecessary const_cast. NFC
Commit: 61efe360f9ba70736ca27ad289277c5c8268ffc0
https://github.com/llvm/llvm-project/commit/61efe360f9ba70736ca27ad289277c5c8268ffc0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
Log Message:
-----------
[lldb] Avoid unnecessary regex check in dwim-print (#114608)
An (unmeasured) improvement to performance of `dwim-print` when used as `po`.
This change lifts the check for `note_shown` to the top of the lambda, to avoid all subsequent work when the hint has already been shown. The main effect is to avoid performing a regex match when the hint is not going to be shown.
This change also constructs the `std::regex` only once, by making it static.
Commit: 8370ac88af288f5afa1028267a85a3456a38e810
https://github.com/llvm/llvm-project/commit/8370ac88af288f5afa1028267a85a3456a38e810
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Remove push_back from loop. NFC
We can initialize the vector to the right size and then assign
over some entries in the loop.
Commit: d65719fab3a624022f1fdd647c11f0a1553f6d46
https://github.com/llvm/llvm-project/commit/d65719fab3a624022f1fdd647c11f0a1553f6d46
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Use isUInt to simplify some asserts. NFC
Commit: f2607df291b4a9e6b1a72b3ee0d4e87066421db3
https://github.com/llvm/llvm-project/commit/f2607df291b4a9e6b1a72b3ee0d4e87066421db3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-07 (Fri, 07 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Use uint8_t for bit_value_t enum. NFC
This reduces the amount of space needed for vectors of bit_value_t
and allows the user of memset.
Also reorder the enum values so BIT_FALSE is 0 and BIT_TRUE is 1.
Commit: de1d351c64cb8f061d734e5d74de494b12ed2352
https://github.com/llvm/llvm-project/commit/de1d351c64cb8f061d734e5d74de494b12ed2352
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-2.mlir
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR][Affine] Fix fusion private memref creation for multiple producer stores (#130365)
Fix private memref creation in affine fusion for the multiple producer
store
case. This scenario was not supported but not properly checked.
Fixes: https://github.com/llvm/llvm-project/issues/120227
Commit: d4d4fc3df1e72b5a451a65af33eb3cd231aeb224
https://github.com/llvm/llvm-project/commit/d4d4fc3df1e72b5a451a65af33eb3cd231aeb224
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/scalrep.mlir
Log Message:
-----------
[MLIR][Affine] Fix scalrep and underlying analysis utility (#130251)
Fixes: https://github.com/llvm/llvm-project/issues/53034
Properly check the scopes of affine operations across which we are
performing affine analysis. Fixes transforms and analyses in the
presence of non-affine regions.
Commit: e85e44ca9cca70990a0b6a96a11014f2ac56aca5
https://github.com/llvm/llvm-project/commit/e85e44ca9cca70990a0b6a96a11014f2ac56aca5
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[MLIR][Affine] Fix crash in affine.for empty loop folder (#130372)
A yield value can be the loop IV itself.
Fixes: https://github.com/llvm/llvm-project/issues/74301
Commit: 474238bbfa194ef8f46ee8b3e8d91258885ceb63
https://github.com/llvm/llvm-project/commit/474238bbfa194ef8f46ee8b3e8d91258885ceb63
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterBankInfo.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#130388)
Commit: 9f83914880ad786196fb0a9658ef2c467fb23074
https://github.com/llvm/llvm-project/commit/9f83914880ad786196fb0a9658ef2c467fb23074
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#130389)
Commit: eef0ddaeb8e13d975ffbc97b1733a0cf19e0b572
https://github.com/llvm/llvm-project/commit/eef0ddaeb8e13d975ffbc97b1733a0cf19e0b572
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#130390)
Commit: 3e0c503e3e259ce63b08e5d780a82fe7385dfbc8
https://github.com/llvm/llvm-project/commit/3e0c503e3e259ce63b08e5d780a82fe7385dfbc8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#130391)
Commit: 49cf69a46b0527eaa7ac2eb1f4be898dd99727ba
https://github.com/llvm/llvm-project/commit/49cf69a46b0527eaa7ac2eb1f4be898dd99727ba
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Log Message:
-----------
[SystemZ] Avoid repeated hash lookups (NFC) (#130392)
Commit: 0cffcd3932c5ff6a681026b9d2c482b28be85eba
https://github.com/llvm/llvm-project/commit/0cffcd3932c5ff6a681026b9d2c482b28be85eba
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86PreTileConfig.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#130393)
Commit: 318bd451583ea695cc74a22f37351399e42aeb99
https://github.com/llvm/llvm-project/commit/318bd451583ea695cc74a22f37351399e42aeb99
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M .github/workflows/libclang-python-tests.yml
Log Message:
-----------
[libclang/python] Update maximum Python version for CI to 3.13 (#130385)
Commit: f3390fca034d2762f87ac8057078d6e9661305ce
https://github.com/llvm/llvm-project/commit/f3390fca034d2762f87ac8057078d6e9661305ce
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
Log Message:
-----------
[EquivClasses] Fix signature of copy-assignment operator (#130140)
The current signature is unusual, and deviates from the C++ operator
overloading spec.
https://en.cppreference.com/w/cpp/language/copy_assignment
Commit: 73e14de207a3aa0fa071fa56756e8e316edf5227
https://github.com/llvm/llvm-project/commit/73e14de207a3aa0fa071fa56756e8e316edf5227
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/matrix-multiply.ll
Log Message:
-----------
[X86] combineConcatVectorOps - recursively call combineConcatVectorOps instead of predicting when ops will freely concat (#130275)
The IsConcatFree helper is limited to estimates on where concatenating the subvector operands is beneficial, this patch replaces FADD/FSUB/FMUL concatenation checks with a recursive call to combineConcatVectorOps to see if it will profitably concatenate further up the chain.
Other opcodes can be moved to using the CombineSubOperand helper in future patches.
Commit: 3b8f9a228c5f12f282778b18117b9a88c07e87cb
https://github.com/llvm/llvm-project/commit/3b8f9a228c5f12f282778b18117b9a88c07e87cb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Loosen assertion This() for array elements (#130399)
getRecord() returns null on array elements, even for composite arrays.
The assertion here was overly restrictive and having an array element as
instance pointer should be fine otherwise.
Commit: 6d9dfd75e4df9fdff9ea34f1c0bd741bf5b53b89
https://github.com/llvm/llvm-project/commit/6d9dfd75e4df9fdff9ea34f1c0bd741bf5b53b89
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__type_traits/reference_constructs_from_temporary.h
A libcxx/include/__type_traits/reference_converts_from_temporary.h
M libcxx/include/module.modulemap
M libcxx/include/type_traits
M libcxx/modules/std/type_traits.inc
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/common.h
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
Log Message:
-----------
[libc++][type_traits] Implements "A type trait to detect reference binding to temporary" (#128649)
Implements partially: [P2255R2: A type trait to detect reference binding
to temporary](https://wg21.link/P2255R2)
Issue: https://github.com/llvm/llvm-project/issues/105180
https://eel.is/c++draft/meta.type.synop
https://eel.is/c++draft/meta.unary.prop
Implented type traits:
- [x] `reference_constructs_from_temporary`
- [x] `reference_converts_from_temporary`
Closes #129049
Minor drive-by tweak to `std::is_implicit_lifetime` tests.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: e86c5a7b9dbff5383cf9c81aa9eff38a92ce73aa
https://github.com/llvm/llvm-project/commit/e86c5a7b9dbff5383cf9c81aa9eff38a92ce73aa
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 6d9dfd75e4df
Commit: a779af3f882e1500ee6b9cb973e60c10ea0819b4
https://github.com/llvm/llvm-project/commit/a779af3f882e1500ee6b9cb973e60c10ea0819b4
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/snippet-copy-bundle-regression.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/unallocatable-bundle-regression.mir
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
Log Message:
-----------
[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)
This PR updates the SGPR layout to a striped caller/callee-saved design,
similar
to the VGPR layout.
To ensure that s30-s31 (return address), s32 (stack pointer), s33 (frame
pointer), and s34 (base pointer) remain callee-saved, the striped layout
starts
from s40, with a stripe width of 8. The last stripe is 10 wide instead
of 8 to
avoid ending with a 2-wide stripe.
Fixes #113782.
Commit: b01c71bbd4f7f7565313c38ac7a3b7377eada798
https://github.com/llvm/llvm-project/commit/b01c71bbd4f7f7565313c38ac7a3b7377eada798
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/loop-unswitch.mlir
Log Message:
-----------
[MLIR][Affine] Fix crash in loop unswitching/hoistAffineIfOp (#130401)
Fix obvious crash as a result of missing affine.parallel handling. Also,
fix bug exposed in a helper method used by hoistAffineIfOp.
Fixes: https://github.com/llvm/llvm-project/issues/62323
Commit: 46d218d1af5d285a646a1e5d3be6a43940fb4a9d
https://github.com/llvm/llvm-project/commit/46d218d1af5d285a646a1e5d3be6a43940fb4a9d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_{memchr,strchr,char_memchr} (#130420)
llvm has recently started to use `__builitn_memchr` at compile time, so
implement this. Still needs some work but the basics are done.
Commit: 037756242f6eb3cdd6e73ab6597651f87aa7b933
https://github.com/llvm/llvm-project/commit/037756242f6eb3cdd6e73ab6597651f87aa7b933
Author: Prakhar Dixit <dixitprakhar11 at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
Log Message:
-----------
[mlir]Add a check to ensure bailing out when reducing to a scalar (#129694)
Fixes issue #64075
Referencing this comment for more detailed view ->
https://github.com/llvm/llvm-project/issues/64075#issuecomment-2694112594
**Minimal example crashing :**
```
func.func @multi_reduction(%0: vector<4x2xf32>, %acc1: f32) -> f32 {
%2 = vector.multi_reduction <add>, %0, %acc1 [0, 1] : vector<4x2xf32> to f32
return %2 : f32
}
```
Commit: b15e7f3c23bfffe3b4a0180b5433bf5a876b87ae
https://github.com/llvm/llvm-project/commit/b15e7f3c23bfffe3b4a0180b5433bf5a876b87ae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - attempt to recursively shuffle combine if both base/sub-vectors are already shuffles (#130304)
Commit: a1b14dbc4740fe49dfb2af44907a195597474556
https://github.com/llvm/llvm-project/commit/a1b14dbc4740fe49dfb2af44907a195597474556
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Progress.h
R lldb/include/lldb/Host/Alarm.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Progress.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/common/Alarm.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/unittests/Callback/TestBreakpointSetCallback.cpp
M lldb/unittests/Core/ProgressReportTest.cpp
R lldb/unittests/Host/AlarmTest.cpp
M lldb/unittests/Host/CMakeLists.txt
Log Message:
-----------
[lldb] Remove progress report coalescing (#130329)
Remove support for coalescing progress reports in LLDB. This
functionality was motivated by Xcode, which wanted to listen for less
frequent, aggregated progress events at the cost of losing some detail.
See the original RFC [1] for more details. Since then, they've
reevaluated this trade-off and opted to listen for the regular, full
fidelity progress events and do any post processing on their end.
rdar://146425487
Commit: a22a646eaa33492cc3318aa44b433992741b1996
https://github.com/llvm/llvm-project/commit/a22a646eaa33492cc3318aa44b433992741b1996
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn build] Port a1b14dbc4740
Commit: e4fe22a8bd1853331d4811546ac038252baee79d
https://github.com/llvm/llvm-project/commit/e4fe22a8bd1853331d4811546ac038252baee79d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Check conditional op condition for ConstantExprs (#130425)
Same thing we now do in if statements. Check the condition of a
conditional operator for a statically known true/false value.
Commit: ed93e6b0e6bb83a356ad3a34f9e6c989db7b59f3
https://github.com/llvm/llvm-project/commit/ed93e6b0e6bb83a356ad3a34f9e6c989db7b59f3
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/stores-of-loads-merging.ll
Log Message:
-----------
[RISCV] Added test for dag spill fix
Commit: bac490b0bc9e870d479564334db14303043e6c83
https://github.com/llvm/llvm-project/commit/bac490b0bc9e870d479564334db14303043e6c83
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[TableGen] Use Register in FastISel output. NFC
Commit: aff6ab9d90d23c46bc5f4b909d54bfa9c95c9f03
https://github.com/llvm/llvm-project/commit/aff6ab9d90d23c46bc5f4b909d54bfa9c95c9f03
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
Log Message:
-----------
[clang][bytecode] Surround bcp condition with Start/EndSpeculation (#130427)
This is similar to what the current interpreter is doing - the
FoldConstant RAII object surrounds the entire HandleConditionalOperator
call, which means the condition and both TrueExpr or FalseExpr.
Commit: 6f77f534d05dc3069ea4d0d7a847d77d45b798f4
https://github.com/llvm/llvm-project/commit/6f77f534d05dc3069ea4d0d7a847d77d45b798f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert (V)SHUFPS concatenation to use combineConcatVectorOps recursion (#130426)
Only concatenate X86ISD::SHUFP nodes if at least one operand is
beneficial to concatenate - helps prevent lot of unnecessary AVX1
concatenations
Commit: 2fb1f032240373e8050808f4acefe461e8e10737
https://github.com/llvm/llvm-project/commit/2fb1f032240373e8050808f4acefe461e8e10737
Author: vporpo <vporpodas at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromBBs.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromBBs.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
A llvm/test/Transforms/SandboxVectorizer/regions-from-bbs.ll
Log Message:
-----------
[SandboxVec] Add region-from-bbs helper pass (#130153)
RegionFromBBs is a helper Sandbox IR function pass that builds a region
for each BB. This helps test region passes in isolation without relying
on other parts of the vectorizer, which is especially useful for
stress-testing.
Commit: 3ac24236aac596e81641a5e551cefe5227de2bd3
https://github.com/llvm/llvm-project/commit/3ac24236aac596e81641a5e551cefe5227de2bd3
Author: Peter Jung <admin at ptr1337.dev>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Fix typo in llvm-profdata (#114675)
Signed-off-by: Peter Jung <admin at ptr1337.dev>
Commit: 90b1e5bc8aa03099c84cba6898ba26e40df398fa
https://github.com/llvm/llvm-project/commit/90b1e5bc8aa03099c84cba6898ba26e40df398fa
Author: Jade <spacey-sooty at proton.me>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/Support/ConvertUTF.h
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[llvm][NFC]Fix a few typos (#110844)
Commit: c182e9db1e46fc4fcc9664e89b55f3c1dc493250
https://github.com/llvm/llvm-project/commit/c182e9db1e46fc4fcc9664e89b55f3c1dc493250
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 2fb1f0322403
Commit: 379405afc074d251330dd0fa104d1735d4ce175b
https://github.com/llvm/llvm-project/commit/379405afc074d251330dd0fa104d1735d4ce175b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix typo in X86ISD::SHUFP concatenation
Commit: c4ed0ad1f52a7bec7377bbaf75f812527ec739bd
https://github.com/llvm/llvm-project/commit/c4ed0ad1f52a7bec7377bbaf75f812527ec739bd
Author: Liberty <gigacms at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
[Clang] Fix typo 'dereferencable' to 'dereferenceable' (#116761)
This patch corrects the typo 'dereferencable' to 'dereferenceable' in
CGCall.cpp.
The typo is located within a comment inside the `void
CodeGenModule::ConstructAttributeList` function.
Commit: 4d5955215eb74a3bfa2394333a0a412df7d5a036
https://github.com/llvm/llvm-project/commit/4d5955215eb74a3bfa2394333a0a412df7d5a036
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
Log Message:
-----------
[NFC][YAML][IR] Output CfiFunction sorted (#130379)
As-is it's NFC, as internally `CfiFunction*` are std::set<>.
We are changing internals of `CfiFunctionDefs` and
`CfiFunctionDecls` so they will be ordered by GUID.
Sorting by name is unnecessary but good for
readability and tests.
Commit: 262a7755822c5eec96aea41f7f010b15c040f480
https://github.com/llvm/llvm-project/commit/262a7755822c5eec96aea41f7f010b15c040f480
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
Log Message:
-----------
[libc++][NFC] Fixed bad link in 21.rst (#130428)
Commit: 1b2c23acbbc1658567de0e08a89d84acfd7ee268
https://github.com/llvm/llvm-project/commit/1b2c23acbbc1658567de0e08a89d84acfd7ee268
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
Re-land "[mlir][ODS] Add a generated builder that takes the Properties struct" (#130117) (#130373)
This reverts commit 32f543760c7f44c4c7d18bc00a3a1d8860c42bff.
Investigations showed that the unit test utilities were calling erase(),
causing a use-after-free. Fixed by rearranging checks in the test
Commit: 49e585f4c44e379193453a9c344807f44a97664f
https://github.com/llvm/llvm-project/commit/49e585f4c44e379193453a9c344807f44a97664f
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/tools/gold/gold-plugin.cpp
Log Message:
-----------
Revert "[gold] Fix compilation (#130334)"
This reverts commit b0baa1d8bd68a2ce2f7c5f2b62333e410e9122a1.
Reverting follow-up commit to ce9e1d3c15ed6290f1cb07b482939976fa8115cd since the original commit test is flaky.
Commit: 0d209c6d905e3da7eae28e5f27c7f0ad33f60c91
https://github.com/llvm/llvm-project/commit/0d209c6d905e3da7eae28e5f27c7f0ad33f60c91
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Debuginfod/Debuginfod.cpp
Log Message:
-----------
Revert "[clangd] fix warning by adding missing parens"
This reverts commit df79000896101acc9b8d7435e59f767b36c00ac8.
Reverting follow-up commit to ce9e1d3c15ed6290f1cb07b482939976fa8115cd since the original commit test is flaky.
Commit: 1d763f383380ec629ee6d5053fd41322efcbc6bd
https://github.com/llvm/llvm-project/commit/1d763f383380ec629ee6d5053fd41322efcbc6bd
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M lldb/source/Core/DataFileCache.cpp
M llvm/include/llvm/Support/Caching.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Support/Caching.cpp
M llvm/tools/gold/gold-plugin.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/Caching.cpp
Log Message:
-----------
Revert "Modify the localCache API to require an explicit commit on CachedFile… (#115331)"
This reverts commit ce9e1d3c15ed6290f1cb07b482939976fa8115cd.
The unittest added in this commit seems to be flaky causing random failure on buildbots:
- https://lab.llvm.org/buildbot/#/builders/46/builds/13235
- https://lab.llvm.org/buildbot/#/builders/46/builds/13232
- https://lab.llvm.org/buildbot/#/builders/46/builds/13228
- https://lab.llvm.org/buildbot/#/builders/46/builds/13224
- https://lab.llvm.org/buildbot/#/builders/46/builds/13220
- https://lab.llvm.org/buildbot/#/builders/46/builds/13210
- https://lab.llvm.org/buildbot/#/builders/46/builds/13208
- https://lab.llvm.org/buildbot/#/builders/46/builds/13207
- https://lab.llvm.org/buildbot/#/builders/46/builds/13202
- https://lab.llvm.org/buildbot/#/builders/46/builds/13196
and
- https://lab.llvm.org/buildbot/#/builders/180/builds/14266
- https://lab.llvm.org/buildbot/#/builders/180/builds/14254
- https://lab.llvm.org/buildbot/#/builders/180/builds/14250
- https://lab.llvm.org/buildbot/#/builders/180/builds/14245
- https://lab.llvm.org/buildbot/#/builders/180/builds/14244
- https://lab.llvm.org/buildbot/#/builders/180/builds/14226
Commit: 3a0d0c6b1edfa4a71e494938e8c6e8ee8cfe83b7
https://github.com/llvm/llvm-project/commit/3a0d0c6b1edfa4a71e494938e8c6e8ee8cfe83b7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
Log Message:
-----------
[NFC][YAML] Switch `std::sort` to `llvm::sort` (#130448)
Follow up to #130379.
Commit: a892a5dc5ee83dc8894fb6b7db00106f10865758
https://github.com/llvm/llvm-project/commit/a892a5dc5ee83dc8894fb6b7db00106f10865758
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 1d763f383380
Commit: 85d60a441ab810e25605fb4555971b1d0a996e5c
https://github.com/llvm/llvm-project/commit/85d60a441ab810e25605fb4555971b1d0a996e5c
Author: Khalil Estell <kammcecorp at gmail.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clangd] Add `BuiltinHeaders` config option (#129459)
This option, under `CompileFlags`, governs whether clangd uses its own
built-in headers (`Clangd` option value) or the built-in headers of the driver
in the file's compile command (`QueryDriver` option value, applicable to
cases where `--query-driver` is used to instruct clangd to ask the driver
for its system include paths).
The default value is `Clangd`, preserving clangd's current defaut behaviour.
Fixes clangd/clangd#2074
Commit: 1649ca5af07a40948ea409ca055330bec1419e72
https://github.com/llvm/llvm-project/commit/1649ca5af07a40948ea409ca055330bec1419e72
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
Log Message:
-----------
[AArch64] Use Register in AArch64FastISel.cpp. NFC
Commit: 0715c6cc6d11814b8a31bc0368ca080b72810177
https://github.com/llvm/llvm-project/commit/0715c6cc6d11814b8a31bc0368ca080b72810177
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[NFC][IR] De-duplicate CFI related code (#130450)
Commit: 3a0c33afd1b3085d958e89c1c0c8a8b8c0f34739
https://github.com/llvm/llvm-project/commit/3a0c33afd1b3085d958e89c1c0c8a8b8c0f34739
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
Log Message:
-----------
[msan] Handle Arm NEON pairwise min/max instructions (#129824)
Change the handling of:
- llvm.aarch64.neon.fmaxp
- llvm.aarch64.neon.fminp
- llvm.aarch64.neon.fmaxnmp
- llvm.aarch64.neon.fminnmp
- llvm.aarch64.neon.smaxp
- llvm.aarch64.neon.sminp
- llvm.aarch64.neon.umaxp
- llvm.aarch64.neon.uminp
from the incorrect heuristic handler (maybeHandleSimpleNomemIntrinsic)
to handlePairwiseShadowOrIntrinsic.
Updates the tests from https://github.com/llvm/llvm-project/pull/129760
Adds a note that maybeHandleSimpleNomemIntrinsic may incorrectly match
horizontal/pairwise intrinsics.
Commit: 58ace30ebcd2cf2a34272fafe556a99473492b39
https://github.com/llvm/llvm-project/commit/58ace30ebcd2cf2a34272fafe556a99473492b39
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
Log Message:
-----------
[NFC][YAML] Replace iterators with simple getter (#130449)
To simplify #130382.
Commit: 9e87caff98cefcabfc13288229a4422e7f9edde4
https://github.com/llvm/llvm-project/commit/9e87caff98cefcabfc13288229a4422e7f9edde4
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M libcxx/include/type_traits
Log Message:
-----------
[libc++][NFC] Comment cleanup for `<type_traits>` (#130422)
- Aligns all version comments to line 65.
- Consistently uses `// since C++` instead of `// C++`, in lowercase as
used in most version comments.
- Consistently uses `class` to introduce type template parameters.
- Consistently uses `inline constexpr` for variable templates.
- Corrects the comment for `bool_constant` to `// since C++17` as it's a
C++17 feature.
- Changes the class-key of `result_of` to `struct`, which follows N4659
[depr.meta.types] and the actual usage in libc++.
- Adds missed `// since C++17` for `is_(nothrow_)invocable(_r)`.
- Moves the comments for `is_nothrow_convertible_v` to the part for
variable templates.
- Removes duplicated comments for `true_type` and `false_type`.
Commit: 667bbd2ecce09ed135064ae200bc6388b36c43c5
https://github.com/llvm/llvm-project/commit/667bbd2ecce09ed135064ae200bc6388b36c43c5
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
M llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
Log Message:
-----------
[msan] Apply handleVectorReduceIntrinsic to max/min vector instructions (#129819)
Changes the handling of:
- llvm.aarch64.neon.smaxv
- llvm.aarch64.neon.sminv
- llvm.aarch64.neon.umaxv
- llvm.aarch64.neon.uminv
- llvm.vector.reduce.smax
- llvm.vector.reduce.smin
- llvm.vector.reduce.umax
- llvm.vector.reduce.umin
- llvm.vector.reduce.fmax
- llvm.vector.reduce.fmin
from the default strict handling (visitInstruction) to
handleVectorReduceIntrinsic.
Also adds a parameter to handleVectorReduceIntrinsic to specify whether
the return type must match the elements of the vector.
Updates the tests from https://github.com/llvm/llvm-project/pull/129741,
https://github.com/llvm/llvm-project/pull/129810,
https://github.com/llvm/llvm-project/pull/129768
Commit: 735afc8cebc452b097f284058a03e96a4706efce
https://github.com/llvm/llvm-project/commit/735afc8cebc452b097f284058a03e96a4706efce
Author: Ishaan Verma <ishaan56verma at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M libc/include/llvm-libc-macros/stdfix-macros.h
M libc/include/stdfix.yaml
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/macros_test.cpp
Log Message:
-----------
[libc] Added type-generic macros for fixed-point functions (#129371)
Adds macros `absfx`, `countlsfx` and `roundfx` .
ref: #129111
Commit: 227f9544a4d4bf9ab4da8a78cc801de697d4bc6d
https://github.com/llvm/llvm-project/commit/227f9544a4d4bf9ab4da8a78cc801de697d4bc6d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Bail out on non constant evaluated builtins (#130431)
If the ASTContext says so, don't bother trying to constant evaluate the
given builtin.
Commit: 275d7175aceffcc7d5c0827118a1dea6ebf85798
https://github.com/llvm/llvm-project/commit/275d7175aceffcc7d5c0827118a1dea6ebf85798
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
Log Message:
-----------
[ARM] Use Register in FastISel. NFC
Commit: ae1479c79ed123bbe5865b0d91dff80efe74f32f
https://github.com/llvm/llvm-project/commit/ae1479c79ed123bbe5865b0d91dff80efe74f32f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
Log Message:
-----------
[ARM] Remove unused argument. NFC
Commit: 0f646fc84883d6044691d2d60404de3cc4e60d5b
https://github.com/llvm/llvm-project/commit/0f646fc84883d6044691d2d60404de3cc4e60d5b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove unused DenseMap variable. NFC
Commit: d47bc6fd93f9f439a54fd7cf55cdcb2e2ca0cfcb
https://github.com/llvm/llvm-project/commit/d47bc6fd93f9f439a54fd7cf55cdcb2e2ca0cfcb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-08 (Sat, 08 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
Log Message:
-----------
[ARM] Change FastISel Address from a struct to a class. NFC
This allows us to use Register in the interface, but store an
unsigned internally in a union.
Commit: 2172a5edcf9357d24006a3c1032f2d52e199915d
https://github.com/llvm/llvm-project/commit/2172a5edcf9357d24006a3c1032f2d52e199915d
Author: Ben Shi <2283975856 at qq.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
Log Message:
-----------
[clang][analyzer][NFC] Fix typos in comments (#130456)
Commit: 2d1634fab716f3200990e3e5d7a102466509f202
https://github.com/llvm/llvm-project/commit/2d1634fab716f3200990e3e5d7a102466509f202
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated map lookups (NFC) (#130461)
Commit: 7cd304725263a6f58d61aede6c0b6c08c042d200
https://github.com/llvm/llvm-project/commit/7cd304725263a6f58d61aede6c0b6c08c042d200
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#130462)
Commit: 7c7cebf49de18fa3445d9e8fc68b0d049f2d67c1
https://github.com/llvm/llvm-project/commit/7c7cebf49de18fa3445d9e8fc68b0d049f2d67c1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#130463)
Commit: cf3aa06c1627a6e6606b729fac344fefaeb0ba85
https://github.com/llvm/llvm-project/commit/cf3aa06c1627a6e6606b729fac344fefaeb0ba85
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#130464)
Commit: 573df34ea053a82de2d8fb28dd430bca94ddcaaa
https://github.com/llvm/llvm-project/commit/573df34ea053a82de2d8fb28dd430bca94ddcaaa
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-macho.cpp
Log Message:
-----------
[llvm-jitlink] Avoid repeated hash lookups (NFC) (#130465)
Commit: 99d2b3b0aa138470822fa82d8659bbb0e6364784
https://github.com/llvm/llvm-project/commit/99d2b3b0aa138470822fa82d8659bbb0e6364784
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
Log Message:
-----------
[llvm-profgen] Avoid repeated hash lookups (NFC) (#130466)
Commit: 6fbe491e1776f6598790a844bf4e743de956b42d
https://github.com/llvm/llvm-project/commit/6fbe491e1776f6598790a844bf4e743de956b42d
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
A lld/test/ELF/loongarch-relax-call36-2.s
A lld/test/ELF/loongarch-relax-call36.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
Log Message:
-----------
[lld][LoongArch] Relax call36/tail36: R_LARCH_CALL36 (#123576)
Instructions with relocation `R_LARCH_CALL36` may be relax as follows:
```
From:
pcaddu18i $dest, %call36(foo)
R_LARCH_CALL36, R_LARCH_RELAX
jirl $r, $dest, 0
To:
b/bl foo # bl if r=$ra, b if r=$zero
R_LARCH_B26
```
Commit: d84dc8ff93e94f6f0b5a5222afc26e0ee3a4b4f9
https://github.com/llvm/llvm-project/commit/d84dc8ff93e94f6f0b5a5222afc26e0ee3a4b4f9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/iX-ext-split.ll
Log Message:
-----------
[InstCombine] Add handling for (or (zext x), (shl (zext (ashr x, bw/2-1))), bw/2) -> (sext x) fold (#130316)
Minor tweak to #129363 which handled all the cases where there was a sext for the original source value, but not for cases where the source is already half the size of the destination type
Another regression noticed in #76524
Commit: 0f732481acccb3ac22b70e326feae854cf972126
https://github.com/llvm/llvm-project/commit/0f732481acccb3ac22b70e326feae854cf972126
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix getting pointer element type in __builtin_memcmp (#130485)
When such a pointer is heap allocated, the type we get is a pointer
type. Take the pointee type in that case.
Commit: 22a45c43db2e6267d0b85a175da0129e865cffec
https://github.com/llvm/llvm-project/commit/22a45c43db2e6267d0b85a175da0129e865cffec
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - use all_of to check for matching PSHUFD/PSHUFLW/PSHUFHW shuffle mask.
Prep work before adding 512-bit support.
Commit: 2a3e782f4053d8ecb98dc110ebb6bacdb7bb17c7
https://github.com/llvm/llvm-project/commit/2a3e782f4053d8ecb98dc110ebb6bacdb7bb17c7
Author: Andrewyuan34 <yiboy at uvic.ca>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
Log Message:
-----------
[clang-tidy] Fix invalid fixit from modernize-use-ranges for nullptr used with std::unique_ptr (#127162)
This PR fixes issue #124815 by correcting the handling of `nullptr` with
`std::unique_ptr` in the `modernize-use-ranges` check.
Updated the logic to suppress warnings for `nullptr` in `std::find`.
Commit: 107aa6a3d3ab96b7eec55e1ec5c3eabfa6ab2f9f
https://github.com/llvm/llvm-project/commit/107aa6a3d3ab96b7eec55e1ec5c3eabfa6ab2f9f
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/cf.ll
Log Message:
-----------
[X86] Combine bitcast(v1Ty insert_vector_elt(X, Y, 0)) to Y (#130475)
Though it only happens in v1i1 when we generate llvm.masked.load/store
intrinsics for APX cload/cstore.
https://godbolt.org/z/vjsrofsqx
Commit: 029e10289a02b438f1a22f401c94ed60ab4bb704
https://github.com/llvm/llvm-project/commit/029e10289a02b438f1a22f401c94ed60ab4bb704
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstSimplify/fcmp.ll
Log Message:
-----------
[ValueTracking] Bail out on x86_fp80 when computing fpclass with knownbits (#130477)
In https://github.com/llvm/llvm-project/pull/97762, we assume the
minimum possible value of X is NaN implies X is NaN. But it doesn't hold
for x86_fp80 format. If the knownbits of X are
`?'011111111111110'????????????????????????????????????????????????????????????????`,
the minimum possible value of X is NaN/unnormal. However, it can be a
normal value.
Closes https://github.com/llvm/llvm-project/issues/130408.
Commit: f3dd9c99d1a10f31ac6ed1e946e0ea2b982abad7
https://github.com/llvm/llvm-project/commit/f3dd9c99d1a10f31ac6ed1e946e0ea2b982abad7
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
R lld/test/ELF/loongarch-relax-call36-2.s
R lld/test/ELF/loongarch-relax-call36.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
Log Message:
-----------
Revert "[lld][LoongArch] Relax call36/tail36: R_LARCH_CALL36 (#123576)"
This reverts commit 6fbe491e1776f6598790a844bf4e743de956b42d.
Broke check-lld, see the many bot comments on
https://github.com/llvm/llvm-project/pull/123576
Commit: fd267082ee6df24aa5d5b4d7790c08a9d50a26b7
https://github.com/llvm/llvm-project/commit/fd267082ee6df24aa5d5b4d7790c08a9d50a26b7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Refactor VPlan creation, add transform introducing region (NFC). (#128419)
Create an empty VPlan first, then let the HCFG builder create a plain
CFG for the top-level loop (w/o a top-level region). The top-level
region is introduced by a separate VPlan-transform. This is instead of
creating the vector loop region before building the VPlan CFG for the
input loop.
This simplifies the HCFG builder (which should probably be renamed) and
moves along the roadmap ('buildLoop') outlined in [1].
As follow-up, I plan to also preserve the exit branches in the initial
VPlan out of the CFG builder, including connections to the exit blocks.
The conversion from plain CFG with potentially multiple exits to a
single entry/exit region will be done as VPlan transform in a follow-up.
This is needed to enable VPlan-based predication. Currently early exit
support relies on building the block-in masks on the original CFG,
because exiting branches and conditions aren't preserved in the VPlan.
So in order to switch to VPlan-based predication, we will have to
preserve them in the initial plain CFG, so the exit conditions are
available explicitly when we convert to single entry/exit regions.
Another follow-up is updating the outer loop handling to also introduce
VPRegionBlocks for nested loops as transform. Currently the existing
logic in the builder will take care of creating VPRegionBlocks for
nested loops, but not the top-level loop.
[1]
https://llvm.org/devmtg/2023-10/slides/techtalks/Hahn-VPlan-StatusUpdateAndRoadmap.pdf
PR: https://github.com/llvm/llvm-project/pull/128419
Commit: 3a727549ef963d13efc3d1466318bfcf838377e7
https://github.com/llvm/llvm-project/commit/3a727549ef963d13efc3d1466318bfcf838377e7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port fd267082ee6d
Commit: 7c4ef498e1e41ed80f8553a955145b6580918f7c
https://github.com/llvm/llvm-project/commit/7c4ef498e1e41ed80f8553a955145b6580918f7c
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Make ClonedModule case more obvious in CollectDebugInfoForCloning (#129143)
Summary:
The code's behavior is unchanged, but it's more obvious right now.
Test Plan:
ninja check-llvm-unit check-llvm
Commit: fd973d251213c8272074bdd2b12bea8484a4231a
https://github.com/llvm/llvm-project/commit/fd973d251213c8272074bdd2b12bea8484a4231a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M libcxx/include/__memory/allocator_traits.h
Log Message:
-----------
[libc++] Protect more code against -Wdeprecated. (#130419)
This seems needed when updating the CI Docker image.
Commit: b6bb9dc5abd7c6452c13a53fa8949cb259db459b
https://github.com/llvm/llvm-project/commit/b6bb9dc5abd7c6452c13a53fa8949cb259db459b
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++][CI] Update action runner base image. (#130433)
Updates to the latest release. The side effect of this change is
updating all compilers to the latest upstream version.
Commit: a7d5b3f711b7c852aa1337e329661dd36025865a
https://github.com/llvm/llvm-project/commit/a7d5b3f711b7c852aa1337e329661dd36025865a
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/SemaHLSL/Language/NoVirtual.hlsl
Log Message:
-----------
[HLSL] Disallow virtual inheritance and functions (#127346)
This PR disallows virtual inheritance and virtual functions in HLSL.
Commit: df570dadcb93a32c308d31c2ab54d2f46c8ae0c0
https://github.com/llvm/llvm-project/commit/df570dadcb93a32c308d31c2ab54d2f46c8ae0c0
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Simplify the flow in FindDebugInfoToIdentityMap (#129144)
Summary:
The new flow should make it more clear what is happening in cases of
Different of Cloned modules.
Test Plan:
ninja check-llvm-unit check-llvm
Commit: 62a6d63d634d816a7d73ab7735176ad05b118c79
https://github.com/llvm/llvm-project/commit/62a6d63d634d816a7d73ab7735176ad05b118c79
Author: Mariusz Borsa <wrotki at msn.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_procmaps_mac.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_mac_test.cpp
Log Message:
-----------
[Sanitizers][Darwin] Correct iterating of MachO load commands (#130161)
The condition to stop iterating so far was to look for load command cmd
field == 0. The iteration would continue past the commands area, and
would finally find lc->cmd ==0, if lucky. Or crash with bus error, if
out of luck.
Correcting this by limiting the number of iterations to the count
specified in mach_header(_64) ncmds field.
rdar://143903403
---------
Co-authored-by: Mariusz Borsa <m_borsa at apple.com>
Commit: e44e24dfe6ef4a9fff6e1ee6617d89de5b616fd3
https://github.com/llvm/llvm-project/commit/e44e24dfe6ef4a9fff6e1ee6617d89de5b616fd3
Author: David Green <david.green at arm.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
Log Message:
-----------
[AArch64] Improve vector funnel shift by constant costs. (#130044)
We now have better codegen, and can have better costs to match. The
generated code should now produce a shl+usra and can be seen in
testcases such as:
https://github.com/llvm/llvm-project/blob/7e5821bae80db3f3f0fe0d5f8ce62f79e548eed5/llvm/test/CodeGen/AArch64/fsh.ll#L3941.
Commit: 437d587e48002929552d982c9e2dc73428a37dd9
https://github.com/llvm/llvm-project/commit/437d587e48002929552d982c9e2dc73428a37dd9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
Log Message:
-----------
[LV] Add outer loop test with different successor orders in inner latch.
Commit: 29129be6322375a296a3540a5ed64d87ee0aac9a
https://github.com/llvm/llvm-project/commit/29129be6322375a296a3540a5ed64d87ee0aac9a
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[NFC][Cloning] Add a helper to collect debug info from instructions (#129145)
Summary:
Just moving around. This helper will be used for further refactoring.
Test Plan:
ninja check-llvm-unit check-llvm
Commit: bc028026757ed7580e2ec76a04b89dcfaa0ca8e9
https://github.com/llvm/llvm-project/commit/bc028026757ed7580e2ec76a04b89dcfaa0ca8e9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
Log Message:
-----------
Revert "[ARM] Change FastISel Address from a struct to a class. NFC"
This reverts commit d47bc6fd93f9f439a54fd7cf55cdcb2e2ca0cfcb.
I forgot to commit clang-format cleanup before I pushed this.
Commit: bd64f313a55b66503808f57e2dfe23ba01db0f88
https://github.com/llvm/llvm-project/commit/bd64f313a55b66503808f57e2dfe23ba01db0f88
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
Log Message:
-----------
Recommit "[ARM] Change FastISel Address from a struct to a class. NFC"
With clang-format this time.
Original message:
This allows us to use Register in the interface, but store an
unsigned internally in a union.
Commit: 2317a72489145f582ac1f01bc8c4f3b6bb5abb44
https://github.com/llvm/llvm-project/commit/2317a72489145f582ac1f01bc8c4f3b6bb5abb44
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M lldb/source/ValueObject/ValueObjectChild.cpp
Log Message:
-----------
[lldb] Add missing converstion to optional
Commit: 74ca5799caea342ac1e8d34ab5be7f45875131b2
https://github.com/llvm/llvm-project/commit/74ca5799caea342ac1e8d34ab5be7f45875131b2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
Log Message:
-----------
[X86] Use Register in FastISel. NFC
Replace 'Reg == 0' with '!Reg'
Commit: e85e29c2992b3b86f9ac7db18c0c2b9dde95a2b2
https://github.com/llvm/llvm-project/commit/e85e29c2992b3b86f9ac7db18c0c2b9dde95a2b2
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
A clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/builtins/select.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
Log Message:
-----------
[HLSL] select scalar overloads for vector conditions (#129396)
This PR adds scalar/vector overloads for vector conditions to the
`select` builtin, and updates the sema checking and codegen to allow
scalars to extend to vectors.
Fixes #126570
Commit: 9764659fb4ae8b3ecaa8e462dde94b742d113b93
https://github.com/llvm/llvm-project/commit/9764659fb4ae8b3ecaa8e462dde94b742d113b93
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Use `adl_being`/`end` in `hasSingleElement` (#130506)
This is to make sure that ADT helpers consistently use argument
dependent lookup when dealing with input ranges.
This was a part of #87936 but reverted due to buildbot failures. Now
that I have a threadripper system, I'm landing this piece-by-piece.
Commit: 2e7a5092375d9db3bc2d700f3f0e9d7e43b516bf
https://github.com/llvm/llvm-project/commit/2e7a5092375d9db3bc2d700f3f0e9d7e43b516bf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port e85e29c2992b
Commit: 5c3b05996fa5a076bc086f2eeca56f080f255754
https://github.com/llvm/llvm-project/commit/5c3b05996fa5a076bc086f2eeca56f080f255754
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[alpha.webkit.UnretainedLambdaCapturesChecker] Add a WebKit checker for lambda capturing NS or CF types. (#128651)
Add a new WebKit checker for checking that lambda captures of CF types
use RetainPtr either when ARC is disabled or enabled, and those of NS
types use RetainPtr when ARC is disabled.
Commit: bfdeb5873073ed94b63b1ef1f7e91845c1be88a1
https://github.com/llvm/llvm-project/commit/bfdeb5873073ed94b63b1ef1f7e91845c1be88a1
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseExprCXX.cpp
A clang/test/SemaCXX/constexpr-if.cpp
Log Message:
-----------
[Clang] use constant evaluation context for constexpr if conditions (#123667)
Fixes #123524
---
This PR addresses the issue of immediate function expressions not
properly evaluated in `constexpr` if conditions. Adding the
`ConstantEvaluated` context for expressions in `constexpr` if statements
ensures that these expressions are treated as manifestly
constant-evaluated and parsed correctly.
Commit: 69527b0013a090081118996cfd61a330c7f2ffce
https://github.com/llvm/llvm-project/commit/69527b0013a090081118996cfd61a330c7f2ffce
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
A llvm/lib/Target/Xtensa/XtensaDSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
A llvm/test/MC/Xtensa/xtensa-mac16.s
Log Message:
-----------
[Xtensa] Implement Xtensa MAC16 Option. (#130004)
Commit: f62ab334c6bc1f907e092c65a420abbbcf04fa9a
https://github.com/llvm/llvm-project/commit/f62ab334c6bc1f907e092c65a420abbbcf04fa9a
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
Log Message:
-----------
[RISCV] Fix incorrect mask of shuffle vector in the test. (NFC) (#130244)
The mask of shuffle vector should be <u, u, 4, 6, 8, 10, 12, 14>, not
<u, u, 4, 6, *6, 10, 12, 14> for steps of 2.
And the mask of suffle vector with an undef initial element has been
supported by https://github.com/llvm/llvm-project/pull/118509.
Commit: d111e6481afa71fedc0a1877d20943e43954edce
https://github.com/llvm/llvm-project/commit/d111e6481afa71fedc0a1877d20943e43954edce
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[clang] Fix typos in options text. (#130129)
Commit: 42d49a77241df73a17cb442973702fc460e7fb90
https://github.com/llvm/llvm-project/commit/42d49a77241df73a17cb442973702fc460e7fb90
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGenCXX/cxx23-p2280r4.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
Log Message:
-----------
[clang] Reject constexpr-unknown values as constant expressions more consistently (#129952)
Perform the check for constexpr-unknown values in the same place we
perform checks for other values which don't count as constant
expressions.
While I'm here, also fix a rejects-valid with a reference that doesn't
have an initializer. This diagnostic was also covering up some of the
bugs here.
The existing behavior with -fexperimental-new-constant-interpreter seems
to be correct, but the diagnostics are slightly different; it would be
helpful if someone could check on that as a followup.
Followup to #128409.
Fixes #129844. Fixes #129845.
Commit: 82f2b661101d1133b72872141009035f01a42595
https://github.com/llvm/llvm-project/commit/82f2b661101d1133b72872141009035f01a42595
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-objdump/ELF/dynamic-section.test
M llvm/tools/llvm-objdump/ELFDump.cpp
Log Message:
-----------
[llvm-objdump][ELF]Fix crash when reading strings from .dynstr (#125679)
This change introduces a check for the strtab offset to prevent
llvm-objdump from crashing when processing malformed ELF files.
It provide a minimal reproduce test for
https://github.com/llvm/llvm-project/issues/86612#issuecomment-2035694455.
Additionally, it modifies how llvm-objdump handles and outputs malformed
ELF files with invalid string offsets.(More info:
https://discourse.llvm.org/t/should-llvm-objdump-objdump-display-actual-corrupted-values-in-malformed-elf-files/84391)
Fixes: #86612
Co-authored-by: James Henderson <James.Henderson at sony.com>
Commit: 8b9c91ec7da0ca3daab8ff6711126443e500bb66
https://github.com/llvm/llvm-project/commit/8b9c91ec7da0ca3daab8ff6711126443e500bb66
Author: beetrees <b at beetr.ee>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[APFloat] Fix `IEEEFloat::addOrSubtractSignificand` and `IEEEFloat::normalize` (#98721)
Fixes #63895
Fixes #104984
Before this PR, `addOrSubtractSignificand` presumed that the loss came
from the side being subtracted, and didn't handle the case where lhs ==
rhs and there was loss. This can occur during FMA. This PR fixes the
situation by correctly determining where the loss came from and handling
it appropriately.
Additionally, `normalize` failed to adjust the exponent when the
significand is zero but `lost_fraction != lfExactlyZero`. This meant
that the test case from #63895 was rounded incorrectly as the loss
wasn't adjusted to account for the exponent being below the minimum
exponent. This PR fixes this by only skipping the exponent adjustment if
the significand is zero and there was no lost fraction.
(Note to reviewer: I don't have commit access)
Commit: de132b2a0c344729703358a1c3ac90fb28fdb130
https://github.com/llvm/llvm-project/commit/de132b2a0c344729703358a1c3ac90fb28fdb130
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[Clang][CodeGen] Fix demangler invariant comment assertion (#130522)
This patch makes the assertion (that is currently in a comment) that
validates that names mangled by clang can be demangled by LLVM actually
compile/work. There were some minor issues that needed to be fixed (like
starts_with not being available on std::string and needing to call
getDecl() on GD), and a logic issue that should be fixed in this patch.
This enables just uncommenting the assertion to enable it within the
compiler (minus needing to add the header file).
Commit: 64c73d5c7184d1287e4982684d0fe8ad5f2341c0
https://github.com/llvm/llvm-project/commit/64c73d5c7184d1287e4982684d0fe8ad5f2341c0
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
A lld/test/ELF/loongarch-relax-call36-2.s
A lld/test/ELF/loongarch-relax-call36.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
Log Message:
-----------
Reland [lld][LoongArch] Relax call36/tail36: R_LARCH_CALL36
Instructions with relocation `R_LARCH_CALL36` may be relax as follows:
```
From:
pcaddu18i $dest, %call36(foo)
R_LARCH_CALL36, R_LARCH_RELAX
jirl $r, $dest, 0
To:
b/bl foo # bl if r=$ra, b if r=$zero
R_LARCH_B26
```
This patch fixes the buildbots failuer of lld tests.
Changes: Modify test files: from `sym at plt` to `%plt(sym)`.
Commit: fa45bf430081ed5a37c50719dfd3a8ca32271126
https://github.com/llvm/llvm-project/commit/fa45bf430081ed5a37c50719dfd3a8ca32271126
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/phi-with-incoming-from-load.ll
Log Message:
-----------
InstCombine: Fix a crash in `PointerReplacer` when constructing a new PHI (#130256)
When constructing a PHI node in `PointerReplacer::replace`, the incoming
operands are expected to have already been replaced and in the
replacement map. However, when one of the incoming operands is a load,
the search of the map is unsuccessful, and a nullptr is returned from
`getReplacement`. The reason is that, when a load is replaced, all the
uses of the load has been actually replaced by the new load. It is
useless to insert the original load into the map. Instead, we should
place the new load into the map to meet the expectation of the later map
search.
Fixes: SWDEV-516420
Commit: 3e94eae746888ee63b38d347b068eaf0d5b72772
https://github.com/llvm/llvm-project/commit/3e94eae746888ee63b38d347b068eaf0d5b72772
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
Log Message:
-----------
[AMDGPU] Add GFX12 S_ALLOC_VGPR instruction (#130018)
This patch only adds the instruction for disassembly support.
We neither have an instrinsic nor codegen support, and it is unclear
whether we actually want to ever have an intrinsic, given the fragile
semantics.
For now, it will be generated only by the backend in very specific
circumstances.
---------
Co-authored-by: Jannik Silvanus <jannik.silvanus at amd.com>
Commit: 58fc4b13cb5ff7e877c52c11f71328ed12e6a89c
https://github.com/llvm/llvm-project/commit/58fc4b13cb5ff7e877c52c11f71328ed12e6a89c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
Log Message:
-----------
[RISCV] Remove Predicates from classes in RISCVInstrInfoXTHead.td. NFC
All of instantiations of these classes also specify Predicates
making the base class redundant or unnecessary. The Predicates on the
instantiations aren't always the same as the base class so those
are needed.
Also move the DecoderNamespace to the instantiations for consistency
with the Predicates.
Commit: c4808741e89df29dcd06c7be2784824c82f34e46
https://github.com/llvm/llvm-project/commit/c4808741e89df29dcd06c7be2784824c82f34e46
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[AArch64][CostModel] Alter sdiv/srem cost where the divisor is constant (#123552)
This patch revises the cost model for sdiv/srem and draws its inspiration from the udiv/urem patch #122236
The typical codegen for the different scenarios has been mentioned as notes/comments in the code itself( this is done owing to lot of scenarios such that it would be difficult to mention them here in the patch description).
Commit: 5addbf0c60bf941b081726c4a6a9641ec9bf425f
https://github.com/llvm/llvm-project/commit/5addbf0c60bf941b081726c4a6a9641ec9bf425f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
Log Message:
-----------
[AArch64] Avoid repeated hash lookups (NFC) (#130542)
Commit: b2b267ea7a3b85f83977cc74ba79332e453aed82
https://github.com/llvm/llvm-project/commit/b2b267ea7a3b85f83977cc74ba79332e453aed82
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#130543)
Commit: c8ec8073aa5d8e87a15d101ded149de399518bc1
https://github.com/llvm/llvm-project/commit/c8ec8073aa5d8e87a15d101ded149de399518bc1
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-03-09 (Sun, 09 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-members.mm
Log Message:
-----------
[alpha.webkit.NoUnretainedMemberChecker] Add a new WebKit checker for unretained member variables and ivars. (#128641)
Add a new WebKit checker for member variables and instance variables of
NS and CF types. A member variable or instance variable to a CF type
should be RetainPtr regardless of whether ARC is enabled or disabled,
and that of a NS type should be RetainPtr when ARC is disabled.
Commit: 6e8d7e2e7fda1ec6f9517346f269cb0c377fb34b
https://github.com/llvm/llvm-project/commit/6e8d7e2e7fda1ec6f9517346f269cb0c377fb34b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
Log Message:
-----------
[mlir] Apply ClangTidy finding (NFC)
loop variable is copied but only used as const reference; consider making it a const reference
Commit: 35f273ab07d9f1e65a662fb25a1aeebaba4552c2
https://github.com/llvm/llvm-project/commit/35f273ab07d9f1e65a662fb25a1aeebaba4552c2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][NFC] Clean up Expr::EvaluateAsConstantExpr (#130498)
The Info.EnableNewConstInterp case is already handled above.
Commit: e0442bdfa5a5cd02431955cb18b67194d2b82faf
https://github.com/llvm/llvm-project/commit/e0442bdfa5a5cd02431955cb18b67194d2b82faf
Author: Boaz Brickner <brickner at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/VarBypassDetector.cpp
M clang/lib/CodeGen/VarBypassDetector.h
Log Message:
-----------
[Clang] Fix segmentation fault caused by `VarBypassDetector` stack overflow on deeply nested expressions (#124128)
This happens when using `-O2`.
Similarly to #111701
([test](https://github.com/bricknerb/llvm-project/blob/93e4a7386ec897e53d7330c6206d38759a858be2/clang/test/CodeGen/deeply-nested-expressions.cpp)),
not adding a test that reproduces since this test is slow and likely to
be hard to maintained as discussed here and in [previous
discussion](https://github.com/llvm/llvm-project/pull/111701/files/1a63281b6c240352653fd2e4299755c1f32a76f4#r1795518779).
Test that was reverted here:
https://github.com/llvm/llvm-project/pull/124128/commits/d6b5576940d38aadb3293acbff680d1f5d22486c
Commit: 0264d42dc750666e0f57a85d57f563bc8ea43536
https://github.com/llvm/llvm-project/commit/0264d42dc750666e0f57a85d57f563bc8ea43536
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/location.py
Log Message:
-----------
[mlir][CAPI][python] bind CallSiteLoc, FileLineColRange, FusedLoc, NameLoc (#129351)
This PR extends the python bindings for CallSiteLoc, FileLineColRange,
FusedLoc, NameLoc with field accessors. It also adds the missing
`value.location` accessor.
I also did some "spring cleaning" here (`cast` -> `dyn_cast`) after
running into some of my own illegal casts.
Commit: 3acfef56b1c5f74edd6ea2111a440677ea2c6763
https://github.com/llvm/llvm-project/commit/3acfef56b1c5f74edd6ea2111a440677ea2c6763
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M libunwind/src/Registers.hpp
Log Message:
-----------
[libunwind][RISCV] Make asm statement volatile (#130286)
Compiling with `O3`, the `early-machinelicm` pass hoisted the asm
statement to a path that has been executed unconditionally during stack
unwinding. On hardware without vector extension support, this resulted
in reading a nonexistent register.
Commit: 564b75621d4a2e30a1769cc719a3a2b2029b8656
https://github.com/llvm/llvm-project/commit/564b75621d4a2e30a1769cc719a3a2b2029b8656
Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/ADT/bit.h
M llvm/include/llvm/Support/ErrorOr.h
Log Message:
-----------
[ADT/Support] Add includes to fix module build
Current Clang complains that 'size_t' / 'reference_wrapper' "must be
declared before it is used."
Commit: c579ec66c77461122d93deadebc318fbb846b830
https://github.com/llvm/llvm-project/commit/c579ec66c77461122d93deadebc318fbb846b830
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
A clang/test/CodeGen/aarch64-execute-only.c
A clang/test/Driver/aarch64-execute-only.c
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[Clang][AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (2/3) (#125688)
Add support for the new SHF_AARCH64_PURECODE ELF section flag:
https://github.com/ARM-software/abi-aa/pull/304
The general implementation follows the existing one for ARM targets.
Simlarly to ARM targets, generating object files with the
`SHF_AARCH64_PURECODE` flag set is enabled by the
`-mexecute-only`/`-mpure-code` driver flag.
Related PRs:
* LLVM: https://github.com/llvm/llvm-project/pull/125687
* LLD: https://github.com/llvm/llvm-project/pull/125689
Commit: 07f3388fff0c73c1119d06ca1c2353fd012361c0
https://github.com/llvm/llvm-project/commit/07f3388fff0c73c1119d06ca1c2353fd012361c0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/AST/ByteCode/cxx1z.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx98.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/p7.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.list/p7-0x.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg10xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg21xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/expr/expr.const/p3-0x.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p1-11.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p1.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p5.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.type/p2.cpp
M clang/test/CXX/temp/temp.decls/temp.class.spec/p8-1y.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/multi-level-substitution.cpp
M clang/test/CXX/temp/temp.deduct/p9.cpp
M clang/test/CXX/temp/temp.param/p1.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/CXX/temp/temp.param/p15-cxx0x.cpp
M clang/test/CXX/temp/temp.param/p8-cxx20.cpp
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.constexpr/p2.cpp
M clang/test/CXX/temp/temp.spec/cxx1y-variable-template-no-body.cpp
M clang/test/CXX/temp/temp.spec/part.spec.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p20.cpp
M clang/test/Misc/integer-literal-printing.cpp
M clang/test/Modules/malformed-constraint-template-non-type-parm-decl.cpp
M clang/test/Modules/missing-body-in-import.cpp
M clang/test/Modules/template-default-args.cpp
M clang/test/Parser/MicrosoftExtensions.cpp
M clang/test/Parser/cxx-template-argument.cpp
M clang/test/Parser/cxx-template-template-recovery.cpp
M clang/test/Parser/cxx1z-class-template-argument-deduction.cpp
M clang/test/SemaCXX/access-base-class.cpp
M clang/test/SemaCXX/alias-template.cpp
M clang/test/SemaCXX/anonymous-struct.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression.cpp
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx98-compat-flags.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/implicit-member-functions.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaCXX/type-trait-common-type.cpp
M clang/test/SemaCXX/undefined-internal.cpp
M clang/test/SemaCXX/warn-deprecated-specializations-in-system-headers.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaObjCXX/parameterized_classes_subst.mm
M clang/test/SemaTemplate/alias-templates.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/default-arguments.cpp
M clang/test/SemaTemplate/instantiate-member-pointers.cpp
M clang/test/SemaTemplate/instantiate-template-template-parm.cpp
M clang/test/SemaTemplate/instantiation-default-1.cpp
M clang/test/SemaTemplate/instantiation-default-2.cpp
M clang/test/SemaTemplate/instantiation-dependence.cpp
M clang/test/SemaTemplate/instantiation-depth-defarg.cpp
M clang/test/SemaTemplate/instantiation-depth-exception-spec.cpp
M clang/test/SemaTemplate/instantiation-depth.cpp
M clang/test/SemaTemplate/ms-unqualified-base-class.cpp
M clang/test/SemaTemplate/nested-template.cpp
M clang/test/SemaTemplate/partial-spec-instantiate.cpp
M clang/test/SemaTemplate/recovery-crash.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/test/SemaTemplate/temp_arg.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx11.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx2c.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/SemaTemplate/temp_arg_type.cpp
Log Message:
-----------
Revert "[clang] Implement instantiation context note for checking template parameters (#126088)"
This reverts commit a24523ac8dc07f3478311a5969184b922b520395.
This is causing significant compile-time regressions for C++ code, see:
https://github.com/llvm/llvm-project/pull/126088#issuecomment-2704874202
Commit: 4a59d0c3c84eb01e4551b5c922397a3b89fbc127
https://github.com/llvm/llvm-project/commit/4a59d0c3c84eb01e4551b5c922397a3b89fbc127
Author: haonan <haonan.yang at intel.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] checkBitcastSrcVectorSize - early return when reach to MaxRecursionDepth. (#130226)
Commit: b1ebfac1859c4fd1db3620098f6af4fd98e6174d
https://github.com/llvm/llvm-project/commit/b1ebfac1859c4fd1db3620098f6af4fd98e6174d
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/Object/ELFObjectFile.h
A llvm/include/llvm/Support/AArch64AttributeParser.h
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/ARMAttributeParser.h
M llvm/include/llvm/Support/CSKYAttributeParser.h
A llvm/include/llvm/Support/ELFAttrParserCompact.h
A llvm/include/llvm/Support/ELFAttrParserExtended.h
M llvm/include/llvm/Support/ELFAttributeParser.h
M llvm/include/llvm/Support/ELFAttributes.h
M llvm/include/llvm/Support/HexagonAttributeParser.h
M llvm/include/llvm/Support/MSP430AttributeParser.h
M llvm/include/llvm/Support/RISCVAttributeParser.h
A llvm/lib/Support/AArch64AttributeParser.cpp
M llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CSKYAttributeParser.cpp
A llvm/lib/Support/ELFAttrParserCompact.cpp
A llvm/lib/Support/ELFAttrParserExtended.cpp
R llvm/lib/Support/ELFAttributeParser.cpp
M llvm/lib/Support/HexagonAttributeParser.cpp
M llvm/lib/Support/RISCVAttributeParser.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-comprehensive.s
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Support/ARMAttributeParser.cpp
M llvm/unittests/Support/CSKYAttributeParserTest.cpp
M llvm/unittests/Support/ELFAttributeParserTest.cpp
M llvm/unittests/Support/RISCVAttributeParserTest.cpp
Log Message:
-----------
[readobj][Arm][AArch64] Refactor Build Attributes parsing under ELFAtributeParser and add support for AArch64 Build Attributes (#128727)
Refactor readobj to integrate AArch64 Build Attributes under
ELFAttributeParser. ELFAttributeParser now serves as a base class for:
- ELFCompactAttrParser, handling Arm-style attributes with a single
build attribute subsection.
- ELFExtendedAttrParser, handling AArch64-style attributes with multiple
build attribute subsections. This improves code organization and better
aligns with the attribute parsing model.
Add support for parsing AArch64 Build Attributes.
Commit: 24f0901f7ef5f4f8e8ae6a2138b18e434b1b941f
https://github.com/llvm/llvm-project/commit/24f0901f7ef5f4f8e8ae6a2138b18e434b1b941f
Author: Julien Villette <julien.villette at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-misc-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
Log Message:
-----------
[MCA] Adding missing instructions in AArch64 Neoverse V1 tests (#128892)
Added missing instructions for LLVM Opcodes coverage. It will help to
maintain TableGen scheduling information of AArch64 Neoverse V1.
Follow up of MR ##126703
This is a dispatch of new instructions of the big test:
V1-scheduling-info.s
I have created a new test for special instructions without scheduling
info in Software Optimization Guide: V1-misc-instructions.s
No more asm instruction comments to maintain.
Commit: fe93a2879c31ee5d8f966cae36481f6f2b6243dd
https://github.com/llvm/llvm-project/commit/fe93a2879c31ee5d8f966cae36481f6f2b6243dd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn build] Port b1ebfac1859c
Commit: 2aca7c231a573191fbba83ba202bcc245cab6501
https://github.com/llvm/llvm-project/commit/2aca7c231a573191fbba83ba202bcc245cab6501
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test case showing its not always beneficial to fold concat(palignr(),palignr()) -> palignr(concat(),concat())
Commit: fe544d404d841ef44aebf4fc36948fd1e1d89685
https://github.com/llvm/llvm-project/commit/fe544d404d841ef44aebf4fc36948fd1e1d89685
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
Log Message:
-----------
[lldb] Add more ARM checks in TestLldbGdbServer.py (#130277)
When https://github.com/llvm/llvm-project/pull/130034 enabled RISC-V
here I noticed that these should run for ARM as well.
ARM only has 4 argument registers, which matches Arm's ABI for it:
https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#core-registers
The ABI defines a link register LR, and I assume that's what becomes
'ra' in LLDB.
Tested on ARM and AArch64 Linux.
Commit: 78060a7df7adcae8674f189699fa97cd1eb7bafa
https://github.com/llvm/llvm-project/commit/78060a7df7adcae8674f189699fa97cd1eb7bafa
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h
Log Message:
-----------
[lldb] Clean up UnwindAssemblyInstEmulation (#129030)
My main motivation was trying to understand how the function and whether
the rows need to be (shared) pointers. I noticed that the function
essentially constructs two copies unwind plans in parallel (the second
being the saved_unwind_states).
If we delay the construction of the unwind plan to the end of the
function, then we never need two copies of a single row (we can just
move it into the final result), so we can just use them as value types.
This makes the overall logic of the function stand out better as it
avoids the laborious deep copies of the Row shared pointer.
I've also noticed that a large portion of the function is devoted to
recomputing certain properties of the unwind state (e.g. the
`m_fp_is_cfa` field). Instead of doing that, this patch just
saves/restores them together with the rest of the state.
Commit: ab18cc246c2490564043161db5d9646cf1163de4
https://github.com/llvm/llvm-project/commit/ab18cc246c2490564043161db5d9646cf1163de4
Author: vfdev <vfdev.5 at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/python/mlir/_mlir_libs/__init__.py
M mlir/test/python/ir/context_lifecycle.py
Log Message:
-----------
[MLIR][py] Add PyThreadPool as wrapper around MlirLlvmThreadPool in MLIR python bindings (#130109)
In some projects like JAX ir.Context are used with disabled multi-threading to avoid
caching multiple threading pools:
https://github.com/jax-ml/jax/blob/623865fe9538100d877ba9d36f788d0f95a11ed2/jax/_src/interpreters/mlir.py#L606-L611
However, when context has enabled multithreading it also uses locks on
the StorageUniquers and this can be helpful to avoid data races in the
multi-threaded execution (for example with free-threaded cpython,
https://github.com/jax-ml/jax/issues/26272).
With this PR user can enable the multi-threading: 1) enables additional
locking and 2) set a shared threading pool such that cached contexts can
have one global pool.
Commit: 8c8eff2b35e789969c5fb0e490ec18dedd4a5ebc
https://github.com/llvm/llvm-project/commit/8c8eff2b35e789969c5fb0e490ec18dedd4a5ebc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test case showing its not always beneficial to fold concat(pack(),pack()) -> pack(concat(),concat())
Commit: f3dcc0fe228f6a1a69147ead0a76ce0fe02d316d
https://github.com/llvm/llvm-project/commit/f3dcc0fe228f6a1a69147ead0a76ce0fe02d316d
Author: Artemiy Bulavin <artemiyb at graphcore.ai>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
A mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
Log Message:
-----------
[mlir] Refactor ConvertVectorToLLVMPass options (#128219)
The `VectorTransformsOptions` on the `ConvertVectorToLLVMPass` is
currently represented as a struct, which makes it not serialisable. This
means a pass pipeline that contains this pass cannot be represented as
textual form, which breaks reproducer generation and options such as
`--dump-pass-pipeline`.
This PR expands the `VectorTransformsOptions` struct into the two
options that are actually used by the Pass' patterns:
`vector-contract-lowering` and `vector-transpose-lowering` . The other
options present in VectorTransformOptions are not used by any patterns
in this pass.
Additionally, I have changed some interfaces to only take these specific
options over the full options struct as, again, the vector contract and
transpose lowering patterns only need one of their respective options.
Finally, I have added a simple lit test that just prints the pass
pipeline using `--dump-pass-pipeline` to ensure the options on this pass
remain serialisable.
Fixes #129046
Commit: 8d38906d08f0189a7a7f865b267f47cab0a3790f
https://github.com/llvm/llvm-project/commit/8d38906d08f0189a7a7f865b267f47cab0a3790f
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/IR/User.cpp
Log Message:
-----------
[IR] Fix assertion error in User new/delete edge case (#129914)
Fixes #129900
If `operator delete` was called after an unsuccessful constructor call
after `operator new`, we ran into undefined behaviour.
This was discovered by our malfunction tests while preparing an upgrade
to LLVM 20, that explicitly check for such kind of bugs.
Commit: dd86ece554a42c6a7663a18b779442e8380e4ef8
https://github.com/llvm/llvm-project/commit/dd86ece554a42c6a7663a18b779442e8380e4ef8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/Transforms/MergeFunc/comdat.ll
Log Message:
-----------
[MergeFunc] Check full IR and comdat keys in comdat.ll.
Commit: 0ede277b62d12954342c4a1bd8a0c201d60a3cd9
https://github.com/llvm/llvm-project/commit/0ede277b62d12954342c4a1bd8a0c201d60a3cd9
Author: gbMattN <matthew.nagy at sony.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M compiler-rt/test/tysan/lit.cfg.py
Log Message:
-----------
Spelling in lit.cfg.py
Commit: 99fdb5dfd8ffc3d872f868aec8ef7fd380c0413a
https://github.com/llvm/llvm-project/commit/99fdb5dfd8ffc3d872f868aec8ef7fd380c0413a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::PALIGNR concatenation to use combineConcatVectorOps recursion (#130572)
Only concatenate X86ISD::PALIGNR nodes if at least one operand is beneficial to concatenate
Commit: 0c7e895de3a9df6ff702fbebd1cdd580cb65e3d1
https://github.com/llvm/llvm-project/commit/0c7e895de3a9df6ff702fbebd1cdd580cb65e3d1
Author: Kajetan Puchalski <kajetan.puchalski at tuta.io>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Frontend/CompilerInstance.h
M flang/include/flang/Frontend/CompilerInvocation.h
M flang/include/flang/Frontend/FrontendActions.h
A flang/include/flang/Frontend/ParserActions.h
A flang/include/flang/Parser/options.h
M flang/include/flang/Parser/parsing.h
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/lib/Frontend/ParserActions.cpp
Log Message:
-----------
[flang] Move parser invocations into ParserActions (#130309)
FrontendActions.cpp is currently one of the biggest compilation units in
all of flang. Measuring its compilation gives the following metrics:
User time (seconds): 139.21
System time (seconds): 4.65
Maximum resident set size (kbytes): 5891440 (5.61 GB)
This commit separates out explicit invocations of the parser into a
separate compilation unit - ParserActions.cpp - through helper functions
in order to decrease the maximum compilation time and memory usage of a
single unit.
After the split, the measurements of FrontendActions.cpp are as follows:
User time (seconds): 70.08
System time (seconds): 3.16
Maximum resident set size (kbytes): 3961492 (3.7 GB)
While the ones for the newly created ParserActions.cpp as follows:
User time (seconds): 104.33
System time (seconds): 3.37
Maximum resident set size (kbytes): 4185600 (3.99 GB)
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: dd21aacd76e36d4db157a5d7a7b5370d456426e6
https://github.com/llvm/llvm-project/commit/dd21aacd76e36d4db157a5d7a7b5370d456426e6
Author: DianQK <dianqk at dianqk.net>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/TailDuplicator.cpp
A llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
Log Message:
-----------
[TailDuplicator] Do not restrict the computed gotos (#114990)
Fixes #106846.
This is what I learned from GCC. I found that GCC does not duplicate the
BB that has indirect jumps with the jump table. I believe GCC has
provided a clear explanation here:
> Duplicate the blocks containing computed gotos. This basically
unfactors computed gotos that were factored early on in the compilation
process to speed up edge based data flow. We used to not unfactor them
again, which can seriously pessimize code with many computed jumps in
the source code, such as interpreters.
Commit: 6a9df5b4dd2ac1b00cdc3880c210cc0d2e917f04
https://github.com/llvm/llvm-project/commit/6a9df5b4dd2ac1b00cdc3880c210cc0d2e917f04
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/test/API/functionalities/asan/TestReportData.py
Log Message:
-----------
Revert "[lldb][asan] Add temporary logging to ReportRetriever"
This reverts commit 39a4da20d88d797824f0e7be0f732ccaf0c7eee4.
We skipped the failing tests in `6cc8b0bef07f4270303bec0fc203f251a2fde262`.
Commit: 502385c2412aa04867dc7386296a2f9bc4745d36
https://github.com/llvm/llvm-project/commit/502385c2412aa04867dc7386296a2f9bc4745d36
Author: John Harrison <harjohn at google.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M lldb/source/Host/macosx/objcxx/MemoryMonitorMacOSX.mm
Log Message:
-----------
[lldb] Remove an extraneous `printf` statement. (#130453)
This was missed in review but is showing up in lldb-dap output.
Commit: fdc8e5ab62318ff39832cbca2056044a9d45bfe0
https://github.com/llvm/llvm-project/commit/fdc8e5ab62318ff39832cbca2056044a9d45bfe0
Author: Robert Dazi <14996868+v01dXYZ at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/Sema/SemaARM.cpp
M clang/test/Sema/aarch64-special-register.c
Log Message:
-----------
[Clang][AArch64] Fix typo with colon-separated syntax for system registers (#105608)
The range for Op0 was set to 1 instead of 3.
The description of e493f177eeee84a9c6000ca7c92499233490f1d1 visually
explains the encoding of implementation-defined system registers.
https://github.com/llvm/llvm-project/blob/796787d07c30cb9448e1f9ff3f3da06c2fc96ccd/llvm/lib/Target/AArch64/AArch64SystemOperands.td#L658-L674
Gobolt: https://godbolt.org/z/WK9PqPvGE
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Commit: 52225d2702592b220f87aa82fb434bf776d4f745
https://github.com/llvm/llvm-project/commit/52225d2702592b220f87aa82fb434bf776d4f745
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
A llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (#123722)
Commit: 94a62b3085e35e1a7781c46bccee236255e1ca28
https://github.com/llvm/llvm-project/commit/94a62b3085e35e1a7781c46bccee236255e1ca28
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test case showing its not always beneficial to fold concat(pshufb(),pshufb()) -> pshufb(concat(),concat())
Commit: 88f010a2ebe828a1a3a1faa25b36716e9b45549a
https://github.com/llvm/llvm-project/commit/88f010a2ebe828a1a3a1faa25b36716e9b45549a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/combine-pmadd.ll
Log Message:
-----------
[X86] Improve test coverage for concat(pmaddubsw(),pmaddubsw()) -> pmaddubsw(concat(),concat())
Ensure we have tests for both beneficial/non-beneficial concatenation cases
Commit: 4508d6aa72b0f31056ae01aff0e8009a252e4683
https://github.com/llvm/llvm-project/commit/4508d6aa72b0f31056ae01aff0e8009a252e4683
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Support/ELFAttrParserExtended.cpp
Log Message:
-----------
[AArch64][ELF Parser] Fix out-of-scope variable usage (#130576)
Return a reference to a persistent variable instead of a temporary copy.
Commit: 4fee3981a8f07a5c197a5a9fb559bcc0e52eff78
https://github.com/llvm/llvm-project/commit/4fee3981a8f07a5c197a5a9fb559bcc0e52eff78
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
Log Message:
-----------
[LLVM][SVE] Add isel for scalable vector bfloat copysign operations. (#130098)
Commit: dbd82f33b57814125932dbb84e9449ac05404a6e
https://github.com/llvm/llvm-project/commit/dbd82f33b57814125932dbb84e9449ac05404a6e
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/basic/basic.lookup/basic.lookup.qual/class.qual/p2.cpp
M clang/test/CXX/class.access/class.access.dcl/p1.cpp
M clang/test/CXX/class.access/class.friend/p3-cxx0x.cpp
M clang/test/CXX/class.access/class.friend/p6.cpp
M clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p3.cpp
M clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p4.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/p1-0x.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/special/class.inhctor/elsewhere.cpp
M clang/test/CXX/temp/temp.res/temp.dep/p3.cpp
M clang/test/Parser/cxx-attributes.cpp
M clang/test/Parser/cxx2c-variadic-friends.cpp
M clang/test/SemaCXX/PR62533.cpp
M clang/test/SemaCXX/cxx0x-defaulted-functions.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals.cpp
M clang/test/SemaCXX/pr25181-crash-on-invalid.cpp
M clang/test/SemaCXX/pr36536.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaObjCXX/propert-dot-error.mm
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/ms-sizeof-missing-typename.cpp
M clang/test/SemaTemplate/nested-template.cpp
M clang/test/SemaTemplate/qualified-id.cpp
M clang/test/SemaTemplate/template-id-expr.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
Log Message:
-----------
[clang] NNS: don't print trailing scope resolution operator in diagnostics (#130529)
This clears up the printing of a NestedNameSpecifier so a trailing '::'
is not printed, unless it refers into the global scope.
This fixes a bunch of diagnostics where the trailing :: was awkward.
This also prints the NNS quoted consistenty.
There is a drive-by improvement to error recovery, where now we print
the actual type instead of `<dependent type>`.
This will clear up further uses of NNS printing in further patches.
Commit: 0d2c55cb9682dc589949fb6767e50c4efb538f2d
https://github.com/llvm/llvm-project/commit/0d2c55cb9682dc589949fb6767e50c4efb538f2d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/test/CMakeLists.txt
A clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.h
A llvm/lib/Target/AMDGPU/AMDGPUExportKernelRuntimeHandles.cpp
A llvm/lib/Target/AMDGPU/AMDGPUExportKernelRuntimeHandles.h
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
R llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
R llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/test/CodeGen/AMDGPU/amdgpu-export-kernel-runtime-handles.ll
R llvm/test/CodeGen/AMDGPU/enqueue-kernel.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
Log Message:
-----------
AMDGPU: Move enqueued block handling into clang (#128519)
The previous implementation wasn't maintaining a faithful IR
representation of how this really works. The value returned by
createEnqueuedBlockKernel wasn't actually used as a function, and
hacked up later to be a pointer to the runtime handle global
variable. In reality, the enqueued block is a struct where the first
field is a pointer to the kernel descriptor, not the kernel itself. We
were also relying on passing around a reference to a global using a
string attribute containing its name. It's better to base this on a
proper IR symbol reference during final emission.
This now avoids using a function attribute on kernels and avoids using
the additional "runtime-handle" attribute to populate the final
metadata. Instead, associate the runtime handle reference to the
kernel with the !associated global metadata. We can then get a final,
correctly mangled name at the end.
I couldn't figure out how to get rename-with-external-symbol behavior
using a combination of comdats and aliases, so leaves an IR pass to
externalize the runtime handles for codegen. If anything breaks, it's
most likely this, so leave avoiding this for a later step. Use a
special section name to enable this behavior. This also means it's
possible to declare enqueuable kernels in source without going through
the dedicated block syntax or other dedicated compiler support.
We could move towards initializing the runtime handle in the
compiler/linker. I have a working patch where the linker sets up the
first field of the handle, avoiding the need to export the block
kernel symbol for the runtime. We would need new relocations to get
the private and group sizes, but that would avoid the runtime's
special case handling that requires the device_enqueue_symbol metadata
field.
https://reviews.llvm.org/D141700
Commit: 7fb71d151127a30d7299336511cbcc06601047b9
https://github.com/llvm/llvm-project/commit/7fb71d151127a30d7299336511cbcc06601047b9
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir
Log Message:
-----------
[RISCV][test] Add test case showing case where machine copy propagation leaves behind a no-op reg move
Pre-commit for #129889.
Commit: a5c33e634b912586fe6bfbb2f63cb27d74adc13d
https://github.com/llvm/llvm-project/commit/a5c33e634b912586fe6bfbb2f63cb27d74adc13d
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Support/ELFAttrParserExtended.cpp
Log Message:
-----------
[AArch64][ELF Parser] Fix out-of-scope variable usage (#130594)
Return a reference to a persistent variable instead of a temporary copy.
Commit: 848ba3854c3ae7518fd9e436a11ffd0308f121df
https://github.com/llvm/llvm-project/commit/848ba3854c3ae7518fd9e436a11ffd0308f121df
Author: sommersun <50041042+sommersun at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
Log Message:
-----------
[DAG] fold AVGFLOORS to AVGFLOORU for non-negative operand (#84746) (#129678)
Fold ISD::AVGFLOORS to ISD::AVGFLOORU for non-negative operand. Cover test is modified for uhadd with zero extension.
Fixes #84746
Commit: 28fa1fcf55b973e13018ac115fcbb357b4c0baad
https://github.com/llvm/llvm-project/commit/28fa1fcf55b973e13018ac115fcbb357b4c0baad
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
Log Message:
-----------
Revert "[clang] Fix missing diagnostic of declaration use when accessing TypeDecls through typename access (#129681)"
This caused incorrect -Wunguarded-availability warnings. See comment on
the pull request.
> We were missing a call to DiagnoseUseOfDecl when performing typename
> access.
>
> This refactors the code so that TypeDecl lookups funnel through a helper
> which performs all the necessary checks, removing some related
> duplication on the way.
>
> Fixes #58547
>
> Differential Revision: https://reviews.llvm.org/D136533
This reverts commit 4c4fd6b03149348cf11af245ad2603d24144a9d5.
Commit: 5d921710c0d6984950f74ba57192aed9c67a84f3
https://github.com/llvm/llvm-project/commit/5d921710c0d6984950f74ba57192aed9c67a84f3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/haddsub-undef.ll
Log Message:
-----------
[X86] combineConcatVectorOps - convert X86ISD::HADD/SUB concatenation to use combineConcatVectorOps recursion (#130579)
Only concatenate X86ISD::HADD/SUB nodes if at least one operand is beneficial to concatenate
Commit: 507e0c3b6757bbdd95726c6be7b93297685e65ab
https://github.com/llvm/llvm-project/commit/507e0c3b6757bbdd95726c6be7b93297685e65ab
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/cf.ll
Log Message:
-----------
[X86][APX] Try to replace non-NF with NF instructions when optimizeCompareInstr (#130488)
https://godbolt.org/z/rWYdqnjjx
Commit: a1a6a839763079b54d8910599549b9e6d4dd5fe6
https://github.com/llvm/llvm-project/commit/a1a6a839763079b54d8910599549b9e6d4dd5fe6
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/unittests/AST/DeclPrinterTest.cpp
Log Message:
-----------
[clang] fix matching of nested template template parameters (#130447)
When checking the template template parameters of template template
parameters, the PartialOrdering context was not correctly propagated.
This also has a few drive-by fixes, such as checking the template
parameter lists of template template parameters, which was previously
missing and would have been it's own bug, but we need to fix it in order
to prevent crashes in error recovery in a simple way.
Fixes #130362
Commit: 773e88f9d61399c566fed45bf7858922f09b8063
https://github.com/llvm/llvm-project/commit/773e88f9d61399c566fed45bf7858922f09b8063
Author: Yutong Zhu <115899167+YutongZhuu at users.noreply.github.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/compare.c
Log Message:
-----------
[Clang] Force expressions with UO_Not to not be non-negative (#126846)
This PR addresses the bug of not throwing warnings for the following
code:
```c++
int test13(unsigned a, int *b) {
return a > ~(95 != *b); // expected-warning {{comparison of integers of different signs}}
}
```
However, in the original issue, a comment mentioned that negation,
pre-increment, and pre-decrement operators are also incorrect in this
case.
Fixes #18878
Commit: d67947162f4b06172fac91fefa6a9ad25eb6dd56
https://github.com/llvm/llvm-project/commit/d67947162f4b06172fac91fefa6a9ad25eb6dd56
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M flang/include/flang/Support/OpenMP-utils.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Support/OpenMP-utils.cpp
A flang/test/Lower/OpenMP/has_device_addr-mapinfo.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-target-has-device-addr.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A offload/test/offloading/fortran/target-has-device-addr1.f90
A offload/test/offloading/fortran/target-has-device-addr2.f90
A offload/test/offloading/fortran/target-has-device-addr3.f90
Log Message:
-----------
[flang][OpenMP] Implement HAS_DEVICE_ADDR clause (#128568)
The HAS_DEVICE_ADDR indicates that the object(s) listed exists at an
address that is a valid device address. Specifically,
`has_device_addr(x)` means that (in C/C++ terms) `&x` is a device
address.
When entering a target region, `x` does not need to be allocated on the
device, or have its contents copied over (in the absence of additional
mapping clauses). Passing its address verbatim to the region for use is
sufficient, and is the intended goal of the clause.
Some Fortran objects use descriptors in their in-memory representation.
If `x` had a descriptor, both the descriptor and the contents of `x`
would be located in the device memory. However, the descriptors are
managed by the compiler, and can be regenerated at various points as
needed. The address of the effective descriptor may change, hence it's
not safe to pass the address of the descriptor to the target region.
Instead, the descriptor itself is always copied, but for objects like
`x`, no further mapping takes place (as this keeps the storage pointer
in the descriptor unchanged).
---------
Co-authored-by: Sergio Afonso <safonsof at amd.com>
Commit: dc66ca4202d2eba939adb617f8e338920efc56dd
https://github.com/llvm/llvm-project/commit/dc66ca4202d2eba939adb617f8e338920efc56dd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-10 (Mon, 10 Mar 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-restart-preempted-jobs.yaml
M .github/workflows/llvm-bugs.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/merged-prs.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-request-release-note.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/version-check.yml
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryData.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/FrameOptimizer.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/StokeInfo.cpp
M bolt/lib/Passes/TailDuplication.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/runtime/hugify.cpp
M bolt/tools/bat-dump/bat-dump.cpp
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/merge-fdata/merge-fdata.cpp
M bolt/utils/docker/Dockerfile
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/CodeComplete.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/refactor/tweaks/AnnotateHighlightings.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-macro.hpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang/docs/CommandGuide/clang.rst
M clang/docs/HIPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/AttrIterator.h
A clang/include/clang/AST/DeclOpenACC.h
M clang/include/clang/AST/DeclVisitor.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Basic/ABI.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIROpsEnums.h
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
A clang/include/clang/CIR/Interfaces/CIROpInterfaces.h
A clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/Interfaces/CMakeLists.txt
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaBase.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/lib/AST/ASTDiagnostic.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/DeclBase.cpp
A clang/lib/AST/DeclOpenACC.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/OSTargets.h
A clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CMakeLists.txt
A clang/lib/CIR/Interfaces/CIROpInterfaces.cpp
M clang/lib/CIR/Interfaces/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/CodeGen/VarBypassDetector.cpp
M clang/lib/CodeGen/VarBypassDetector.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_hip_math.h
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/hlsl.h
A clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
A clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/opencl-c.h
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/Testing/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/functions.cpp
A clang/test/AST/ByteCode/libcxx/deref-to-array.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/ast-print-openacc-cache-construct.cpp
A clang/test/AST/ast-print-openacc-declare-construct.cpp
A clang/test/AST/ast-print-openacc-routine-construct.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
A clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-members.mm
A clang/test/Analysis/cxx23-assume-attribute.cpp
M clang/test/Analysis/out-of-bounds-new.cpp
A clang/test/C/C2y/n3347.c
A clang/test/C/C2y/n3409.c
A clang/test/C/C2y/n3410.c
A clang/test/C/C2y/n3411.c
A clang/test/C/C2y/n3478.c
A clang/test/C/C2y/n3481.c
A clang/test/C/C2y/n3496.c
M clang/test/CIR/CodeGen/basic.cpp
A clang/test/CIR/CodeGen/local-vars.cpp
A clang/test/CIR/IR/global-var-linkage.cir
M clang/test/CIR/IR/global.cir
A clang/test/CIR/Lowering/basic.cpp
A clang/test/CIR/Lowering/func-simple.cpp
M clang/test/CIR/Lowering/global-var-simple.cpp
A clang/test/CIR/Lowering/local-vars.cpp
M clang/test/CIR/func-simple.cpp
A clang/test/CIR/global-var-linkage.cpp
M clang/test/CIR/global-var-simple.cpp
M clang/test/CMakeLists.txt
M clang/test/CXX/basic/basic.lookup/basic.lookup.qual/class.qual/p2.cpp
M clang/test/CXX/class.access/class.access.dcl/p1.cpp
M clang/test/CXX/class.access/class.friend/p3-cxx0x.cpp
M clang/test/CXX/class.access/class.friend/p6.cpp
M clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p3.cpp
M clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p4.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/p1-0x.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/special/class.inhctor/elsewhere.cpp
M clang/test/CXX/temp/temp.pre/p6.cpp
M clang/test/CXX/temp/temp.res/temp.dep/p3.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
M clang/test/ClangScanDeps/modules-context-hash-cwd.c
M clang/test/ClangScanDeps/modules-debug-dir.c
A clang/test/CodeCompletion/GH125500.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
A clang/test/CodeGen/RISCV/pr129995.cc
M clang/test/CodeGen/X86/math-builtins.c
A clang/test/CodeGen/aarch64-execute-only.c
M clang/test/CodeGen/aix-builtin-mapping.c
A clang/test/CodeGen/arm-neon-endianness.c
M clang/test/CodeGen/assignment-tracking/assignment-tracking.cpp
M clang/test/CodeGen/assignment-tracking/memcpy-fragment.cpp
M clang/test/CodeGen/builtin-attributes.c
M clang/test/CodeGen/builtin-constant-p.c
A clang/test/CodeGen/excess-embed-data.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGen/math-libcalls.c
A clang/test/CodeGen/openacc-noop-decl.c
M clang/test/CodeGen/vector.c
A clang/test/CodeGen/win-fp128.c
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-constant-p.cpp
A clang/test/CodeGenCXX/cxx23-p2280r4.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/function-template-specialization.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
A clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
M clang/test/CodeGenHLSL/builtins/select.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/CodeGenObjC/arc-blocks.m
M clang/test/CodeGenObjC/arc-property.m
M clang/test/CodeGenObjC/arc-weak-property.m
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/arm64-int32-ivar.m
M clang/test/CodeGenObjC/bitfield-ivar-offsets.m
M clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/hidden-visibility.m
M clang/test/CodeGenObjC/interface-layout-64.m
M clang/test/CodeGenObjC/ivar-base-as-invariant-load.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/nontrivial-c-struct-property.m
M clang/test/CodeGenObjC/objc-asm-attribute-test.m
M clang/test/CodeGenObjC/ubsan-bool.m
A clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
A clang/test/Driver/HLSL/metal-converter.hlsl
A clang/test/Driver/aarch64-execute-only.c
M clang/test/Driver/fmemprof.cpp
M clang/test/Driver/fsanitize.c
M clang/test/Driver/hip-cuid-hash.hip
M clang/test/Driver/hip-gz-options.hip
M clang/test/Driver/hip-partial-link.hip
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sanitizer-ld.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Lexer/cxx-features.cpp
A clang/test/Modules/clang-pragmas.c
A clang/test/Modules/external-but-not-type-external.cppm
A clang/test/Modules/modules-merge-enum.m
A clang/test/Modules/try-func-body.cppm
M clang/test/Modules/vtable-windows.cppm
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/irbuilder_nested_openmp_parallel_empty.c
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M clang/test/OpenMP/taskgroup_codegen.cpp
M clang/test/Parser/cxx-attributes.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/Parser/cxx2c-variadic-friends.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/ParserOpenACC/parse-constructs.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
M clang/test/Sema/aarch64-special-register.c
M clang/test/Sema/bool-compare.c
M clang/test/Sema/compare.c
A clang/test/Sema/excess-embed-data.c
M clang/test/Sema/for.c
M clang/test/Sema/format-strings.c
M clang/test/Sema/generic-selection-type-extension.c
M clang/test/Sema/generic-selection.c
M clang/test/Sema/parentheses.cpp
A clang/test/Sema/riscv-interrupt-attr-qci.c
A clang/test/Sema/shift-bool.cpp
M clang/test/Sema/types.c
A clang/test/Sema/vector-ast.cpp
M clang/test/SemaCUDA/dtor.cu
M clang/test/SemaCXX/PR62533.cpp
M clang/test/SemaCXX/attr-require-constant-initialization.cpp
M clang/test/SemaCXX/bool-compare.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
A clang/test/SemaCXX/constexpr-if.cpp
M clang/test/SemaCXX/cxx0x-defaulted-functions.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals.cpp
M clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp
M clang/test/SemaCXX/generic-selection.cpp
M clang/test/SemaCXX/init-priority-attr.cpp
M clang/test/SemaCXX/pr25181-crash-on-invalid.cpp
M clang/test/SemaCXX/pr36536.cpp
M clang/test/SemaCXX/source_location.cpp
M clang/test/SemaCXX/uninitialized.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
A clang/test/SemaHLSL/BuiltIns/AddUint64-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
A clang/test/SemaHLSL/Language/NoVirtual.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaObjCXX/propert-dot-error.mm
A clang/test/SemaOpenACC/cache-construct-ast.cpp
A clang/test/SemaOpenACC/cache-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
A clang/test/SemaOpenACC/declare-construct-ast.cpp
A clang/test/SemaOpenACC/declare-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
A clang/test/SemaOpenACC/routine-construct-ast.cpp
A clang/test/SemaOpenACC/routine-construct-clauses.cpp
A clang/test/SemaOpenACC/routine-construct.cpp
M clang/test/SemaOpenACC/unimplemented-construct.c
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/ms-sizeof-missing-typename.cpp
M clang/test/SemaTemplate/nested-template.cpp
M clang/test/SemaTemplate/qualified-id.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/SemaTemplate/template-id-expr.cpp
M clang/test/SemaTemplate/typename-specifier-3.cpp
M clang/test/SemaTemplate/typo-dependent-name.cpp
M clang/test/SemaTemplate/typo-template-name.cpp
M clang/tools/c-index-test/c-index-test.c
M clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/AST/DeclPrinterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/perf-training/perf-helper.py
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/include/orc_rt/c_api.h
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/lib/orc/coff_platform.cpp
M compiler-rt/lib/orc/common.h
M compiler-rt/lib/orc/dlfcn_wrapper.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/orc/macho_platform.cpp
M compiler-rt/lib/orc/run_program_wrapper.cpp
M compiler-rt/lib/orc/tests/unit/c_api_test.cpp
M compiler-rt/lib/orc/tests/unit/wrapper_function_utils_test.cpp
M compiler-rt/lib/orc/wrapper_function_utils.h
M compiler-rt/lib/sanitizer_common/sanitizer_procmaps_mac.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_mac_test.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M compiler-rt/test/tysan/lit.cfg.py
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/pointer.cpp
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Common/erfc-scaled.h
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/CompilerInstance.h
M flang/include/flang/Frontend/CompilerInvocation.h
M flang/include/flang/Frontend/FrontendActions.h
A flang/include/flang/Frontend/ParserActions.h
M flang/include/flang/Lower/Cuda.h
R flang/include/flang/Lower/DumpEvaluateExpr.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Builder/TemporaryStorage.h
M flang/include/flang/Optimizer/CodeGen/FIROpPatterns.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Parser/dump-parse-tree.h
A flang/include/flang/Parser/options.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/parsing.h
M flang/include/flang/Runtime/pointer.h
A flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Support/OpenMP-utils.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CMakeLists.txt
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/lib/Frontend/ParserActions.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
R flang/lib/Lower/DumpEvaluateExpr.cpp
A flang/lib/Lower/OpenMP/ClauseFinder.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/definable.cpp
A flang/lib/Semantics/dump-expr.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Support/OpenMP-utils.cpp
M flang/module/cudadevice.f90
A flang/test/Analysis/AliasAnalysis/source-kind.fir
M flang/test/Evaluate/folding06.f90
M flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-powerpc64-aix-byval.fir
A flang/test/Fir/struct-passing-ppc64le-byval.fir
A flang/test/Fir/struct-return-powerpc64-aix.fir
A flang/test/Fir/struct-return-ppc64le.fir
M flang/test/HLFIR/maxval-elemental.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling-character.f90
A flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/vector-subscripts-codegen.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
A flang/test/Integration/debug-cyclic-derived-type-4.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-doconc.cuf
A flang/test/Lower/CUDA/cuda-pointer.cuf
M flang/test/Lower/HLFIR/null.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
R flang/test/Lower/OpenMP/Todo/from-expectation-modifier.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-close.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-ompxhold.f90
R flang/test/Lower/OpenMP/Todo/map-modifiers-present.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
A flang/test/Lower/OpenMP/Todo/taskloop-cancel.f90
R flang/test/Lower/OpenMP/Todo/to-expectation-modifier.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
A flang/test/Lower/OpenMP/has_device_addr-mapinfo.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/loop-directive.f90
A flang/test/Lower/OpenMP/loop-pointer-variable.f90
A flang/test/Lower/OpenMP/map-modifiers.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
A flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/if-clause.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/metadirective-v50.f90
M flang/test/Parser/OpenMP/metadirective.f90
A flang/test/Semantics/Inputs/modfile73-a.f90
A flang/test/Semantics/Inputs/modfile73-b.f90
A flang/test/Semantics/Inputs/modfile73-c.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
A flang/test/Semantics/OpenMP/single03.f90
A flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/threadprivate04.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/call27.f90
M flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/collectives05.f90
A flang/test/Semantics/generic13.f90
M flang/test/Semantics/init01.f90
A flang/test/Semantics/modfile73.f90
M flang/test/Semantics/null01.f90
M flang/test/Semantics/resolve40.f90
M flang/test/Semantics/symbol09.f90
A flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/simplifyintrinsics.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/headers/index.rst
M libc/docs/headers/math/index.rst
R libc/docs/headers/math/stdfix.rst
A libc/docs/headers/stdfix.rst
M libc/docs/talks.rst
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/stdfix-macros.h
A libc/include/llvm-libc-macros/sysexits-macros.h
M libc/include/stdfix.yaml
M libc/include/strings.yaml
A libc/include/sysexits.h.def
A libc/include/sysexits.yaml
M libc/src/__support/big_int.h
M libc/src/__support/math_extras.h
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/explogxf.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction_double_fma.h
M libc/src/math/generic/range_reduction_double_nofma.h
M libc/src/stdlib/qsort_pivot.h
M libc/src/string/memory_utils/generic/byte_per_byte.h
M libc/src/strings/CMakeLists.txt
A libc/src/strings/ffs.cpp
A libc/src/strings/ffs.h
A libc/src/strings/ffsl.cpp
A libc/src/strings/ffsl.h
A libc/src/strings/ffsll.cpp
A libc/src/strings/ffsll.h
M libc/startup/gpu/CMakeLists.txt
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_uc_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ui_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ul_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_ull_test.cpp
M libc/test/src/stdbit/stdc_first_trailing_one_us_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/macros_test.cpp
M libc/test/src/stdlib/SortingTest.h
M libc/test/src/strings/CMakeLists.txt
A libc/test/src/strings/ffs_test.cpp
A libc/test/src/strings/ffsl_test.cpp
A libc/test/src/strings/ffsll_test.cpp
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
A libc/utils/MPCWrapper/mpc_inc.h
M libclc/CMakeLists.txt
A libclc/clc/include/clc/math/clc_hypot.h
M libclc/clc/lib/generic/SOURCES
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_frexp.inc
A libclc/clc/lib/generic/math/clc_hypot.cl
A libclc/clc/lib/generic/math/clc_hypot.inc
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_hypot.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/hypot.cl
M libclc/libclc.pc.in
M libclc/spirv/lib/SOURCES
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/ranges_stable_partition.h
M libcxx/include/__algorithm/ranges_stable_sort.h
M libcxx/include/__algorithm/stable_partition.h
M libcxx/include/__algorithm/swap_ranges.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__concepts/class_or_enum.h
M libcxx/include/__concepts/swappable.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__memory/allocator_traits.h
M libcxx/include/__type_traits/is_pod.h
A libcxx/include/__type_traits/reference_constructs_from_temporary.h
A libcxx/include/__type_traits/reference_converts_from_temporary.h
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__utility/no_destroy.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__utility/swap.h
M libcxx/include/__vector/vector.h
M libcxx/include/algorithm
M libcxx/include/forward_list
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/include/string
M libcxx/include/type_traits
M libcxx/modules/std/type_traits.inc
A libcxx/test/benchmarks/algorithms/swap_ranges.bench.cpp
A libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/ranges_stable_partition.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/stable_partition.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/ranges.stable.sort.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_dangling.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_omitting_invoke.pass.cpp
M libcxx/test/std/algorithms/ranges_robust_against_proxy_iterators.pass.cpp
M libcxx/test/std/algorithms/robust_against_proxy_iterators_lifetime_bugs.pass.cpp
M libcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/reference/ctor_no_default.compile.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
M libcxx/test/std/strings/strings.erasure/erase.pass.cpp
M libcxx/test/std/strings/strings.erasure/erase_if.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/common.h
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_pod.deprecated.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_pod.pass.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
A libcxx/test/std/utilities/template.bitset/bitset.members/reference.ctor_no_default.compile.pass.cpp
M libcxx/test/support/test_iterators.h
M libcxx/utils/ci/docker-compose.yml
M libunwind/src/Registers.hpp
M lld/COFF/Chunks.h
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Arch/LoongArch.cpp
A lld/test/COFF/arm64x-comm.s
M lld/test/COFF/arm64x-includeoptional.s
M lld/test/COFF/build-id-sym.s
A lld/test/ELF/loongarch-relax-call36-2.s
A lld/test/ELF/loongarch-relax-call36.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
M lld/test/wasm/emit-relocs.s
M lld/test/wasm/initial-heap.test
M lld/test/wasm/mutable-global-exports.s
A lld/test/wasm/page-size.s
M lld/test/wasm/shared-memory.yaml
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/InputChunks.cpp
M lld/wasm/InputChunks.h
M lld/wasm/Options.td
M lld/wasm/OutputSections.cpp
M lld/wasm/OutputSections.h
M lld/wasm/SymbolTable.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lld/wasm/Writer.cpp
M lld/wasm/WriterUtils.cpp
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
M lldb/docs/use/symbolfilejson.rst
M lldb/include/lldb/API/SBProgress.h
M lldb/include/lldb/Core/Progress.h
M lldb/include/lldb/Core/Section.h
M lldb/include/lldb/Core/Telemetry.h
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/include/lldb/Expression/IRExecutionUnit.h
R lldb/include/lldb/Host/Alarm.h
A lldb/include/lldb/Host/MemoryMonitor.h
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectCast.h
M lldb/include/lldb/ValueObject/ValueObjectChild.h
M lldb/include/lldb/ValueObject/ValueObjectConstResult.h
M lldb/include/lldb/ValueObject/ValueObjectDynamicValue.h
M lldb/include/lldb/ValueObject/ValueObjectMemory.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/include/lldb/ValueObject/ValueObjectSyntheticFilter.h
M lldb/include/lldb/ValueObject/ValueObjectVTable.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/API/SBProgress.cpp
M lldb/source/API/SBType.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Progress.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/Telemetry.cpp
M lldb/source/Core/Value.cpp
M lldb/source/DataFormatters/TypeFormat.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/common/Alarm.cpp
A lldb/source/Host/common/MemoryMonitor.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/Host.mm
A lldb/source/Host/macosx/objcxx/MemoryMonitorMacOSX.mm
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/CMakeLists.txt
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
A lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
A lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.h
M lldb/source/Plugins/Language/CPlusPlus/CxxStringTypes.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppUniquePointer.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectCast.cpp
M lldb/source/ValueObject/ValueObjectChild.cpp
M lldb/source/ValueObject/ValueObjectConstResult.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/source/ValueObject/ValueObjectMemory.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
M lldb/source/ValueObject/ValueObjectVTable.cpp
M lldb/source/ValueObject/ValueObjectVariable.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHooks.py
M lldb/test/API/functionalities/asan/TestMemoryHistory.py
M lldb/test/API/functionalities/asan/TestReportData.py
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/lit.cfg.py
A lldb/test/API/macosx/no-nlist-memory-module/Makefile
A lldb/test/API/macosx/no-nlist-memory-module/NoNlists.mk
A lldb/test/API/macosx/no-nlist-memory-module/TestNoNlistsDylib.py
A lldb/test/API/macosx/no-nlist-memory-module/has-nlists.c
A lldb/test/API/macosx/no-nlist-memory-module/main.c
A lldb/test/API/macosx/no-nlist-memory-module/no-nlist-sect.s
A lldb/test/API/macosx/no-nlist-memory-module/no-nlists.c
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
A lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/main.cpp
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/Shell/SymbolFile/DWARF/x86/class-type-nullptr-deref.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug-types-signature-loop.s
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
A lldb/tools/lldb-dap/Protocol.cpp
A lldb/tools/lldb-dap/Protocol.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Callback/TestBreakpointSetCallback.cpp
M lldb/unittests/Core/ProgressReportTest.cpp
M lldb/unittests/Core/TelemetryTest.cpp
R lldb/unittests/Host/AlarmTest.cpp
M lldb/unittests/Host/CMakeLists.txt
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/CIBestPractices.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/Contributing.rst
M llvm/docs/GitHub.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/examples/Kaleidoscope/Chapter8/toy.cpp
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/bit.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/DetectDeadLanes.h
M llvm/include/llvm/CodeGen/ExecutionDomainFix.h
A llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
M llvm/include/llvm/CodeGen/FastISel.h
A llvm/include/llvm/CodeGen/FixupStatepointCallerSaved.h
M llvm/include/llvm/CodeGen/LivePhysRegs.h
M llvm/include/llvm/CodeGen/LiveRangeCalc.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/RegisterBankInfo.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/MemoryMapper.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Analysis.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/legacy/LTOModule.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/SandboxIR/Region.h
A llvm/include/llvm/Support/AArch64AttributeParser.h
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/ARMAttributeParser.h
M llvm/include/llvm/Support/CSKYAttributeParser.h
M llvm/include/llvm/Support/ConvertUTF.h
A llvm/include/llvm/Support/ELFAttrParserCompact.h
A llvm/include/llvm/Support/ELFAttrParserExtended.h
M llvm/include/llvm/Support/ELFAttributeParser.h
M llvm/include/llvm/Support/ELFAttributes.h
M llvm/include/llvm/Support/ErrorOr.h
M llvm/include/llvm/Support/HexagonAttributeParser.h
M llvm/include/llvm/Support/MSP430AttributeParser.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/RISCVAttributeParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromBBs.h
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/CMakeLists.txt
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/AllocationOrder.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.h
M llvm/lib/CodeGen/DetectDeadLanes.cpp
R llvm/lib/CodeGen/EHContGuardCatchret.cpp
A llvm/lib/CodeGen/EHContGuardTargets.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/Localizer.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/ImplicitNullChecks.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveIntervalUnion.cpp
M llvm/lib/CodeGen/LivePhysRegs.cpp
M llvm/lib/CodeGen/LiveRangeCalc.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
M llvm/lib/CodeGen/MIRVRegNamerUtils.h
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineStableHash.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/OptimizePHIs.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegisterBankInfo.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
M llvm/lib/ExecutionEngine/TargetSelect.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/User.cpp
M llvm/lib/IR/ValueSymbolTable.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/TargetRegistry.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/IRObjectFile.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
A llvm/lib/Support/AArch64AttributeParser.cpp
M llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CSKYAttributeParser.cpp
A llvm/lib/Support/ELFAttrParserCompact.cpp
A llvm/lib/Support/ELFAttrParserExtended.cpp
R llvm/lib/Support/ELFAttributeParser.cpp
M llvm/lib/Support/HexagonAttributeParser.cpp
M llvm/lib/Support/RISCVAttributeParser.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
A llvm/lib/Target/AMDGPU/AMDGPUExportKernelRuntimeHandles.cpp
A llvm/lib/Target/AMDGPU/AMDGPUExportKernelRuntimeHandles.h
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
R llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
R llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
A llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYMCInstLower.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/BitTracker.cpp
M llvm/lib/Target/Hexagon/BitTracker.h
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h
M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.h
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.h
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/AsmParser/X86Operand.h
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrOperands.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
A llvm/lib/Target/Xtensa/XtensaDSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/Internalize.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrOrderFile.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GuardWidening.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromBBs.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/RISCV/cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-expandload-compressstore.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
A llvm/test/Analysis/ValueTracking/phi-self.ll
M llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
A llvm/test/CodeGen/AArch64/GlobalISel/prefetch-darwin-no-fold-global.ll
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M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/arm64ec-eh.ll
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M llvm/test/CodeGen/AArch64/landingpad-ifcvt.ll
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M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AArch64/parity.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
M llvm/test/CodeGen/AArch64/seqpaircopy.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir
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M llvm/test/CodeGen/AArch64/split-deadloop.mir
M llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
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M llvm/test/CodeGen/AArch64/sve-fcvt.ll
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M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
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M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fixed-length-fcopysign.ll
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M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
M llvm/test/CodeGen/AArch64/wineh9.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
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M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
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A llvm/test/CodeGen/AMDGPU/amdgpu-num-agpr.ll
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M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
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M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
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M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
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M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
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A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
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M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
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M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
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M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
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M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
A llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
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M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
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A llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/rewrite-undef-for-phi.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
R llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir
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M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
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M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
A llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
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M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
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M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
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A llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
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M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
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M llvm/test/CodeGen/AMDGPU/udiv64.ll
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M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
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M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
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M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
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M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
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M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
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A llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
A llvm/test/CodeGen/DirectX/UAddc.ll
A llvm/test/CodeGen/DirectX/UAddc_errors.ll
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M llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir
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A llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
A llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
A llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/stack-slot-coloring.mir
A llvm/test/CodeGen/RISCV/stores-of-loads-merging.ll
A llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
A llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
A llvm/test/CodeGen/RISCV/xqccmp-cm-popretz.mir
A llvm/test/CodeGen/RISCV/xqccmp-cm-push-pop.mir
A llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
A llvm/test/CodeGen/RISCV/xqccmp-with-float.ll
A llvm/test/CodeGen/RISCV/xqccmp_mvas_mvsa.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-empty-md.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
A llvm/test/CodeGen/SPIRV/pointers/array-skips-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
M llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir
M llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
M llvm/test/CodeGen/WebAssembly/libcalls.ll
M llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
M llvm/test/CodeGen/X86/align-basic-block-sections.mir
M llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir
M llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir
M llvm/test/CodeGen/X86/amx_tile_pair_copy.mir
M llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir
M llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/apx/cf.ll
M llvm/test/CodeGen/X86/apx/domain-reassignment.mir
M llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
A llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx-splat.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
M llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/break-false-dep-crash.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/cast-vsel.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-pavg.ll
M llvm/test/CodeGen/X86/combine-pmadd.ll
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/CodeGen/X86/domain-reassignment.mir
M llvm/test/CodeGen/X86/eq-or-eq-range-of-2.ll
M llvm/test/CodeGen/X86/exp10-libcall-names.ll
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
M llvm/test/CodeGen/X86/finite-libcalls.ll
A llvm/test/CodeGen/X86/fp128-abi.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/haddsub-undef.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/icmp-pow2-mask.ll
M llvm/test/CodeGen/X86/insertelement-var-index.ll
A llvm/test/CodeGen/X86/kmov.ll
A llvm/test/CodeGen/X86/lea-16bit.ll
A llvm/test/CodeGen/X86/lea-8bit.ll
M llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/memset-inline.ll
M llvm/test/CodeGen/X86/memset-nonzero.ll
M llvm/test/CodeGen/X86/mfence.ll
M llvm/test/CodeGen/X86/peephole-test-after-add.mir
M llvm/test/CodeGen/X86/pr41619.ll
M llvm/test/CodeGen/X86/pr46527.ll
M llvm/test/CodeGen/X86/pr62014.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
M llvm/test/CodeGen/X86/scalar-fp-to-i64.ll
M llvm/test/CodeGen/X86/seh-except-restore.ll
M llvm/test/CodeGen/X86/setcc-lowering.ll
A llvm/test/CodeGen/X86/splitkit-remat-broken-subreg-constraint.mir
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
M llvm/test/CodeGen/X86/stack-protector-phi.ll
M llvm/test/CodeGen/X86/statepoint-fixup-call.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop-neg.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop.mir
M llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
M llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef-def.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef.mir
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
A llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
M llvm/test/CodeGen/X86/vec_set-H.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-partial-undef.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-unsigned-cmp.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/widened-broadcast.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
M llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/long-double-x87.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/structured-bindings.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/var-not-alloca-sized.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/sroa-alloca-offset.ll
A llvm/test/DebugInfo/Generic/subrange_type.ll
M llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
M llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_origins.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-tbl.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_origins.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
A llvm/test/LTO/RISCV/lit.local.cfg
A llvm/test/LTO/RISCV/riscv-ilp32e.ll
M llvm/test/LTO/X86/coro.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
M llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
M llvm/test/MC/Disassembler/SystemZ/insns.txt
A llvm/test/MC/RISCV/xqcibm-invalid.s
A llvm/test/MC/RISCV/xqcibm-valid.s
M llvm/test/MC/SystemZ/insn-good.s
M llvm/test/MC/X86/I386-32.s
M llvm/test/MC/X86/I386-64.s
M llvm/test/MC/X86/intel-syntax.s
M llvm/test/MC/X86/validate-inst-intel.s
A llvm/test/MC/Xtensa/xtensa-mac16.s
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
A llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir
M llvm/test/MachineVerifier/verify-inlineasmbr.mir
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Other/print-prof-data.ll
M llvm/test/ThinLTO/X86/ctxprof.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
A llvm/test/Transforms/DCE/op_bundles.ll
M llvm/test/Transforms/EliminateAvailableExternally/transform-to-local.ll
M llvm/test/Transforms/GVN/malloc-load-removal.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/opt-remarks.ll
M llvm/test/Transforms/GVN/pr14166.ll
M llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
A llvm/test/Transforms/InstCombine/AMDGPU/phi-with-incoming-from-load.ll
M llvm/test/Transforms/InstCombine/AMDGPU/rcp-contract-rsq.ll
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
A llvm/test/Transforms/InstCombine/compute-sign-bits-bitcast.ll
A llvm/test/Transforms/InstCombine/iX-ext-split.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstSimplify/fcmp.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_memcheck_cost.ll
A llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/MergeFunc/comdat.ll
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
A llvm/test/Transforms/PGOProfile/memprof-call-site-at-alloc-site.ll
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
A llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
A llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
A llvm/test/Transforms/SandboxVectorizer/regions-from-bbs.ll
M llvm/test/Transforms/Scalarizer/min-bits.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-selects.ll
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
M llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
M llvm/test/tools/llvm-ar/extract.test
M llvm/test/tools/llvm-ar/print.test
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-bad-subctx.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-flat.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-counters.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-section.yaml
R llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-vector.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-ctx-only.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-flat-first.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/valid-flat-only.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid.yaml
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util-negative.test
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util.test
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-completeness-json-output.s
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-cu-lists-json-output.s
A llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-load.s
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-misc-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
A llvm/test/tools/llvm-objcopy/strip-error-handling.test
M llvm/test/tools/llvm-objdump/ELF/dynamic-section.test
A llvm/test/tools/llvm-readobj/ELF/AArch64/build-attributes-comprehensive.s
M llvm/test/tools/llvm-readtapi/compare-left-single-inline.test
M llvm/test/tools/llvm-readtapi/compare-mismatched-inlines.test
M llvm/test/tools/llvm-readtapi/compare-multiple-inlines.test
M llvm/test/tools/llvm-readtapi/compare-right-single-inline.test
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/tools/bugpoint/BugDriver.cpp
M llvm/tools/llc/llc.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/tools/llvm-dwarfdump/Statistics.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-elf.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-macho.cpp
M llvm/tools/llvm-jitlistener/llvm-jitlistener.cpp
M llvm/tools/llvm-mca/CodeRegion.cpp
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readtapi/DiffEngine.cpp
M llvm/tools/llvm-readtapi/DiffEngine.h
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/lto/CMakeLists.txt
M llvm/tools/lto/lto.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/EquivalenceClassesTest.cpp
M llvm/unittests/ADT/STLExtrasTest.cpp
M llvm/unittests/Analysis/LazyCallGraphTest.cpp
M llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfUtils.cpp
M llvm/unittests/DebugInfo/LogicalView/CodeViewReaderTest.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
M llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.cpp
M llvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/Support/ARMAttributeParser.cpp
M llvm/unittests/Support/CSKYAttributeParserTest.cpp
M llvm/unittests/Support/ELFAttributeParserTest.cpp
M llvm/unittests/Support/ProgramTest.cpp
M llvm/unittests/Support/RISCVAttributeParserTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/X86RecognizableInstr.cpp
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
M llvm/utils/gn/secondary/bolt/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/macosx/objcxx/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M mlir/docs/Canonicalization.md
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/DialectConversion.md
M mlir/docs/Dialects/Linalg/_index.md
M mlir/docs/PatternRewriter.md
M mlir/docs/Tutorials/QuickstartRewrites.md
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/include/mlir/Dialect/DLTI/DLTIAttrs.td
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgDoc.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUOps.td
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUTypes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinTypeInterfaces.h
M mlir/include/mlir/IR/OpAsmInterface.td
A mlir/include/mlir/IR/OpAsmSupport.h
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/MeshToMPI/CMakeLists.txt
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorToAllocTensor.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OptimizeAllocationLiveness.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/BuiltinDialect.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/python/mlir/_mlir_libs/__init__.py
M mlir/python/mlir/dialects/NVGPUOps.td
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-floats-ocp.mlir
M mlir/test/Conversion/MeshToMPI/convert-mesh-to-mpi.mlir
A mlir/test/Conversion/MeshToMPI/convert-shardshape-to-mpi.mlir
M mlir/test/Conversion/TosaToArith/tosa-to-arith.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor-invalid.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
A mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/dma-generate.mlir
M mlir/test/Dialect/Affine/loop-fusion-2.mlir
M mlir/test/Dialect/Affine/loop-fusion-3.mlir
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Dialect/Affine/loop-fusion.mlir
M mlir/test/Dialect/Affine/loop-unswitch.mlir
M mlir/test/Dialect/Affine/scalrep.mlir
M mlir/test/Dialect/LLVMIR/call-intrin.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Dialect/Tensor/bubble-up-extract-slice-op.mlir
M mlir/test/Dialect/Tensor/mesh-spmdization.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/constant-reciprocal-fold.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/constrained_shapes.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Vector/vector-mask-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/IR/print-attr-type-aliases.mlir
M mlir/test/IR/recursive-type.mlir
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
M mlir/test/Target/LLVMIR/Import/call-argument-attributes.ll
M mlir/test/Target/LLVMIR/Import/data-layout.ll
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/data-layout.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
A mlir/test/Target/LLVMIR/omptarget-private-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
A mlir/test/Target/LLVMIR/openmp-target-has-device-addr.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/test/lib/Dialect/Test/TestDialectInterfaces.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
M mlir/test/mlir-tblgen/constraint-unique.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/test/python/ir/context_lifecycle.py
M mlir/test/python/ir/location.py
M mlir/test/python/ir/operation.py
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
M mlir/unittests/IR/PatternMatchTest.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/host/dynamic_ffi/ffi.h
M offload/test/Inputs/target-use-dev-ptr.c
A offload/test/offloading/fortran/target-has-device-addr1.f90
A offload/test/offloading/fortran/target-has-device-addr2.f90
A offload/test/offloading/fortran/target-has-device-addr3.f90
M offload/test/offloading/fortran/target-use-dev-ptr.f90
A offload/test/offloading/fortran/target_map_ompx_hold.f90
A offload/test/offloading/fortran/target_map_present_fail.f90
A offload/test/offloading/fortran/target_map_present_success.f90
A offload/test/offloading/fortran/usm_map_close.f90
M openmp/libompd/gdb-plugin/ompd/ompd_handles.py
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/CodeGen/PerfMonitor.cpp
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/strings/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
A utils/bazel/third_party_build/mpc.BUILD
Log Message:
-----------
Rebase, address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/d7bc6d66cb0c...dc66ca4202d2
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