[all-commits] [llvm/llvm-project] 3e94ea: [AMDGPU] Add GFX12 S_ALLOC_VGPR instruction (#130018)

[Diana Picus via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3e94eae746888ee63b38d347b068eaf0d5b72772
      https://github.com/llvm/llvm-project/commit/3e94eae746888ee63b38d347b068eaf0d5b72772
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2025-03-10 (Mon, 10 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/test/MC/AMDGPU/gfx11_unsupported.s
    M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
    M llvm/test/MC/AMDGPU/gfx12_err.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt

  Log Message:
  -----------
  [AMDGPU] Add GFX12 S_ALLOC_VGPR instruction (#130018)

This patch only adds the instruction for disassembly support.

We neither have an instrinsic nor codegen support, and it is unclear
whether we actually want to ever have an intrinsic, given the fragile
semantics.

For now, it will be generated only by the backend in very specific
circumstances.

---------

Co-authored-by: Jannik Silvanus <jannik.silvanus at amd.com>



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