[all-commits] [llvm/llvm-project] 733ad3: [LTO] Override TargetABI from module flags if pres...

[Kito Cheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 733ad3fdebf782be5afffdb8310a0ce15675086c
      https://github.com/llvm/llvm-project/commit/733ad3fdebf782be5afffdb8310a0ce15675086c
  Author: Kito Cheng <kito.cheng at sifive.com>
  Date:   2025-03-07 (Fri, 07 Mar 2025)

  Changed paths:
    M llvm/include/llvm/IR/Module.h
    M llvm/lib/IR/Module.cpp
    M llvm/lib/LTO/LTOBackend.cpp
    A llvm/test/LTO/RISCV/lit.local.cfg
    A llvm/test/LTO/RISCV/riscv-ilp32e.ll

  Log Message:
  -----------
  [LTO] Override TargetABI from module flags if present when creating TargetMachine (#126497)

…argetMachine

RISC-V's data layout is determined by the ABI, not just the target
triple. However, the TargetMachine is created using the data layout from
the target triple, which is not always correct. This patch uses the
target ABI from the module and passes it to the TargetMachine, ensuring
that the data layout is set correctly according to the ABI.

The same problem will happen with other targets like MIPS, but
unfortunately, MIPS didn't emit the target-abi into the module flags, so
this patch only fixes the issue for RISC-V.

NOTE: MIPS with -mabi=n32 can trigger the same issue.

Another possible solution is add new parameter to the TargetMachine
constructor, but that would require changes in all the targets.



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