[all-commits] [llvm/llvm-project] 6e7e46: [RISCV] Add Qualcomm uC Xqcibm (Bit Manipulation) ...

quic_hchandel via All-commits all-commits at lists.llvm.org
Wed Mar 5 22:32:14 PST 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6e7e46cafeccab761d31e6404ceb0cdef4c18bd4
      https://github.com/llvm/llvm-project/commit/6e7e46cafeccab761d31e6404ceb0cdef4c18bd4
  Author: quic_hchandel <quic_hchandel at quicinc.com>
  Date:   2025-03-06 (Thu, 06 Mar 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/TargetParser/RISCVISAInfo.cpp
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
    A llvm/test/MC/RISCV/xqcibm-invalid.s
    A llvm/test/MC/RISCV/xqcibm-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add Qualcomm uC Xqcibm (Bit Manipulation) extension (#129504)

This extension adds thirty eight  bit manipulation instructions.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.6

This patch adds assembler only support.

Co-authored-by: Sudharsan Veeravalli <quic_svs at quicinc.com>



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