[all-commits] [llvm/llvm-project] 03505a: [RISCV] Enable scalable loop vectorization for fma...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03505a004ff6909c46d6b8c498a9ffccd47d88a0
      https://github.com/llvm/llvm-project/commit/03505a004ff6909c46d6b8c498a9ffccd47d88a0
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-03-04 (Tue, 04 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll

  Log Message:
  -----------
  [RISCV] Enable scalable loop vectorization for fmax/fmin reductions with f16/bf16 type for zvfhmin/zvfbfmin (#129629)

This PR enable scalable loop vectorization for fmax and fmin reductions
with f16/bf16 type when only zvfhmin/zvfbfmin are enabled.

After https://github.com/llvm/llvm-project/pull/128800, we can promote
the fmax/fmin reductions with f16/bf16 type to f32 reductions for
zvfhmin/zvfbfmin.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications