[all-commits] [llvm/llvm-project] 1fc49f: [MLIR][AMDGPU] Add OCP FP8 support for new hardwar...

Mirza Halilčević via All-commits all-commits at lists.llvm.org
Mon Mar 3 12:10:53 PST 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1fc49ff59354ba6f6262018d52ff4e88a54372f8
      https://github.com/llvm/llvm-project/commit/1fc49ff59354ba6f6262018d52ff4e88a54372f8
  Author: Mirza Halilčević <109971222+mirza-halilcevic at users.noreply.github.com>
  Date:   2025-03-03 (Mon, 03 Mar 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
    M mlir/include/mlir/IR/Types.h
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
    M mlir/lib/IR/Types.cpp
    A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
    A mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation-ocp.mlir
    A mlir/test/Conversion/ArithToAMDGPU/8-bit-floats-ocp.mlir

  Log Message:
  -----------
  [MLIR][AMDGPU] Add OCP FP8 support for new hardware (#127728)

(Continuing from #106160)

This PR addresses remaining review comments from the original PR.

Original PR Description
---
Upcoming hardware (gfx12 and some future gfx9) will support the OCP
8-bit float formats for their matrix multiplication intrinsics and
conversion operations, retaining existing opcodes and compiler builtins.

This commit adds support for these types to the MLIR wrappers around
such operations, ensuring that the OCP types aren't used to generate
those builtins on hardware that doesn't expect that format and,
conversely, to ensure that the pre-OCP formats aren't used on new
hardware.

---------

Signed-off-by: Mirza Halilcevic <mirza.halilcevic at amd.com>
Co-authored-by: Paul Fuqua <pf at acm.org>
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>



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