[all-commits] [llvm/llvm-project] 7262a1: [flang] Set compile definitions for flang-rt build...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Mar 3 11:04:55 PST 2025
Branch: refs/heads/users/alexey-bataev/spr/lvfiximprove-max-safe-distance-analysis
Home: https://github.com/llvm/llvm-project
Commit: 7262a1ea313699c733ec24925fe83c8f8e60334c
https://github.com/llvm/llvm-project/commit/7262a1ea313699c733ec24925fe83c8f8e60334c
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang] Set compile definitions for flang-rt build on AIX (#127919)
After commit b55f751, the flang-rt build on AIX is missing `-D_LARGE_FILE_API
-D_XOPEN_SOURCE=700` in compiling the source. This patch is to add the
compile definitions.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: a88167a60d0b5529b2a5ab185680f25c3c983ec3
https://github.com/llvm/llvm-project/commit/a88167a60d0b5529b2a5ab185680f25c3c983ec3
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/test/IR/invalid-builtin-attributes.mlir
Log Message:
-----------
[MLIR] Improve error handling when parsing dense attributes (#128523)
Avoid triggering assertions when we expect to parse a string but
encounter a different type. Instead, handle the mismatch gracefully by
emitting a parser error.
Commit: 2dfb29a9b2f63e8dcbace2bf9b73ecc770f62b4d
https://github.com/llvm/llvm-project/commit/2dfb29a9b2f63e8dcbace2bf9b73ecc770f62b4d
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_nan.h
A libclc/clc/include/clc/math/clc_nan.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nan.cl
A libclc/clc/lib/generic/math/clc_nan.inc
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/nan.inc
Log Message:
-----------
[libclc] Move nan to the CLC library (#128521)
Commit: 3a6108bcac26016b791cabce86424c1f1dcf3056
https://github.com/llvm/llvm-project/commit/3a6108bcac26016b791cabce86424c1f1dcf3056
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
Log Message:
-----------
[SLP][REVEC] Fix scalar mask is passed to getScalarizationOverhead but the type is vector. (#128476)
Fix "Vector size mismatch".
Commit: 0b52aa1bdbc7416592e9c81d9a44ce411c21e081
https://github.com/llvm/llvm-project/commit/0b52aa1bdbc7416592e9c81d9a44ce411c21e081
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
Log Message:
-----------
[flang] Unsupported rounding modes (#128240)
Two new ieee_round_type values were added in f18 beyond the four values
defined in f03 and f08: ieee_away and ieee_other. Contemporary hardware
typically does not have support for these rounding modes, so flang does
not support them. ieee_support_rounding calls for these values return
false. Current generated code handles some attempts to set the rounding
mode to one of these unsupported values by setting the mode to
ieee_nearest. Update the code to explicitly do this in all cases.
Commit: 16f9c5da45b88ace429064b4823e94491b0ea9b1
https://github.com/llvm/llvm-project/commit/16f9c5da45b88ace429064b4823e94491b0ea9b1
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
Log Message:
-----------
[SPIR-V] Stop generating StorageImageReadWithoutFormat and StorageImageWriteWithoutFormat for the Unknown image format in the OpenCL environment (#128497)
This PR resolves the issue of the SPIR-V specification, requiring
Shader-coupled capabilities to read/write images in the OpenCL SPIR-V
environment, from the perspective of the LLVM SPIR-V backend. See
https://github.com/KhronosGroup/SPIRV-Headers/issues/487 for details and
discussion.
Current implementation correctly reproduces requirements of the SPIR-V
specification, however, since the requirements are problematic, out
current implementation blocks generation of valid SPIR-V code for
compute environments. This PR is to implement a solution discussed at
the SPIR-V WG to allow proceeding with generation of valid SPIR-V code
for the OpenCL environment and do not impact Vulkan environment at the
same time.
Commit: 529b3d16daf2c7970f6f0b1f97e8ed09891c726a
https://github.com/llvm/llvm-project/commit/529b3d16daf2c7970f6f0b1f97e8ed09891c726a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Remove SK_Select from manual splitting in getShuffleCost
We have general splitting logic for this kind just below, which to my
knowledge is both correct and precise. Given no test changes, either
a) the adhoc logic works out the same, or b) we have no coverage. I
did not investigate which.
Commit: 17ccaf4fa82ed6d081144f91b5580e24e44d435c
https://github.com/llvm/llvm-project/commit/17ccaf4fa82ed6d081144f91b5580e24e44d435c
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M offload/plugins-nextgen/host/CMakeLists.txt
Log Message:
-----------
[NFC][Offload] Fix typo to output architecture (#128527)
Commit: b66ec64b5b634cbf760d69d1629e462268aa1cbd
https://github.com/llvm/llvm-project/commit/b66ec64b5b634cbf760d69d1629e462268aa1cbd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
RegAllocGreedy: Remove unnecessary null register class check (#128487)
Commit: 538b898a836ac6efc3b0ec12cf27b511608d2e64
https://github.com/llvm/llvm-project/commit/538b898a836ac6efc3b0ec12cf27b511608d2e64
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilia-invalid.s
A llvm/test/MC/RISCV/xqcilia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (#124706)
This extension adds eight 48 bit large arithmetic instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Commit: cebb8f72b7937548bd17c7972297f2efafa1e958
https://github.com/llvm/llvm-project/commit/cebb8f72b7937548bd17c7972297f2efafa1e958
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMPIRBuilder] Add support for distribute constructs (#127816)
This patch adds the `OpenMPIRBuilder::createDistribute()` function and
updates `OpenMPIRBuilder::applyStaticWorkshareLoop()` in preparation for
adding `distribute` support to flang.
Co-authored-by: Dominik Adamski <dominik.adamski at amd.com>
Commit: 5bddadf783c177943fa4f86fa0d295d4e88e7dea
https://github.com/llvm/llvm-project/commit/5bddadf783c177943fa4f86fa0d295d4e88e7dea
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[CodingStandard] Rework anonymous namespace section to cover visibility more broadly (#126775)
- Rename anonymous namespace section and rework it to
cover visibility more broadly.
- Add language suggesting restricting visibility as much as
possible, using various C++ facilities.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 4defac91dbdf4d54aa40a47851c48e9c587fb7e9
https://github.com/llvm/llvm-project/commit/4defac91dbdf4d54aa40a47851c48e9c587fb7e9
Author: Matthias Springer <me at m-sp.org>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][GPUToNVVM] Add `benefit` to `populate` functions (#128484)
Certain GPU->NVVM patterns compete with Arith->LLVM patterns. (The ones
that lower to libdevice.) Add an optional `benefit` parameter to all
`populate` functions so that users can give preference to GPU->NVVM
patterns.
Commit: 7a4cb9bac50c8c19ec0d4ab7f186ef086064a549
https://github.com/llvm/llvm-project/commit/7a4cb9bac50c8c19ec0d4ab7f186ef086064a549
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
M clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/HeuristicResolver.cpp
Log Message:
-----------
[clang-tidy][NFC] Expose HeuristicResolver::lookupDependentName() and use it in StandaloneEmptyCheck (#128391)
The use replaces CXXRecordDecl::lookupDependentName() which
HeuristicResolver aims to supersede.
Commit: ff7790e6dde7859b993b7d9abb4a2ec4fe2ae779
https://github.com/llvm/llvm-project/commit/ff7790e6dde7859b993b7d9abb4a2ec4fe2ae779
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
Log Message:
-----------
[MLIR][OpenMP] Simplify definition of the BlockArgOpenMPOpInterface, NFC (#128198)
This patch removes code duplication from the definition of methods of
the `BlockArgOpenMPOpInterface` and makes the order relationship between
entry block argument generating clauses explicit.
The goal of this change is to make the addition of clauses and methods
to the interface less error-prone.
Commit: aab07d8ca64495600ce9e7fe4825ca7ff9057c28
https://github.com/llvm/llvm-project/commit/aab07d8ca64495600ce9e7fe4825ca7ff9057c28
Author: sommersun <50041042+sommersun at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
Log Message:
-----------
fixed #95641 pointless string copy (#127325)
fixed #95641 by using std::move for T&&.
Commit: e89cd500b252c02dd18a5b7e1f5065df7a878ff4
https://github.com/llvm/llvm-project/commit/e89cd500b252c02dd18a5b7e1f5065df7a878ff4
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
[bazel] Port 7a4cb9bac50c8c19ec0d4ab7f186ef086064a549
Commit: 63af27190be70c3ea94bf913b93cb82db9eca25c
https://github.com/llvm/llvm-project/commit/63af27190be70c3ea94bf913b93cb82db9eca25c
Author: Florian Mayer <fmayer at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/test/CodeGen/memtag-globals-asm.cpp
Log Message:
-----------
[NFC] [test] assert padding in memtag-globals test (#128259)
Commit: 20fd7f0a76ae97e7cd645412ef5ca1a9e9614578
https://github.com/llvm/llvm-project/commit/20fd7f0a76ae97e7cd645412ef5ca1a9e9614578
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Remove floating-point working group meeting (#128258)
This meeting never quite took off the way I had hoped, and I haven't had
time for it in quite a while, so I am removing it from the Getting
Involved page.
Commit: f1252f539ca203a979d61b616186e9be9d612f96
https://github.com/llvm/llvm-project/commit/f1252f539ca203a979d61b616186e9be9d612f96
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
A llvm/test/MC/PowerPC/case-insensitive-regs.s
Log Message:
-----------
[PPC][MC] Restore support for case-insensitive register names (#128525)
Lowercase the name before calling MatchRegisterName(), to restore
support for using `%R3` instead of `%r3` and similar, matching the GNU
assembler.
Fixes https://github.com/llvm/llvm-project/issues/126786.
Commit: cc7f22ee6ccb2c1ad79834e06d5b18d8f014d140
https://github.com/llvm/llvm-project/commit/cc7f22ee6ccb2c1ad79834e06d5b18d8f014d140
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/test/ObjectYAML/wasm/dylink_section.yaml
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[object][WebAssembly] Add support for RUNTIME_PATH to yaml2obj and obj2yaml (#126080)
This is the first step of adding RPATH support for wasm.
See corresponding update to the WebAssembly/tool-conventions repo on dynamic
linking: https://github.com/WebAssembly/tool-conventions/pull/246
Commit: 36fdeb2aded08a776fcffefa73cb7667e7fc6c2d
https://github.com/llvm/llvm-project/commit/36fdeb2aded08a776fcffefa73cb7667e7fc6c2d
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/include/flang/Optimizer/Transforms/RuntimeFunctions.inc
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
A flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Lower/array-temp.f90
A flang/test/Transforms/set-runtime-call-attributes.fir
A flang/test/Transforms/verify-known-runtime-functions.fir
A flang/test/Utils/generate-checks-for-runtime-funcs.py
Log Message:
-----------
[flang] Set LLVM specific attributes to fir.call's of Fortran runtime. (#128093)
This change is inspired by a case in facerec benchmark, where
performance
of scalar code may improve by about 6%@aarch64 due to getting rid of
redundant
loads from Fortran descriptors. These descriptors are corresponding
to subroutine local ALLOCATABLE, SAVE variables. The scalar loop nest
in LocalMove subroutine contains call to Fortran runtime IO functions,
and LLVM globals-aa analysis cannot prove that these calls do not modify
the globalized descriptors with internal linkage.
This patch sets and propagates llvm.memory_effects attribute for
fir.call
operations calling Fortran runtime functions. In particular, it tries
to set the Other memory effect to NoModRef. The Other memory effect
includes accesses to globals and captured pointers, so we cannot set
it for functions taking Fortran descriptors with one exception
for calls where the Fortran descriptor arguments are all null.
As long as different calls to the same Fortran runtime function may have
different attributes, I decided to attach the attributes to the calls
rather than functions. Moreover, attaching the attributes to func.func
will require propagating these attributes to llvm.func, which is not
happening right now.
In addition to llvm.memory_effects, the new pass sets llvm.nosync
and llvm.nocallback attributes that may also help LLVM alias analysis
(e.g. see #127707). These attributes are ignored currently.
I will support them in LLVM IR dialect in a separate patch.
I also added another pass for developers to be able to print
declarations/calls of all Fortran runtime functions that are recognized
by the attributes setting pass. It should help with maintenance
of the LIT tests.
Commit: a6abbe03094a7afc85d4d35c24e6cedd1cfc4ef2
https://github.com/llvm/llvm-project/commit/a6abbe03094a7afc85d4d35c24e6cedd1cfc4ef2
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
Log Message:
-----------
[test] Remove `-emit-llvm` from the `and-errors.hlsl` test to avoid writing to a potentially write-protected directory (#128047)
@mikaelholmen
[mentioned](https://github.com/llvm/llvm-project/pull/127098#discussion_r1962897888)
that the `-emit-llvm` argument isn't necessary for the `and-errors.hlsl`
test and may cause issues due to writing to the current (potentially
write-protected) directory.
This PR removes the `-emit-llvm` argument from clang in the RUN lines of
the test.
Commit: 7f6f186736c81ab3ca1881ed9d5569ffc1050df8
https://github.com/llvm/llvm-project/commit/7f6f186736c81ab3ca1881ed9d5569ffc1050df8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
Log Message:
-----------
[SPIRV] Stop including SPIRVInstrInfo.h in MCTargetDesc. NFC (#128443)
SPIRVInstrInfo.h is a CodeGen layer file, it should not be used in MC
layer files.
This required adding a new enum for MCInst flags and a conversion from
MachineInstr's AsmPrinter flags in SPIRVMCInstLower.
Commit: a0be17dc91d054290910b5787f41900fb6ef0d6e
https://github.com/llvm/llvm-project/commit/a0be17dc91d054290910b5787f41900fb6ef0d6e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Remove unnecessary entries from RISCVVInversePseudosTable. NFC (#128376)
The inverse pseudos table contained entries that map back to the
unmasked and masked pseudo, but the lookup only returns the first one.
Add a new FilterClassField to remove the unnecessary entries.
This reduces the size of the llvm-mca binary by ~32KB.
Commit: 664cbd1b5db190724ceea498d1f520eb66d78d69
https://github.com/llvm/llvm-project/commit/664cbd1b5db190724ceea498d1f520eb66d78d69
Author: John Harrison <harjohn at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
Log Message:
-----------
[lldb-dap] skip TestDAP_server on windows to unblock CI. (#128278)
This should fix the tests running on windows.
https://lab.llvm.org/buildbot/#/builders/141/builds/6506 is the failure,
the error message does not clearly indicate why the connection failed,
but they are passing for me locally on macOS and passed on linux in the
CI.
Commit: 571b787b83cb1bfc7d4c8214b296ec965e7bb7e2
https://github.com/llvm/llvm-project/commit/571b787b83cb1bfc7d4c8214b296ec965e7bb7e2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
Log Message:
-----------
[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister. (#128473)
NVPTX, SPIRV, and WebAssembly pass virtual registers to this function
since they don't perform register allocation. We need to use Register to
avoid a virtual register being converted to MCRegister by the caller.
Commit: 8dbc393e447299d1a4d35b96c6e66542a5928cff
https://github.com/llvm/llvm-project/commit/8dbc393e447299d1a4d35b96c6e66542a5928cff
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
Log Message:
-----------
[flang][cuda][NFC] Remove shared alloc addr space (#128535)
Commit: e298fc2da97120a30ee2f120ac184ab209fc1eb4
https://github.com/llvm/llvm-project/commit/e298fc2da97120a30ee2f120ac184ab209fc1eb4
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.def
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Verifier.cpp
A llvm/test/Bitcode/subrange_type.ll
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Add DISubrangeType (#126772)
An Ada program can have types that are subranges of other types. This
patch adds a new DIType node, DISubrangeType, to represent this concept.
I considered extending the existing DISubrange to do this, but as
DISubrange does not derive from DIType, that approach seemed more
disruptive.
A DISubrangeType can be used both as an ordinary type, but also as the
type of an array index. This is also important for Ada.
Ada subrange types can also be stored using a bias. Representing this in
the DWARF required the use of an extension. GCC has been emitting this
extension for years, so I've reused it here.
Commit: d9d1f241f27bab3c7b8914196316a6e6202cc61e
https://github.com/llvm/llvm-project/commit/d9d1f241f27bab3c7b8914196316a6e6202cc61e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port d0e37d972331 (llvm-dap tweaks)
Commit: 9638d08af96c4cb8cf16785eed92179b2658bdfe
https://github.com/llvm/llvm-project/commit/9638d08af96c4cb8cf16785eed92179b2658bdfe
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
A llvm/test/CodeGen/NVPTX/cmpxchg.py
M llvm/test/CodeGen/NVPTX/lit.local.cfg
Log Message:
-----------
[NVPTX] Support for memory orderings for cmpxchg (#126159)
So far, all cmpxchg instructions were lowered to atom.cas. This change
adds support for memory orders in lowering. Specifically:
- For cmpxchg which are emulated, memory ordering is enforced by adding
fences around the emulation loops.
- For cmpxchg which are lowered to PTX directly, where the memory order
is supported in ptx, lower directly to the correct ptx instruction.
- For seq_cst cmpxchg which are lowered to PTX directly, use a sequence
(fence.sc; atom.cas.acquire) to provide the semantics that we want.
Also adds tests for all possible combinations of (size, memory ordering,
address space, SM/PTX versions)
This also adds `atomicOperationOrderAfterFenceSplit` in TargetLowering,
for specially handling seq_cst atomics.
Commit: 51ce6c437fec1fe0170d077424e1cbc141d05c2b
https://github.com/llvm/llvm-project/commit/51ce6c437fec1fe0170d077424e1cbc141d05c2b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Fix error C2065: 'PATH_MAX': undeclared identifier
This should fix the Windows build.
Commit: d9b0571b5c408b3c699143a8870d04414351d28d
https://github.com/llvm/llvm-project/commit/d9b0571b5c408b3c699143a8870d04414351d28d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 363bfd6090b0
Commit: 41cd6d2b1d6323bebfb20349d9f45b9c0ea75ada
https://github.com/llvm/llvm-project/commit/41cd6d2b1d6323bebfb20349d9f45b9c0ea75ada
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 850b49297615
Commit: 823a597d2ad0a76e8d5278a789f37a07b393cd2a
https://github.com/llvm/llvm-project/commit/823a597d2ad0a76e8d5278a789f37a07b393cd2a
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
Log Message:
-----------
[flang] Workaround build failure.
https://lab.llvm.org/buildbot/#/builders/140/builds/17587
Looks like it is related to some specific version of the build compiler.
Commit: 4d536169010e4a1c70523edbdec5c6dfcbd49fda
https://github.com/llvm/llvm-project/commit/4d536169010e4a1c70523edbdec5c6dfcbd49fda
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
Log Message:
-----------
Revert "[flang] Workaround build failure."
This reverts commit 823a597d2ad0a76e8d5278a789f37a07b393cd2a.
Commit: 69cc16fb55089f624aba106a714aaf3f1a5504f5
https://github.com/llvm/llvm-project/commit/69cc16fb55089f624aba106a714aaf3f1a5504f5
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
R flang/include/flang/Optimizer/Transforms/RuntimeFunctions.inc
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
R flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Lower/array-temp.f90
R flang/test/Transforms/set-runtime-call-attributes.fir
R flang/test/Transforms/verify-known-runtime-functions.fir
R flang/test/Utils/generate-checks-for-runtime-funcs.py
Log Message:
-----------
Revert "[flang] Set LLVM specific attributes to fir.call's of Fortran runtime. (#128093)"
This reverts commit 36fdeb2aded08a776fcffefa73cb7667e7fc6c2d.
Commit: ab9cd53b86e84cc2db47d312232de4789c15adc4
https://github.com/llvm/llvm-project/commit/ab9cd53b86e84cc2db47d312232de4789c15adc4
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] False positives for & expression indexing constant size array (arr[anything & 0]) (#112284)
Do not warn when a constant sized array is indexed with an expression
that contains bitwise and operation
involving constants and it always results in a bound safe access.
(rdar://136684050)
---------
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 4ac43b541c067e6b888948900d01521e58a00eca
https://github.com/llvm/llvm-project/commit/4ac43b541c067e6b888948900d01521e58a00eca
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Restrict widest induction type to be IntegerType (NFC) (#128173)
As the name of the function suggests, convertPointerToIntegerType should
return an IntegerType instead of a Type, and should only ever be called
with integer or ptr type. Fix the callers getWiderType, and
addInductionPhi to narrow the type of WidestIndTy to IntegerType,
stripping unclear casts. While at it, rename convertPointerToIntegerType
and getWiderType for clarity.
Commit: be5c66d97d7977bd9fa31b1a0e78196ecbb6e52b
https://github.com/llvm/llvm-project/commit/be5c66d97d7977bd9fa31b1a0e78196ecbb6e52b
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/Serialization/ModuleManager.cpp
M clang/test/Modules/explicit-build.cpp
Log Message:
-----------
[clang] Improve module out of date error message (#128103)
When a pcm file has a different size or modification time than it had
when it was written to another module's IMPORT table Clang emits:
`<pcm> is out of date and needs to be rebuilt: module file out of date`
This is difficult to understand what's happening because there are a lot
of reasons that a module file can be out of date. This changes the
latter part of that message to:
`module file has a different size or mtime than expected`
Which makes it clearer what the issue is. For future work it would be
nice if a more detailed explanation of the issue could be emitted as a
note instead.
Commit: 607a1f2ace77fffb67a1f62df5ac6caa1c568f51
https://github.com/llvm/llvm-project/commit/607a1f2ace77fffb67a1f62df5ac6caa1c568f51
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
A clang/include/clang/CIR/Passes.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/global.cir
M clang/test/CMakeLists.txt
M clang/test/lit.cfg.py
M clang/tools/CMakeLists.txt
A clang/tools/cir-opt/CMakeLists.txt
A clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Add cir-opt tool to exercise CIR dialect parsing (#128254)
We need to be able to read in and parse files using the ClangIR dialect
in order to test this part of the functionality.
This change adds the minimum cir-opt tool needed to read and parse cir
files and write them back to text. This tool will later be extended to
add features for lowering from CIR to other MLIR dialects and to run CIR
passes as they are upstreamed.
Commit: 4c9e14b3ad64b04addc9a706663ac9ac129d7451
https://github.com/llvm/llvm-project/commit/4c9e14b3ad64b04addc9a706663ac9ac129d7451
Author: Sumanth Gundapaneni <sumanth.gundapaneni at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
Log Message:
-----------
[AMDGPU] Update PromoteAlloca to handle GEPs with variable offset. (#122342)
In case of variable offset of a GEP that can be optimized out, promote
alloca is updated to use the refereshed index to avoid an assertion.
Issue found by fuzzer.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 82264d23a1cc2ad9334f9a277cb92043a8bac446
https://github.com/llvm/llvm-project/commit/82264d23a1cc2ad9334f9a277cb92043a8bac446
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
A lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor stepping related request handlers (NFC) (#128453)
Continuation of the work started in #128262.
Commit: 0182b23fe144d9b8a539f2b9d8fa5741eb1223a2
https://github.com/llvm/llvm-project/commit/0182b23fe144d9b8a539f2b9d8fa5741eb1223a2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 82264d23a1cc
Commit: 9fac59a0db7c7adaa354a47df385cd35d761ec77
https://github.com/llvm/llvm-project/commit/9fac59a0db7c7adaa354a47df385cd35d761ec77
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/CodeGenHLSL/BasicFeatures/ArrayReturn.hlsl
Log Message:
-----------
[HLSL] Allow arrays to be returned by value in HLSL (#127896)
Enable Arrays to be returned in HLSL, and a test for this.
Closes #126568
Commit: e55f1a7ef8d3e698144b013c8715a18c88912d81
https://github.com/llvm/llvm-project/commit/e55f1a7ef8d3e698144b013c8715a18c88912d81
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP] Add test for getSpillCost fix
Commit: 8ce17c15577d223e14b62f9198d4b2ae9856b9fb
https://github.com/llvm/llvm-project/commit/8ce17c15577d223e14b62f9198d4b2ae9856b9fb
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/CXXInheritance.cpp
Log Message:
-----------
[clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (#128392)
This function has been superseded by
HeuristicResolver::lookupDependentName(), which implements the same
heuristics and more.
Porting note for any out-of-tree callers:
```
RD->lookupDependentName(Name, Filter);
```
can be replaced with:
```
HeuristicResolver(RD->getASTContext())->lookupDependentName(Name, Filter);
```
Commit: 988480323d5ef9bb658f13ac598d4ce2aa23c782
https://github.com/llvm/llvm-project/commit/988480323d5ef9bb658f13ac598d4ce2aa23c782
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
A lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/TestGetTargetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor custom & testing related request handlers (NFC) (#128549)
Continuation of the work started in
https://github.com/llvm/llvm-project/pull/128262. Builds on top of
#128453.
Commit: cec35077025da73bd2d8bf78d5bb62c43f3ccd0a
https://github.com/llvm/llvm-project/commit/cec35077025da73bd2d8bf78d5bb62c43f3ccd0a
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
A clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UnretainedLocalVarsChecker] Add a checker for local variables to NS and CF types. (#127554)
This PR adds alpha.webkit.UnretainedLocalVarsChecker by generalizing
RawPtrRefLocalVarsChecker. It checks local variables to NS or CF types
are guarded with a RetainPtr or not. The new checker is effective for NS
and CF types in Objective-C++ code without ARC, and it's effective for
CF types in code with ARC.
Commit: 55c76ea391225bce1e0b1c1eba57bbd846c671a1
https://github.com/llvm/llvm-project/commit/55c76ea391225bce1e0b1c1eba57bbd846c671a1
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
M bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
Log Message:
-----------
[BOLT] pacret-scanner: fix regression tests... (#128565)
by making the regex to match basic block names more general. See failing
test case that was reported on some system in comment
https://github.com/llvm/llvm-project/pull/122304#issuecomment-2679460678
These test cases were introduced in PR #122304, commit
850b49297615a613ac83adca2c9cf823a4b8ef95 .
Commit: b335d5a8303250cb49901ecae7570adf61abbd3c
https://github.com/llvm/llvm-project/commit/b335d5a8303250cb49901ecae7570adf61abbd3c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 988480323d5e
Commit: f63c5f36c3e390fa43ba91c6d7812d0439b5203a
https://github.com/llvm/llvm-project/commit/f63c5f36c3e390fa43ba91c6d7812d0439b5203a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/test/Integration/Dialect/MemRef/memref_abi.c
Log Message:
-----------
Revert "[mlir] Fix integration test when `%host_cc` path contains spaces" (#128573)
Reverts llvm/llvm-project#128439
Builtbot are broken, see:
https://lab.llvm.org/buildbot/#/builders/138/builds/10710
Commit: 53c08dfc18163ab50a94da344fd93fddac179495
https://github.com/llvm/llvm-project/commit/53c08dfc18163ab50a94da344fd93fddac179495
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/WindowsManifest/WindowsManifestMerger.cpp
Log Message:
-----------
[llvm-mt] Use XmlDeleter to free xmlFreeDoc (#128472)
Fixes memory leak on error in llvm-mt.
Previous https://reviews.llvm.org/D37321 missed this spot.
Commit: 23aca2f88dd5d2447e69496c89c3ed42a56f9c31
https://github.com/llvm/llvm-project/commit/23aca2f88dd5d2447e69496c89c3ed42a56f9c31
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/test/tools/llvm-symbolizer/skip-line-zero.s
M llvm/test/tools/llvm-symbolizer/sym-verbose.test
Log Message:
-----------
Revert "Symbolize line zero as if no source info is available (#124846)"
This commit creates an inconsistency on `__sanitizer_symbolize_pc` API. Before this change, this API always uses the filename from debug info when the line number is 0. After this change, the filename becomes invalid when line number is 0. The sanitizer might fall back to use base filename from symbol table. So, this API may return either `??:0` or `{filename from symbol table}:0` depending on if the symbol table has the filename for it. Make sure this inconsistency is resolved before relanding the commit.
Commit: e063365a9732551b2d7b6c2b0d81e79d224a61e8
https://github.com/llvm/llvm-project/commit/e063365a9732551b2d7b6c2b0d81e79d224a61e8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/WindowsManifest/WindowsManifestMerger.cpp
Log Message:
-----------
Revert "[llvm-mt] Use XmlDeleter to free xmlFreeDoc" (#128578)
Reverts llvm/llvm-project#128472
Breaks build bots.
Commit: 6c61c557569a1def56747c7b7db1926c538ec576
https://github.com/llvm/llvm-project/commit/6c61c557569a1def56747c7b7db1926c538ec576
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
Log Message:
-----------
[BOLT] pacret-scanner: fix regression test failure (#128576)
... which is caused by a seemingly recent change in BOLTs basic block
calculation, where function calls seem to be ending basic blocks? I
don't have a pointer to the commit that caused this change. I'll be
looking for that later. For now, I'm trying to get the regression tests
passing again.
Commit: 1e85e5abb327317777cfe0d5d97d6dc211dbc1e3
https://github.com/llvm/llvm-project/commit/1e85e5abb327317777cfe0d5d97d6dc211dbc1e3
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
[clang][WebAssembly] Always have `-pthread` imply `--shared-memory` linker flag (#127939)
Unlike `-lpthread` this flag should not be suppressed by `-nostdlib`.
Commit: 9bfe48695ed837bdc788b1ba0e877726ce83befb
https://github.com/llvm/llvm-project/commit/9bfe48695ed837bdc788b1ba0e877726ce83befb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
Log Message:
-----------
[libc] Initial support for parsing SPIR-V for GPU libc (#128570)
Summary:
Some day we'd like to support this, add some initial support for parsing
the triple so it will at least attempt to build.
Commit: bef4e5204adae9aa7d7f3268a4cf75cd0394c0d7
https://github.com/llvm/llvm-project/commit/bef4e5204adae9aa7d7f3268a4cf75cd0394c0d7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Fix type mismatch in atomiccas (#128548)
Commit: 47822c80c1b259973c29521315e3c355d1d553ad
https://github.com/llvm/llvm-project/commit/47822c80c1b259973c29521315e3c355d1d553ad
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify that the pointer after an object must be valid. (#127892)
In some places, we rely on the assumption that the pointer after the
object must also be valid and not overflow, but it does not seem to be
spelled out clearly in LangRef, unless I missed a reference.
The GetElementPtr section mentions that the maximum object size is half
the pointer index type space, but then the pointer past the object may
wrap. Clarify that the pointer after the object must also be valid.
This should match Alive2's semantics:
https://alive2.llvm.org/ce/z/Dk8QFL
(https://github.com/AliveToolkit/alive2/blob/master/tools/transform.cpp#L1288)
PR: https://github.com/llvm/llvm-project/pull/127892
Commit: 1b15a89a23c631a8e2d096dad4afe456970572c0
https://github.com/llvm/llvm-project/commit/1b15a89a23c631a8e2d096dad4afe456970572c0
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_many.c
Log Message:
-----------
Revert "[Offload] Fix assumptions on symbols after #124846 (#126238)"
The dependency commit was reverted at https://github.com/llvm/llvm-project/commit/23aca2f88dd5d2447e69496c89c3ed42a56f9c31. Reverting this as well.
Commit: d3623194044452e2f1b4e81c213bc8cbbe49c2a8
https://github.com/llvm/llvm-project/commit/d3623194044452e2f1b4e81c213bc8cbbe49c2a8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
A lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetDataBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetExceptionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetFunctionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetInstructionBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor breakpoint related request handlers (NFC) (#128550)
Continuation of the work started in #128262. Builds on top of #128549.
Commit: a018788687c8715b0abbd24cb3258d2dd1d1740d
https://github.com/llvm/llvm-project/commit/a018788687c8715b0abbd24cb3258d2dd1d1740d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port d36231940444
Commit: df14dbd8750fba7851a3fd8878db3692c20a28d1
https://github.com/llvm/llvm-project/commit/df14dbd8750fba7851a3fd8878db3692c20a28d1
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DirectXInstrInfo.h
M llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp
M llvm/lib/Target/DirectX/DirectXRegisterInfo.h
M llvm/lib/Target/DirectX/DirectXSubtarget.h
Log Message:
-----------
[DirectX] Fix build breaks (#128556)
1. Fix build break caused by #126772 by adding `writeDISubrangeType`
stub to `DXILBitcodeWriter.cpp`
2. Fix build break caused by #128480 by adding implementation of pure
virtual method `TargetSubtargetInfo::getRegisterInfo`
Commit: baa77e30f0f2599763f3d6142cc67a96d6e6709b
https://github.com/llvm/llvm-project/commit/baa77e30f0f2599763f3d6142cc67a96d6e6709b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Remove some redundant casts (NFC).
Commit: eabe2eb933556bf3e0db0d2d98e96f962bde14dc
https://github.com/llvm/llvm-project/commit/eabe2eb933556bf3e0db0d2d98e96f962bde14dc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libc/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libc] Remove special full build handling for GPU (#128572)
Summary:
Currently we default to non-fullbuild for all targets, but realistically
we should do this depending on the target OS. Some OS's like the GPU or
upcoming UEFI have no existing hosted system, so they cannot be built
with an overlay build. These are already errors so there's no reason to
complicate things and require passing it in through the runtimes build.
Commit: e5ce0304335dc1cae6856c880d1d4e14dcf8265d
https://github.com/llvm/llvm-project/commit/e5ce0304335dc1cae6856c880d1d4e14dcf8265d
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
R mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
A mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[mlir][xegpu] Improve XeGPU op verification logic for SIMT flavor and update tests. (#127920)
This PR adds required changes for XeGPU ops to support the SIMT
distribution.
1. Adds verification logic for SIMT flavor for load_nd, store_nd, dpas,
load_gather and store_scatter ops.
2. Adds test cases to cover the SIMT version of these ops along with
their VC counter parts.
---------
Co-authored-by: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Commit: 38d7cf1a81431933b732350b0141790ca94aa20a
https://github.com/llvm/llvm-project/commit/38d7cf1a81431933b732350b0141790ca94aa20a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
A lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Refactor remaining request handlers (NFC)Remaining request handlers (#128551)
Continuation of the work started in #128262. Builds on top of #128550.
Commit: b248817ad60953f500b070726a6c1973882bcb56
https://github.com/llvm/llvm-project/commit/b248817ad60953f500b070726a6c1973882bcb56
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 38d7cf1a8143
Commit: 31915248c06da7d132f642e4a2a3bb37df6fdab5
https://github.com/llvm/llvm-project/commit/31915248c06da7d132f642e4a2a3bb37df6fdab5
Author: Christopher Bate <cbate at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[mlir] NFC: fix typos and improve commentary regarding generation of MLIRConfig.cmake (#127712)
Commit: d6ec32c8f25975ae31ec9ca7e67d942adadc3898
https://github.com/llvm/llvm-project/commit/d6ec32c8f25975ae31ec9ca7e67d942adadc3898
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/fprofile-continuous.c
Log Message:
-----------
[profile] runtime counter relocation is needed on windows-msvc targets (#127858)
Continuous profile syncing is supported on windows, and it also relies on runtime counter relocation (based on this
test [1])
Thanks to @anhtuyenibm for pointing it out to me.
[1] https://github.com/llvm/llvm-project/blob/main/compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 0caa8f42be0b2d00527ad2d94144dcbb2a427605
https://github.com/llvm/llvm-project/commit/0caa8f42be0b2d00527ad2d94144dcbb2a427605
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/include/flang/Optimizer/Transforms/RuntimeFunctions.inc
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
A flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Lower/array-temp.f90
A flang/test/Transforms/set-runtime-call-attributes.fir
A flang/test/Transforms/verify-known-runtime-functions.fir
A flang/test/Utils/generate-checks-for-runtime-funcs.py
Log Message:
-----------
Reland "[flang] Set LLVM specific attributes to fir.call's of Fortran runtime. (#128093)"
This change is inspired by a case in facerec benchmark, where
performance
of scalar code may improve by about 6%@aarch64 due to getting rid of
redundant
loads from Fortran descriptors. These descriptors are corresponding
to subroutine local ALLOCATABLE, SAVE variables. The scalar loop nest
in LocalMove subroutine contains call to Fortran runtime IO functions,
and LLVM globals-aa analysis cannot prove that these calls do not modify
the globalized descriptors with internal linkage.
This patch sets and propagates llvm.memory_effects attribute for
fir.call
operations calling Fortran runtime functions. In particular, it tries
to set the Other memory effect to NoModRef. The Other memory effect
includes accesses to globals and captured pointers, so we cannot set
it for functions taking Fortran descriptors with one exception
for calls where the Fortran descriptor arguments are all null.
As long as different calls to the same Fortran runtime function may have
different attributes, I decided to attach the attributes to the calls
rather than functions. Moreover, attaching the attributes to func.func
will require propagating these attributes to llvm.func, which is not
happening right now.
In addition to llvm.memory_effects, the new pass sets llvm.nosync
and llvm.nocallback attributes that may also help LLVM alias analysis
(e.g. see #127707). These attributes are ignored currently.
I will support them in LLVM IR dialect in a separate patch.
I also added another pass for developers to be able to print
declarations/calls of all Fortran runtime functions that are recognized
by the attributes setting pass. It should help with maintenance
of the LIT tests.
Commit: 594919c263122e1d0468dfecee6eb5962e892b44
https://github.com/llvm/llvm-project/commit/594919c263122e1d0468dfecee6eb5962e892b44
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/test/Target/SPIRV/selection.mlir
A mlir/test/Target/SPIRV/selection.spv
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir][spirv] Split conditional basic blocks during deserialization (#127639)
With the current design some of the values are sank into a selection
region, despite them being also used outside that region. This is
because the current deserializer logic sinks the entire basic block
containing a conditional branch forming a header of a selection
construct, without accounting for some values being used outside. This
manifests as (for example):
```
<unknown>:0: error: 'spirv.Variable' op failed control flow structurization: it has uses outside of the enclosing selection/loop construct
<unknown>:0: note: see current operation: %0 = "spirv.Variable"()<{storage_class = #spirv.storage_class<Function>}> : () -> !spirv.ptr<vector<4xf32>, Function>
```
The proposed solution to this problem is to split the conditional basic
block into two, one block containing just the conditional branch, and
other the rest of instructions. By doing this, the logic that structures
selection regions, only sinks the comparison, keeping the rest of
instructions outside the selection region.
A SPIR-V test is required, as the problem can happen only during
deserialization and cannot be tested with `--test-spirv-roundtrip`. An
MLIR test exhibiting the problematic behaviour would be an incorrect
MLIR in the first place.
This solution is proposed as an alternative to an unfinished PR #123371,
that is unlikely to be merged in the foreseeable future, as the author
"stepped away from this for a time being". There is also a Discourse
thread:
https://discourse.llvm.org/t/spir-v-uses-outside-the-selection-region/84494
that tried to solicit some feedback on the topic.
Commit: 36b339b84a98afe7bdf470747a776d0d5f348b64
https://github.com/llvm/llvm-project/commit/36b339b84a98afe7bdf470747a776d0d5f348b64
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Relax assertion for atomicexch (#128582)
atomicexch interfaces accepts also floating point numbers. Relax the
assertion so float are also accepted.
Commit: 6b444271a011c4e3c92a62aaed9347ad508843a2
https://github.com/llvm/llvm-project/commit/6b444271a011c4e3c92a62aaed9347ad508843a2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/WindowsManifest/WindowsManifestMerger.cpp
Log Message:
-----------
Reland "[llvm-mt] Use XmlDeleter to free xmlFreeDoc"" (#128579)
Reverts llvm/llvm-project#128578 to reland llvm/llvm-project#128472.
Commit: 00a0b0be4b180a9458f477a8bf76d2377056d9d1
https://github.com/llvm/llvm-project/commit/00a0b0be4b180a9458f477a8bf76d2377056d9d1
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/test/Integration/Dialect/MemRef/memref_abi.c
M mlir/test/lit.cfg.py
Log Message:
-----------
Reland [mlir] Fix integration test when %host_cc path contains spaces (#128542)
Reland https://github.com/llvm/llvm-project/pull/128439
Some builders have spaces at the end of the `host_cc` path.
Commit: e8f1623a223adf5446e9999403aa6ce827a9b6dc
https://github.com/llvm/llvm-project/commit/e8f1623a223adf5446e9999403aa6ce827a9b6dc
Author: John Harrison <harjohn at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
Log Message:
-----------
[lldb-dap] Addressing the order of events during disconnect to flush output. (#128583)
The TestDAP_ouput test is flaky due to the order of events during
shutdown. We were stopping the output and error handle redirection after
we finished the disconnect request, which can cause us to miss output
events due to timing. Moving when we stop the redirection to ensure we
have consistent output prior to disconnect responding.
Fixes #128567
Commit: 911e94c6516926b462bc6d1d4a77dcc701b7e3db
https://github.com/llvm/llvm-project/commit/911e94c6516926b462bc6d1d4a77dcc701b7e3db
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ExceptionInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetDataBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetExceptionBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetFunctionBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetInstructionBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/TestGetTargetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Finish refactoring the request handlers (NFC) (#128553)
Completes the work started in #128262. This PR removes the
old way of register request handlers with callbacks and makes
the operator const.
Commit: 6d0cfbc9c0e25f9e652f5f8b3bca2d7a0768619e
https://github.com/llvm/llvm-project/commit/6d0cfbc9c0e25f9e652f5f8b3bca2d7a0768619e
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
A llvm/test/Transforms/Inline/PowerPC/inline-target-attr.ll
Log Message:
-----------
[PPC] Implement `areInlineCompatible` (#126562)
After the default implementation swap from
https://github.com/llvm/llvm-project/pull/117493, where
`areInlineCompatible` checks if the callee features are a subset of
caller features. This is not a safe assumption in general on PPC. We
fallback to check for strict feature set equality for now, and see what
improvements we can make.
Commit: 162eb32e747819683d747de29d7fad99f1279063
https://github.com/llvm/llvm-project/commit/162eb32e747819683d747de29d7fad99f1279063
Author: John Harrison <harjohn at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
A lldb/test/API/tools/lldb-dap/source/Makefile
A lldb/test/API/tools/lldb-dap/source/TestDAP_source.py
A lldb/test/API/tools/lldb-dap/source/main.c
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Add 'source' references to stack frames without source files. (#128268)
This adds 'source' references to all stack frames. When opening a stack
frame users will see the disassembly of the frame if the source is not
available.
This works around the odd behavior of navigating frames without the
VSCode disassembly view open, which causes 'step' to step in the first
frame with a source instead of the active frame.
This fixes #128260
Old behavior:
https://github.com/user-attachments/assets/3f40582d-ac96-451a-a5ae-498a323bf30e
New behavior:
https://github.com/user-attachments/assets/3a3f9ac6-3e6c-4795-9bb2-1132b3916b6f
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: f6a30021249c3b6aac20f108559915e74943540f
https://github.com/llvm/llvm-project/commit/f6a30021249c3b6aac20f108559915e74943540f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Remove unused headers (NFC)
Commit: 1824bb47c2b5874d92cc5456c57d434ea39739e7
https://github.com/llvm/llvm-project/commit/1824bb47c2b5874d92cc5456c57d434ea39739e7
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M offload/test/sanitizer/kernel_trap.c
Log Message:
-----------
[Offload][OpenMP] Fix check-prefix (#128599)
Commit: fc09550bf4982253a93088bf1668f7a917584464
https://github.com/llvm/llvm-project/commit/fc09550bf4982253a93088bf1668f7a917584464
Author: Ali Raeisdanaei <57504158+aliraeisdanaei at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/mlgo-utils/mlgo/corpus/combine_training_corpus.py
M llvm/utils/mlgo-utils/mlgo/corpus/extract_ir.py
A llvm/utils/mlgo-utils/mlgo/corpus/flags.py
Log Message:
-----------
[MLGO] Refactored verbosity flag in mlgo-utils to common location (#128541)
add common lib file to setup arguments for parser #107898
This is my first pull request to LLVM, so I would appreciate your
feedback :)
Fixes #107898.
---------
Co-authored-by: Aiden Grossman <agrossman154 at yahoo.com>
Commit: ccbb8882ac75e73e23f31ad60588a2914ebeef04
https://github.com/llvm/llvm-project/commit/ccbb8882ac75e73e23f31ad60588a2914ebeef04
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/source/API/SBFrame.cpp
M lldb/test/API/python_api/run_locker/TestRunLocker.py
Log Message:
-----------
[lldb] do not show misleading error when there is no frame (#119103)
I am using VSCode with the official vscode-lldb extension. When I try to
list the breakpoints in the debug console get the message:
```
br list
can't evaluate expressions when the process is running.
```
I know that this is wrong and you need to use
```
`br list
(lldb) br list
No breakpoints currently set.
```
but the error message is misleading. I cleaned up the code and now the
error message is
```
br list
sbframe object is not valid.
```
which is still not perfect, but at least it's not misleading.
Commit: 49c31201278ae5949694ed78b69ffbbca6a1826a
https://github.com/llvm/llvm-project/commit/49c31201278ae5949694ed78b69ffbbca6a1826a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
Log Message:
-----------
[MachineSched] Add a first valid reason [nfc]
For debugging, distinguish the first valid candidate encountered and
a preference decision driven by node number.
Commit: 305d2738944f77f8defefe79217120bb8aafab75
https://github.com/llvm/llvm-project/commit/305d2738944f77f8defefe79217120bb8aafab75
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Reland "[HLSL] Implement the reflect HLSL function" (#125599)
This PR relands #122992.
A reland was attempted before (#123853), but it [failed to pass the
`sanitizer-aarch64-linux-bootstrap-hwasan`
buildbot](https://github.com/llvm/llvm-project/pull/123853#issuecomment-2608389396)
due to the test `llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll`
The issue has since been patched thanks to @vitalybuka, so the PR is
safe to reland without any changes.
See
https://github.com/llvm/llvm-project/pull/125599#discussion_r1966650839
and
https://github.com/llvm/llvm-project/pull/125599#discussion_r1966650839
Commit: 724b91b46783e68ff42fa0c9450449629cc47c65
https://github.com/llvm/llvm-project/commit/724b91b46783e68ff42fa0c9450449629cc47c65
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/include/flang/Runtime/freestanding-tools.h
Log Message:
-----------
[flang-rt] Fixed freestanding memmove. (#128604)
Commit: 62ec7b8de97a197c2522177a52bdc78205579930
https://github.com/llvm/llvm-project/commit/62ec7b8de97a197c2522177a52bdc78205579930
Author: Vy Nguyen <vyng at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lldb/include/lldb/Core/Telemetry.h
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[LLDB][NFC]Renaming functions to be consistent with LLDB naming style (#128574)
Commit: a60e8a2c2579252d66a0656c387af29475e9b908
https://github.com/llvm/llvm-project/commit/a60e8a2c2579252d66a0656c387af29475e9b908
Author: Nikhil Kalra <nkalra at apple.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/NanobindUtils.h
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir] Python: write bytecode to a file path (#127118)
The current `write_bytecode` implementation necessarily requires the
serialized module to be duplicated in memory when the python `bytes`
object is created and sent over the binding. For modules with large
resources, we may want to avoid this in-memory copy by serializing
directly to a file instead of sending bytes across the boundary.
Commit: 28002dd50fb7ec97da1770a11f9c6a99dd9aecb9
https://github.com/llvm/llvm-project/commit/28002dd50fb7ec97da1770a11f9c6a99dd9aecb9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Replace some undef pointer uses in test
Commit: 688064498a015e833bd24f5cd429462ca9126a54
https://github.com/llvm/llvm-project/commit/688064498a015e833bd24f5cd429462ca9126a54
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
Log Message:
-----------
[ORC] Remove unused header. NFC.
Commit: 253e11695ba8d77e4339d0c43758f192b149db1e
https://github.com/llvm/llvm-project/commit/253e11695ba8d77e4339d0c43758f192b149db1e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
A llvm/include/llvm/ExecutionEngine/Orc/GetTapiInterface.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
A llvm/lib/ExecutionEngine/Orc/GetTapiInterface.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_main_ret_foo.s
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_weak_link.test
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC][llvm-jitlink] Add support for emulating ld64 -weak-lx / -weak_library.
Linking libraries in ld64 with -weak-lx / -weak_library causes all references
to symbols in those libraries to be made weak, allowing the librarie to be
missing at runtime.
This patch extends EPCDynamicLibrarySearchGenerator with support for emulating
this behavior: If an instance is constructed with an Allow predicate but no
dylib handle then all symbols matching the predicate are immediately resolved
to null.
The llvm-jitlink tool is updated with -weak-lx / -weak_library options for
testing. Unlike their ld64 counterparts these options take a TBD file as input,
and always resolve all exports in the TBD file to null.
Commit: c7101188fb3f17176e9152b1d733da6d7199d317
https://github.com/llvm/llvm-project/commit/c7101188fb3f17176e9152b1d733da6d7199d317
Author: apple-fcloutier <75502309+apple-fcloutier at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/FormatString.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/AttrImpl.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaObjC.cpp
A clang/test/Sema/format-string-matches.c
M clang/test/Sema/format-strings.c
Log Message:
-----------
[clang] Implement __attribute__((format_matches)) (#116708)
This implements ``__attribute__((format_matches))``, as described in the
RFC:
https://discourse.llvm.org/t/rfc-format-attribute-attribute-format-like/83076
The ``format`` attribute only allows the compiler to check that a format
string matches its arguments. If the format string is passed
independently of its arguments, there is no way to have the compiler
check it. ``format_matches(flavor, fmtidx, example)`` allows the
compiler to check format strings against the ``example`` format string
instead of against format arguments. See the changes to AttrDocs.td in
this diff for more information.
Implementation-wise, this change subclasses CheckPrintfHandler and
CheckScanfHandler to allow them to collect specifiers into arrays, and
implements comparing that two specifiers are equivalent.
`checkFormatStringExpr` gets a new `ReferenceFormatString` argument that
is piped down when calling a function with the `format_matches`
attribute (and is `nullptr` otherwise); this is the string that the
actual format string is compared against.
Although this change does not enable -Wformat-nonliteral by default,
IMO, all the pieces are now in place such that it could be.
Commit: 8009c1fd81ad0b6ac65724d2b134a92db48f8fbf
https://github.com/llvm/llvm-project/commit/8009c1fd81ad0b6ac65724d2b134a92db48f8fbf
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
Log Message:
-----------
[LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966)
Skip calculating instruction costs for exit conditions in
precomputeCosts() when it should be skipped.
Reported from:
https://github.com/llvm/llvm-project/issues/115744#issuecomment-2670479463
Godbolt for reduced test cases: https://godbolt.org/z/fr4YMeqcv
Commit: aa902a0380c167ceb68c998c25780945da99edfa
https://github.com/llvm/llvm-project/commit/aa902a0380c167ceb68c998c25780945da99edfa
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
Log Message:
-----------
[ORC] Add dependence on TextAPI to reflect changes in 253e11695ba.
Commit: 2c7780a96d24e1e23657057fb735e13e2ba5d2ce
https://github.com/llvm/llvm-project/commit/2c7780a96d24e1e23657057fb735e13e2ba5d2ce
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 253e11695ba8
Commit: 862595cab67b7fa71ea035e1090725bdf39d291b
https://github.com/llvm/llvm-project/commit/862595cab67b7fa71ea035e1090725bdf39d291b
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
Log Message:
-----------
[MachineBasicBlock][NFC] Decouple SplitCriticalEdges from pass manager (#128151)
New clients should use this overload that accepts analyses directly.
Commit: 06f30792353a5d7bacc9110294db7cca49b4eafa
https://github.com/llvm/llvm-project/commit/06f30792353a5d7bacc9110294db7cca49b4eafa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
Log Message:
-----------
AMDGPU: More consistently use the fold list instead of direct mutation (#127612)
There were 2 parallel fold check mechanisms, so consistently use the
fold list. The worklist management here is still not good. Other types
of folds are not using it, and we should probably rewrite the pass to
look more like peephole-opt.
This should be an alternative fix to skipping commute if the operands
are the same (#127562). The new test is still not broken as-is, but
demonstrates failures in a future patch.
Commit: 366daddfad9aa38ebb7d40055cf65f4ecb7dd6f9
https://github.com/llvm/llvm-project/commit/366daddfad9aa38ebb7d40055cf65f4ecb7dd6f9
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
Log Message:
-----------
[Serialization] Update DECL_LAST
Address post commit review at
https://github.com/llvm/llvm-project/pull/119333#pullrequestreview-2637471908
Commit: b3c51db292f05cf89201911cbcca6cba83caadd6
https://github.com/llvm/llvm-project/commit/b3c51db292f05cf89201911cbcca6cba83caadd6
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
A llvm/test/CodeGen/AArch64/expand-load-got-pseudo.mir
Log Message:
-----------
[InstrRef] Preserve debug instr num in aarch64-expand-pseudo LOADgot expansion (#128081)
The aarch64-expand-pseudo pass expands the LOADgot instruction to an
ADRP instruction and a LDRXui instruction. If the LOADgot had a
debug-instr-number, the pass doesn't preserve this to the new expansion.
This patch fixes the issue by making sure the debug-instr-number is
correctly applied to the LDRXui instruction generated.
Commit: eab6f2d7a90cd9be7d622c7724d1131f9a9128b4
https://github.com/llvm/llvm-project/commit/eab6f2d7a90cd9be7d622c7724d1131f9a9128b4
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Examples/mlir-opt/loop_fusion_options.mlir
Log Message:
-----------
[MLIR][Affine] Fix fusion in the presence of cyclic deps in source nests (#128397)
Fixes: https://github.com/llvm/llvm-project/issues/61820
Fix affine fusion in the presence of cyclic deps in the source nest. In
such cases, the nest being fused can't be executed multiple times. Add a
utility to check for dependence cycles and use it in fusion. This fixes
both sibling as well as producer consumer fusion where nests with cyclic
dependences (typically reductions) were being in some cases incorrectly
fused in.
The test case also exercises/required a fix to the check for the
redundant computation being within the specified threshold.
Commit: 5deb2aa9eb454db266fb1ad38502dc6fac92ae48
https://github.com/llvm/llvm-project/commit/5deb2aa9eb454db266fb1ad38502dc6fac92ae48
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Make is.shared and is.private propagate poison (#128617)
Commit: d85685eb863641dce62a9f858ebcd6bab56c605b
https://github.com/llvm/llvm-project/commit/d85685eb863641dce62a9f858ebcd6bab56c605b
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128471)
This allows for testing AArch64 passes with the new pass manager.
Commit: b9cf684d7c39a9c36c562b67e6e53882f645fe74
https://github.com/llvm/llvm-project/commit/b9cf684d7c39a9c36c562b67e6e53882f645fe74
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
Log Message:
-----------
[mlir][scf] Fix typo of square brackets(NFC) (#128455)
Commit: 83ddb43cad3ee32b0df81aa641c4c0275334729d
https://github.com/llvm/llvm-project/commit/83ddb43cad3ee32b0df81aa641c4c0275334729d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Revert "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128471)"
This reverts commit d85685eb863641dce62a9f858ebcd6bab56c605b.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/128471
Commit: ecc7e6ce4cd57a614985e95daf7027918cb8723e
https://github.com/llvm/llvm-project/commit/ecc7e6ce4cd57a614985e95daf7027918cb8723e
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Handle instantiating captures in addInstantiatedCapturesToScope() (#128478)
addInstantiatedCapturesToScope() might be called when transforming a
lambda body. In this situation, it would look into all the lambda's
parents and figure out all the instantiated captures. However, the
instantiated captures are not visible from lambda's class decl until the
lambda is rebuilt (i.e. after the lambda body transform). So this patch
corrects that by also examining the LambdaScopeInfo, serving as a
workaround for not having deferred lambda body instantiation in Clang
20, to avoid regressing some real-world use cases.
Fixes #128175
Commit: 6e3b47597fabb8df8cf822331461cecbac907c6f
https://github.com/llvm/llvm-project/commit/6e3b47597fabb8df8cf822331461cecbac907c6f
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
Log Message:
-----------
Reland "[mlir] Silence -Wdangling-assignment-gsl in OperationSupport.h"
This warning is causing lots of build spam when I use a recent Clang as
my host compiler. It's a potential false positive, so silence it until
https://github.com/llvm/llvm-project/issues/126600 is resolved.
Reland of https://github.com/llvm/llvm-project/pull/126140 with fix for
non-Clang compilers (the preprocessor doesn't short-circuit conditionals
the way I thought it did).
Commit: f58fde585775a7c25dc673076db914f8d1866081
https://github.com/llvm/llvm-project/commit/f58fde585775a7c25dc673076db914f8d1866081
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
Log Message:
-----------
Exclude RedirectingFileSystem with null OverlayFileDir in VFSUsage (#128267)
This is to avoid assertion failures like the following when
RedirectingFileSystem's are created and used outside
createVFSFromOverlayFiles.
```
Assertion failed: VFSUsage.size() == getHeaderSearchOpts().VFSOverlayFiles.size() && "A different number of RedirectingFileSystem's were present than " "-ivfsoverlay options passed to Clang!", file S:\SourceCache\llvm-project\clang\lib\Lex\HeaderSearch.cpp, line 162
```
Commit: e67cd152cf4d0344efba19985b005dae15e6bde0
https://github.com/llvm/llvm-project/commit/e67cd152cf4d0344efba19985b005dae15e6bde0
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/tools/llvm-size/llvm-size.cpp
Log Message:
-----------
[llvm-size] Initialize Radix to correct value (#128447)
Without the patch, invalid --radix, makes Radix to be 0, and result
in invalid format specifier ` %#7 `, instead of e.g ` %#7x `.
Commit: 9b298a1d3d2280c2b09f4a905d079bab008b5290
https://github.com/llvm/llvm-project/commit/9b298a1d3d2280c2b09f4a905d079bab008b5290
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
Log Message:
-----------
[WebAssembly] Use Register instead of unsigned. NFC
Commit: d7903c9f28bdfd17fcc2d5be1096c504b6a94ec1
https://github.com/llvm/llvm-project/commit/d7903c9f28bdfd17fcc2d5be1096c504b6a94ec1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
Log Message:
-----------
AMDGPU: Add more codegen tests for readfirstlane
Commit: f5d80c335d79d0b35741bfc762f8157a24f5491a
https://github.com/llvm/llvm-project/commit/f5d80c335d79d0b35741bfc762f8157a24f5491a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
Log Message:
-----------
[lldb] Avoid Function::GetAddressRange in SymbolFileCTF (#128517)
SymbolFileCTF never creates discontinuous functions, so this is
technically NFC, but it takes us one step closer to removing the
deprecated API.
Commit: d3dae841c05c9447b665a8334aa3cfeac904d749
https://github.com/llvm/llvm-project/commit/d3dae841c05c9447b665a8334aa3cfeac904d749
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
Log Message:
-----------
[NVPTX] Switch to imm offset variants for LDG and LDU (#128270)
Commit: 3872503d6eb3eed7f2b2db13daad27307369f0be
https://github.com/llvm/llvm-project/commit/3872503d6eb3eed7f2b2db13daad27307369f0be
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
Log Message:
-----------
[lldb] Don't hand out UnwindPlan::Row shared_ptrs (#128181)
The whole unwind plan is already stored in a shared pointer, and there's
no need to persist Rows individually. If there's ever a need to do that,
there are at least two options:
- copy the row (they're not that big, and they're being copied left and
right during construction already)
- use the shared_ptr subobject constructor to create a shared_ptr which
points to a Row but holds the entire unwind plan alive
This also changes all of the getter functions to return const Row
pointers, which is important for safety because all of these objects are
cached and potentially accessed from multiple threads. (Technically one
could hand out `shared_ptr<const Row>`s, but we don't have a habit of
doing that.)
As a next step, I'd like to remove the internal UnwindPlan usages of the
shared pointer, but I'm doing this separately to gauge feedback, and
also because the patch got rather big.
Commit: 6c17380ea896e9966645958ad3d76441cc25430c
https://github.com/llvm/llvm-project/commit/6c17380ea896e9966645958ad3d76441cc25430c
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Target/StackFrame.cpp
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
Log Message:
-----------
[lldb] Fix TestDiagnoseDereferenceFunctionReturn on linux (#128512)
The test was failing because it was looking up the immediate value from
the call instruction as a load address, whereas in fact it was a file
address. This worked on darwin because (with ASLR disabled) the two
addresses are generally the same. On linux, this depends on the build
mode, but with the default (PIE) build type, the two are never the same.
The test also fails on a mac with ASLR enabled.
This path fixes the code to look up the value as a file address.
Commit: 3083aea4441493b11b72218207564bf54516bf3e
https://github.com/llvm/llvm-project/commit/3083aea4441493b11b72218207564bf54516bf3e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#128633)
Commit: 5088e1b435fd06de2bfccd3894dcc2f2c326630f
https://github.com/llvm/llvm-project/commit/5088e1b435fd06de2bfccd3894dcc2f2c326630f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Target/ThreadPlanStepRange.cpp
Log Message:
-----------
[lldb] Avoid Function::GetAddressRange in ThreadPlanStepRange::InSymbol (#128515)
The existing implementation would probably produce false positives for
discontinuous functions. I haven't tried reproducing it because setting
up discontinuous functions (and executing them, in particular) is pretty
complex and there's nothing particularly interesting happening here.
Commit: d254fa877f419e61e54709f0a6f2e891da893a60
https://github.com/llvm/llvm-project/commit/d254fa877f419e61e54709f0a6f2e891da893a60
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Make `FLANG_RT_INSTALL_RESOURCE_PATH` configurable (#128561)
Make it possible to change the path used to install flang-rt library.
This is particularly necessary for standalone builds, where the CMake
script currently hardwires the default clang install path, and therefore
is incorrect for distributions that override it. However, for
consistency I have made it configurable unconditionally, preserving the
current defaults.
Commit: 5114b9b386ca69058d19d9c3dac53b4b429c71a6
https://github.com/llvm/llvm-project/commit/5114b9b386ca69058d19d9c3dac53b4b429c71a6
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
R llvm/include/llvm/ExecutionEngine/Orc/GetTapiInterface.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
R llvm/lib/ExecutionEngine/Orc/GetTapiInterface.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC][llvm-jitlink] Extend weak-linking emulation to real dylibs.
Commit 253e11695ba added support for emulating weak-linking against dylibs
that are (under the emulation) absent at runtime. This commit extends emulated
weak linking support to allow a real dylib to supply the interface (i.e.
-weak-lx / -weak_library can be pointed at a dylib, in which case they should
be read as "weak-link against this dylib, behavining as if it weren't actually
present at runtime").
Commit: ea4e19df53abb21a1f1df725e3728fabec902978
https://github.com/llvm/llvm-project/commit/ea4e19df53abb21a1f1df725e3728fabec902978
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/PowerPC/llvm.sincos.ll
Log Message:
-----------
[SDAG] Add missing ppc_fp128 ExpandFloatRes for sincos[pi] (#128514)
Commit: 0087523e1a273b738b94a15547dbf308d0470283
https://github.com/llvm/llvm-project/commit/0087523e1a273b738b94a15547dbf308d0470283
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR][Affine] Add missing check on fusion compute tolerance on a path (#128454)
When profitability analysis can't be performed, we should still be
respecting the compute tolerance specified. Refactor to pull the
additional computation factor computation and check.
Fixes: https://github.com/llvm/llvm-project/issues/54541
Commit: 49f60b4e098493f5128ba4276b3fbb985b0c61c8
https://github.com/llvm/llvm-project/commit/49f60b4e098493f5128ba4276b3fbb985b0c61c8
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
Log Message:
-----------
[AMDGPU][NFC] Added test for live-in CSR SGPR used partially giving MachineVerifier error (#126696)
Commit: 674dbcfe8f400db65f0d066ea638e977e8b82781
https://github.com/llvm/llvm-project/commit/674dbcfe8f400db65f0d066ea638e977e8b82781
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.comp/equal.pass.cpp
Log Message:
-----------
[libc++][NFC] Use TEST_STD_VER instead of _LIBCPP_STD_VER in re.tokiter.comp/equal.pass.cpp
Commit: d7211693af27760c939b6610f0c79a3ecd2790d2
https://github.com/llvm/llvm-project/commit/d7211693af27760c939b6610f0c79a3ecd2790d2
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port e5ce0304335dc1cae6856c880d1d4e14dcf8265d
Commit: 60cc3af0d93ecb8bfc9d6bebc6cbc395df3bb4b6
https://github.com/llvm/llvm-project/commit/60cc3af0d93ecb8bfc9d6bebc6cbc395df3bb4b6
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][xegpu] Fix bazel build failure (#128595)
Removes unnecessary headers creating wrong dependencies.
Commit: 275eeb56ddc4c236219f7df9618e7b03ff12e9fb
https://github.com/llvm/llvm-project/commit/275eeb56ddc4c236219f7df9618e7b03ff12e9fb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 5114b9b386ca
Commit: 87dc245f3e65ee926081e575ffb2e57a32a91ba3
https://github.com/llvm/llvm-project/commit/87dc245f3e65ee926081e575ffb2e57a32a91ba3
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
Log Message:
-----------
[analyzer] Partial revert of #127017 (#128642)
This assertion was hit, as reported by a user.
https://github.com/llvm/llvm-project/issues/128427#issuecomment-2677724438
Ideally, we would reduce and add a regression test for this, but I don't
have the bandwidth for it.
See the summary of the issue #128427 for the reproducer.
Commit: a4656bbc595839b57e6f021aa2a728b4cf321d54
https://github.com/llvm/llvm-project/commit/a4656bbc595839b57e6f021aa2a728b4cf321d54
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Allow conv ops zero point to be variable (#128533)
The TOSA specification allows the zero point of conv ops to be variable
when the dynamic extension is being used, but information about which
extensions are in use is only known when the validation pass is run. A
variable zero point should be allowed in the conv ops verifiers.
In terms of testing, there didn't seem to be an existing set of tests
for the verifiers to add this check to, so the opportunity has been
taken to run the verifiers on the tests in `ops.mlir`. Since the conv2d
test there had variable zero points, this change in functionality is
being tested.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Georgios Pinitas <georgios.pinitas at arm.com>
Commit: b36a18df96f9b8f206ec4b7f1036bdd4701c117e
https://github.com/llvm/llvm-project/commit/b36a18df96f9b8f206ec4b7f1036bdd4701c117e
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/CodeGen/AArch64/build-attributes-all.ll
A llvm/test/CodeGen/AArch64/build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-aeabi-known.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-bti.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-attrs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-headers.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-gcs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-mixed.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-none.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-numerical-tags.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-out-of-order.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-pac.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi-err.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi.s
Log Message:
-----------
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
- Removed assertion for duplicate values as adding them is valid.
- Fix parsing: reject strings for unknown tags, allow any value for
Tag_PAuth_Platform and Tag_PAuth_Schema.
- Print tags by using numbers with comments to reduce compiler-assembler
dependencies.
- Parsing error messages now only point to the symbol (^) instead of
printing it.
Commit: 547a8bc2365d9f1dc7bce52580a3ab64d69c80ed
https://github.com/llvm/llvm-project/commit/547a8bc2365d9f1dc7bce52580a3ab64d69c80ed
Author: Alcaro <floating at muncher.se>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Headers/cpuid.h
M clang/test/Headers/cpuid.c
Log Message:
-----------
[clang][x86] Support -masm=intel in cpuid.h (#127331)
Fixes #127271
Testing mostly done in Compiler Explorer https://godbolt.org/z/q1h3ohxr7
Commit: 85cf95876c4b21ee6ecd0253a2c9de0e90c4a521
https://github.com/llvm/llvm-project/commit/85cf95876c4b21ee6ecd0253a2c9de0e90c4a521
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64] Improve codegen for some fixed-width partial reductions (#126529)
This patch teaches optimizeExtendOrTruncateConversion to bail out
if the user of a zero-extend is a partial reduction intrinsic
that we know will get lowered efficiently to a udot instruction.
Commit: 2a0946bc0dffca89d16cd9d5208ec9416ed8100e
https://github.com/llvm/llvm-project/commit/2a0946bc0dffca89d16cd9d5208ec9416ed8100e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Match coding standards (#128683)
As per LLVM coding standards
"Variable names should be nouns (as they represent state).
The name should be camel case, and start with an upper
case letter (e.g. Leader or Boats)."
Commit: 7ff87af533a7acf47134eabe656702180d8ad171
https://github.com/llvm/llvm-project/commit/7ff87af533a7acf47134eabe656702180d8ad171
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Host lowering of standalone distribute (#127817)
This patch adds MLIR to LLVM IR translation support for standalone
`omp.distribute` operations, as well as `distribute simd` through
ignoring SIMD information (similarly to `do/for simd`).
Co-authored-by: Dominik Adamski <dominik.adamski at amd.com>
Commit: 88163ca79cab1a9a2be1cfa71000f43fd642d91e
https://github.com/llvm/llvm-project/commit/88163ca79cab1a9a2be1cfa71000f43fd642d91e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMPIRBuilder] Add support for distribute-parallel-for/do constructs (#127818)
This patch adds codegen for `kmpc_dist_for_static_init` runtime calls,
used to support worksharing a single loop across teams and threads. This
can be used to implement `distribute parallel for/do` support.
Commit: 9fc2f786934599c51427cf6f581450ee951ece4a
https://github.com/llvm/llvm-project/commit/9fc2f786934599c51427cf6f581450ee951ece4a
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
A llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
A llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
Log Message:
-----------
[X86][NFC] Added/Updated Trigonometric functions testcases (#127094)
- Added sin/cos testcases.
- Added i686 checks for all testcases.
- Moved fp16 and fp128 cases into separate files.
- Dropped tests for ppc_fp128 type.
- Added global-isel runs as precommit testing for #126931
Commit: 446899e7bed5555c2bacfe0d09c4f4f00c41bc0f
https://github.com/llvm/llvm-project/commit/446899e7bed5555c2bacfe0d09c4f4f00c41bc0f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Host lowering of distribute-parallel-do/for (#127819)
This patch adds support for translating composite `omp.parallel` +
`omp.distribute` + `omp.wsloop` loops to LLVM IR on the host. This is
done by passing an updated `WorksharingLoopType` to the call to
`applyWorkshareLoop` associated to the lowering of the `omp.wsloop`
operation, so that `__kmpc_dist_for_static_init` is called at runtime in
place of `__kmpc_for_static_init`.
Existing translation rules take care of creating a parallel region to
hold the workshared and workdistributed loop.
Commit: 48397fe41ee67557e00f13f35d60c3c9b8485e89
https://github.com/llvm/llvm-project/commit/48397fe41ee67557e00f13f35d60c3c9b8485e89
Author: David Green <david.green at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add cost model for REV shuffles. (#128498)
These patterns represent rev instructions, which reverse inside a
portion of the full vector. See llvm/test/CodeGen/AArch64/arm64-rev.ll
for codegen tests.
Commit: 56975b4ecd188a77b4f9420ff8aa5d5a72e4e076
https://github.com/llvm/llvm-project/commit/56975b4ecd188a77b4f9420ff8aa5d5a72e4e076
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[OpenMPIRBuilder] Split calculation of canonical loop trip count, NFC (#127820)
This patch splits off the calculation of canonical loop trip counts from
the creation of canonical loops. This makes it possible to reuse this
logic to, for instance, populate the `__tgt_target_kernel` runtime call
for SPMD kernels.
This feature is used to simplify one of the existing OpenMPIRBuilder
tests.
Commit: 29e14958090cb01150bda068f721a09d4bb1c36b
https://github.com/llvm/llvm-project/commit/29e14958090cb01150bda068f721a09d4bb1c36b
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Support target SPMD (#127821)
This patch implements MLIR to LLVM IR translation of host-evaluated loop
bounds, completing initial support for `target teams distribute parallel
do [simd]` and `target teams distribute [simd]`.
Commit: 25c19eb1178a26b09e8ee58c825d4ed0260b70da
https://github.com/llvm/llvm-project/commit/25c19eb1178a26b09e8ee58c825d4ed0260b70da
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/host-eval.f90
Log Message:
-----------
[Flang][OpenMP] Allow host evaluation of loop bounds for distribute (#127822)
This patch adds `target teams distribute [simd]` and equivalent
construct nests to the list of cases where loop bounds can be evaluated
in the host, as they represent kernels for which the trip count must
also be evaluated in advance to the kernel call.
Commit: dfa3af9255fd542fed5149021289404e92a8a6f3
https://github.com/llvm/llvm-project/commit/dfa3af9255fd542fed5149021289404e92a8a6f3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/libcxx/pointer-subscript.cpp
Log Message:
-----------
[clang][bytecode] Expand subscript base if of pointer type (#128511)
This is similar to what we do in the AddOffset instruction when adding
an offset to a pointer.
Commit: 820aa438a6ec5e028d96bf6b345f41c585f91572
https://github.com/llvm/llvm-project/commit/820aa438a6ec5e028d96bf6b345f41c585f91572
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
Log Message:
-----------
[mlir][vector] Update tests for xfer permutation lowering (4/N) (#127624)
* Document the remaining test cases, add a note that these are
exercising `TransferOpReduceRank` (addresses an existing TODO).
* Add missing cases (for fixed-width and scalable vectors).
* Remove scalable vectors from the negative test (the masked case) - this test
will also fail with fixed-width vectors. For consistency, lets make all
negative test use fixed-width vectors.
Commit: f95ad44068e48c4d8c66f7d65147349b7dd16efa
https://github.com/llvm/llvm-project/commit/f95ad44068e48c4d8c66f7d65147349b7dd16efa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
Log Message:
-----------
AMDGPU: Mark v_mov_b64_pseudo as a VOP1 instruction (#128677)
This is mostly true, and it tricks the rematerialization
code into handling this without special casing it.
Commit: b57e63b07a7b70ebfb5f794648e2102b7c1bd3a3
https://github.com/llvm/llvm-project/commit/b57e63b07a7b70ebfb5f794648e2102b7c1bd3a3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libclc/amdgcn/lib/workitem/get_global_size.cl
Log Message:
-----------
libclc: Stop using asm declarations for r600 on amdgcn for get_global_size (#128692)
Comparing the case where each dimension is used alone, the only codegen
difference is a missed addressing mode fold for the constant offset in the old
version due to an ancient bug.
Commit: 6aeec5eabfe11f017dd4e427ff5e9a4695f2a24a
https://github.com/llvm/llvm-project/commit/6aeec5eabfe11f017dd4e427ff5e9a4695f2a24a
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
Log Message:
-----------
[ConstraintElim] Test for #128588
Commit: f8948d3c4754e06cdd3e2903bfbfe74438f6b463
https://github.com/llvm/llvm-project/commit/f8948d3c4754e06cdd3e2903bfbfe74438f6b463
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_log.h
A libclc/clc/include/clc/math/clc_log10.h
A libclc/clc/include/clc/math/clc_log2.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_log.cl
A libclc/clc/lib/generic/math/clc_log10.cl
A libclc/clc/lib/generic/math/clc_log2.cl
A libclc/clc/lib/generic/math/clc_log_base.h
M libclc/generic/include/clc/math/log10.h
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log2.cl
R libclc/generic/lib/math/log_base.h
Log Message:
-----------
[libclc] Move log/log2/log10 to CLC library (#128540)
This commit also enables fp16 log, which was previously missing.
Other than that, no changes to codegen for AMDGPU/Nvidia targets.
Note that for simplicity this commit doesn't try to refactor or optimize
the implementations. Notably, each log is only implementated for scalar
types; vector types are scalarized. It doesn't look too difficult to
make the implementations suitable for vector codegen, so I'll try that
in a future commit.
There's also an unused implementation of log in clc_log_base.h, whereas
the implementation currently used by libclc targets re-uses log2 with an
additional multiplication. That should also be cleaned up as on first
inspection it looks a more optimal implementation, though it would have
to be checked against the OpenCL CTS for good measure.
Commit: dff2ca424c20c672b418ec86ac3a120fad4fb364
https://github.com/llvm/llvm-project/commit/dff2ca424c20c672b418ec86ac3a120fad4fb364
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Add special case for anonymous unions (#128681)
This fixes the expected output to match the one of the current
interpreter.
Commit: 70de57edcad0055d962e9fe899b347b16a6efaa3
https://github.com/llvm/llvm-project/commit/70de57edcad0055d962e9fe899b347b16a6efaa3
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[clang] Add alternative email for steakhal (#128558)
Both steakhal and balazs-benics-sonarsource accounts are mine. See
#125859
Commit: 0f9720a61b1deea225f172851210550f8a60d49f
https://github.com/llvm/llvm-project/commit/0f9720a61b1deea225f172851210550f8a60d49f
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Target/BUILD.bazel
Log Message:
-----------
[bazel] port 29e14958090cb01150bda068f721a09d4bb1c36b
Commit: 11766a40972f5cc853e296231e5d90ca3c886cc1
https://github.com/llvm/llvm-project/commit/11766a40972f5cc853e296231e5d90ca3c886cc1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/include/future
A libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
[libc++] Don't try to wait on a thread that hasn't started in std::async (#125433)
If the creation of a thread fails, this causes an idle loop that will
never end because the thread wasn't started in the first place.
Fixes #125428
Commit: a93cda47ad97af7c69563b3b02dfd9c9a63faefa
https://github.com/llvm/llvm-project/commit/a93cda47ad97af7c69563b3b02dfd9c9a63faefa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShuffleChain - pull out repeated getOpcode() calls. NFC.
Commit: e47cd4694851dd71c877b72fa59ec169260cbd32
https://github.com/llvm/llvm-project/commit/e47cd4694851dd71c877b72fa59ec169260cbd32
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShuffleChain - pass IsMaskedShuffle flag as argument from combineX86ShufflesRecursively instead of computing it internally. NFC.
Prep work toward better handling of shuffle combining across different vector widths.
Commit: 4b29c285645eb0ab8c795044c64072eabd3c041e
https://github.com/llvm/llvm-project/commit/4b29c285645eb0ab8c795044c64072eabd3c041e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
Log Message:
-----------
[ConstraintElim] Preserve analyses when IR is unchanged. (#128588)
Commit: 089f988f46d7350827c38c1718d47caa56c5a206
https://github.com/llvm/llvm-project/commit/089f988f46d7350827c38c1718d47caa56c5a206
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc] Fix defaulting the full build
Summary:
This was missing the architecture macros as they were defined just
below.
Commit: d21b2e619a5e23fd2f4cb05f5929990ee517d164
https://github.com/llvm/llvm-project/commit/d21b2e619a5e23fd2f4cb05f5929990ee517d164
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[SPIR-V] Fix generation of gMIR vs. SPIR-V code from utility methods (#128159)
The SPIR-V Backend uses the same set of utility functions, mostly though
not entirely from SPIRVGlobalRegistry, to generate gMIR and SPIR-V
opcodes, depending on the current stage of translation. This is
controlled by an explicit EmitIR flag rather than the current
translation pass, and there are legacy pieces of code where the EmitIR
flag is declared so that it has a default true value, allowing using
utility functions without explicitly declaring their intent to work
either in gMIR or in SPIR-V part of the lowering process.
While it may be ok to leave this default EmitIR flag as is in generation
of scalar integer/float types, as we don't expect to see any dependent
opcodes derived from such OpTypeXXX instructions, using of EmitIR by
default in aggregation types is a source of hidden logical flaws and
actual issues.
This PR provides a partial fix to the problem by removing default status
of EmitIR, requiring a user call site to explicitly announce its intent
to generate gMIR or SPIR-V code, fixes several cases of misuse of
EmitIR, and, the most important, fixes a nasty logical error that breaks
passing of actually asked EmitIR value by the default value in the
middle of the chain of calls, in the `findSPIRVType` call. The latter
error was a source of issues in the post-instruction selection pass that
has been getting gMIR code where SPIR-V was explicitly requested due to
overloaded with default parameters internal API in SPIRVGlobalRegistry
(most notably, `findSPIRVType`).
Commit: 44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
https://github.com/llvm/llvm-project/commit/44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
Log Message:
-----------
[X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618)
f80 is not a valid IEEE floating-point type.
Closes https://github.com/llvm/llvm-project/issues/128528.
Commit: d23da7d6300ec6732b462d475c331f289170cb83
https://github.com/llvm/llvm-project/commit/d23da7d6300ec6732b462d475c331f289170cb83
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/load.ll
Log Message:
-----------
[InstCombine] Increase recursion limit to 3 in `simplifyNonNullOperand` (#128695)
Address review comment
https://github.com/llvm/llvm-project/pull/128466#discussion_r1967228790
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=72781f58efddecee19feb07fec4e6104ef4c4812&to=3853aee61626b0eda06671b4cbbc4cdd1344440c&stat=instructions:u
Commit: 522b05afb636229acd1f2a50eff14a29c79b4a1a
https://github.com/llvm/llvm-project/commit/522b05afb636229acd1f2a50eff14a29c79b4a1a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Construct immutable VPIRBBs for exit blocks at construction(NFC) (#128374)
Constract immutable VPIRBasicBlocks for all exit blocks up front and
keep a list of them. Same as the scalar header, they are leaf nodes of
the VPlan and won't change. Some exit blocks may be unreachable, e.g. if
the scalar epilogue always executes or depending on optimizations.
This simplifies both the way we retrieve the exit blocks as well as
hooking up the exit blocks.
PR: https://github.com/llvm/llvm-project/pull/128374
Commit: 1e0e4169dd00bf8a37cef8d74d0add7861982c4e
https://github.com/llvm/llvm-project/commit/1e0e4169dd00bf8a37cef8d74d0add7861982c4e
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R libclc/generic/include/math/binary_intrin.inc
R libclc/generic/include/math/ternary_intrin.inc
Log Message:
-----------
[libclc][NFC] Remove unused intrinsics helpers (#128708)
We want to move away from using asm declarations to define builtins.
Commit: af68927a831c45b92248b1f6fc24d445be42dd91
https://github.com/llvm/llvm-project/commit/af68927a831c45b92248b1f6fc24d445be42dd91
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/IR/Instruction.cpp
A llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
Log Message:
-----------
Do not treat llvm.fake.use as a debug instruction (#128684)
The llvm.fake.use intrinsic is used to prevent certain values from being
optimized out for the benefit of debug info; it is not, however, a debug
or pseudo instruction itself and necessarily must not be treated as one,
since its purpose is to act like a normal instruction. In the original
commit that added them, the IR intrinsic however was treated as one in
`getPrevNonDebugInstruction` (but _not_ in `getNextNonDebugInstruction`,
or in the MIR equivalents). This patch correctly treats it as a
non-debug instruction.
Commit: 352c48f278c89ac4c65642d3fadf52032e7fe734
https://github.com/llvm/llvm-project/commit/352c48f278c89ac4c65642d3fadf52032e7fe734
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/ARM/select-imm.ll
M llvm/test/CodeGen/MSP430/shift-amount-threshold.ll
M llvm/test/CodeGen/Thumb/branchless-cmp.ll
Log Message:
-----------
[SelectionDAG] Utilizing target hook convertSelectOfConstantsToMath for SelectwithConstant (#127599)
The Target hook convertSelectOfConstantsToMath() needs to be used within
SimplifySelectCC helper combine function in SelectionDAG Isel, where
generic select folding with constants is happening into simple maths op
using the condition as it is.
It necessarily fixes #121145.
Commit: 4f7d8948d9d9a0d366ac737247abab2246834e05
https://github.com/llvm/llvm-project/commit/4f7d8948d9d9a0d366ac737247abab2246834e05
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
A llvm/test/CodeGen/Hexagon/bittracker-regclass.ll
Log Message:
-----------
[Hexagon] Add a case to BitTracker for new register class (#128580)
Code in the HexagonBitTracker checks for a specific register class when
processing sub-registers. A crash occurred due to a register class that
was not handled. The register class is
DoubleRegs_with_isub_hi_in_IntRegsLow8RegClassID, which is a class
formed by creating a register pair when one of the sub registers is a
Low8 integer register.
Fixes #128078
Patch by: Brendon Cahoon
Commit: a12ca57c1cb070be8e0048004c6b4e820029b6ee
https://github.com/llvm/llvm-project/commit/a12ca57c1cb070be8e0048004c6b4e820029b6ee
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][REVEC] Add getScalarizationOverhead helper function to reduce error when REVEC is enabled. (#128530)
Commit: 1affadb7c662a2eb1cfd01fdfa014ffe473c0dc2
https://github.com/llvm/llvm-project/commit/1affadb7c662a2eb1cfd01fdfa014ffe473c0dc2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
Log Message:
-----------
AMDGPU: Drop legacy r600.read.global.size intrinsics from amdgcn (#128700)
These ancient intrinsics were still consumed by the backend for libclc,
which no longer uses them.
Commit: 148111fdcf0e807fe74274b18fcf65c4cff45d63
https://github.com/llvm/llvm-project/commit/148111fdcf0e807fe74274b18fcf65c4cff45d63
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M .github/workflows/release-binaries.yml
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Enable bolt optimization for clang on Linux (#128090)
Also stop buiding the bolt project on other platforms since bolt only
supports ELF.
Commit: 85eb7259d9e1ab57e9fac248096d73505a60c072
https://github.com/llvm/llvm-project/commit/85eb7259d9e1ab57e9fac248096d73505a60c072
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[clang] Fix use-after-scope when diagnosting __attribute__((format_matches))
I don't think this will ever crash, but asan complains about it.
SUMMARY: AddressSanitizer: stack-use-after-scope clang/lib/Sema/SemaChecking.cpp:6925:43 in void (anonymous namespace)::CheckFormatHandler::EmitFormatDiagnostic<clang::CharSourceRange>(clang::PartialDiagnostic, clang::SourceLocation, bool, clang::CharSourceRange, llvm::ArrayRef<clang::FixItHint>)
While there switch to stable_sort to not give a flipped error message
half of the time.
Commit: 5fd188833c4cc2f18aa53908fd6237f6a432d629
https://github.com/llvm/llvm-project/commit/5fd188833c4cc2f18aa53908fd6237f6a432d629
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
A mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
Log Message:
-----------
[mlir][spirv] Refactor image operations (#128552)
This patch makes multiple changes to images ops:
1) The assembly format is unified with the rest of the dialect to use
`%0 = spirv.op %1, %2, %3 : f32, f32, f32` rather than having each type
directly attached to each argument.
2) The verification is moved from `SPIRVOps.cpp` to a new file so the
ops can be easier maintained.
3) Majority of C++ verification is removed and moved into ODS.
Verification of `ImageQuerySizeOp` is left in C++ due to the complexity
of rules.
4) `spirv::bitEnumContainsAll` is replaced by
`spirv::bitEnumContainsAny` in `verifyImageOperands`. In this context
`...Any` seems to be the correct function, as we want to check whether
unsupported operand is being used - in opposite to checking if all
unsupported operands are being used.
5) Simplify target tests by removing entry points and adding `Linkage`
capability to the modules.
This change is made in preparation for adding more Image ops. Change to
the assembly format was previously mentioned in #124124.
Commit: f10e0f7321b34693697a0bf895d440f82b32ba54
https://github.com/llvm/llvm-project/commit/f10e0f7321b34693697a0bf895d440f82b32ba54
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/test/CodeGenCXX/merge-functions.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/comdat.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
Log Message:
-----------
[MergeFuncs] Don't introduce calls to (linkonce,weak)_odr functions. (#125050)
Avoid creating new calls to linkonce_odr/weak_odr functions when
merging 2 functions, as this may introduce an infinite call
cycle.
Consider 2 functions below, both present in 2 modules.
Module X
--
define linkonce_odr void @"A"() {
call void @"foo"()
}
define linkonce_odr void @"B"() {
call void @"foo"()
}
---
Module Y
---
global @"g" = @"B"
define linkonce_odr void @"A"() {
%l = load @"g"
call void %l()
}
define linkonce_odr void @"B"() {
call void @"foo"()
}
---
@"A" and @"B" in both modules are semantically equivalent
Module X after function merging:
---
define linkonce_odr void @"A"() {
call void @"foo"()
}
define linkonce_odr void @"B"() {
call void @"A"()
}
---
Module Y is unchanged.
Then the linker picks @"A" from module Y and @"B" from module X. Now there's an infinite call cycle
PR: https://github.com/llvm/llvm-project/pull/125050
Commit: 83c6b1a88852ac6462e2ae58cb4e5ebdeb0eadd3
https://github.com/llvm/llvm-project/commit/83c6b1a88852ac6462e2ae58cb4e5ebdeb0eadd3
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A lldb/examples/python/fzf_history.py
Log Message:
-----------
[lldb] Add fzf_history command to examples (#128571)
Adds a `fzf_history` to the examples directory.
This python command invokes [fzf](https://github.com/junegunn/fzf) to
select from lldb's command history.
Tighter integration is available on macOS, via commands for copy and
paste. The user's chosen history entry back is pasted into the lldb
console (via AppleScript). By pasting it, users have the opportunity to
edit it before running it. This matches how fzf's history search works.
Without copy and paste, the user's chosen history entry is printed to
screen and then run automatically.
Commit: cf3b0368a55c1c285dd80f12b044b58e87a425ac
https://github.com/llvm/llvm-project/commit/cf3b0368a55c1c285dd80f12b044b58e87a425ac
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa][tosa-to-linalg] Add NaN Mode Lowering (#125668)
Add support for NaN propagation lowering in the `tosa-to-linalg` and
`tosa-to-linalg-named` conversions by conditionally checking for NaN in
the case of ignore semantics and materializing the appropriate select
operations. Note that the default behviour of "propagate" matches that
of the arith dialect and so in that case we can avoid creating the
checks altogether.
Add appropriate lit tests including negative tests which check the
various comparisons and selects are materialized as appropriate.
This affects the following TOSA operators:
* arg_max
* max_pool_2d
* clamp
* reduce_max
* reduce_min
* maximum
* minimum
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: a821ae284724f1522297c0b455b1ca5c05fbc270
https://github.com/llvm/llvm-project/commit/a821ae284724f1522297c0b455b1ca5c05fbc270
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_round.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_round.cl
M libclc/generic/lib/math/round.cl
Log Message:
-----------
[libclc] Move round to CLC library (#128721)
Commit: 37559c8401cf9236d561eebd75bd3d70be6ab723
https://github.com/llvm/llvm-project/commit/37559c8401cf9236d561eebd75bd3d70be6ab723
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
Log Message:
-----------
[Hexagon] Handle Call Operand vxi1 in Hexagon Backend (#128027)
This commit updates the Hexagon backend to handle
vxi1 call operands. It ensures compatibility for
vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is
enabled.
~Fixes #59009 and #118879~
Commit: 99207ae835efea859f2d9ed4cce781363c0e1562
https://github.com/llvm/llvm-project/commit/99207ae835efea859f2d9ed4cce781363c0e1562
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp:33:24: error: unused variable
'noSupportOperands' [-Werror,-Wunused-variable]
Commit: 568106c2150f4442ad39d9c58493b962c87763bd
https://github.com/llvm/llvm-project/commit/568106c2150f4442ad39d9c58493b962c87763bd
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
Log Message:
-----------
[lldb][NFC] Fix comment in lldb/Core/ModuleList.h (#128602)
Commit: 7501c9c0e124139198cf84148a49fe80b9f64cea
https://github.com/llvm/llvm-project/commit/7501c9c0e124139198cf84148a49fe80b9f64cea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[AsmParser] Avoid repeated map lookups (NFC) (#128629)
Commit: 791da3c5c2efc13e952ec4fe041e88428e4a331a
https://github.com/llvm/llvm-project/commit/791da3c5c2efc13e952ec4fe041e88428e4a331a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128630)
Commit: 9388e42a3c67a4399bbc3a427077ea95bac31323
https://github.com/llvm/llvm-project/commit/9388e42a3c67a4399bbc3a427077ea95bac31323
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#128631)
Commit: 43401dd0b5c659047e546efbc55f9f88261142d6
https://github.com/llvm/llvm-project/commit/43401dd0b5c659047e546efbc55f9f88261142d6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
Log Message:
-----------
[libc++] Make .verify.cpp tests more robust against changing headers (#128703)
This is fixes the tests for the frozen headers, but is an improvement
either way.
Commit: 38f8ca1d1817969d712a7e70e070228eee8a0f3f
https://github.com/llvm/llvm-project/commit/38f8ca1d1817969d712a7e70e070228eee8a0f3f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated hash lookups (NFC) (#128632)
Commit: 9889de834b0a9fa4a5a222a81a524c75977e41d4
https://github.com/llvm/llvm-project/commit/9889de834b0a9fa4a5a222a81a524c75977e41d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#128634)
Commit: 8bea51103000e4ac752ecd8ed1550c1c9d105a6b
https://github.com/llvm/llvm-project/commit/8bea51103000e4ac752ecd8ed1550c1c9d105a6b
Author: Marius Kamp <msk at posteo.org>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/andnot-blsmsk.ll
Log Message:
-----------
[X86] Fold AND(Y, XOR(X, SUB(0, X))) to ANDN(Y, BLSMSK(X)) (#128348)
XOR(X, SUB(0, X)) corresponds to a bitwise-negated BLSMSK instruction
(i.e., x ^ (x - 1)). On its own, this transformation is probably not
really profitable but when the XOR operation is an operand of an AND
operation, we can use an ANDN instruction to reduce the number of
emitted instructions by one.
Fixes #103501.
Commit: e58f475e84545d12c52e177fdea69c0f2bec81df
https://github.com/llvm/llvm-project/commit/e58f475e84545d12c52e177fdea69c0f2bec81df
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
Log Message:
-----------
[mlir][tosa] Move cond_if and while_loop operations to controlflow extension (#128216)
This commit adds the concept of a controlflow extension to the dialect
and updates the validation pass to check conf_if and while_loop are
supported only in the presence of the controlflow extension.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 53b46bb09474bd22fd097411f9eb4596424116ee
https://github.com/llvm/llvm-project/commit/53b46bb09474bd22fd097411f9eb4596424116ee
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix crash on attempt to fold int_div by zero (#128682)
Fixes #118268.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: f08824b935434b91f7352904a25f6309f2b3e6bd
https://github.com/llvm/llvm-project/commit/f08824b935434b91f7352904a25f6309f2b3e6bd
Author: David Green <david.green at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add udiv and urem uniform tests. NFC
These should cost the same as non-uniform version.
Commit: 24b7759a9dfe5714236957e7d829e2412100a4b7
https://github.com/llvm/llvm-project/commit/24b7759a9dfe5714236957e7d829e2412100a4b7
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/assume.f90
A flang/test/Lower/OpenMP/Todo/assumes.f90
A flang/test/Parser/OpenMP/assumption.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[FLANG][OpenMP]Add frontend support for ASSUME and ASSUMES (#120770)
Enough suport to parse correctly formed directives of !$OMP ASSUME and
!$OMP ASSUMES with teh related clauses that go with them: ABSENT,
CONTAINS, NO_OPENPP, NO_OPENMP_ROUTINES, NO_PARALLELISM and HOLDS.
Tests added for unparsing and dump parse-tree.
Semantics support is very minimal and no specific tests added.
The lowering will hit a TODO, and there are tests in Lower/OpenMP/Todo
to make it clear that this is currently expected behaviour.
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Co-authored-by: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Commit: 041b7f508533417bcda4feaa03d6c16ff85275f5
https://github.com/llvm/llvm-project/commit/041b7f508533417bcda4feaa03d6c16ff85275f5
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Turn off unsafe-buffer warning for methods annotated with clang::unsafe_buffer_usage attribute (#125671)
Unsafe operation in methods that are already annotated with
clang::unsafe_buffer_usage attribute, should not trigger a warning. This
is because, the developer has already identified the method as unsafe
and warning at every unsafe operation is redundant.
rdar://138644831
---------
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: d2d469eb7981885eac188bf7988c72d7e85b2d4e
https://github.com/llvm/llvm-project/commit/d2d469eb7981885eac188bf7988c72d7e85b2d4e
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/Verifier/invoke.ll
Log Message:
-----------
[WebAssembly] Make llvm.wasm.throw invokable (#128104)
`llvm.wasm.throw` intrinsic can throw but it was not invokable. Not sure
what the rationale was when it was first written that way, but I think
at least in Emscripten's C++ exception support with the Wasm port of
libunwind, `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.rethrow`, is used only within `_Unwind_RaiseException`, which
is an one-liner and thus does not need an `invoke`:
https://github.com/emscripten-core/emscripten/blob/720e97f76d6f19e0c6a2d6988988cfe23f0517fb/system/lib/libunwind/src/Unwind-wasm.c#L69
(`_Unwind_RaiseException` is called by `__cxa_throw`, which is generated
by the `throw` C++ keyword)
But this does not address other direct uses of the builtin in C++, whose
use I'm not sure about but is not prohibited. Also other language
frontends may need to use the builtin in different functions, which has
`try`-`catch`es or destructors.
This makes `llvm.wasm.throw` invokable in the backend. To do that, this
adds a custom lowering routine to `SelectionDAGBuilder::visitInvoke`,
like we did for `llvm.wasm.rethrow`.
This does not generate `invoke`s for `__builtin_wasm_throw` yet, which
will be done by a follow-up PR.
Addresses #124710.
Commit: 48db4e8377f8504cf151cf4d2b4ecf33461eedc8
https://github.com/llvm/llvm-project/commit/48db4e8377f8504cf151cf4d2b4ecf33461eedc8
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/MemRef/resolve-dim-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Tosa/transpose-fold.mlir
Log Message:
-----------
[mlir][tosa] Change Transpose perms operand to attribute (#128115)
This patch changes the perms operand for Tosa Transpose operator to an
i32 array attribute
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 4f18f3f09a744ddd05de2188592fa11533ff3054
https://github.com/llvm/llvm-project/commit/4f18f3f09a744ddd05de2188592fa11533ff3054
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
Log Message:
-----------
[RISCV] Use addiw for or_is_add when or input is sign extended. (#128635)
We prefer to emit addi instead of ori because its more compressible, but
this can pessimize the sext.w removal pass.
If the input to the OR is known to be a sign extended 32 bit value, we
can use addiw instead of addi which will give more power to the sext.w
removal pass. As it is known to produce sign a sign extended value and
only consume the lower 32 bits.
Fixes #128468.
Commit: 0a7809c644485d6650ea01bfe616623f580b24d1
https://github.com/llvm/llvm-project/commit/0a7809c644485d6650ea01bfe616623f580b24d1
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[mlir][tosa] Fix ability to expand ranks with dynamic shape support (#128037)
- Fix ability to expand ranks with dynamic shape support
- Simplify the code
Signed-off-by: Suraj Sudhir <suraj.sudhir at arm.com>
Co-authored-by: Suraj Sudhir <suraj.sudhir at arm.com>
Commit: 43999deb370113945ef86680014f838f55315ee7
https://github.com/llvm/llvm-project/commit/43999deb370113945ef86680014f838f55315ee7
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
Log Message:
-----------
[spirv][amdgpu] Set atomic size in the clang target info (#128569)
Problem identified by Joseph. The openmp device runtime uses
__scoped_atomic_load_n and similar which presently hit
```
error: large atomic operation may incur significant performance
penalty; the access size (4 bytes) exceeds the max lock-free size (0 bytes) [-Werror,-Watomic-alignment]
```
This is because the spirv class doesn't set the corresponding field. The
base does, but only if there's a host toolchain, which there isn't.
Commit: 67056c280a7171a3546442013593687d5ad5440b
https://github.com/llvm/llvm-project/commit/67056c280a7171a3546442013593687d5ad5440b
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Support shuffle for F16x8 vectors. (#127857)
Commit: a778930f85b6d17cf31ff0e15964a7c7116e2a9d
https://github.com/llvm/llvm-project/commit/a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.td
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir][linalg] Create a dedicated target for `LinalgRelayoutInterface` (#128485)
Creates an interface target for `LinalgRelayoutInterface`. This is
primarily to reduce the dependency of `Tensor` on `Linalg` to the
required minimum. For context and rationale, see:
* https://github.com/llvm/llvm-project/issues/127668
Note, I also took the liberty of renaming `LinalgRelayoutInterface` as
`RelayoutOpInterface` (removed `Linalg`, added `Op`).
Commit: 3968ebd00da80a08de84f83a101ebb23710f6631
https://github.com/llvm/llvm-project/commit/3968ebd00da80a08de84f83a101ebb23710f6631
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
A bolt/test/X86/entry-point-fallthru.s
Log Message:
-----------
[BOLT] Keep multi-entry functions simple in aggregation mode (#128253)
BOLT used to mark multi-entry functions non-simple in non-relocation
mode with the reasoning that we can't move them due to potentially
undetected references. However, in aggregation mode it doesn't apply as
BOLT doesn't perform optimizations.
Relax this constraint in case of an aggregation job.
Test Plan: added entry-point-fallthru.s
Commit: f5675243995dbca22319ed4c0665b3e46138285b
https://github.com/llvm/llvm-project/commit/f5675243995dbca22319ed4c0665b3e46138285b
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/bolt-address-translation-yaml.test
Log Message:
-----------
[BOLT] Fix doTrace in BAT mode (#128546)
When processing BOLTed binaries with BAT section, we used to
indiscriminately use `BAT->getFallthroughsInTrace` to record
fall-throughs, even if the function is not covered by BAT.
Fix that by using non-BAT CFG-based `getFallthroughsInTrace` if the
function is not in BAT.
Test Plan: updated bolt-address-translation-yaml.test
Commit: ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
https://github.com/llvm/llvm-project/commit/ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
Log Message:
-----------
[libc][cmake] Clean up dead code in add_gen_header (#128753)
DATA_FILES CMake argument never existed in the new YAML-based hdrgen
version of add_gen_header function, and thus its uses added in
b1fd6f0996a9d6e6ebfa0cc3df0fe499c5ccdf65 were always dead code.
Remove them to clean up the function implementation.
Co-authored-by: Alexey Samsonov <samsonov at google.com>
Commit: 66af4923ce245a0fd9427db8e4861354576d0866
https://github.com/llvm/llvm-project/commit/66af4923ce245a0fd9427db8e4861354576d0866
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
Log Message:
-----------
[lldb-dap] Refactor reverse request response handlers (NFC) (#128594)
This refactors the response handlers for reverse request to follow the
same architecture as the request handlers. With only two implementation
that might be overkill, but it reduces code duplication and improves
error reporting by storing the sequence ID. This PR also fixes an
unchecked Expected in the old callback for unknown sequence IDs.
Commit: 7c266756ad2eeeb2a9018eb97dc45809922bd49e
https://github.com/llvm/llvm-project/commit/7c266756ad2eeeb2a9018eb97dc45809922bd49e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 66af4923ce24
Commit: 9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
https://github.com/llvm/llvm-project/commit/9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Use the same lowerings for f16x8 as other float vectors. (#127897)
This fixes failures to select the various compare operations that
weren't being expanded for f16x8.
Commit: c8136da26c56f44ab6a217853c58f79b88ceeb97
https://github.com/llvm/llvm-project/commit/c8136da26c56f44ab6a217853c58f79b88ceeb97
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
A llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
Log Message:
-----------
[RISCV] Correctly Decode Unsigned Immediates with Ranges (#128584)
We currently have two operands upstream that are an unsigned immediate
with a range constraint - `uimm8ge32` (for `cm.jalt`) and `uimm5gt3`
(for `qc.shladd`).
Both of these were using `decodeUImmOperand<N>` for decoding. For `Zcmt`
this worked, because the generated decoder automatically checked for
`cm.jt` first because the 8 undefined bits in `cm.jalt` are `000?????`
in `cm.jt` (this is to do with the range lower-bound being a
power-of-two). For Zcmt, this patch is NFC.
We have less luck with `Xqciac` - `qc.shladd` is being decoded where the
`uimm5` field is 3 or lower. This patch fixes this by introducing a
`decodeUImmOperandGE<Width, LowerBound>` helper, which will corretly
return `MCDisassembler::Fail` when the immediate is below the lower
bound.
I have added a test to show the encoding where `uimm5` is equal to 3 is
no longer disassembled as `qc.shladd`.
Commit: f22291c791c8063ef5125392ada3556dd3e62df5
https://github.com/llvm/llvm-project/commit/f22291c791c8063ef5125392ada3556dd3e62df5
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV][NFC] Merge Xqci Decoder Tables (#128140)
RISC-V has multiple decoder tables because there is no guarantee that
non-standard extensions do not overlap with each other.
Qualcomm's Xqci family of extensions are intended to be implemented
together, and therefore we want a single decode table for this group of
extensions. This should be more efficient overall, and allows us to use
tablegen's existing mechanism that finds overlapping encodings within
the group.
To implement this, the key addition is `TRY_TO_DECODE_FEATURE_ANY`,
which will use the provided decoder table if any of the features from
the FeatureBitset (first argument) are enabled, rather than if all are
enabled.
Commit: 00f02fed882822008f8e4733bcdfb84799d9fb39
https://github.com/llvm/llvm-project/commit/00f02fed882822008f8e4733bcdfb84799d9fb39
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/test/MC/RISCV/xrivosvizip-invalid.s
M llvm/test/MC/RISCV/xrivosvizip-valid.s
Log Message:
-----------
[RISCV] Change the vendor prefix for Rivos from "rv." to "ri." (#128761)
There had been concern raised about possible confusion with "rvv". After
internal discussion, we decided to go with an alternate prefix to reduce
possible confusion going forward. The specification document
(https://github.com/rivosinc/rivos-custom-extensions) has been updated.
And also add the XRivosVizip extension to the documentation. I'd missed
that in the initial commit.
Commit: 4357a6603f2c21f343d500778f71494e865262ac
https://github.com/llvm/llvm-project/commit/4357a6603f2c21f343d500778f71494e865262ac
Author: Jeff Niu <jeffniu22 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
Log Message:
-----------
[mlir][DLTI] Make `getPreferredAlignment` default to `getABIAlignment` (#128754)
Many types don't have a preferred alignment, but often specifying an ABI
alignment is required to implement APIs on top of data layouts. Default
the preferred alignment to `getABIAlignment` to simplify things.
Commit: eacbcbe47744a496ad1651ebd65914f9e6a66f85
https://github.com/llvm/llvm-project/commit/eacbcbe47744a496ad1651ebd65914f9e6a66f85
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Upstream type `bool` (#128601)
Support the type `bool` and the literals `true` and `false`. Add the
type `cir::BoolType` and the attribute `cir::BoolAttr` to ClangIR. Add
code in all the necessary places in ClangIR CodeGen to handle and to
recognize the type and the attribute.
Add test cases to existing tests func-simple.cpp and
global-var-simple.cpp.
Commit: f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
https://github.com/llvm/llvm-project/commit/f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Replace deprecated std::aligned_union, NFCI. (#127417)
All std::aligned_* are deprecated in C++23. Implement the replacement
suggested in P1413R3 using alignas and std::max.
Commit: 5e4938a9918ac0e9c2ed3a9171767e6beafcea47
https://github.com/llvm/llvm-project/commit/5e4938a9918ac0e9c2ed3a9171767e6beafcea47
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
Exclude hwasan from thread_create_failure.pass.cpp (#128768)
Fixes hwasan buildbot failure
(https://lab.llvm.org/buildbot/#/builders/55/builds/7536/steps/10/logs/stdio)
introduced in https://github.com/llvm/llvm-project/pull/125433 by
excluding this test for hwasan, similar to the existing exclusion of
asan.
Commit: 6a5dd04013a1442ed4c5861216c8c67a81f37ed0
https://github.com/llvm/llvm-project/commit/6a5dd04013a1442ed4c5861216c8c67a81f37ed0
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Try to fix AlignedCharArrayUnion with GCC 7.5
Work around "internal compiler error: Segmentation fault", apparently
caused by alignas(Ts...).
Commit: c79e867cd2bbf414f53de169cd4480666303f0dc
https://github.com/llvm/llvm-project/commit/c79e867cd2bbf414f53de169cd4480666303f0dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
Log Message:
-----------
[DirectX] Update CBuffer to refer to a `dx.Layout` type (#128697)
This adds support cbuffers based on llvm/wg-hlsl#171 - the type argument
of the CBuffer TargetExtType is either a `dx.Layout` type which reports
its own size, or it's a normal type and we can simply refer to
DataLayout.
Commit: 303d7fa867407e9763f329e94a271e652ccb9ed0
https://github.com/llvm/llvm-project/commit/303d7fa867407e9763f329e94a271e652ccb9ed0
Author: Johannes de Fine Licht <johannes.definelicht at nextsilicon.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
Log Message:
-----------
[MLIR][Interfaces] Make LoopLikeOpInterface inheritable outside of MLIR (#128743)
Many interface methods did not prefix the `mlir` namespace, which
prevented inheriting from this interface from an interface defined
outside the `mlir` namespace. Prefix namespaces everywhere to enable
this.
Commit: 0be3f134c3b0bea0a3f32db55258c776caf616fb
https://github.com/llvm/llvm-project/commit/0be3f134c3b0bea0a3f32db55258c776caf616fb
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
Log Message:
-----------
[DirectX] only allow intrinsics defined in DXIL.td (#128613)
Fixes #128071
The current behavior lets intrinsics that don't map to a DXILOP slip
through. Nothing catches this until we hit the DXIL validator. This
change fails earlier so we don't encode invalid llvm intrinsics that can
slip through because of clang builtins like `__builtin_reduce_and`
example:
https://hlsl.godbolt.org/z/13rPj18vn
Commit: 2646c36a864aa6a62bc1280e9a8cd2bcd2695349
https://github.com/llvm/llvm-project/commit/2646c36a864aa6a62bc1280e9a8cd2bcd2695349
Author: Christopher Bate <cbate at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
Log Message:
-----------
[mlir][bufferization] Change OneShotModuleBufferize to not analyze or bufferize nested symbol tables (#127726)
The existing OneShotModuleBufferize will analyze and bufferize
operations which are in nested symbol tables (e.g. nested
`builtin.module`, `gpu.module`, or similar operations). This
behavior is untested and likely unintentional given other
limitations of OneShotModuleBufferize (`func.call` can't call
into nested symbol tables). This change reverses the existing
behavior so that the operations considered by the analysis and
bufferization exclude any operations in nested symbol table
scopes. Users who desire to bufferize nested modules can still do
so by applying the transformation in a pass pipeline or in a
custom pass. This further enables controlling the order in which
modules are bufferized as well as allowing use of different
options for different kinds of modules.
Commit: ad94af973a76ecaa3e6a85304a4abe8130e88bdb
https://github.com/llvm/llvm-project/commit/ad94af973a76ecaa3e6a85304a4abe8130e88bdb
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
Log Message:
-----------
[CIR] React to breaking change to DataLayoutTypeInterface (#128772)
In #128754, `DataLayoutTypeInterface` was changed to give
`getPreferredAlignment` a default implemention. As a result, table-gen
no longer declared `getPreferredAlignment` when defining a class that
contained `[DeclareTypeInterfaceMethods<DataLayoutTypeInterface>]` in
the table-gen definition. That means all of the definitions in
`CIRTypes.cpp`, such as `PointerType::getPreferredAligment`, were
compilation errors.
Delete all the definitions of `getPreferredAlignment`. I verified that
the default implementation does the exact same thing as the explicit
overrides that are being deleted.
Commit: 44ffeecde2658249d57a54f52c11a339f2e6d14e
https://github.com/llvm/llvm-project/commit/44ffeecde2658249d57a54f52c11a339f2e6d14e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Analysis/DXILResource.cpp
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
Log Message:
-----------
[DXIL][Analysis] Make sure resource accessors are contiguous (#128696)
When some resource types were present, but not all of them, we were
ending up in a situation where we would fail to initialize the `FirstX`
variables and get incorrect iterators.
Fixes #128560.
Commit: f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
https://github.com/llvm/llvm-project/commit/f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/stdio/generic/fileno.cpp
Log Message:
-----------
[libc] Move fileno and fdopen to fullbuild only (#128762)
Both fileno and fdopen require interfacing with the opaque FILE struct,
so they shouldn't be enabled in overlay mode. This patch moves both into
fullbuild only on all platforms.
Fixes #128643
Commit: 8beec9fc48194224779e5428b625fe341e617129
https://github.com/llvm/llvm-project/commit/8beec9fc48194224779e5428b625fe341e617129
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/a64l.cpp
A libc/src/stdlib/a64l.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/a64l_test.cpp
Log Message:
-----------
[libc] implement a64l (#128758)
Implement the posix function a64l.
Standard:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/a64l.html
Commit: 59cee030fb9b8be7ee0a89964ead5120d029deb4
https://github.com/llvm/llvm-project/commit/59cee030fb9b8be7ee0a89964ead5120d029deb4
Author: Reid Kleckner <rnk at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R clang/utils/creduce-clang-crash.py
A clang/utils/reduce-clang-crash.py
Log Message:
-----------
Generalize creduce-clang-crash.py script to look for cvise (#128592)
cvise reimplements creduce in Python and bundles clang-delta and other
tools. In my experience, it is generally a more robust reduction tool
that is better maintained. I renamed the script to make it tool-neutral,
which also opens up the possibility that we teach it how to
automatically transition over to llvm-reduce and opt/llc to handle LLVM
backend crashes, but that is potential future work.
Internally, the variable names still say "creduce". I kept using the
verb "reduce" because "vise" is not a verb, but the external facing text
has been updated.
Commit: e6f6a1e863895a3378e703525a6d0d293413be33
https://github.com/llvm/llvm-project/commit/e6f6a1e863895a3378e703525a6d0d293413be33
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)
Enable gisel selection for uaddsat and usubsat in true16 flow
This patch includes:
1. Added VGPR_16_Lo128/VGPR_16 to register bank and update register info
for recognizing 16bit regclass id and bit width
2. uaddsat/usubsat test update
Commit: 40566fd674d110185e2d5e72e320369bfab63ede
https://github.com/llvm/llvm-project/commit/40566fd674d110185e2d5e72e320369bfab63ede
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
Log Message:
-----------
[WebAssembly] Generate invokes with llvm.wasm.(re)throw (#128105)
Even though `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.throw`, throws,
```cpp
try {
__builtin_wasm_throw(0, obj);
} catch (...) {
}
```
does not generate `invoke`. This is because we have assumed the
intrinsic cannot be invoked, which doesn't make much sense. (See #128104
for the historical context)
#128104 made `llvm.wasm.throw` intrinsic invokable in the backend. This
actually generates `invoke`s in Clang for `__builtin_wasm_throw`.
While we're at it, this also generates `invoke`s for
`__builtin_wasm_rethrow`, which is actually not used anywhere in C++
support. I haven't deleted it just in case in may have uses later. (For
example, to support rethrow functionality that carries stack trace with
exnref)
Depends on #128104 for the CI to pass.
Fixes #124710.
Commit: 65cf534139ab884d6886810b647dc50e3affaa19
https://github.com/llvm/llvm-project/commit/65cf534139ab884d6886810b647dc50e3affaa19
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add interfaces for __ldcg, __ldca, __ldcs, __ldlu, __ldcv, __stwb, __stcg, __stcs, __stwt (#128766)
Commit: 789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
https://github.com/llvm/llvm-project/commit/789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
Author: Paul Floyd <pjfloyd at wanadoo.fr>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M openmp/tools/archer/ompt-tsan.cpp
Log Message:
-----------
[OMPT] Use __tsan_init to detect TSan binaries rather than RunningOnValgrind (#128357)
Switch to using __tsan_init rather than RunningOnValgrind as the means
for detecting TSan instumented binaries. RunningOnValgrind is present in
other libraries (such as Google perftools tcmalloc). An exe that links
with a tcmalloc static library and exports symbols with -rdynamic will
appear to be TSan instrumented even when it is not resulting in "Unable
to fint TSan function ..." messages.
Fixes issue #122319.
Commit: 864071dd7e191ba895abf69dfa6937a2cadaffbe
https://github.com/llvm/llvm-project/commit/864071dd7e191ba895abf69dfa6937a2cadaffbe
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Bazel fixes for a778930f85b6d17cf31ff0e15964a7c7116e2a9d (#128783)
Commit: 30a7c816ee5ca998da960c6ab98e72903de40592
https://github.com/llvm/llvm-project/commit/30a7c816ee5ca998da960c6ab98e72903de40592
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[LTO][Pipelines][NFC] Exctract isLTOPostLink (#128653)
Commit: fc655b1ae78305ad0839c0311f72607775af0c73
https://github.com/llvm/llvm-project/commit/fc655b1ae78305ad0839c0311f72607775af0c73
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
Log Message:
-----------
[DirectX] Fix printing of DXIL cbuffer info (#128698)
Make sure we're able to print cbuffer comments in a way that's
compatible with DXC.
Fixes #128562
Commit: 1b39328d7440aa7a94af4083257ef1c2f9394887
https://github.com/llvm/llvm-project/commit/1b39328d7440aa7a94af4083257ef1c2f9394887
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
A llvm/test/CodeGen/AArch64/inline-asm-speculation.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
Log Message:
-----------
[CodeGen] Fix MachineInstr::isSafeToMove handling of inline asm. (#126807)
Even if an inline asm doesn't have memory effects, we can't assume it's
safe to speculate: it could trap, or cause undefined behavior. At the
LLVM IR level, this is handled correctly: we don't speculate inline asm
(unless it's marked "speculatable", but I don't think anyone does that).
Codegen also needs to respect this restriction.
This change stops Early If Conversion and similar passes from
speculating an INLINEASM MachineInstr.
Some uses of isSafeToMove probably could be switched to a different API:
isSafeToMove assumes you're hoisting, but we could handle some forms of
sinking more aggressively. But I'll leave that for a followup, if it
turns out to be relevant.
See also discussion on gcc bugtracker
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102150 .
Commit: b7060d0183f8f23e4e1a8ce6222fa8fa51b26fbd
https://github.com/llvm/llvm-project/commit/b7060d0183f8f23e4e1a8ce6222fa8fa51b26fbd
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Fix printing of DXIL cbuffer info (#128698)
Make sure we're able to print cbuffer comments in a way that's
compatible with DXC.
Fixes #128562
Note: This is a re-commit because I somehow managed to get a completely
empty commit the first time.
Commit: 09832777d830e0fddff84bf36793ec4e453656b0
https://github.com/llvm/llvm-project/commit/09832777d830e0fddff84bf36793ec4e453656b0
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Statically link ZSTD on all OSes (#128554)
This will make the binaries more portable.
Commit: cd4c30bb224e432d8cd37f375c138cbaada14f6c
https://github.com/llvm/llvm-project/commit/cd4c30bb224e432d8cd37f375c138cbaada14f6c
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/cbuffer_align.hlsl
Log Message:
-----------
[HLSL][Sema] Fix Struct Size Calculation containing 16/32 bit scalars (#128086)
Fixes #119641
Update SemaHLSL to correctly calculate the alignment barrier for scalars
that are not 4 bytes wide
Commit: 2db8386867c5083980ff00bf2eae8937457ab9da
https://github.com/llvm/llvm-project/commit/2db8386867c5083980ff00bf2eae8937457ab9da
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
A clang/test/CodeGenHLSL/default_cbuffer.hlsl
Log Message:
-----------
[HLSL] Implement default constant buffer $Globals (2nd attempt) (#128589)
All variable declarations in the global scope that are not resources,
static or empty are implicitly added to implicit constant buffer
`$Globals`. They are created in `hlsl_constant` address space and
collected in an implicit `HLSLBufferDecl` node that is added to the AST
at the end of the translation unit. Codegen is the same as for explicit
constant buffers.
Fixes #123801
This is a second attempt to implement this feature. The first attempt
had to be reverted because of memory leaks. The problem was adding a
`SmallVector` member on `HLSLBufferDecl` node to represent a list of
default buffer declarations. When this vector needed to grow, it
allocated memory that was never released, because all memory used by AST
nodes must be allocated by `ASTContext` allocator and is released all at
once. Destructors on AST nodes are never called.
It this change the list of default buffer declarations is collected in a
`SmallVector` instance on `SemaHLSL`. The `HLSLBufDecl` representing
`$Globals` is created at the end of the translation unit when the number
of declarations is known, and the list is copied into an array allocated
by the `ASTContext` allocator.
Commit: c8b40867d144395ad3c306a3cf87f970e0f97f07
https://github.com/llvm/llvm-project/commit/c8b40867d144395ad3c306a3cf87f970e0f97f07
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] test fix for uaddsat/usubsat true16 selection (#128784)
This is a NFC change. Update the test file and fix the build
https://github.com/llvm/llvm-project/pull/128233 is causing a build
issue. This is caused by PR
https://github.com/llvm/llvm-project/pull/127945 being merged while the
128233 is pending for review.
Commit: f3000d7d27fab1d1bbf1d848c6f84d3f91931326
https://github.com/llvm/llvm-project/commit/f3000d7d27fab1d1bbf1d848c6f84d3f91931326
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Do not trigger automatic deallocation in main (#128789)
Similar to host flow, do not trigger automatic deallocation at then end
of the main program since anything could happen like a
cudaDevcieReset().
Commit: e350485595d0694dbf5847d8d0eff1fb3df56e3b
https://github.com/llvm/llvm-project/commit/e350485595d0694dbf5847d8d0eff1fb3df56e3b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
A flang/test/Lower/CUDA/cuda-kernel-alloca-block.cuf
Log Message:
-----------
[flang][cuda] Set alloca block in cuf kernel (#128776)
Temporary created during lowering in a cuf kernel must be set in the cuf
kernel itself otherwise they will be allocated on the host.
Commit: b1a735b45dcc194ad9be08d057bc853ad1c1467b
https://github.com/llvm/llvm-project/commit/b1a735b45dcc194ad9be08d057bc853ad1c1467b
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[mlir][math] expand-math pass assumes the static shaped type (#128299)
In the process of `expand-math` pass, the conversion of ceil op assumes
the static shaped type as input as it needs create 0 and 1 constant
values whose type is aligned with the op type.
Fixes https://github.com/llvm/llvm-project/issues/128275
Commit: da37c76ac621c64216e56ead3efe1bd569250ee2
https://github.com/llvm/llvm-project/commit/da37c76ac621c64216e56ead3efe1bd569250ee2
Author: Prakhar Dixit <75660779+Prakhar-Dixit at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
Log Message:
-----------
[mlir][vector] Add a check to ensure input vector rank equals target shape rank (#127706)
Fixes issue #126197
The crash is caused because, during IR transformation, the
vector-unrolling pass (using ExtractStridedSliceOp) attempts to slice an
input vector of higher rank using a target vector of lower rank, which
is not supported.
Specific example :
```
module {
func.func @func1() {
%cst_25 = arith.constant dense<3.718400e+04> : vector<4x2x2xf16>
%cst_26 = arith.constant dense<1.000000e+00> : vector<24x2x2xf32>
%47 = vector.fma %cst_26, %cst_26, %cst_26 : vector<24x2x2xf32>
%818 = scf.execute_region -> vector<24x2x2xf32> {
scf.yield %47 : vector<24x2x2xf32>
}
%823 = vector.extract_strided_slice %cst_25 {offsets = [2], sizes = [1], strides = [1]} : vector<4x2x2xf16> to vector<1x2x2xf16>
return
}
}
```
---------
Co-authored-by: Kai Sasaki <lewuathe at gmail.com>
Commit: 439de05848b22e76d4fb377ef28587b3eba2a4c5
https://github.com/llvm/llvm-project/commit/439de05848b22e76d4fb377ef28587b3eba2a4c5
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Rename function name to start with prefix vpreduce for consistency. (NFC)
Commit: a565f9eb2997ab1614cad326b93ab21810e39f32
https://github.com/llvm/llvm-project/commit/a565f9eb2997ab1614cad326b93ab21810e39f32
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] The test for vp.reduce.fminimum/fmaximum with fixed-length should stay in fixed-vectors-reduction-fp-vp.ll. (NFC)
Commit: 01cc1d13cd0c54bd4c29185b052fa5c16285dca7
https://github.com/llvm/llvm-project/commit/01cc1d13cd0c54bd4c29185b052fa5c16285dca7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Use Priv tablegen class for sf.cease instruction.
The encoding for sf.cease is only one bit different than wfi which
I believe was an intentional choice. wfi uses the Priv class so
this makes them consistent.
Commit: c53eb93dd7e93988b8456d317e3ebffa0c809fb9
https://github.com/llvm/llvm-project/commit/c53eb93dd7e93988b8456d317e3ebffa0c809fb9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
A llvm/test/CodeGen/Thumb2/peephole-opt-check-reg-sequence-compose-supports-subreg-index.ll
Log Message:
-----------
PeepholeOpt: Immediately check if a reg_sequence compose supports a subregister (#128279)
This is a quick fix for EXPENSIVE_CHECKS bot failures. I still think we
could
defer looking for a compatible subregister further up the use-def chain,
and
should be able to check compatibilty with the ultimate found source.
Commit: 8fc8a84e23471fe56214e68706addc712b5a2949
https://github.com/llvm/llvm-project/commit/8fc8a84e23471fe56214e68706addc712b5a2949
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Allow breaking before kw___attribute (#128623)
Fixes #74784
Commit: 31897e651a1aa69207806d497a7080e252c53ebe
https://github.com/llvm/llvm-project/commit/31897e651a1aa69207806d497a7080e252c53ebe
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/LTO/X86/coro.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
Log Message:
-----------
[LTO][Pipelines][Coro] De-duplicate Coro passes (#128654)
```
if (!isLTOPostLink(Phase))
CoroPM.addPass(CoroEarlyPass());
if (!isLTOPreLink(Phase))
// Other Coro passes
```
Followup to #126168.
Commit: 852923822fd085d304988c24f9b02edebe5e7903
https://github.com/llvm/llvm-project/commit/852923822fd085d304988c24f9b02edebe5e7903
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
Log Message:
-----------
[AMDGPU][NewPM] Port AMDGPUInsertDelayAlu to NPM (#128003)
Commit: 472ea0b7821fa8054906c7477e6089f2aa8e3a67
https://github.com/llvm/llvm-project/commit/472ea0b7821fa8054906c7477e6089f2aa8e3a67
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Merge some of the Sifive decoder tables. (#128794)
This makes a single table for vector and another table for system. I
left sf.cease out of system because its not in custom encoding space.
The other system instructions are in the custom part of OPC_SYSTEM.
Commit: e927cf6653a9df804ca0556d8a5985f86ed9147c
https://github.com/llvm/llvm-project/commit/e927cf6653a9df804ca0556d8a5985f86ed9147c
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128… (#128662)
…471)"
Reland https://github.com/llvm/llvm-project/pull/128471
The Passes library was not linked in earlier.
Commit: e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
https://github.com/llvm/llvm-project/commit/e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
Reverts llvm/llvm-project#128662
Still a link error.
Commit: 98542a3d6d087e1baf6c90d134140e2ed858f823
https://github.com/llvm/llvm-project/commit/98542a3d6d087e1baf6c90d134140e2ed858f823
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/Vector/vector-gather-lowering.mlir
Log Message:
-----------
[mlir][Vector] Move vector.extract canonicalizers for DenseElementsAttr to folders (#127995)
This PR moves vector.extract canonicalizers for DenseElementsAttr (splat
and non splat case) to folders. Folders are local, and it's always
better to implement a folder than a canonicalization pattern.
This PR is mostly NFC-ish, because the functionality mostly remains
same, but is now run as part of a folder, which is why some tests are
changed, because GreedyPatternRewriter tries to fold by default.
There is also a test change which makes the indices of a vector.extract
test dynamic. This is so that it doesn't fold away after this pr.
Commit: b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
https://github.com/llvm/llvm-project/commit/b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/X86/inline-asm-assertion.ll
Log Message:
-----------
VirtRegRewriter: Fix verifier errors after regalloc failures (#128280)
Commit: 75aff78f64d2f915b38be1c3635eb6f0f9911514
https://github.com/llvm/llvm-project/commit/75aff78f64d2f915b38be1c3635eb6f0f9911514
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
Log Message:
-----------
RegAllocFast: Fix verifier errors after assigning to reserved registers (#128281)
Commit: fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
https://github.com/llvm/llvm-project/commit/fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NewPM] Port RegAllocGreedy to NPM (#119540)
Leaving out NPM command line support for the next patch.
Commit: 8dd609598e498faa34c7bdb777718d6c6622fa27
https://github.com/llvm/llvm-project/commit/8dd609598e498faa34c7bdb777718d6c6622fa27
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Support/Unix/Program.inc
M llvm/test/tools/llvm-rc/windres-preproc.test
Log Message:
-----------
Support: Do not check if a file exists before executing (#128821)
Let the actual syscall error if the file doesn't exist. This produces
a more standard "no such file or directory" phrasing of the error
message,
and avoids an extra step.
The same antipattern appears in the windows code, we should probably
fix that one too.
Commit: 3f648992bf317a3496c4d137374d2c1532423d1c
https://github.com/llvm/llvm-project/commit/3f648992bf317a3496c4d137374d2c1532423d1c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
Log Message:
-----------
[clang][bytecode] Fix initing incomplete arrays from ImplicitValueIni… (#128729)
…tExpr
If the ImplicitValueInitExpr is of incomplete array type, we ignore it
in its Visit function. This is a special case here, so pull out the
element type and zero the elements.
Commit: 29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
https://github.com/llvm/llvm-project/commit/29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Add baseline tests for bitcast + readlane intrinsics (#128493)
Commit: 2015626783aa7510ccdf6098f2112417cf56a8d0
https://github.com/llvm/llvm-project/commit/2015626783aa7510ccdf6098f2112417cf56a8d0
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2918 'Consideration of constraints for address of overloaded function' (#127773)
Closes https://github.com/llvm/llvm-project/issues/122523
Commit: cdfcce48d5c290a77ab868fb62c18f6ba16e58df
https://github.com/llvm/llvm-project/commit/cdfcce48d5c290a77ab868fb62c18f6ba16e58df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Passes/MachinePassRegistry.def
Log Message:
-----------
[Passes] Fix a warning
This patch fixes:
llvm/include/llvm/Passes/MachinePassRegistry.def:202:6: error:
lambda capture 'PB' is not used [-Werror,-Wunused-lambda-capture]
Commit: a522c227a1d7d5dd4cd855a5fe4460193faf0856
https://github.com/llvm/llvm-project/commit/a522c227a1d7d5dd4cd855a5fe4460193faf0856
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-rewrite-subbyte-ext-and-trunci.mlir
Log Message:
-----------
[mlir][vector] Move tests for `rewriteAlignedSubByteInt{Ext|Trunc}` (nfc) (#126416)
Moves tests for `rewriteAlignedSubByteIntExt` and
`rewriteAlignedSubByteIntTrunc` into a dedicated files. Also adds +
fixes some comments.
This is merely for better organisation and so that it's easier to
identify the patterns and edge cases being tested.
Commit: ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
https://github.com/llvm/llvm-project/commit/ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Add scanning cache (#125988)
Previously, everytime we want to get a source file declaring a specific
module, we need to scan the whole projects again and again. The
performance is super bad. This patch tries to improve this by
introducing a simple cache.
Commit: 92d822245b0f034133fb958c1a067330236f9dea
https://github.com/llvm/llvm-project/commit/92d822245b0f034133fb958c1a067330236f9dea
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for vector sext & zext (#128835)
Commit: e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
https://github.com/llvm/llvm-project/commit/e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
Log Message:
-----------
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)" (#128400)
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)"
This reverts commit 0c50054820799578be8f62b6fd2cc3fbc751c01e.
Reapply with more fixes to avoid expensive_checks failures. Make sure to
call splitSeparateComponents after shrinkToUses, and update the VirtRegMap
with the split registers. Also set undef on all physical register aliases to
the assigned register.
Move physreg handling. Not sure if necessary
Remove intervals from regunits. Not sure if necessary
Commit: 1a114fa302b48fc761a58a8d3be5962d92fa581b
https://github.com/llvm/llvm-project/commit/1a114fa302b48fc761a58a8d3be5962d92fa581b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
A llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
R llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
Log Message:
-----------
RegAlloc: Use new approach to handling failed allocations (#128469)
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
Commit: d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
https://github.com/llvm/llvm-project/commit/d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
DAG: Preserve range metadata when load is narrowed (#128144)
In DAGCombiner.cpp preserve range metadata when load is narrowed to load
LSBs if original range metadata bounds can fit in the narrower type.
Utilize preserved range metadata to reduce 64-bit shl to 32-bit shl.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: b8d1f3d62746110ff0c969a136fc15f1d52f811d
https://github.com/llvm/llvm-project/commit/b8d1f3d62746110ff0c969a136fc15f1d52f811d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Fix an integer overflow issue in computing CTAD's parameter depth (#128704)
There were some cases where we computed incorrect template parameter
depths for synthesized CTAD, invalid as they might be, we still
shouldn't crash anyway.
Technically the only scenario in which the inner function template's
depth is 0 is when it lives within an explicit template specialization,
where the template parameter list is empty.
Fixes https://github.com/llvm/llvm-project/issues/128691
Commit: bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
https://github.com/llvm/llvm-project/commit/bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
Log Message:
-----------
[DWARFLinker] Avoid repeated hash lookups (NFC) (#128825)
Commit: e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
https://github.com/llvm/llvm-project/commit/e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated map lookups (NFC) (#128826)
Commit: 67d92cf3841660e9ba58a02223b7801e74db1051
https://github.com/llvm/llvm-project/commit/67d92cf3841660e9ba58a02223b7801e74db1051
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128827)
Commit: b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
https://github.com/llvm/llvm-project/commit/b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
Log Message:
-----------
[Passes] Avoid repeated hash lookups (NFC) (#128828)
Commit: e264b0e85627d52e2c696c99f8937f7612f00228
https://github.com/llvm/llvm-project/commit/e264b0e85627d52e2c696c99f8937f7612f00228
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProf.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#128829)
Commit: ec9c2935e19171ce8004e1d970f9b7bf068d92a7
https://github.com/llvm/llvm-project/commit/ec9c2935e19171ce8004e1d970f9b7bf068d92a7
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
Log Message:
-----------
[MLIR][Bufferization] Remove `GEN_PASS_DEF_BUFFERIZATIONBUFFERIZE` (#128842)
It was related to the old bufferization mechanism, which has since been
retired.
Commit: 2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
https://github.com/llvm/llvm-project/commit/2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] add missing header for RelayoutOptInterface
for a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Commit: 13245cea11050f875891389ce36115c78aaedd4a
https://github.com/llvm/llvm-project/commit/13245cea11050f875891389ce36115c78aaedd4a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Modernize ABI-based unwind plan creation (#128505)
Replace the by-ref return value with an actual result.
Commit: 5cbff437fadd4c2983fb73e727c82044ae269a6f
https://github.com/llvm/llvm-project/commit/5cbff437fadd4c2983fb73e727c82044ae269a6f
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/onehot_merge.ll
Log Message:
-----------
[InstCombine] Test for trunc to i1 in foldLogOpOfMaskedICmps.
Commit: a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
https://github.com/llvm/llvm-project/commit/a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
Log Message:
-----------
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors (#128830)
Follow up of
https://github.com/llvm/llvm-project/commit/ee52af74d8e5e3083cf5195d11c92f8df95b8072
Handles the multiple use come from different vectors:
https://godbolt.org/z/GMb3Endhr
Commit: 0ba2000b3cece317fd0ec6c433e49185885c4ef7
https://github.com/llvm/llvm-project/commit/0ba2000b3cece317fd0ec6c433e49185885c4ef7
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Enhance the conv2d verifier (#128693)
This commit adds additional checks to the conv2d verifier that check
error_if conditions from the tosa specification. Notably, it adds
padding, stride and dilation invalid value checking, output height and
width checking and bias size checking.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
https://github.com/llvm/llvm-project/commit/28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/udiv-pow2-vscale.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
Log Message:
-----------
[LLVM] Port a few InstCombine tests to use splat instead of shufflevector.
Commit: 575656877f1f42a4996a551caa7a2c9145810813
https://github.com/llvm/llvm-project/commit/575656877f1f42a4996a551caa7a2c9145810813
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
R llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE InstCombine tests.
Also removes a largely duplicate test file and changes the other
one to use autogenerated CHECK lines.
Commit: 6f2345a20e361c7748578b0c3bae37589989e3b8
https://github.com/llvm/llvm-project/commit/6f2345a20e361c7748578b0c3bae37589989e3b8
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
Log Message:
-----------
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
The affected tests were using the longwinded syntax for constant
splats. By using the splat() syntax the tests get simplified whilst
also removing the need for "undef".
Commit: 01371d64a91ed65d18670a1ee570058a0678ce0b
https://github.com/llvm/llvm-project/commit/01371d64a91ed65d18670a1ee570058a0678ce0b
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
M llvm/test/CodeGen/AArch64/sub-splat-sub.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-build-vector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
Using "poison" better reflects realworld generated IR. The main idioms
ported are:
* Inserting into an undefined vector.
* Vector splats.
* Masked load/gather operations with an undefined passthrough.
Commit: d5038b3774485d617e1300cf2f7b98c2460b9042
https://github.com/llvm/llvm-project/commit/d5038b3774485d617e1300cf2f7b98c2460b9042
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgcn/lib/SOURCES
R libclc/amdgcn/lib/math/ldexp.cl
A libclc/clc/include/clc/math/clc_ldexp.h
A libclc/clc/include/clc/math/clc_ldexp.inc
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_ldexp.cl
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_ldexp.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move __clc_ldexp to CLC library (#126078)
This function was already conceptually in the CLC namespace - this just
formally moves it over.
Note however that this commit marks a change in how libclc functions may
be overridden by targets.
Until now we have been using a purely build-system-based approach where
targets could register identically-named files which took responsibility
for the implementation of the builtin in its entirety.
This system wasn't well equipped to deal with AMD's overriding of
__clc_ldexp for only a subset of types, and furthermore conditionally on
a pre-defined macro.
One option for handling this would be to require AMD to duplicate code
for the versions of __clc_ldexp it's *not* interested in overriding. We
could also make it easier for targets to re-define CLC functions through
macros or .inc files. Both of these have obvious downsides. We could
also keep AMD's overriding in the OpenCL layer and bypass CLC
altogether, but this has limited use.
We could use weak linkage on the "base" implementations of CLC
functions, and allow targets to opt-in to providing their own
implementations on a much finer granularity. This commit supports this
as a proof of concept; we could expand it to all CLC builtins if
accepted.
Note that the existing filename-based "claiming" approach is still in
effect, so targets have to name their overrides differently to have both
files compiled. This could also be refined.
Commit: 178b9e5375dd42a4b590803a81b3831923288c91
https://github.com/llvm/llvm-project/commit/178b9e5375dd42a4b590803a81b3831923288c91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/linkonce.ll
Log Message:
-----------
[MergeFunc] Add linkonce test with discardable functions.
Commit: 900220d444257633cc7d1be1475d4da1be58e0ed
https://github.com/llvm/llvm-project/commit/900220d444257633cc7d1be1475d4da1be58e0ed
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
Log Message:
-----------
[CostModel] Handle vector struct results and cost `llvm.sincos` (#123210)
This patch updates the cost model to cost intrinsics that return
multiple values (in structs) correctly. Previously, the cost model only
thought intrinsics that return `VectorType` need scalarizing, which
meant it cost intrinsics that return multiple vectors (that need
scalarizing) way too cheap (giving it the cost of a single function
call).
This patch also adds a custom cost for llvm.sincos when a vector
function library is available, as certain VFs can be expanded (later in
code gen) to a vector function, reducing the cost to a single call (+
the possible loads from the vector function returns values via output
pointers).
Commit: 5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
https://github.com/llvm/llvm-project/commit/5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_ldexp.cl
Log Message:
-----------
[libclc] Make CLC library warning-free (#128864)
There is a long-standing workaround in the libclc build system that
silences a warning about the use of parentheses in bitwise conditional
operations.
In an effort to remove this workaround, this commit re-enables the
warning on the internal CLC library, where most of the bodies of the
builtins will eventually be defined. Thus as we move builtin
implementations into this library, the warnings will trigger and we can
clean up the codebase as we go.
As it happens the only instance in the CLC library which triggered the
warning was in __clc_ldexp.
Commit: 5231736329224fa3f812c22e1e5250e776956550
https://github.com/llvm/llvm-project/commit/5231736329224fa3f812c22e1e5250e776956550
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readfirstlane_b32 dst (#128851)
M0 can only be written to by the SALU, so `v_readfirstlane_b32 m0` is
effectively useless. Represent this by restricting the dest RC of that
instruction to `SReg_32_XM0` which excludes M0.
There is a lot of test changes due to the register class changing, but
most changes are trivial. In some cases, an extra register and
`s_mov_b32` is needed.
Fixes SWDEV-513269
Commit: a00586171cdf835148c66704a877740a9f742a3a
https://github.com/llvm/llvm-project/commit/a00586171cdf835148c66704a877740a9f742a3a
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
Log Message:
-----------
[clang-tidy]improve performance-unnecessary-value-param performance (#128383)
Tolerate fix-it breaking compilation when functions is used as pointers.
`isReferencedOutsideOfCallExpr` will visit the whole translate unit for
each matched function decls. It will waste lots of cpu time in some big
cpp files.
But the benefits of this validation are limited. Lots of function usage
are out of current translation unit.
After removing this validation step, the check profiling changes from
5.7 to 1.1 in SemaExprCXX.cpp, which is similar to version 18.
Commit: 8138d85f630726d2ddbf4a7950683c7db3853eb8
https://github.com/llvm/llvm-project/commit/8138d85f630726d2ddbf4a7950683c7db3853eb8
Author: David Tarditi <d_tarditi at apple.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
Log Message:
-----------
[analyzer] Update the undefined assignment checker diagnostics to not use the term 'garbage' (#126596)
A clang user pointed out that messages for the static analyzer undefined
assignment checker use the term ‘garbage’, which might have a negative
connotation to some users. This change updates the messages to use the
term ‘uninitialized’. This is the usual reason why a value is undefined
in the static analyzer and describes the logical error that a programmer
should take action to fix.
Out-of-bounds reads can also produce undefined values in the static
analyzer. The right long-term design is to have to the array bounds
checker cover out-of-bounds reads, so we do not cover that case in the
updated messages. The recent improvements to the array bounds checker
make it a candidate to add to the core set of checkers.
rdar://133418644
Commit: aace6a2f9d8bffd84a225ef76633421ff541a5d0
https://github.com/llvm/llvm-project/commit/aace6a2f9d8bffd84a225ef76633421ff541a5d0
Author: Luke Quinn <quic_lquinn at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqcia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the TD files associated and increments the Extension number in the clang driver. This is mostly a MC change as there is no other generated code for these instructions yet.
Signed-off-by: Luke Quinn <quic_lquinn at quicinc.com>
Commit: 0f0d3fb6b59b27628a05f2da536b0294c99d61bc
https://github.com/llvm/llvm-project/commit/0f0d3fb6b59b27628a05f2da536b0294c99d61bc
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readlane_b32 dst (#128867)
See #128851 - this is the same patch, but for v_readlane_b32.
This instruction is used much less often so there were less changes
required.
Commit: 83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
https://github.com/llvm/llvm-project/commit/83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove pointless check for subregister def (#128850)
Subregister defs are illegal in SSA
Commit: 3c4fa5a20aff390959385bf959a8c0b87e81d36c
https://github.com/llvm/llvm-project/commit/3c4fa5a20aff390959385bf959a8c0b87e81d36c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/metadata-call-arguments.ll
Log Message:
-----------
[MergeFunc] Add tests showing incorrect handling of metadata call args.
Commit: a5d8b7aeb6b360f20eec88715081ecfdb286b83d
https://github.com/llvm/llvm-project/commit/a5d8b7aeb6b360f20eec88715081ecfdb286b83d
Author: David Green <david.green at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
Log Message:
-----------
[AArch64] Improve urem by constant costs (#122236)
A urem by a constant, much like a udiv by a constant, can be expanded
into a series of mul/add/shift instructions. The exact sequence of
instructions depends on the constants and the types.
If the constant is a power-2 then a shift / and will be used, so the
cost will be 1. This canonicalization happens relatively early so this
likely has very little effect in practice (it does help the cost of
funnel shifts).
For a non-power 2 the code for div will expand to a series of UMULH +
Add + Shift + Add, depending on the constant. urem is generally udiv +
mul + sub, so involves a few extra instructions. The UMULH is not always
available, i32 will use umull+shift, and vector types will use
umull+shift or umull+umull2+uzp depending on the vector size. v2i64 will
be scalarized because there is no mul available. SVE does have a UMULH
instruction.
The end result is that the costs should be closer to reality, with
scalable types a little lower cost than the fixed-width versions. (In
the future we might be able to use umulh for fixed-width when the SVE
instruction is available, but for the moment this should favour scalable
vectorization a little).
I've tried to make this patch only apply to constant UREM/UDIV
instructions. SDIV and SREM are left until a later patch to prevent this
becoming too complex. The funnel shift costs are changing as it believes
it will need a urem to clamp the shift amount, which should be a power-2
value for most common types.
Commit: 15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
https://github.com/llvm/llvm-project/commit/15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/split-vector-insert.ll
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sve-aliasing.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll
M llvm/test/CodeGen/AArch64/sve-min-max-pred.ll
M llvm/test/CodeGen/AArch64/sve-pr92779.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-reassocadd.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-unaligned-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-combine-rshrnb.ll
M llvm/test/CodeGen/AArch64/sve2-rsh.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
Currently, given:
```cpp
svuint8_t foo(uint8_t *x) {
return svld1(svptrue_b8(), x);
}
```
We generate:
```gas
foo:
ptrue p0.b
ld1b { z0.b }, p0/z, [x0]
ret
```
However, on little-endian and with unaligned memory accesses allowed, we
could instead be using LDR as follows:
```gas
foo:
ldr z0, [x0]
ret
```
The second form avoids the predicate dependency.
Likewise for other types and stores.
Commit: 4277c21059a80fdd915aef9abd7be3d2b161f1b0
https://github.com/llvm/llvm-project/commit/4277c21059a80fdd915aef9abd7be3d2b161f1b0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Introduce explicit broadcasts for live-ins. (#124644)
Add a new VPInstruction::Broadcast opcode and use it to materialize
explicit broadcasts of live-ins. The initial patch only materlizes the
broadcasts if the vector preheader dominates all uses that need it.
Later patches will pick the best valid insert point, thus retiring
implicit hoisting of broadcasts from VPTransformsState::get().
PR: https://github.com/llvm/llvm-project/pull/124644
Commit: 8634635d689c5a7adfb19cde4a313d7c02e95194
https://github.com/llvm/llvm-project/commit/8634635d689c5a7adfb19cde4a313d7c02e95194
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Stop reading uninitalized memory
Found by msan.
==8138==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x559016395beb in allocVirtRegUndef llvm/lib/CodeGen/RegAllocFast.cpp:1010:6
Commit: 0f6240c4ddc815283f7bd42fe80847295de4a92c
https://github.com/llvm/llvm-project/commit/0f6240c4ddc815283f7bd42fe80847295de4a92c
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseHLSL.cpp
M clang/test/SemaHLSL/cb_error.hlsl
Log Message:
-----------
[HLSL] Allow EmptyDecl in cbuffer/tbuffer (#128250)
We do handle EmptyDecls in codegen already as of #124886, but we were
blocking them in Sema. EmptyDecls tend to be caused by extra semicolons
which are not illegal.
Fixes #128238
Commit: 56379b29042db9dfc63e74f065cc50b7fb01eddf
https://github.com/llvm/llvm-project/commit/56379b29042db9dfc63e74f065cc50b7fb01eddf
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/bitset
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
Log Message:
-----------
Simplify flip() for std::bitset (#120807)
This PR simplifies the internal bitwise logic of the `flip()` function
for `std::bitset`.
Commit: 2c1df2206189be8550a0e36a39cc185e9e3e0051
https://github.com/llvm/llvm-project/commit/2c1df2206189be8550a0e36a39cc185e9e3e0051
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Fix 8634635d689c5a7adfb19cde4a313d7c02e95194 to not trip assertions
Commit: defe43bbffb0d25ec468f0e54b20548ec192ff90
https://github.com/llvm/llvm-project/commit/defe43bbffb0d25ec468f0e54b20548ec192ff90
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/abs.hlsl
Log Message:
-----------
Add unsigned integer overloads for abs (#128257)
This seems silly, but DXC supports unsigned integer versions of abs that
are just no-ops. This adds the overloads for source compatability
because apparently users actually use them...
Fixes #128249
Commit: 8dd8e5f7d692cc43f4322f04034f5c472381aa43
https://github.com/llvm/llvm-project/commit/8dd8e5f7d692cc43f4322f04034f5c472381aa43
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinTemplatesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[Clang] Add BuiltinTemplates.td to generate code for builtin templates (#123736)
This makes it significantly easier to add new builtin templates, since
you only have to modify two places instead of a dozen or so.
The `BuiltinTemplates.td` could also be extended to generate
documentation from it in the future.
Commit: 7f332423b090abb396adb078000e0fa4958306ea
https://github.com/llvm/llvm-project/commit/7f332423b090abb396adb078000e0fa4958306ea
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
Log Message:
-----------
[MemCpyOpt] Add stack move test with ret-only capture (NFC)
From:
https://github.com/llvm/llvm-project/pull/125880#issuecomment-2685231008
Commit: 1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
https://github.com/llvm/llvm-project/commit/1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86] Allow select(cond,pshufb,pshufb) -> or(pshufb,pshufb) fold to peek through bitcasts (#128876)
Peek through one use bitcasts and rescale the condition mask to a vXi8 type to allow more aggressive use of pshufb zeroing.
Commit: 35bf925f7ea95e71208a839cf4b02de2ee473f75
https://github.com/llvm/llvm-project/commit/35bf925f7ea95e71208a839cf4b02de2ee473f75
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RISCV] Delete dead COPYs to vmv0 during vmv0 elimination
This fixes a crash reported at
https://github.com/llvm/llvm-project/pull/126850#issuecomment-2685166388,
where we may leave around a COPY to vmv0 after peeking through it.
Even though the COPY is dead, there's no pass between vmv0 elimination
and regalloc that will delete it so regalloc will try to allocate
something for it.
The test showcasing this is added in vmv0-elimination.mir. Removing
the dead COPY results in changes in spills in the >= LMUL 16 VP tests,
but it's worth noting that these tests are very noisy and not
representative of real world code.
Commit: ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
https://github.com/llvm/llvm-project/commit/ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Make isValidLoopInterchangePermutation efficient (#128863)
Avoid doing dependency checks for the trivial case when size of `loops`
is 1.
Commit: fd08b0793fbb1729872a89ae9a7f1be662b4947f
https://github.com/llvm/llvm-project/commit/fd08b0793fbb1729872a89ae9a7f1be662b4947f
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Port 8dd8e5f7d692cc43f4322f04034f5c472381aa43
Commit: 5c8e22bb2653b5229cb90b9e28c4a19692a2445b
https://github.com/llvm/llvm-project/commit/5c8e22bb2653b5229cb90b9e28c4a19692a2445b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Export BuiltinTemplates.inc from clang:basic
Commit: 3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
https://github.com/llvm/llvm-project/commit/3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
Log Message:
-----------
Thread Safety Analysis: Handle address-of followed by dereference
Correctly analyze expressions where the address of a guarded variable is
taken and immediately dereferenced, such as (*(type-specifier *)&x).
Previously, such patterns would result in false negatives.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: de10e44b6fe7f3d3cfde3afd8e1222d251172ade
https://github.com/llvm/llvm-project/commit/de10e44b6fe7f3d3cfde3afd8e1222d251172ade
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Support warning on passing/returning pointers to guarded variables
Introduce `-Wthread-safety-pointer` to warn when passing or returning
pointers to guarded variables or guarded data. This is is analogous to
`-Wthread-safety-reference`, which performs similar checks for C++
references.
Adding checks for pointer passing is required to avoid false negatives
in large C codebases, where data structures are typically implemented
through helpers that take pointers to instances of a data structure.
The feature is planned to be enabled by default under `-Wthread-safety`
in the next release cycle. This gives time for early adopters to address
new findings.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: eeb8c2085fb96dbb59446ba1d142803b12a43e18
https://github.com/llvm/llvm-project/commit/eeb8c2085fb96dbb59446ba1d142803b12a43e18
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix a warning
This patch fixes:
llvm/lib/Target/X86/X86ISelLowering.cpp:47257:15: error: comparison
of integers of different signs: 'int' and 'size_t' (aka 'unsigned
long') [-Werror,-Wsign-compare]
Commit: 30b021ffa483e7c0ea9b3b0526eb4597b7e31486
https://github.com/llvm/llvm-project/commit/30b021ffa483e7c0ea9b3b0526eb4597b7e31486
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
Log Message:
-----------
[lldb] Deindent UnwindAssemblyInstEmulation (#128874)
by three levels using early returns/continues.
Commit: bb62af7d14f7fe1301311234352f9652d45ba354
https://github.com/llvm/llvm-project/commit/bb62af7d14f7fe1301311234352f9652d45ba354
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen for valu op (#124797)
true16 selection for valu ops, enable `real-true16` attribute and update
the codegen test
Commit: a955426a16bcbb9bf05eb0e3894663dff4983b00
https://github.com/llvm/llvm-project/commit/a955426a16bcbb9bf05eb0e3894663dff4983b00
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Handle UsingDirectiveDecls (#128888)
By ignoring them.
Commit: 15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
https://github.com/llvm/llvm-project/commit/15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
Log Message:
-----------
[lldb] Build the API unittests with -Wdocumentation (#128893)
The LLDB SB API headers should be -Wdocumentation clean as they might
get included by projects building with -Wdocumentation. Although I'd
love for all of LLDB to be clean, we're pretty far removed from that
goal. Until that changes, this PR will detect issues in the SB API
headers by including all the headers in the unittests (by including
LLDB/API.h) and building that with the warning, if the compiler supports
it.
rdar://143597614
Commit: 1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
https://github.com/llvm/llvm-project/commit/1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineOutliner.cpp
Log Message:
-----------
[MachineOutliner] Add skipModule call for opt-bisect-limit. (#128836)
Commit: 1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
https://github.com/llvm/llvm-project/commit/1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
Log Message:
-----------
[libc++][test] Augment ranges::{fill, fill_n, find} with missing tests (#121209)
libc++ currently has very limited test coverage for `std::ranges{fill, fill_n, find}`
with `vector<bool>::iterator` optimizations. Specifically, the existing tests for
`std::ranges::fill` only covers cases of 1 - 2 bytes, which is merely 1/8 to 1/4
of the `__storage_type` word size. This renders the tests insufficient to validate
functionality for whole words, with or without partial words (which necessitates at
least 8 bytes of data). Moreover, no tests were provided for `ranges::{find, fill_n}`
with `vector<bool>::iterator` optimizations. This PR fills in the gap.
Commit: 14da7d5c1fc64006f731d7715a523d59a9e501e2
https://github.com/llvm/llvm-project/commit/14da7d5c1fc64006f731d7715a523d59a9e501e2
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/hip-gz-options.hip
Log Message:
-----------
Match .exe on Windows (#128894)
If you have zlib (not standard) on Windows, this test runs, and it was
missing a match for the file extension on lld.
Commit: 6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
https://github.com/llvm/llvm-project/commit/6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/thread_limit_nvptx.c
M llvm/docs/NVPTXUsage.rst
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
M llvm/test/CodeGen/NVPTX/upgrade-nvvm-annotations.ll
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Convert vector function nvvm.annotations to attributes (#127736)
Replace some more nvvm.annotations with function attributes,
auto-upgrading the annotations as needed. These new attributes will be
more idiomatic and compile-time efficient than the annotations.
- !"maxntid[xyz]" -> "nvvm.maxntid"
- !"reqntid[xyz]" -> "nvvm.reqntid"
- !"cluster_dim_[xyz]" -> "nvvm.cluster_dim"
Commit: ffc5d2b5d46f979b41cfc822efe8017d919f3d58
https://github.com/llvm/llvm-project/commit/ffc5d2b5d46f979b41cfc822efe8017d919f3d58
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for ranges::swap_range algorithms (#121138)
This PR refactors tests for `ranges::swap_range`, `std::{swap_range,
iter_swap, swap}` algorithms to eliminate redundant code.
Commit: d7b3606f7f8665af6b16263c27b132966e0345b2
https://github.com/llvm/llvm-project/commit/d7b3606f7f8665af6b16263c27b132966e0345b2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
Log Message:
-----------
[libc++] Updates ostream's println LWG status. (#128214)
std::println was originally implemented with support for LWG4088 by
mistake (in 2fd4084fca0c).
The tests already validate the behaviour required by LWG4088.
Fixes: #118348
Commit: a841cf91b3e07000e4397f401630dbbd9556d1c2
https://github.com/llvm/llvm-project/commit/a841cf91b3e07000e4397f401630dbbd9556d1c2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/__ostream/print.h
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
Log Message:
-----------
[lib++][print] Don't pad the ostream output. (#128354)
Per [ostream.formatted.reqmts]/3 padding should only be done when
explicitly stated.
Fixes: #116054
Commit: 26be07b8511b703326f2e10864486b5bb9e76196
https://github.com/llvm/llvm-project/commit/26be07b8511b703326f2e10864486b5bb9e76196
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_string.h
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
Log Message:
-----------
[libc++][format] Disables narrow string to wide string formatters. (#128355)
Implements LWG3944: Formatters converting sequences of char to sequences
of wchar_t
Fixes: #105342
Commit: dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
https://github.com/llvm/llvm-project/commit/dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] fix test for true16 codegen valu op (#128905)
This is a NFC change. Update the test file and fix the build
https://github.com/llvm/llvm-project/pull/124797 is causing a build
issue
Commit: 8039f8e139aa52561d3482d61328fe7f370056e7
https://github.com/llvm/llvm-project/commit/8039f8e139aa52561d3482d61328fe7f370056e7
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
A llvm/test/MC/RISCV/xrivosvisni-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add assembler support for XRivosVisni (#128773)
This implements assembler support for the XRivosVisni custom/vendor
extension from Rivos Inc. which is defined in:
https://github.com/rivosinc/rivos-custom-extensions (See
src/xrivosvisni.adoc)
Codegen support will follow in separate changes.
Commit: f161b1b5265baadc443506b88bd1084adccaef90
https://github.com/llvm/llvm-project/commit/f161b1b5265baadc443506b88bd1084adccaef90
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for rotate and rotate_copy (#126458)
This PR refactors the tests and fix some problems:
- Refactor similar tests using `types::for_each` to remove redundant code;
- Explicitly include the missing header `type_algorithms.h` instead of relying
on a transitive include;
- Fix the incorrect constexpr declaration in `rotate.pass.cpp`, where
the `test()` function is incorrectly defined as `TEST_CONSTEXPR_CXX17`,
which is wrong since `std::rotate()` becomes constexpr only since C++20.
Commit: 8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
https://github.com/llvm/llvm-project/commit/8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Update MicroOpBufferSize in P400 & P600 scheduling models (#128786)
The numbers we previously picked for MicroOpBufferSize in both P400 and
P600's scheduling models turned out to be too conservative and didn't
properly reflect the characteristics of our microarchitectures. This
patch updates these numbers to be more faithful to our hardware.
This is unlikely to have any significant impact on MachineScheduler as
it only uses MicroOpBufferSize in few places. That said, it is supposed
to improve the accuracy of llvm-mca.
Commit: c0abae33d6e73356389295a6d897a21630fcff58
https://github.com/llvm/llvm-project/commit/c0abae33d6e73356389295a6d897a21630fcff58
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-private.mlir
Log Message:
-----------
[MLIR][OPENMP] Relax requirement about branches as terminator of private alloc (#128481)
Fixes #126966
Commit: 7ffeab3121c984cc00f79b0a78f372a4f7526e3b
https://github.com/llvm/llvm-project/commit/7ffeab3121c984cc00f79b0a78f372a4f7526e3b
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
Log Message:
-----------
[LLD][ELF] Generically report "address assignment did not converge" (#128774)
There are considerable number of changes done in the address assignment
fixed point loop, and errors in any of them could cause address
assignment not to converge. However, this is reported to the user as
either "thunk creation not converged" or "relaxation not converged".
We saw a confused bug about this in the wild when spilling failed to
converge. (I'm working on a fix for that.)
We may eventually want a complete reason system when reporting address
assignment taking too many passes, but in the interim it seems prudent
to generalize the error message to "address assignment did not
converge".
Commit: 7717a549e91c4fb554b78fce38e75b0147fb6cac
https://github.com/llvm/llvm-project/commit/7717a549e91c4fb554b78fce38e75b0147fb6cac
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/equal.h
M libcxx/include/__bit_reference
M libcxx/include/__vector/comparison.h
M libcxx/include/bitset
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::equal for vector<bool>::iterator (#121084)
This PR optimizes the performance of `std::ranges::equal` for
`vector<bool>::iterator`, addressing a subtask outlined in issue #64038.
The optimizations yield performance improvements of up to 188x for
aligned equality comparison and 82x for unaligned equality
comparison. Moreover, comprehensive tests covering up to 4 storage words
(256 bytes) with odd and even bit sizes are provided, which validate the
proposed optimizations in this patch.
Commit: 722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
https://github.com/llvm/llvm-project/commit/722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile72.f90
A flang/test/Semantics/modfile72.f90
Log Message:
-----------
[flang][Semantics] Ensure deterministic mod file output (#128655)
This PR adds a test to ensure deterministic ordering in `.mod` files. It
also includes related changes to prevent non-deterministic symbol
ordering caused by pointers outside the cooked source. This issue is
particularly noticeable when using Flang as a library and compiling the
same files multiple times.
Commit: 5d501c6137976ff1f14f3b0e2e593fb9740d0146
https://github.com/llvm/llvm-project/commit/5d501c6137976ff1f14f3b0e2e593fb9740d0146
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] RISCV -> RISC-V in RISCVUsage.rst. NFC (#128906)
Commit: 870b376f0059458df382de0f2cfa712a20e710dc
https://github.com/llvm/llvm-project/commit/870b376f0059458df382de0f2cfa712a20e710dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX] Support the CBufferLoadLegacy operation (#128699)
Fixes #112992
Commit: 317461ed61002de7f6e54ab0a26780c6d2726bb0
https://github.com/llvm/llvm-project/commit/317461ed61002de7f6e54ab0a26780c6d2726bb0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Avoid a std::string allocation for the help output (NFC)
Don't create a temporary `std::string` for the help output, just write
it to `llvm::outs()` directly.
Commit: 159b872b37363511a359c800bcc9230bb09f2457
https://github.com/llvm/llvm-project/commit/159b872b37363511a359c800bcc9230bb09f2457
Author: Vy Nguyen <vyng at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/lib/CMakeLists.txt
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/Telemetry/TelemetryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[llvm][telemetry]Change Telemetry-disabling mechanism. (#128534)
Details:
- Previously, we used the LLVM_BUILD_TELEMETRY flag to control whether
any Telemetry code will be built. This has proven to cause more nuisance
to both users of the Telemetry and any further extension of it. (Eg., we
needed to put #ifdef around caller/user code)
- So the new approach is to:
+ Remove this flag and introduce LLVM_ENABLE_TELEMETRY which would be
true by default.
+ If LLVM_ENABLE_TELEMETRY is set to FALSE (at buildtime), the library
would still be built BUT Telemetry cannot be enabled. And no data can be
collected.
The benefit of this is that it simplifies user (and extension) code
since we just need to put the check on Config::EnableTelemetry. Besides,
the Telemetry library itself is very small, hence the additional code to
be built would not cause any difference in build performance.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: 4059faf61355f15818d4bb800e8a3337658f3b97
https://github.com/llvm/llvm-project/commit/4059faf61355f15818d4bb800e8a3337658f3b97
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Update comment for size of NumToSkip field in DecoderEmitter. NFC
NumToSkip is 24 bits. It used to be 16 bits.
Commit: 5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
https://github.com/llvm/llvm-project/commit/5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Telemetry/Telemetry.h
Log Message:
-----------
[Telemetry] Fix a warning
This patch fixes:
llvm/include/llvm/Telemetry/Telemetry.h:66:8: error:
'llvm::telemetry::Config' has virtual functions but non-virtual
destructor [-Werror,-Wnon-virtual-dtor]
Commit: 74306afe87b85cb9b5734044eb6c74b8290098b3
https://github.com/llvm/llvm-project/commit/74306afe87b85cb9b5734044eb6c74b8290098b3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Fix the schedule of vectorizer improvement monthly sync
Commit: c690b3065d58168c2da0b580cfd770ea256d2f82
https://github.com/llvm/llvm-project/commit/c690b3065d58168c2da0b580cfd770ea256d2f82
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Port 128541 (#128809)
Commit: 1be48fdf8bb25f82889aa75ca130e7aaf86295fe
https://github.com/llvm/llvm-project/commit/1be48fdf8bb25f82889aa75ca130e7aaf86295fe
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
Log Message:
-----------
[mlir][TosaToLinalg] Fix TosaToLinalg to restrict `tosa.cast` types to integer or float (#128859)
This PR fixes a bug where `TosaToLinalg` incorrectly allows `tosa.cast`
to accept types other than integer or float.
Fixes #116342.
Commit: f6703a4ff56972ed6bd1693cdb51cc3bd5848582
https://github.com/llvm/llvm-project/commit/f6703a4ff56972ed6bd1693cdb51cc3bd5848582
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-block-inline.ll
Log Message:
-----------
[ctxprof] don't inline weak symbols after instrumentation (#128811)
Contextual profiling identifies functions by GUID. Functions that may get overridden by the linker with a prevailing copy may have, during instrumentation, different variants in different modules. If these variants get inlined before linking (here I assume thinlto), they will identify themselves to the ctxprof runtime as their GUID, leading to issues - they may have different counter counts, for instance.
If we block their inlining in the pre-thinlink compilation, only the prevailing copy will survive post-thinlink and the confusion is avoided.
The change introduces a small pass just for this purpose, which marks any symbols that could be affected by the above as `noinline` (even if they were `alwaysinline`). We already carried out some inlining (via the preinliner), before instrumenting, so technically the `alwaysinline` directives were honored.
We could later (different patch) choose to mark them back to their original attribute (none or `alwaysinline`) post-thinlink, if we want to - but experimentally that doesn't really change much of the performance of the instrumented binary.
Commit: cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
https://github.com/llvm/llvm-project/commit/cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Port 8dd8e5f7d692 (BuiltinTemplates.td)
Commit: 1e246704e23e3dcae16adbf68cc10b668a8db680
https://github.com/llvm/llvm-project/commit/1e246704e23e3dcae16adbf68cc10b668a8db680
Author: John Harrison <harjohn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Use existing lldb::IOObjectSP for DAP IO (NFC). (#128750)
This simplifies the IOStream.cpp implementation by building on top of
the existing lldb::IOObjectSP.
Additionally, this should help ensure clients connected of a
`--connection` specifier properly detect shutdown requests when the
Socket is closed. Previously, the StreamDescriptor was just accessing
the underlying native handle and was not aware of the `Close()` call to
the Socket itself.
This is both nice to have for simplifying the existing code and this
unblocks an upcoming refactor to support the cancel request.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 2c36411ed26e9ad0cc7e20bac11a34461682bccf
https://github.com/llvm/llvm-project/commit/2c36411ed26e9ad0cc7e20bac11a34461682bccf
Author: elhewaty <mohamedatef1698 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/forward_list
M libcxx/include/list
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
Log Message:
-----------
[libcxx] Add LWG4135: The helper lambda of std::erase for list should specify return type as bool (#128358)
Fixes https://github.com/llvm/llvm-project/issues/118355
Commit: be28365ca78ed305c66b824075323e839f042e4a
https://github.com/llvm/llvm-project/commit/be28365ca78ed305c66b824075323e839f042e4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Generate check lines for if-conversion.ll
The limited check lines make it difficult to reason about test changes
in https://github.com/llvm/llvm-project/pull/128375.
Commit: ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
https://github.com/llvm/llvm-project/commit/ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Change zero points of convolution ops to required inputs (#127679)
This patch changes the input_zp and weight_zp for convolution operators
to be required inputs
in order to align with the TOSA Spec 1.0.
Convolution operators affected are:
CONV2D, CONV3D, DEPTHWISE_CONV2D, and TRANSPOSE_CONV2D.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 177ede2122b8a913b1a86d86cb3acf17cdd93a86
https://github.com/llvm/llvm-project/commit/177ede2122b8a913b1a86d86cb3acf17cdd93a86
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Rename ReduceProd to ReduceProduct (#128751)
This patch renames TOSA ReduceProd operator to ReduceProduct to align
with the TOSA Spec 1.0
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
https://github.com/llvm/llvm-project/commit/579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for stdbit functions (#128934)
Adds targets for the stdbit functions. Since the names follow a strict
pattern, this is done via list comprehensions. I don't want to handwrite
all 50.
Commit: 7b6abd827ff25eacdea14a09d1b74e0eeece854a
https://github.com/llvm/llvm-project/commit/7b6abd827ff25eacdea14a09d1b74e0eeece854a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Remove stray check lines after be28365ca78.
Commit: 364b97f23b4de7732179023220ff23a24bec4919
https://github.com/llvm/llvm-project/commit/364b97f23b4de7732179023220ff23a24bec4919
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
A llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/spillv16.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] 16bit spill support in true16 mode (#128060)
Enables 16-bit values to be spilled to scratch.
Note, the memory instructions used are defined as reading and writing
VGPR_32, but do not clobber the unspecified 16-bits of those registers,
and so spills and reloads of lo and hi halves of the registers work.
Commit: 7f482aa848c5f136d2b32431f91f88492c78c709
https://github.com/llvm/llvm-project/commit/7f482aa848c5f136d2b32431f91f88492c78c709
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-debug-dir.c
Log Message:
-----------
[clang modules] Setting `DebugCompilationDir` when it is safe to ignore current working directory (#128446)
This PR explicitly sets `DebugCompilationDir` to the system's root
directory if it is safe to ignore the current working directory.
This fixes a problem where a PCM file's embedded debug information can
lead to compilation failure. The compiler may have decided it is indeed
safe to ignore the current working directory. In this case, the PCM
file's content is functionally correct regardless of the current working
directory because no inputs use relative paths (see
https://github.com/llvm/llvm-project/pull/124786). However, a PCM may
contain debug info. If debug info is requested, the compiler uses the
current working directory value to set `DW_AT_comp_dir`. This may lead
to the following situation:
1. Two different compilations need the same PCM file.
2. The PCM file is compiled assuming a working directory, which is
embedded in the debug info, but otherwise has no effect.
3. The second compilation assumes a different working directory, and
expects an identically-sized pcm file. However, it cannot find such a
PCM, because the existing PCM file has been compiled assuming a
different `DW_AT_comp_dir `, which is embedded in the debug info.
This PR resets the `DebugCompilationDir` if it is functionally safe to
ignore the working directory so the above situation is avoided, since
all debug information will share the same working directory.
rdar://145249881
Commit: 418a9872851ef5342b29baa36dd672129f129953
https://github.com/llvm/llvm-project/commit/418a9872851ef5342b29baa36dd672129f129953
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
Log Message:
-----------
[SLP]Do not use node, if it is a subvector or buildvector node
If the buildvector has some matches with another node, which is
a subvector of another buildvector node, need to check for this and
cancel matching to avoid incorrect ordering of the nodes.
Fixes #128770
Commit: eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
https://github.com/llvm/llvm-project/commit/eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add more math intrinsic interfaces in cudadevice (#128931)
Commit: 7371f691b97986fd3f32d8618131ca40788c7b8b
https://github.com/llvm/llvm-project/commit/7371f691b97986fd3f32d8618131ca40788c7b8b
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
Log Message:
-----------
[MLIR][Vector]: Generalize conversion of `vector.insert` to LLVM in line with `vector.extract` (#128915)
This is doing the same as
https://github.com/llvm/llvm-project/pull/117731 did for
`vector.extract`, but for `vector.insert`.
It is a bit more complicated as the insertion destination may itself
need to be extracted.
As the test shows, this fixes two previously unsupported cases:
- Dynamic indices
- 0-D vectors.
---------
Signed-off-by: Benoit Jacob <jacob.benoit.1 at gmail.com>
Commit: 42526d240cc953963ea48bae0b4c2ab548e9d897
https://github.com/llvm/llvm-project/commit/42526d240cc953963ea48bae0b4c2ab548e9d897
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
A mlir/test/Dialect/AMDGPU/amdgpu-resolve-strided-metadata.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Plumb address space 7 through MLIR, add address_space attr. (#125594)
This commit adds support for casting memrefs into fat raw buffer
pointers to the AMDGPU dialect.
Fat raw buffer pointers - or, in LLVM terms, ptr addrspcae(7), allow
encapsulating a buffer descriptor (as produced by the make.buffer.rsrc
intrinsic or provided from some API) into a pointer that supports
ordinary pointer operations like load or store. This allows people to
take advantage of the additional semantics that buffer_load and similar
instructions provide without forcing the use of entirely separate
amdgpu.raw_buffer_* operations.
Operations on fat raw buffer pointers are translated to the
corresponding LLVM intrinsics by the backend.
This commit also goes and and defines a #amdgpu.address_space<>
attribute so that AMDGPU-specific memory spaces can be represented. Only
#amdgpu.address_space<fat_raw_buffer> will work correctly with the
memref dialect, but the other possible address spaces are included for
completeness.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Co-authored-by: Prashant Kumar <pk5561 at gmail.com>
Commit: 469757efafebdd5772d993fca4dc0dfa7cbda17c
https://github.com/llvm/llvm-project/commit/469757efafebdd5772d993fca4dc0dfa7cbda17c
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)
Since LowerBufferFatPointers runs before PreISelIntrinsicLowering, which
normally handles unsupported memcpy()s,, and since you can't have a
`noalias {ptr addrspace(8), i32}` becasue it crashes later passes,
manually expand memcpy()s involving buffer fat pointers to loops.
Additionally, though they're unlikely to be used, this commit adds
support for memset().
This commit doesn't implement writing direct-to-LDS loads as the
intrinsics, but leaves the option in the future.
Commit: 147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
https://github.com/llvm/llvm-project/commit/147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
Log Message:
-----------
[WebAssemblyLowerEmscriptenEHSjLj] Avoid setting import_name where possible (#128564)
This change effectively reverts 296ccef
(https://reviews.llvm.org/D77192)
Most of these symbols are just normal C symbols that get imported from
wither libcompiler-rt or from emscripten's JS library code. In most
cases it should not be necessary to give them explicit import names.
The advantage of doing this is that we can wasm-ld can/will fail with a
useful error message when these symbols are missing. As opposed to today
where it will simply import them and defer errors until later (when they
are less specific).
Commit: 02128342d2818e5a65846fec4179ed5344045102
https://github.com/llvm/llvm-project/commit/02128342d2818e5a65846fec4179ed5344045102
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
Revert "DAG: Preserve range metadata when load is narrowed" (#128948)
Reverts llvm/llvm-project#128144
Breaks clang prod x64 build (seen in Fuchsia toolchain)
Commit: 39bab1de33333ee3c62b586c4e8d26f8c443bc60
https://github.com/llvm/llvm-project/commit/39bab1de33333ee3c62b586c4e8d26f8c443bc60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
Log Message:
-----------
[SLP]Check if the operand for removal is the reduction operand, awaiting for the reduction
If the operand of the instruction-to-be-removed is a reduction value,
which is not reduced yet, and, thus, it has no users, it may be removed
during operands analysis.
Fixes #128736
Commit: 8fb88f568011fb916cda9d7927ac97c6751a8b89
https://github.com/llvm/llvm-project/commit/8fb88f568011fb916cda9d7927ac97c6751a8b89
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/test/Modules/Inputs/export_as_test.modulemap
M clang/test/Modules/diagnostics.modulemap
M clang/test/Modules/export_as_test.c
Log Message:
-----------
[clang][modules] Separate parsing of modulemaps (#119740)
This separates out parsing of modulemaps from updating the
`clang::ModuleMap` information.
Currently this has no effect other than slightly changing diagnostics.
Upcoming changes will use this to allow searching for modules without
fully processing modulemaps.
This creates a new `modulemap` namespace because there are too many
things called ModuleMap* right now that mean different things. I'd like
to clean this up, but I'm not sure yet what I want to call everything.
This also drops the `SourceLocation` from `moduleMapFileRead`. This is
never used in tree, and in future patches I plan to make the modulemap
parser use a different `SourceManager` so that we can share modulemap
parsing between `CompilerInstance`s. This will make the `SourceLocation`
meaningless.
Commit: d584d1f188553b6cb417beb903f58d763c265380
https://github.com/llvm/llvm-project/commit/d584d1f188553b6cb417beb903f58d763c265380
Author: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call (#128626)
Currently, the llvm importer can only cover intrinsics that have a first
class representation in an MLIR dialect (arm-neon, etc). This PR
introduces a fallback mechanism that allow "unregistered" intrinsics to
be imported by using the generic `llvm.intrinsic_call` operation. This
is useful in several ways:
1. Allows round-trip the LLVM dialect output lowered from other dialects
(example: ClangIR)
2. Enables MLIR-linking tools to operate on imported LLVM IR without
requiring to add new operations to dozen of different targets (cc
@xlauko @smeenai).
If multiple dialects implement this interface hook, the last one to
register is the one converting all unregistered intrinsics.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 1559a65efaf327f9c72e14d4bb1834f076e7fc20
https://github.com/llvm/llvm-project/commit/1559a65efaf327f9c72e14d4bb1834f076e7fc20
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
R llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
R llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Revert "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)"
This reverts commit 469757efafebdd5772d993fca4dc0dfa7cbda17c.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/126621
Commit: ff80bdcf734909ac837e88cafdfc1b5d66845a98
https://github.com/llvm/llvm-project/commit/ff80bdcf734909ac837e88cafdfc1b5d66845a98
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
Log Message:
-----------
[RISCV] Adding missing P600 sched model test for RVV segmented loads/stores
This is the P600 counterpart of
`test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s`.
Commit: effd7f04b678b4be1a77ae1f12f2b64469c8fa04
https://github.com/llvm/llvm-project/commit/effd7f04b678b4be1a77ae1f12f2b64469c8fa04
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
Log Message:
-----------
[gn build] Port 8fb88f568011
Commit: f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
https://github.com/llvm/llvm-project/commit/f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] truncate/ftruncate interception. (#128904)
Commit: 26ac7429d1d6aed080430e8f5d890531b1054f2d
https://github.com/llvm/llvm-project/commit/26ac7429d1d6aed080430e8f5d890531b1054f2d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] std::move matchings (NFC) (#128933)
We do not use Matchings after we call try_emplace, so we can just
std::move Matchings.
Commit: 524711c344b413d5c25d4bed1175d58670ab1720
https://github.com/llvm/llvm-project/commit/524711c344b413d5c25d4bed1175d58670ab1720
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for strfrom<float> (#128956)
Add targets and tests for strfromf, strfromd and strfroml.
No idea why the standard committee decided that the long double function
should be "strfroml" instead of "strfromld" which would match "strtold"
and leave them space to add string from integer functions in future.
Commit: 829e2a55261890e15102d978f714001a2d1acf85
https://github.com/llvm/llvm-project/commit/829e2a55261890e15102d978f714001a2d1acf85
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/enumeration.py
R libc/utils/hdrgen/function.py
R libc/utils/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/__init__.py
A libc/utils/hdrgen/hdrgen/enumeration.py
A libc/utils/hdrgen/hdrgen/function.py
A libc/utils/hdrgen/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/hdrgen/macro.py
A libc/utils/hdrgen/hdrgen/main.py
A libc/utils/hdrgen/hdrgen/object.py
A libc/utils/hdrgen/hdrgen/type.py
A libc/utils/hdrgen/hdrgen/yaml_functions_sorted.py
A libc/utils/hdrgen/hdrgen/yaml_to_classes.py
R libc/utils/hdrgen/header.py
R libc/utils/hdrgen/macro.py
M libc/utils/hdrgen/main.py
R libc/utils/hdrgen/object.py
R libc/utils/hdrgen/type.py
R libc/utils/hdrgen/yaml_functions_sorted.py
M libc/utils/hdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][hdrgen] Allow to treat hdrgen Python code as a Python module. (#128955)
Move the hdrgen code under a subdirectory to treat it as a Python
module.
This mimics the structure used by llvm/utils/lit and
llvm/utils/mlgo-utils and simplifies integration of hdrgen to the build
system which rely on Python modules. In addition to that, it clarifies
which imports are coming from the hdrgen-specific helpers (e.g. "from
type import ..." becomes "from hdrgen.type import ...".
Leave the entrypoints (top-level main.py and yaml_to_classes.py) as-is:
they can keep being referred by the CMake build system w/o any changes.
Commit: d708bfb3c0be7ffdba384eff15cd329863568453
https://github.com/llvm/llvm-project/commit/d708bfb3c0be7ffdba384eff15cd329863568453
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
A llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
Log Message:
-----------
AMDGPU: Fix si-fix-sgpr-copies asserting on VReg_1 phi (#128903)
Commit: 2761d4ca828a557d0bdd20259d60b486d360d998
https://github.com/llvm/llvm-project/commit/2761d4ca828a557d0bdd20259d60b486d360d998
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
R mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
Revert "[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call" (#128973)
Reverts llvm/llvm-project#128626
Looks like the static definition broke some bots!
Co-authored-by: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Commit: f409340cc217c55c3960a375054a17b2bc927e53
https://github.com/llvm/llvm-project/commit/f409340cc217c55c3960a375054a17b2bc927e53
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Return an llvm::Error instead of calling exit directly (NFC) (#128951)
Return an `llvm::Error` from `LaunchRunInTerminalTarget` instead of
calling `exit()` directly.
Commit: 4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
https://github.com/llvm/llvm-project/commit/4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
Log Message:
-----------
AMDGPU: Do not try to commute instruction with same input register (#127562)
There's little point to trying to commute an instruction if the
two operands are already the same.
This avoids an assertion in a future patch, but this likely isn't the
correct fix. The worklist management in SIFoldOperands is dodgy, and
we should probably fix it to work like PeepholeOpt (i.e. stop looking
at use lists, and fold from users). This is an extension of the already
handled special case which it's trying to avoid folding an instruction
which is already being folded.
Commit: a3165398db0736588daedb07650195502592e567
https://github.com/llvm/llvm-project/commit/a3165398db0736588daedb07650195502592e567
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
Log Message:
-----------
AMDGPU: Fix overly conservative immediate operand check (#127563)
The real legality check is peformed later anyway, so this was
unnecessarily blocking immediate folds in handled cases.
This also stops folding s_fmac_f32 to s_fmamk_f32 in a few tests,
but that seems better. The globalisel changes look suspicious,
it may be mishandling constants for VOP3P instructions.
Commit: c8f70d7286db0eb54b001a6621a863b96c006e45
https://github.com/llvm/llvm-project/commit/c8f70d7286db0eb54b001a6621a863b96c006e45
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/partial-reinitialization2.c
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
A clang/test/OpenMP/amdgcn_sret_ctor.cpp
Log Message:
-----------
[clang][CodeGen] Additional fixes for #114062 (#128166)
This addresses two issues introduced by moving indirect args into an
explicit AS (please see
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2659829790>
and
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2661158477>):
1. Unconditionally stripping casts from a pre-allocated return slot was
incorrect / insufficient (this is illustrated by the
`amdgcn_sret_ctor.cpp` test);
2. Putting compiler manufactured sret args in a non default AS can lead
to a C-cast (surprisingly) requiring an AS cast (this is illustrated by
the `sret_cast_with_nonzero_alloca_as.cpp test).
The way we handle (2), by subverting CK_BitCast emission iff a sret arg
is involved, is quite naff, but I couldn't think of any other way to use
a non default indirect AS and make this case work (hopefully this is a
failure of imagination on my part).
Commit: 2d585ccecc45d84483ce8a7e26dbf455e9ba3798
https://github.com/llvm/llvm-project/commit/2d585ccecc45d84483ce8a7e26dbf455e9ba3798
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug that changes keyword `or` to an identifier (#128410)
Fixes #105482
Commit: d29a1be94bc391205fa361f57f7fbc83c1e6f55a
https://github.com/llvm/llvm-project/commit/d29a1be94bc391205fa361f57f7fbc83c1e6f55a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't break before *const (#128817)
Fixes #28919
Commit: a2fac3f87be563cb588040c385f48b71cddf31e9
https://github.com/llvm/llvm-project/commit/a2fac3f87be563cb588040c385f48b71cddf31e9
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
Log Message:
-----------
[NFC] Fix Sanitizer breakage introduced in #128166 (#128990)
Remove accidental leftover unused variable.
Commit: 12c7908f67924809025c6bf669881c90322dbd57
https://github.com/llvm/llvm-project/commit/12c7908f67924809025c6bf669881c90322dbd57
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
Log Message:
-----------
[ORC] De-duplicate some logic for handling MachO::dylib-based load commands.
All such commands share a common struct layout, and we'll be introducing
another soon (LC_LOAD_WEAK_DYLIB). To avoid redundant specializations this
commit moves the logic for these commands into a common base class.
Commit: 2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
https://github.com/llvm/llvm-project/commit/2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Support adding LC_LOAD_WEAK_DYLIB commands to MachO JITDylib headers.
MachOPlatform synthesizes Mach headers for JITDylibs (see ef314d39b92). This
commit adds support for adding LC_LOAD_WEAK_DYLIB commands to these synthesized
headers (LC_LOAD_DYLIB was already supported previously).
Commit: 20cea4d410df8f92a8dc639c1747c238e1e3e65b
https://github.com/llvm/llvm-project/commit/20cea4d410df8f92a8dc639c1747c238e1e3e65b
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
Log Message:
-----------
[ORC] Sink include into implementation file.
TapiUniversal.h is only needed as an implementation detail.
Commit: 4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
https://github.com/llvm/llvm-project/commit/4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
M llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
M llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
Log Message:
-----------
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
Commit: 354eb88285c0d803b0674a3b2961b4109905383a
https://github.com/llvm/llvm-project/commit/354eb88285c0d803b0674a3b2961b4109905383a
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/examples/python/fzf_history.py
Log Message:
-----------
[lldb] Also show session history in fzf_history (#128986)
lldb's history log file is written to at the end of a debugging session.
As a result, the log does not contain commands run during the current
session.
This extends the `fzf_history` to include the output of `session
history`.
Commit: 363b05944f9212511ee6811d0eb1af841c177226
https://github.com/llvm/llvm-project/commit/363b05944f9212511ee6811d0eb1af841c177226
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)
The documents claims that it ignores sNaN, while in the current code it
may be different.
- as the finally callback, it use libc call fmin(3)/fmax(3). while C23
clarifies that fmin(3)/fmax(3) should return NaN for sNaN vs NUM.
- on some architectures, such as aarch64, it converts to `fmaxnm`, which
returns qNaN for sNaN vs NUM.
- on RISC-V (SPEC 2019+), it converts to `fmax`, which returns NUM for
sNaN vs NUM.
Since we have introduced llvm.minimumnum and llvm.maximumnum, which
follow IEEE 754-2019's minimumNumber/maximumNumber.
So, it's time for us to clarify llvm.minnum and llvm.maxnum. Since the
final fallback of llvm.minnum and llvm.maxnum is
fmin(3)/fmax(3), so that it is reasonable to follow the behaviors of
fmin(3)/fmax(3).
Although C23 clarified the behavior about sNaN and +0.0/-0.0:
(NUM or NaN) vs sNaN -> qNaN
+0.0 vs -0.0 -> either one of +0.0/-0.0
It is the same the IEEE754-2008's maxNUM and minNUM.
Not all implementation work as expected.
Since some architectures such as aarch64/MIPSr6/LoongArch, have
instructions that implements +0.0>-0.0.
So Let's define llvm.minnum and llvm.maxnum to IEEE754-2008 with
+0.0>-0.0.
The architectures without such instructions can implements `NSZ` flavor
to speed up,
and the frontend, such as clang, can call them with `nsz` attribute.
Commit: aef16edb26b2e255b6c2beda8f03a70505ffb22a
https://github.com/llvm/llvm-project/commit/aef16edb26b2e255b6c2beda8f03a70505ffb22a
Author: wheatfox <wheatfox17 at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
Log Message:
-----------
[mlir][Tosa] Add unreachable case for bad Extension type in TosaProfileCompliance (#128889)
add `llvm_unreachable` at the end of `getCooperativeProfiles` to
eliminate compiler warning of "control reaches end of non-void function"
Commit: eb1c3ace39644dbe24777a00ba4d879d23c7bb46
https://github.com/llvm/llvm-project/commit/eb1c3ace39644dbe24777a00ba4d879d23c7bb46
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-optin.ll
Log Message:
-----------
[ctxprof] Override type of instrumentation if `-profile-context-root` is specified (#128940)
This patch makes it easy to enable ctxprof instrumentation for targets where the build has a bunch of defaults for instrumented PGO that we want to inherit for ctxprof.
This is switching experimental defaults: we'll eventually enable ctxprof instrumentation through `PGOOpt` but that type is currently quite entangled and, for the time being, no point adding to that.
Commit: 5066d7b60186fe0d557223493a17c3aa9a06f58f
https://github.com/llvm/llvm-project/commit/5066d7b60186fe0d557223493a17c3aa9a06f58f
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/rv32xqccmp-invalid.s
A llvm/test/MC/RISCV/rv32xqccmp-valid.s
A llvm/test/MC/RISCV/rv64e-xqccmp-valid.s
A llvm/test/MC/RISCV/rv64xqccmp-invalid.s
A llvm/test/MC/RISCV/rv64xqccmp-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Xqccmp 0.1 Assembly Support (#128731)
Xqccmp is a new spec by Qualcomm that makes a vendor-specific effort to
solve the push/pop + frame pointers issue. Broadly, it takes the Zcmp
instructions and reverse the order they push/pop registers in, which
ends up matching the frame pointer convention.
This extension adds a new instruction not present in Zcmp,
`qc.cm.pushfp`, which will set `fp` to the incoming `sp` value after it
has pushed the registers.
This change duplicates the Zcmp implementation, with minor changes to
mnemonics (for the `qc.` prefix), predicates, and the addition of
`qc.cm.pushfp`. There is also new logic to prevent combining Xqccmp and
Zcmp. Xqccmp is kept separate to Xqci for decoding/encoding etc, as the
specs are separate today.
Specification:
https://github.com/quic/riscv-unified-db/releases/tag/Xqccmp_extension-0.1.0
Commit: 110b77f32859f39d253623153a37671f5601de65
https://github.com/llvm/llvm-project/commit/110b77f32859f39d253623153a37671f5601de65
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Handle floats in atomiccas (#128970)
Commit: 556eb8244201a81fff7b246561a677a782b69fa0
https://github.com/llvm/llvm-project/commit/556eb8244201a81fff7b246561a677a782b69fa0
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Function type return type improvements (#128787)
When a C or C++ function has a return type of `void`, the function type
is now represented in MLIR as having no return type rather than having a
return type of `!cir.void`. This avoids breaking MLIR invariants that
require the number of return types and the number of return values to
match.
Change the assembly format for `cir::FuncType` from having a leading
return type to having a trailing return type. In other words, change
```
!cir.func<!returnType (!argTypes)>
```
to
```
!cir.func<(!argTypes) -> !returnType)>
```
Unless the function returns `void`, in which case change
```
!cir.func<!cir.void (!argTypes)>
```
to
```
!cir.func<(!argTypes)>
```
Commit: 5f6a3e63a31aaebc620a18c47bc5590f6f705c98
https://github.com/llvm/llvm-project/commit/5f6a3e63a31aaebc620a18c47bc5590f6f705c98
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)
Commit: 5d404d75cf513f9926209b8dd515083226dae88f
https://github.com/llvm/llvm-project/commit/5d404d75cf513f9926209b8dd515083226dae88f
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Generalize handlePairwiseShadowOrIntrinsic, and handle x86 pairwise add/sub (#127567)
x86 pairwise add and sub are currently handled by applying the pairwise add intrinsic to the shadow (https://github.com/llvm/llvm-project/pull/124835), due to the lack of an x86 pairwise OR intrinsic. handlePairwiseShadowOrIntrinsic was added (https://github.com/llvm/llvm-project/pull/126008) to handle Arm
pairwise add, but assumes that the intrinsic operates on each pair of elements as defined by the LLVM type. In contrast, x86 pairwise add/sub may sometimes have e.g., <1 x i64> as a parameter but actually be operating on <2 x i32>.
This patch generalizes handlePairwiseShadowOrIntrinsic, to allow reinterpreting the parameters to be a vector of specified element size, and then uses this function to handle x86 pairwise add/sub.
Commit: 88ff6070a5211e0eebe9b614efbeae8082866d1a
https://github.com/llvm/llvm-project/commit/88ff6070a5211e0eebe9b614efbeae8082866d1a
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
APFloat: Fix maxnum and minnum with sNaN (#112854)
See: https://github.com/llvm/llvm-project/pull/112852
Fixes: https://github.com/llvm/llvm-project/issues/111991
We have reclarify llvm.maxnum and llvm.minnum to follow IEEE-754 2008's
maxNum and minNum with +0.0>-0.0.
So let's make APFloat::maxnum and APFloat::minnum to follow it, too.
Commit: 51a15d96fdb9818bf4e5439d4b551fc0950d3c69
https://github.com/llvm/llvm-project/commit/51a15d96fdb9818bf4e5439d4b551fc0950d3c69
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
Log Message:
-----------
[RISCV] Simplify createRISCVELFStreamer registration
Commit: 50b508cc7b2d95f92896df73f49063b5aafec43d
https://github.com/llvm/llvm-project/commit/50b508cc7b2d95f92896df73f49063b5aafec43d
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
Log Message:
-----------
[AMDGPU] Verify SdwaSel value range (#128898)
Make the MachineVerifier check that the value provided for an SDWA selection is a
valid value for the SdwaSel enum.
Commit: 7521207e415b19b2924930ac95c2fcf07d56f2f2
https://github.com/llvm/llvm-project/commit/7521207e415b19b2924930ac95c2fcf07d56f2f2
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] fix copy_file_range test. (#129010)
Passing Large File Support.
Address #125816
Commit: dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
https://github.com/llvm/llvm-project/commit/dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.td
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.h
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.td
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/RemoveShapeConstraints.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
Log Message:
-----------
[MLIR][NFC] Retire `let constructor` for Shape and MLProgram (#128869)
`let constructor` is legacy (do not use in tree!) since the table gen
backend emits most of the glue logic to build a pass. This PR retires
the td method for Shape and MLProgram
Commit: b38fdfc0f9bef696420a7d02fc1441416a146527
https://github.com/llvm/llvm-project/commit/b38fdfc0f9bef696420a7d02fc1441416a146527
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
Log Message:
-----------
[AArch64] Simplify ELFStreamer and WinCOFFStreamer
Commit: c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
https://github.com/llvm/llvm-project/commit/c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
Log Message:
-----------
[RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)
zext.w is only available on RV64.
We also never hoist UINT64_C(0xffffffff) on RV32, since the AND is
deleted by SelectionDAG after type legalization splits it.
Commit: 9a4320adb13b032a035f7c2ca5516202c4036d5c
https://github.com/llvm/llvm-project/commit/9a4320adb13b032a035f7c2ca5516202c4036d5c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port 42526d240cc953963ea48bae0b4c2ab548e9d897
include "../" looks wrong
Commit: 78aa61d8b60fc3e9d00236332078d14808abbc57
https://github.com/llvm/llvm-project/commit/78aa61d8b60fc3e9d00236332078d14808abbc57
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[InstCombine] matchOrConcat - return Value* not Instruction* (#128921)
NFC to make it easier to use builders in the future that might constant fold etc.
Commit: e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
https://github.com/llvm/llvm-project/commit/e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/as_type.cl
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
M llvm/test/Transforms/FunctionAttrs/arg_returned.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/stats.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
Log Message:
-----------
Reapply [CaptureTracking][FunctionAttrs] Add support for CaptureInfo (#125880) (#128020)
Relative to the previous attempt this includes two fixes:
* Adjust callCapturesBefore() to not skip captures(ret: address,
provenance) arguments, as these will not count as a capture
at the call-site.
* When visiting uses during stack slot optimization, don't skip
the ModRef check for passthru captures. Calls can both modref
and be passthru for captures.
------
This extends CaptureTracking to support inferring non-trivial
CaptureInfos. The focus of this patch is to only support FunctionAttrs,
other users of CaptureTracking will be updated in followups.
The key API changes here are:
* DetermineUseCaptureKind() now returns a UseCaptureInfo where the UseCC
component specifies what is captured at that Use and the ResultCC
component specifies what may be captured via the return value of the
User. Usually only one or the other will be used (corresponding to
previous MAY_CAPTURE or PASSTHROUGH results), but both may be set for
call captures.
* The CaptureTracking::captures() extension point is passed this
UseCaptureInfo as well and then can decide what to do with it by
returning an Action, which is one of: Stop: stop traversal.
ContinueIgnoringReturn: continue traversal but don't follow the
instruction return value. Continue: continue traversal and follow the
instruction return value if it has additional CaptureComponents.
For now, this patch retains the (unsound) special logic for comparison
of null with a dereferenceable pointer. I'd like to switch key code to
take advantage of address/address_is_null before dropping it.
This PR mainly intends to introduce necessary API changes and basic
inference support, there are various possible improvements marked with
TODOs.
Commit: bae41127e2adc90d5c107501a734488134b475af
https://github.com/llvm/llvm-project/commit/bae41127e2adc90d5c107501a734488134b475af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
Log Message:
-----------
[DAG] replaceShuffleOfInsert - add support for shuffle_vector(scalar_to_vector(x),y) -> insert_vector_elt(y,x,c) (#127210)
Begin extending replaceShuffleOfInsert to handle other forms of scalar insertion into a vector.
I've limited this to targets that have Custom/Legal ISD::INSERT_VECTOR_ELT handling for now - although we can probably always fold this before LegalOperations.
Commit: eec697baa01d7287bcd631494e79ffea219d1cbf
https://github.com/llvm/llvm-project/commit/eec697baa01d7287bcd631494e79ffea219d1cbf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - use getBROADCAST_LOAD helper in insert_subvector(undef, broadcast(p), hi) -> broadcast(p) fold (#128900)
Commit: 036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
https://github.com/llvm/llvm-project/commit/036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/Symbol/LineTable.cpp
Log Message:
-----------
[lldb] Reimplement LineTable::FindLineEntryByAddress on top of lower_bound (#127799)
I *think* this should be equivalent to the original implementation for
all line tables occurring in practice. One difference I'm aware of is
that the original implementation tried to return the first line entry
out of multiple ones for the same address. However, this is not possible
(anymore?) because of the check in LineTable::AppendLineEntryToSequence.
Commit: b021bdbb3997ef6dd13980dc44f24754f15f3652
https://github.com/llvm/llvm-project/commit/b021bdbb3997ef6dd13980dc44f24754f15f3652
Author: David Green <david.green at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add codesize test coverage. NFC
This adds some basic codesize test coverage for a number of instructions. Much of
the results returned are not very accurate yet, especially around larger vector
types but also some basic operations.
Commit: c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
https://github.com/llvm/llvm-project/commit/c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[mlir][OpenMP] initialize (first)private variables before task exec (#125304)
This still doesn't fix the memory safety issues because the stack
allocations created here for the private variables might go out of
scope.
I will add a more complete lit test later in this patch series.
Commit: fcc88021334d7ee904e891a9b7b29b07afd609d0
https://github.com/llvm/llvm-project/commit/fcc88021334d7ee904e891a9b7b29b07afd609d0
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GetElementPtr.rst
Log Message:
-----------
[Docs] Fix typo in GetElementPtr.rst (#127393)
I couldn't find the verb "indices", and it was actually
a bit confusing for me reading this.
I think this should be "indexes" instead.
Commit: db48d49311ddacf141e78d8b6d07f56cbe29beec
https://github.com/llvm/llvm-project/commit/db48d49311ddacf141e78d8b6d07f56cbe29beec
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
Log Message:
-----------
[mlir][OpenMP] Pack task private variables into a heap-allocated context struct (#125307)
See RFC:
https://discourse.llvm.org/t/rfc-openmp-supporting-delayed-task-execution-with-firstprivate-variables/83084
The aim here is to ensure that tasks which are not executed for a while
after they are created do not try to reference any data which are now
out of scope. This is done by packing the data referred to by the task
into a heap allocated structure (freed at the end of the task).
I decided to create the task context structure in
OpenMPToLLVMIRTranslation instead of adapting how it is done
CodeExtractor (via OpenMPIRBuilder] because CodeExtractor is (at least
in theory) generic code which could have other unrelated uses.
Commit: f5ee40154507637835b27092ed85184db1a39478
https://github.com/llvm/llvm-project/commit/f5ee40154507637835b27092ed85184db1a39478
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
Log Message:
-----------
[LLVM][NVPTX] Add codegen support for tcgen05.{ld, st} instructions (#126740)
This commit adds support for tcgen05.{ld, st} instructions with lit
tests under tcgen05-ld.ll and tcgen05-st.ll and intrinsics documentation
under NVPTXUsage.rst
Commit: 4d387c4455b78e3334f12f25adf222e67f0be050
https://github.com/llvm/llvm-project/commit/4d387c4455b78e3334f12f25adf222e67f0be050
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half.ll
Log Message:
-----------
[X86] Add custom operation actions for f16: FABS, FNEG, and FCOPYSIGN (#128877)
This pull request adds custom handling for several floating-point
operations for the `f16` type with respect to
(https://github.com/llvm/llvm-project/issues/126892)..
Fixes #126892
Commit: 3307b0374ac34188b2af189f07ba6910dcf2b6ef
https://github.com/llvm/llvm-project/commit/3307b0374ac34188b2af189f07ba6910dcf2b6ef
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/sincos.ll
A llvm/test/Transforms/Scalarizer/deinterleave2.ll
R llvm/test/Transforms/Scalarizer/sincos.ll
Log Message:
-----------
[LV] Teach the loop vectorizer llvm.sincos is trivially vectorizable (#128035)
Depends on #123210
Commit: 8b39c897bb1f0865c83961746f0d73990fc4e1c6
https://github.com/llvm/llvm-project/commit/8b39c897bb1f0865c83961746f0d73990fc4e1c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
Log Message:
-----------
[Bitcode] Avoid repeated hash lookups (NFC) (#128824)
Commit: f842a00b92e1b275e6482bc686099363568ced3b
https://github.com/llvm/llvm-project/commit/f842a00b92e1b275e6482bc686099363568ced3b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#128994)
Commit: c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
https://github.com/llvm/llvm-project/commit/c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128995)
Commit: 42e55925381ae353a4011cf32613d223eb457488
https://github.com/llvm/llvm-project/commit/42e55925381ae353a4011cf32613d223eb457488
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128997)
Commit: 25ebdfc3dd26b023b8591118492be1fea2574f03
https://github.com/llvm/llvm-project/commit/25ebdfc3dd26b023b8591118492be1fea2574f03
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/IR/DroppedVariableStats.cpp
Log Message:
-----------
[IR] Avoid repeated hash lookups (NFC) (#128998)
Commit: 4913e7bb6934c57e60db076a0331ac45ad0439f6
https://github.com/llvm/llvm-project/commit/4913e7bb6934c57e60db076a0331ac45ad0439f6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Log Message:
-----------
[SelectionDAG] Avoid repeated hash lookups (NFC) (#128999)
Commit: 3ce387231a3e9d9642b74152b9d42b364d565352
https://github.com/llvm/llvm-project/commit/3ce387231a3e9d9642b74152b9d42b364d565352
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#129000)
Commit: 0e3ba99ad65f7025d37c857f9b587b767f7709e7
https://github.com/llvm/llvm-project/commit/0e3ba99ad65f7025d37c857f9b587b767f7709e7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
Log Message:
-----------
[X86] Merge insertsubvector(load(p0),load_subv(p0),hi) -> subvbroadcast(p0) if either load is oneuse (#128857)
This fold is currently limited to cases where the load_subv(p0) has oneuse, but its beneficial if either load has oneuse and will be replaced.
Yet another yak shave for #122671
Commit: c0b5451129bba52e33cd7957d58af897a58d14c6
https://github.com/llvm/llvm-project/commit/c0b5451129bba52e33cd7957d58af897a58d14c6
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Target/Process.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Assorted improvements to the Pipe class (#128719)
The main motivation for this was the inconsistency in handling of
partial reads/writes between the windows and posix implementations
(windows was returning partial reads, posix was trying to fill the
buffer completely). I settle on the windows implementation, as that's
the more common behavior, and the "eager" version can be implemented on
top of that (in most cases, it isn't necessary, since we're writing just
a single byte).
Since this also required auditing the callers to make sure they're
handling partial reads/writes correctly, I used the opportunity to
modernize the function signatures as a forcing function. They now use
the `Timeout` class (basically an `optional<duration>`) to support both
polls (timeout=0) and blocking (timeout=nullopt) operations in a single
function, and use an `Expected` instead of a by-ref result to return the
number of bytes read/written.
As a drive-by, I also fix a problem with the windows implementation
where we were rounding the timeout value down, which meant that calls
could time out slightly sooner than expected.
Commit: 15e295d30aa356a0ab1d83e477375cf3ef314947
https://github.com/llvm/llvm-project/commit/15e295d30aa356a0ab1d83e477375cf3ef314947
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
Log Message:
-----------
[MachineScheduler][AMDGPU] Allow scheduling of single-MI regions (#128739)
The MI scheduler skips regions containing a single MI during scheduling.
This can prevent targets that perform multi-stage scheduling and move
MIs between regions during some stages to reason correctly about the
entire IR, since some MIs will not be assigned to a region at the
beginning.
This makes the machine scheduler no longer skip single-MI regions. Only
a few unit tests are affected (mainly those which check for the
scheduler's debug output).
Commit: 241a56dfadfdb14363cf98e8b57cfc507c7991f4
https://github.com/llvm/llvm-project/commit/241a56dfadfdb14363cf98e8b57cfc507c7991f4
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/applypriority.ll
Log Message:
-----------
[NVPTX] Add Intrinsics for applypriority.* (#127989)
\[NVPTX\] Add ApplyPriority intrinsics
This PR adds applypriority.\* intrinsics with relevant eviction
priorities.
* The lowering is handled from nvvm to nvptx tablegen directly.
* Lit tests are added as part of applypriority.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA
`<https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-applypriority>`_.
---------
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: e3f52690c796baca241a6771d897adc6670a1ed8
https://github.com/llvm/llvm-project/commit/e3f52690c796baca241a6771d897adc6670a1ed8
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/Modules/no-transitive-source-location-change-2.cppm
Log Message:
-----------
[NFC] [C++20] [Modules] Add a test for no transitive changes
Commit: 63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
https://github.com/llvm/llvm-project/commit/63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based (de)interleave operations. (#128875)
Commit: 8150ab93f7411009cc919022d2937d206a2f4359
https://github.com/llvm/llvm-project/commit/8150ab93f7411009cc919022d2937d206a2f4359
Author: John Brawn <john.brawn at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
A llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
A llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LoopVectorize] Use CodeSize as the cost kind for minsize (#124119)
Functions marked with minsize should aim for minimum code size, so the
vectorizer should use CodeSize for the cost kind and also the cost we
compare should be the cost for the entire loop: it shouldn't be divided
by the number of vector elements and block costs shouldn't be divided by
the block probability.
Possibly we should also be doing this for optsize as well, but there are
a lot of tests that assume the current behaviour and the definition of
optsize is less clear than minsize (for minsize the goal is to "keep the
code size of this function as small as possible" whereas for optsize
it's "keep the code size of this function low").
Commit: f6262fa035d8b942bf76e084fa875409bc8ff83a
https://github.com/llvm/llvm-project/commit/f6262fa035d8b942bf76e084fa875409bc8ff83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/loop-bind.f90
Log Message:
-----------
[flang] Extend `omp loop` semantic checks for `reduction` (#128823)
Extend semantic checks for `omp loop` directive to report errors when a
`reduction` clause is specified on a standalone `loop` directive with
`teams` binding.
This is similar to how clang behaves.
Commit: 741d7fab4e6c00dea5a38ba202ea80e03b71c59d
https://github.com/llvm/llvm-project/commit/741d7fab4e6c00dea5a38ba202ea80e03b71c59d
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
[Clang][Sema] Add special handling of mfloat8 in initializer lists (#125097)
This patch fixes assertion failures in clang, caused by unique
properties of _mfp8 type, namely it not being either scalar or vector
type and it not being either integer or float type.
Commit: 556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
https://github.com/llvm/llvm-project/commit/556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
Author: David Rivera <110955221+RiverDave at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
Log Message:
-----------
[clang-tidy] Fix performance-move-const-arg false negative in ternary… (#128402)
This PR aims to fix `performance-move-const-arg` #126515
## Changes
Enhanced the `performance-move-arg` check in Clang-Tidy to detect cases
where `std::move` is used
in **ternary operator expressions which was not being matched therefore
being tagged as a false negative**
## Testing
- A new mock class has been where the changes have been tested & all
tests pass
I'd appreciate any feedback since this is my first time contributing to
LLVM.
Commit: 7b263faf165df7dc647acae435cf9c47bdee4d1f
https://github.com/llvm/llvm-project/commit/7b263faf165df7dc647acae435cf9c47bdee4d1f
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
Log Message:
-----------
[CLANG]Update svget, svset, svcreate, svundef to have FP8 variants (#126754)
This adds FP8 variants to svget, svset, svcreate and svundef under
arm_sve.td
Commit: 56762b7ace0596404e5ae271f278cf7540b374f2
https://github.com/llvm/llvm-project/commit/56762b7ace0596404e5ae271f278cf7540b374f2
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
Log Message:
-----------
[clang-tidy] Add new check bugprone-unintended-char-ostream-output (#127720)
It wants to find unintended character output from `uint8_t` and `int8_t`
to an ostream.
e.g.
```c++
uint8_t v = 9;
std::cout << v;
```
---------
Co-authored-by: whisperity <whisperity at gmail.com>
Commit: fd534e524dd3b683077cab2dae4c87b7c2f1b574
https://github.com/llvm/llvm-project/commit/fd534e524dd3b683077cab2dae4c87b7c2f1b574
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/test/CodeGen/AArch64/argument-blocks.ll
Log Message:
-----------
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
In AAPCS64, __fp16 and __bf16 share the same machine type, so they
should be treated the same way for argument passing. In particular,
arrays of them need to be treated as homogeneous aggregates, and not
split between registers and the stack.
Commit: 649f4dcc1930ab5aa338c0f1b13ebb16767be400
https://github.com/llvm/llvm-project/commit/649f4dcc1930ab5aa338c0f1b13ebb16767be400
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LV] Fix tests after 8150ab93f741.
PR #124119 wasn't rebased & tested before merging. Update the failing
tests.
Commit: 0865a3872ceb65af2660baf6951a4cee44b65fb1
https://github.com/llvm/llvm-project/commit/0865a3872ceb65af2660baf6951a4cee44b65fb1
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Re-skip PipeTest on windows for now
The tests are flaky because the read/write calls return sooner than they
should (and #128719 does not fix them). Skip them until we figure the
best way to fix this.
Commit: 285b411e4635e8db2526d653488ee54dad2bff34
https://github.com/llvm/llvm-project/commit/285b411e4635e8db2526d653488ee54dad2bff34
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/sqrt.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
R libclc/generic/include/math/clc_sqrt.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/sqrt.cl
Log Message:
-----------
[libclc] Move sqrt to CLC library (#128748)
This is fairly straightforward for most targets.
We use the element-wise sqrt builtin by default. We also remove a legacy
pre-filtering of the input argument, which the intrinsic now officially
handles.
AMDGPU provides its own implementation of sqrt for double types. This
commit moves this into the implementation of CLC sqrt. It uses weak
linkage on the 'default' CLC sqrt to allow AMDGPU to only override the
builtin for the types it cares about.
Commit: 9c26e34fced193f446ab825dc86b1a728d39aa56
https://github.com/llvm/llvm-project/commit/9c26e34fced193f446ab825dc86b1a728d39aa56
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 56762b7ace05
Commit: 65c45bfa7dd3bc6afa34f2822e61962b810e4244
https://github.com/llvm/llvm-project/commit/65c45bfa7dd3bc6afa34f2822e61962b810e4244
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize][NFC] Fix formatting issue with a comment (#129033)
Commit: 816e7cdb131832108eee0763a354d8ba7a28d98d
https://github.com/llvm/llvm-project/commit/816e7cdb131832108eee0763a354d8ba7a28d98d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Factor agpr reg_sequence folding into a function (#129002)
Commit: 040860accbad57d2ed2ba132460ce618d4ba92fb
https://github.com/llvm/llvm-project/commit/040860accbad57d2ed2ba132460ce618d4ba92fb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
Log Message:
-----------
AMDGPU: Add a mir variant of a regalloc failure test
I have a pending patch which improves the codegen in the original IR
version, such that the allocation no longer fails. I'm still trying
to preserve the failure from IR, but add a version with a snapshot
of the current MIR before the failing RA run.
Commit: a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
https://github.com/llvm/llvm-project/commit/a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
Log Message:
-----------
AMDGPU: Fix a test typo reading a partially undefined vector
This avoids a surprising test diff in a future commit that
happened to change the read registers to something else. Also
migrate from undef to poison.
Commit: 447abfcc099ee288a5d89c7a71caacf63bdac203
https://github.com/llvm/llvm-project/commit/447abfcc099ee288a5d89c7a71caacf63bdac203
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Fold bitcasts into readfirstlane, readlane, and permlane64 (#128494)
We should handle this for all the handled readlane and dpp ops.
Commit: cad1de50ba06db8288da0e20c9aeffed328b8fce
https://github.com/llvm/llvm-project/commit/cad1de50ba06db8288da0e20c9aeffed328b8fce
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Fix header comment in CreateCheckerManager.cpp (#129055)
Apparently it was copied from `CheckerManager.h` without changes.
Commit: 46a13a5b174b031b399606f92ca049cac8aa12a0
https://github.com/llvm/llvm-project/commit/46a13a5b174b031b399606f92ca049cac8aa12a0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling-multi-exit.ll
Log Message:
-----------
[AArch64] Runtime-unroll small multi-exit loops on Apple Silicon. (#124751)
Extend unrolling preferences to allow more aggressive unrolling of
search loops with 2 exits, building on the TTI hook added in
https://github.com/llvm/llvm-project/commit/ad9da92cf6f735747ef04fd56937e1d76819e503.
In combination with
https://github.com/llvm/llvm-project/commit/eac23a5b971362cda3c646e018b9f26d0bc1ff3a
this enables unrolling loops like
std::find, which can improve performance significantly (+15% end-to-end
on a workload that makes heavy use of std::find). It increase the total
number of unrolled loops by ~2.5% across a very large corpus of
workloads.
For SPEC2017, +1.6% more loops are unrolled and the following workloads
increase in size (`__text`):
workload base patch
500.perlbench_r 1682884.00 1694104.00 0.7%
523.xalancbmk_r 3001716.00 3003832.00 0.1%
PR: https://github.com/llvm/llvm-project/pull/124751
Commit: c19a303867b0097e27e1cedb486f69064be40476
https://github.com/llvm/llvm-project/commit/c19a303867b0097e27e1cedb486f69064be40476
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
Log Message:
-----------
[SPIR-V] Support 2 more instructions from SPV_INTEL_long_composites (#128190)
This change adds support for `OpSpecConstantCompositeContinuedINTEL` and
`OpCompositeConstructContinuedINTEL` instructions and continues work
done in #126545.
Specification:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html
Commit: 61aab82135db3e5e69a660f395c2008e812b8946
https://github.com/llvm/llvm-project/commit/61aab82135db3e5e69a660f395c2008e812b8946
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] getFauxShuffleMask - insert_subvector - skip undemanded subvectors (#129042)
If the shuffle combine doesn't require the subvector of a insert_subvector node, we can just combine the base vector directly.
Commit: 3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
https://github.com/llvm/llvm-project/commit/3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/linkonce.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
Log Message:
-----------
[MergeFunc] Remove discardables function before writing alias or thunk. (#128865)
Update writeThunkOrAlias to only create an alias or thunk if it is
actually needed. Drop discardable linkone_odr functions if they are not
used before.
PR: https://github.com/llvm/llvm-project/pull/128865
Commit: dc764f5c689f5ee436b5835f8f8ccaea84317e03
https://github.com/llvm/llvm-project/commit/dc764f5c689f5ee436b5835f8f8ccaea84317e03
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
A llvm/unittests/Target/DirectX/RegisterCostTests.cpp
Log Message:
-----------
[DirectX] initialize registers properties by calling addRegisterClass and computeRegisterProperties (#128818)
This fixes #126784 for the DirectX backend.
This bug was marked critical for DX so it is going to go in first. At
least one register class needs to be added via `addRegisterClass` for
`RegClassForVT` to be valid.
Further for costing information used by loop unroll and other
optimizations to be valid we need to call `computeRegisterProperties`.
This change does both of these.
The test cases confirm that we can fetch costing information off of
`getRegisterInfo` and that `DirectXTargetLowering` maps `i32` typed
registers to `DXILClassRegClass`.
Commit: eeb672a47c59b1d94ea3198d7427314ebbd80777
https://github.com/llvm/llvm-project/commit/eeb672a47c59b1d94ea3198d7427314ebbd80777
Author: Jan Voung <jvoung at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
Log Message:
-----------
[clang-tidy] Add a release note about unchecked-optional-access smart pointer caching (#122290)
With caching added in https://github.com/llvm/llvm-project/pull/120249,
the `IgnoreSmartPointerDereference` option shouldn't be needed anymore.
Other caching also added earlier:
https://github.com/llvm/llvm-project/pull/112605
Commit: c630de934ca2c8381bdd60268179bc14f792ec19
https://github.com/llvm/llvm-project/commit/c630de934ca2c8381bdd60268179bc14f792ec19
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/DirectX/BUILD.gn
Log Message:
-----------
[gn build] Port dc764f5c689f
Commit: 240f2269ffdbd96e68b2159ae537d8486164c10c
https://github.com/llvm/llvm-project/commit/240f2269ffdbd96e68b2159ae537d8486164c10c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
A clang/test/AST/ast-dump-atomic-options.hip
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenOpenCL/atomic-ops.cl
A clang/test/Driver/atomic-options.hip
M clang/test/Driver/hip-options.hip
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
A clang/test/Parser/Inputs/cuda.h
A clang/test/Parser/atomic-options.hip
Log Message:
-----------
Add clang atomic control options and attribute (#114841)
Add option and statement attribute for controlling emitting of
target-specific
metadata to atomicrmw instructions in IR.
The RFC for this attribute and option is
https://discourse.llvm.org/t/rfc-add-clang-atomic-control-options-and-pragmas/80641,
Originally a pragma was proposed, then it was changed to clang
attribute.
This attribute allows users to specify one, two, or all three options
and must be applied
to a compound statement. The attribute can also be nested, with inner
attributes
overriding the options specified by outer attributes or the target's
default
options. These options will then determine the target-specific metadata
added to atomic
instructions in the IR.
In addition to the attribute, three new compiler options are introduced:
`-f[no-]atomic-remote-memory`, `-f[no-]atomic-fine-grained-memory`,
`-f[no-]atomic-ignore-denormal-mode`.
These compiler options allow users to override the default options
through the
Clang driver and front end. `-m[no-]unsafe-fp-atomics` is aliased to
`-f[no-]ignore-denormal-mode`.
In terms of implementation, the atomic attribute is represented in the
AST by the
existing AttributedStmt, with minimal changes to AST and Sema.
During code generation in Clang, the CodeGenModule maintains the current
atomic options,
which are used to emit the relevant metadata for atomic instructions.
RAII is used
to manage the saving and restoring of atomic options when entering
and exiting nested AttributedStmt.
Commit: 1357279df9d255ac60cec0dd755349a12083c8b0
https://github.com/llvm/llvm-project/commit/1357279df9d255ac60cec0dd755349a12083c8b0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
A libclc/clc/include/clc/math/clc_rsqrt.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
Log Message:
-----------
[libclc] Move rsqrt to the CLC library (#129045)
This also adds missing half variants to certain targets.
It also optimizes some targets' implementations to perform the operation
directly in vector types, as opposed to scalarizing.
Commit: 8635b8eb5178cbd3662fdcb9b4f0879aa633a002
https://github.com/llvm/llvm-project/commit/8635b8eb5178cbd3662fdcb9b4f0879aa633a002
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_alignbit_b32 (#119409)
Support true16 format for v_alignbit_b32 in MC.
Since we are replacing `v_alignbit_b32` to
`v_alignbit_b32_t16/v_alignbit_b32_fake16` in Post-GFX11, have to update
the CodeGen pattern for `v_alignbit_b32_fake16` to get CodeGen test
passing. There is no pattern modified/created, but just replacing the
`v_alignbit_b32` with fake16 format.
Some of the true16 CodeGen test are impacted since `v_alignbit_b32`
selection are removed in Post-GFX11 while `v_alignbit_b32_t16` are not
yet supported. The CodeGen patch for `v_alignbit_b32_t16` will be done
in the following patch.
Commit: 7defbf987a551771c275129c70fe4e59dc5125cc
https://github.com/llvm/llvm-project/commit/7defbf987a551771c275129c70fe4e59dc5125cc
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Add test for atomicrmw xchg (NFC)
This is an opt based test because usually AtomicExpand will
convert it to an integer atomicrmw first.
Commit: b2aba39001f6909965c4a9af47969e83717601c0
https://github.com/llvm/llvm-project/commit/b2aba39001f6909965c4a9af47969e83717601c0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Handle atomicrmw xchg in HasAddressTaken heuristic
Atomicrmw xchg can directly take a pointer operand, so we should
treat it similarly to store or cmpxchg.
In practice, I believe that all targets that support stack protectors
will convert this to an integer atomicrmw xchg in AtomicExpand, so
there is no issue in practice. We still should handle it correctly
if that doesn't happen.
Commit: 79a28aa0a48feba34ddc3c1791ea0be88f354542
https://github.com/llvm/llvm-project/commit/79a28aa0a48feba34ddc3c1791ea0be88f354542
Author: Alois Klink <alois at aloisklink.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/attr-malloc.c
M clang/test/Sema/attr-args.c
M clang/test/SemaCXX/attr-print.cpp
Log Message:
-----------
[clang] Ignore GCC 11 [[malloc(x)]] attribute
Ignore the `[[malloc(x)]]` or `[[malloc(x, 1)]]` function attribute
syntax added in [GCC 11][1] and print a warning instead of an error.
Unlike `[[malloc]]` with no arguments (which is supported by Clang),
GCC uses the one or two argument form to specify a deallocator for
GCC's static analyzer.
Code currently compiled with `[[malloc(x)]]` or
`__attribute((malloc(x)))` fails with the following error:
`'malloc' attribute takes no arguments`.
[1]: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;f=gcc/doc/extend.texi;h=dce6c58db87ebf7f4477bd3126228e73e4eeee97#patch6
Fixes: https://github.com/llvm/llvm-project/issues/51607
Partial-Bug: https://github.com/llvm/llvm-project/issues/53152
Commit: 4af2e36b1dcd03cae07a74038e4cd424bdac04aa
https://github.com/llvm/llvm-project/commit/4af2e36b1dcd03cae07a74038e4cd424bdac04aa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
Log Message:
-----------
[CodeGen][NVPTX] Add a TRI function get the Dwarf register number for a virtual register. (#129017)
NVPTX needs to be able to get the Dwarf register number for a virtual
register. The interface we have for this today is on MCRegisterInfo and
take a MCRegister argument. It shouldn't be legal to convert a Register
containing a virtual register to an MCRegister.
This patch adds a getDwarfRegNumForVirtReg function that takes a
Register to TRI and splits the NVPTX override of getDwarfRegNum.
Commit: d39f4a198024dcc19ee86859049e865d4a3976ce
https://github.com/llvm/llvm-project/commit/d39f4a198024dcc19ee86859049e865d4a3976ce
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP]Add prescriptiveness-modifier support to granularity clauses of taskloop construct (#128477)
Added modifier(strict) support to the granularity(grainsize and num_tasks) clauses of taskloop construct.
Commit: e8379ea46469b7f8bfec1d9610d967967a62848f
https://github.com/llvm/llvm-project/commit/e8379ea46469b7f8bfec1d9610d967967a62848f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Add a test with incorrect bitwidth after minbitwidth analysis, NFC
Commit: 6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
https://github.com/llvm/llvm-project/commit/6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
Log Message:
-----------
[MemProf] Fix handling of recursive edges during func assignment (#129066)
When we need to reclone other callees of a caller node during function
assignment due to the creation of a new function clone, we need to skip
recursive edges on that caller. We don't want to reclone the callee in
that case (which is the caller), which isn't necessary and also isn't
correct from a graph update perspective. It resulted in an assertion and
in an NDEBUG build caused an infinite loop.
Commit: 69effe054c136defda8766688ac0de4626a0eb05
https://github.com/llvm/llvm-project/commit/69effe054c136defda8766688ac0de4626a0eb05
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Check for potential safety of the truncation for vectorized scalars with multi uses
If the vectorized scalars has multiple uses, need to check if it is safe
to truncate the vectorized value, before actually trying doing it.
Otherwise, the compiler may loose some important bits, which may lead to
a miscompilation.
Fixes #129057
Commit: da618cf0a76371ca89769ca706fe39cc92fbf7d6
https://github.com/llvm/llvm-project/commit/da618cf0a76371ca89769ca706fe39cc92fbf7d6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__locale
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/cwchar
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/locale
M libcxx/include/regex
M libcxx/include/string
Log Message:
-----------
[NFC][libc++] Guard against operator& hijacking. (#128351)
This set usage of operator& instead of std::addressof seems not be easy
to "abuse". Some seem easy to misuse, like basic_ostream::operator<<,
trying to do that results in compilation errors since the `widen`
function is not specialized for the hijacking character type. Hence
there are no tests.
Commit: 326638bac19fb388a0c58324ab0072a23b77fded
https://github.com/llvm/llvm-project/commit/326638bac19fb388a0c58324ab0072a23b77fded
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/erfc.f90
Log Message:
-----------
[Flang] Generate math.erfc op for non-precise erfc interinsic calls (#128897)
This patch changes the codegen for non-precise erfc calls to generate
math.erfc ops. This wasn't done before because the math dialect did not
have a erfc operation at the time.
Commit: d91e5c301353b012b338aa9920a941d8b5fc28a4
https://github.com/llvm/llvm-project/commit/d91e5c301353b012b338aa9920a941d8b5fc28a4
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
A clang/test/Frontend/verify-mulptiple-prefixes.c
M clang/test/Frontend/verify.c
M clang/test/Frontend/verify3.c
Log Message:
-----------
[verify] Improve the error messages with multiple active prefixes (#126068)
Multiple improvements to make the messages more concrete, actionable and
less confusing when multiple prefixes are used in `-verify=`. The common
theme among these was that prior to the patch all error messages would
use the alphabetically first prefix, even if the error was associated
with a different one.
- Mention the actual expected but unseen directive: Prior to this change
when reporting expected but unseen directive, the alphabetically first
one would be used to report the error even if that's not the one present
in the source. Reword the diagnostic if multiple prefixes are active and
include the real spelling of the expected directive for each expected
but not seen line in the output.
- Reword the seen but not expected error message if multiple directives
are active to avoid having to pick an arbitrary (the first) prefix for
it.
- Include the full spelling of the directive when reporting a directive
following the no-diagnostics directive. For example "'foo-error'
directive cannot follow 'foo-no-diagnostics' directive"
- Use the first appearing `-no-diagnostics` directive, in the above
message instead of the first one alphabetically.
The new wording
> diagnostics with '(error|warning|remark|note)' severity seen but not
expected
instead of
> '<prefix>-(error|warning|remark|note)' diagnostics seen but not
expected
is only used when multiple prefixes are present, the error messages stay
the same with a single prefix only.
Commit: bc91accbfe1644912f70645b51b1fade4bd61249
https://github.com/llvm/llvm-project/commit/bc91accbfe1644912f70645b51b1fade4bd61249
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
A llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_vop3cx_warn.txt
Log Message:
-----------
[AMDGPU][MC] Disassembler warning for v_cmpx instructions (#127925)
For GFX10+ the destination reg of v_cmpx instructions is implicitly EXEC,
which is encoded as 0x7E. However, the disassembler does not check this
field, thus allowing any value. With this patch, if the field is not
EXEC a warning is issued.
Commit: f8cc509b69cc64a6973990f9f48074d211534509
https://github.com/llvm/llvm-project/commit/f8cc509b69cc64a6973990f9f48074d211534509
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Reapply "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)" (#129078)
This reverts commit 1559a65efaf327f9c72e14d4bb1834f076e7fc20.
Fixed test (I suspect broken by unrelated change in the merge)
Commit: ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
https://github.com/llvm/llvm-project/commit/ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Simplify ownership of checker objects (#128887)
Previously checker objects were created by raw `new` calls, which
necessitated managing and calling their destructors explicitly. This
commit refactors this convoluted logic by introducing `unique_ptr`s that
to manage the ownership of these objects automatically.
This change can be thought of as stand-alone code quality improvement;
but I also have a secondary motivation that I'm planning further changes
in the checker registration/initialization process (to formalize our
tradition of multi-part checker) and this commit "prepares the ground"
for those changes.
Commit: 1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
https://github.com/llvm/llvm-project/commit/1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Simplify BLEND %a, %b, NOT(%m) -> BLEND %b, %a, %m. (#128375)
Avoid negations for normalized blends by reordering operands.
PR: https://github.com/llvm/llvm-project/pull/128375
Commit: 12a9e2adc3842aee4d6ae01a33eb3103e2224af9
https://github.com/llvm/llvm-project/commit/12a9e2adc3842aee4d6ae01a33eb3103e2224af9
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompt-general.cpp
M openmp/runtime/src/ompt-internal.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/src/ompt-specific.h
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][OMPT][OMPD] Fix frame flags for OpenMP tool APIs (#114118)
In several cases the flags entries in ompt_frame_t are not initialized.
According to @jdelsign the address provided as reenter and exit address
is the canonical frame address (cfa) rather than a "framepointer". This
patch makes sure that the flags entry is always initialized and changes
the value from ompt_frame_framepointer to ompt_frame_cfa.
The assertion in the tests makes sure that the flags are always set,
when a tool (callback.h in this case) looks at the value.
Fixes #89058
Commit: ba400e862e0cc0c766883e1cc8146c0884e0df02
https://github.com/llvm/llvm-project/commit/ba400e862e0cc0c766883e1cc8146c0884e0df02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Use helper function for use/def chain walk (#129052)
PeepholeOpt has a nicer version of this which handles more
cases.
Commit: f6bfa33cdb1482df0e2f23413fbe809afbc28830
https://github.com/llvm/llvm-project/commit/f6bfa33cdb1482df0e2f23413fbe809afbc28830
Author: Krishna Pandey <47917477+krishna2803 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/bitshk.cpp
A libc/src/stdfix/bitshk.h
A libc/src/stdfix/bitshr.cpp
A libc/src/stdfix/bitshr.h
A libc/src/stdfix/bitsk.cpp
A libc/src/stdfix/bitsk.h
A libc/src/stdfix/bitslk.cpp
A libc/src/stdfix/bitslk.h
A libc/src/stdfix/bitslr.cpp
A libc/src/stdfix/bitslr.h
A libc/src/stdfix/bitsr.cpp
A libc/src/stdfix/bitsr.h
A libc/src/stdfix/bitsuhk.cpp
A libc/src/stdfix/bitsuhk.h
A libc/src/stdfix/bitsuhr.cpp
A libc/src/stdfix/bitsuhr.h
A libc/src/stdfix/bitsuk.cpp
A libc/src/stdfix/bitsuk.h
A libc/src/stdfix/bitsulk.cpp
A libc/src/stdfix/bitsulk.h
A libc/src/stdfix/bitsulr.cpp
A libc/src/stdfix/bitsulr.h
A libc/src/stdfix/bitsur.cpp
A libc/src/stdfix/bitsur.h
A libc/src/stdfix/bitusk.cpp
M libc/test/UnitTest/LibcTest.cpp
A libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/bitshk_test.cpp
A libc/test/src/stdfix/bitshr_test.cpp
A libc/test/src/stdfix/bitsk_test.cpp
A libc/test/src/stdfix/bitslk_test.cpp
A libc/test/src/stdfix/bitslr_test.cpp
A libc/test/src/stdfix/bitsr_test.cpp
A libc/test/src/stdfix/bitsuhk_test.cpp
A libc/test/src/stdfix/bitsuhr_test.cpp
A libc/test/src/stdfix/bitsuk_test.cpp
A libc/test/src/stdfix/bitsulk_test.cpp
A libc/test/src/stdfix/bitsulr_test.cpp
A libc/test/src/stdfix/bitsur_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point bitsfx functions in llvm libc (#128413)
Fixes #113359
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Commit: d2e66625bcdc09953c007cf1e9f80d38a18719f3
https://github.com/llvm/llvm-project/commit/d2e66625bcdc09953c007cf1e9f80d38a18719f3
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][deps] Propagate the entire service (#128959)
Shared state between dependency scanning workers is managed by the
dependency scanning service.
Right now, the members are individually threaded through the worker,
action, and collector. This makes any change to the service and its
members a very laborious process. Moreover, this situation causes
frequent merge conflicts in our downstream repo where the service does
have some extra members that need to be passed around.
To ease the maintenance burden, this PR starts passing a reference to
the entire service.
Commit: 403b7b66dea33a073c365d7ae9fb07da4844eb62
https://github.com/llvm/llvm-project/commit/403b7b66dea33a073c365d7ae9fb07da4844eb62
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for atan2 intrinsics op (#127970)
This is similar to https://github.com/llvm/llvm-project/pull/127317
Commit: e2b0d5df84e023910a9b4204aad249d16fd0703a
https://github.com/llvm/llvm-project/commit/e2b0d5df84e023910a9b4204aad249d16fd0703a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Enforce scheduling SchedBundle instrs back-to-back (#128092)
This patch fixes the behavior of the scheduler by making sure the instrs
that are part of a SchedBundle are scheduled back-to-back.
Commit: ead7b7be0948572a6d1feb300790f37fb83cfa00
https://github.com/llvm/llvm-project/commit/ead7b7be0948572a6d1feb300790f37fb83cfa00
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec] Fix unused variables warnings
Commit: 8f8529c137b1f659595e1064f5c8806eeb628b36
https://github.com/llvm/llvm-project/commit/8f8529c137b1f659595e1064f5c8806eeb628b36
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Gardening in lldb-dap.cpp (NFC) (#128949)
- Remove more unused includes
- Limit anonymous namespace to llvm::opt
- Fix code style
Commit: 78c96aa24f0406e630674d82eef073ea3d4c8141
https://github.com/llvm/llvm-project/commit/78c96aa24f0406e630674d82eef073ea3d4c8141
Author: bodqhrohro <bodqhrohro at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[docs] Fix typo in GettingStarted.rst Unlinke -> Unlike (NFC) (#128616)
Commit: 253d691596a72afac89ee99d79004235842b9d5c
https://github.com/llvm/llvm-project/commit/253d691596a72afac89ee99d79004235842b9d5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Update VPBranchOnMaskRecipe to always set the mask (NFC).
The mask is always available at construction time. Make it non-optional
to simlpify code.
Commit: 4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
https://github.com/llvm/llvm-project/commit/4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
Author: lntue <lntue at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/test/src/math/smoke/sqrtf128_test.cpp
Log Message:
-----------
[libc] Fix sqrtf128 smoke test for riscv32. (#129094)
Commit: 440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
https://github.com/llvm/llvm-project/commit/440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
Author: Ujan RoyBandyopadhyay <116058173+ujan-r at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
[clangd] Reduce superfluous rename conflicts (#121515)
This commit adds a namespace check to the code for detecting name
collisions, allowing `bar` to be renamed to `foo` in the following
snippet:
```c
typedef struct foo {} Foo;
Foo bar;
```
Previously, such a rename would fail because a declaration for `foo`
already exists in the same scope.
Commit: 10a9dcab0a5904ce6c12efb3555a2e31017bce92
https://github.com/llvm/llvm-project/commit/10a9dcab0a5904ce6c12efb3555a2e31017bce92
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/API/SBProgress.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB][SBProgress] Fix bad optional in sbprogress (#128971)
This fixes the obvious, but untested case of sending None/Null to
SBProgress.
Commit: 8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
https://github.com/llvm/llvm-project/commit/8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir][spirv] Fix incorrect error message in processCapability (#129079)
Commit: c3b3352f7346b06d9e17057fd5e9153e68229b9c
https://github.com/llvm/llvm-project/commit/c3b3352f7346b06d9e17057fd5e9153e68229b9c
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/test/Lower/OpenMP/math-amdgpu.f90
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add conversion of math.erfc to AMD GPU library calls (#128899)
This patch adds a pattern to convert the math.erfc operation to AMD GPU
library calls.
Depends on: #128897 for the flang test
Commit: 70828d9a919a629f11736139adfcb4ba0198ebe7
https://github.com/llvm/llvm-project/commit/70828d9a919a629f11736139adfcb4ba0198ebe7
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Stmt.cpp
A clang/test/AST/cc-modifier.cpp
M clang/test/CodeGen/asm.c
Log Message:
-----------
[clang] Alias cc modifier to c (#127719)
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#GenericOperandmodifiers
provides the `c` and `cc` modifiers. GCC 15 introduces the `cc` modifier
which does the same as `c`. This patch lets Clang handle this for
compatibility.
Commit: 62d4cc811ae132c722a2146ddb246c3710b57a93
https://github.com/llvm/llvm-project/commit/62d4cc811ae132c722a2146ddb246c3710b57a93
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang] Modifications to ieee_support_standard (#128895)
Some Arm processors support exception halting control and some do not.
An Arm executable will run on either type of processor, so it is
effectively unknown at compile time whether or not this support will be
available. ieee_support_halting is therefore implemented with a runtime
check.
The result of a call to ieee_support_standard depends in part on support
for halting control. Update the ieee_support_standard implementation to
check for support for halting control at runtime.
Commit: 9a32af25b4d22f4f1257a5491d6e372e0f216842
https://github.com/llvm/llvm-project/commit/9a32af25b4d22f4f1257a5491d6e372e0f216842
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Check fxbits as complete (#129107)
These were added in https://github.com/llvm/llvm-project/pull/114912 by
@smallp-o-p.
Commit: e5d93100b656df86854b58433816b0b03ef9f231
https://github.com/llvm/llvm-project/commit/e5d93100b656df86854b58433816b0b03ef9f231
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
R compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Revert "[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)" and fix
This reverts commit 7521207e415b19b2924930ac95c2fcf07d56f2f2.
This reverts commit 5f6a3e63a31aaebc620a18c47bc5590f6f705c98.
Commit: 6ce41db6b0275d060d6e60f88b96a1657024345c
https://github.com/llvm/llvm-project/commit/6ce41db6b0275d060d6e60f88b96a1657024345c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Preserve DebugLoc for VPBranchOnMaskRecipe.
Update code to set and generate debug location for branch recipe
Commit: 64ae0a102f5142ff780348b70db633c0261a41dd
https://github.com/llvm/llvm-project/commit/64ae0a102f5142ff780348b70db633c0261a41dd
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
A libc/src/stdlib/l64a.cpp
A libc/src/stdlib/l64a.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/l64a_test.cpp
Log Message:
-----------
[libc] implement l64a (#129099)
Adds l64a, which generates the base 64 string expected by a64l.
Commit: b31175a33a22b2ec793ddd14b61693f709e90ef7
https://github.com/llvm/llvm-project/commit/b31175a33a22b2ec793ddd14b61693f709e90ef7
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] Add int4 intrinsics, mixed-type fp8 to handle gfx12 (#128963)
1. Extend the gfx12 FP8 support to allow mixed-type intrinsics (since
they've been added), creating limited mixed-type support that mirrors
MFMA
2. Extend the `amdgpu.wmma` intrinsic lowering to correctly handle
shorter vectors because gfx12 now has instructions that logically take a
4xi8, or, as far as LLVM's concerned, an i32. Similarly, there are 4xi4
inputs, which are an i16 (that must be zero-extended to i32).
3. Correctly handle the ambiguities in the int4 intrinsics on gfx12,
which can either be 16x16x16 or 16x16x32
4. Add tests showing all WMMAs being lowered the way gfx12 expects
(mirroring LLVM's tests)
5. Add a verifier to prevent emiting ilegal instructions on gfx12.
Commit: 94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
https://github.com/llvm/llvm-project/commit/94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
Log Message:
-----------
[LLD][COFF] Use primary symbol table machine in Writer::writeHeader (NFC) (#128442)
Instead of duplicating the logic from `LinkerDriver::setMachine`.
Commit: 14bab65cbfb2bf9a410c3ce206a6b7a273441f26
https://github.com/llvm/llvm-project/commit/14bab65cbfb2bf9a410c3ce206a6b7a273441f26
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
Log Message:
-----------
[LLD][COFF] Support CF guards on ARM64X (#128440)
Both native and EC views share table chunks. Ensure relevant symbols are
set in both symbol tables.
Commit: 9a54c77aa361d0d1f98a39a89e3f543d15d182a5
https://github.com/llvm/llvm-project/commit/9a54c77aa361d0d1f98a39a89e3f543d15d182a5
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Reland copy file range san (#129114)
Commit: 310c3775c08073f59cf3c11ea8ee4e6c25856701
https://github.com/llvm/llvm-project/commit/310c3775c08073f59cf3c11ea8ee4e6c25856701
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Rephrase list comp for downstream (#129119)
The downstream build was having trouble transforming the previous list
comprehension, but it works on this one. I guess it just needs to look
like a proper target.
Commit: 73ed27ce096918f2881656d9c85c6ff44fcefa5c
https://github.com/llvm/llvm-project/commit/73ed27ce096918f2881656d9c85c6ff44fcefa5c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Order the implicit defs/uses of vl/vtype on MC instructions the same as the pseudo version. (#129104)
CodeGen pseudos and the vsetvli insertion pass put VL before VTYPE. Make
the MC layer instructions consistent.
Commit: adf0abf35448583f955e78af00d5eb473ad494a5
https://github.com/llvm/llvm-project/commit/adf0abf35448583f955e78af00d5eb473ad494a5
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_at.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-at flag for debugging (#129097)
When debugging miscompiles we need a way to force-stop the vectorizer
early. This helps figure out which invocation is generating incorrect
code.
Commit: 1618d09ce7846aca3d193aa02843ad29c8e638be
https://github.com/llvm/llvm-project/commit/1618d09ce7846aca3d193aa02843ad29c8e638be
Author: Stef Lindall <stef at modular.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
Log Message:
-----------
[TypeID] Update private typeid definition in `DeferredLocInfo` (#128968)
The parser's `DeferredLocInfo` uses an uncommon TypeID setup, where it
defines a private TypeID for pointers to the struct.
When using the fallback TypeID mechanism introduced in
https://github.com/llvm/llvm-project/pull/126999, the fallback TypeID
mechanism doesn't support anonymous namespaces, and the
`INTERNAL_INLINE` mechanism doesn't support pointer types.
Explicitly use `SELF_OWNING_TYPE_ID` for this case. This should always
be safe for anonymous namespaces.
Commit: ffecd7247921512255ce4ba46c2a76eeca4e95fb
https://github.com/llvm/llvm-project/commit/ffecd7247921512255ce4ba46c2a76eeca4e95fb
Author: Jonathon Penix <jpenix at quicinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
Log Message:
-----------
[llvm-objcopy] Let --change-section-lma change segments wth filesz=0,… (#127724)
… memsz>0
Currently, segments with a file size of 0 are ignored for the purposes
of --change-section-lma, regardless of their memory size. It seems
reasonable to me to modify such segments given that we're changing the
LMA for all sections and these LMAs may be used during loading. GNU
objcopy also seems to adjust such segments.
Additionally, segments with file size > 0 and memory size = 0 will no
longer be modified for the purposes of --change-section-lma as they
shouldn't be part of the loaded memory image.
Fixes #124680
Commit: 7842954b9d6fb3d6d673493628c75fe4cc51e936
https://github.com/llvm/llvm-project/commit/7842954b9d6fb3d6d673493628c75fe4cc51e936
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Update function names (#129129)
The remaining math functions are `mulifx` (int * fx = int), `divifx`
(int / fx = int), `fxdivi` (int / int = fx), and `idivfx` (fx / fx =
int).
Commit: 28851edf164a337c334755ae33fd58f03cffd5a2
https://github.com/llvm/llvm-project/commit/28851edf164a337c334755ae33fd58f03cffd5a2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Silence CMake's install messages in the CI (#128872)
Currently, there are a ton of `-- Installing:` and `-- Up-to-date:`
messages in the CI log, which just clutter the output. This disables
these messages to significantly shorten the CI logs, making them much
faster to load and easier to read.
Commit: f896bd36701656c9af20c6e6e6e202537de47541
https://github.com/llvm/llvm-project/commit/f896bd36701656c9af20c6e6e6e202537de47541
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/string
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/utils/libcxx/test/params.py
M runtimes/cmake/Modules/WarningFlags.cmake
Log Message:
-----------
[libc++] Diagnose when nullptrs are passed to string APIs (#122790)
This allows catching misuses of APIs that take a pointer to a
null-terminated string.
Commit: db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
https://github.com/llvm/llvm-project/commit/db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
Author: Florian Mayer <fmayer at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/CodeGen/bounds-checking-debuginfo.c
Log Message:
-----------
[NFC] [clang] [sanitize] add autogen test for array-bounds debuginfo (#128976)
Commit: 32bcc9f0d3b182ff817ded209141d867236dee6c
https://github.com/llvm/llvm-project/commit/32bcc9f0d3b182ff817ded209141d867236dee6c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
A llvm/test/Transforms/SandboxVectorizer/allow_files.ll
Log Message:
-----------
[SandboxVec] Add option -sbvec-allow-file for bisection debugging (#129127)
This new option lets you specify an allow-list of source files and
disables vectorization if the IR is not in the list. This can be used
for debugging miscompiles.
Commit: 72e00d628dd99c634c03065f6b120bc5da617868
https://github.com/llvm/llvm-project/commit/72e00d628dd99c634c03065f6b120bc5da617868
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
Log Message:
-----------
[SystemZ] Handle scalar to vector bitcasts. (#128628)
CSmith found a case where SROA produces bitcasts from scalar to vector.
This was previously asserted against in SystemZTTI, but now the BaseT
implementation takes care of it.
Commit: 3989b78fa96f6c93da0fa23c7aa29a313b56831d
https://github.com/llvm/llvm-project/commit/3989b78fa96f6c93da0fa23c7aa29a313b56831d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream basic alloca and load support (#128792)
This change implements basic support in ClangIR for local variables
using the cir.alloca and cir.load operations.
Commit: 4fcab8a587c5932c70d66481726dc14167273670
https://github.com/llvm/llvm-project/commit/4fcab8a587c5932c70d66481726dc14167273670
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/SandboxIR/Region.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Fix windows build issue (#129082)
This should fix the issue reported here:
https://discourse.llvm.org/t/second-stage-of-build-on-windows-fails-in-sandboxir/84841
Commit: 9a49a03dc95bdd2b6ef4807291136eca46370517
https://github.com/llvm/llvm-project/commit/9a49a03dc95bdd2b6ef4807291136eca46370517
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/call27.f90
Log Message:
-----------
[flang] Refine handling of NULL() actual to non-optional allocatable … (#116126)
…dummy
We presently allow a NULL() actual argument to associate with a
non-optional dummy allocatable argument only under INTENT(IN). This is
too strict, as it precludes the case of a dummy argument with default
intent. Continue to require that the actual argument be definable under
INTENT(OUT) and INTENT(IN OUT), and (contra XLF) interpret NULL() as
being an expression, not a definable variable, even when it is given an
allocatable MOLD.
Fixes https://github.com/llvm/llvm-project/issues/115984.
Commit: a21089a24bdd66347c91fa3638300b90c4dd4039
https://github.com/llvm/llvm-project/commit/a21089a24bdd66347c91fa3638300b90c4dd4039
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/coshape.f90
Log Message:
-----------
[flang] Support COSHAPE() intrinsic function (#125286)
Enable COSHAPE in the intrinsics table and enable its test.
Commit: 29025a060079d6e40c364b64b1d0b3d039a81a79
https://github.com/llvm/llvm-project/commit/29025a060079d6e40c364b64b1d0b3d039a81a79
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/pre-fir-tree04.f90
M flang/test/Semantics/allocate11.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/bind-c09.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/change_team01.f90
M flang/test/Semantics/coarrays01.f90
A flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/doconcurrent08.f90
M flang/test/Semantics/form_team01.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/resolve07.f90
M flang/test/Semantics/resolve50.f90
M flang/test/Semantics/resolve55.f90
M flang/test/Semantics/resolve88.f90
M flang/test/Semantics/resolve94.f90
M flang/test/Semantics/this_image01.f90
Log Message:
-----------
[flang] Catch more semantic errors with coarrays (#125536)
Detect and report a bunch of uncaught semantic errors with coarray
declarations. Add more tests, and clean up bad usage in existing tests.
Commit: 3e3855b0e553e66cde5ad9a55c078c9650798e4a
https://github.com/llvm/llvm-project/commit/3e3855b0e553e66cde5ad9a55c078c9650798e4a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/bug125774.f90
Log Message:
-----------
[flang] Don't flag CLASS(*) ASSOCIATED() pointer or target as error (#125890)
As I read the standard, an unlimited polymorphic pointer or target
should be viewed as compatible with any data target or data pointer when
used in the two-argument form of the intrinsic function ASSOCIATED().
Fixes https://github.com/llvm/llvm-project/issues/125774.
Commit: fce29486ac109fbf8b543c24c763703839278457
https://github.com/llvm/llvm-project/commit/fce29486ac109fbf8b543c24c763703839278457
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Fix bogus error on defined I/O procedure. (#125898)
The check that "v_list" be deferred shape is just wrong; there are no
deferred shape non-pointer non-allocatable dummy arguments in Fortran.
Correct to check for an assumed shape dummy argument. And de-split the
error messages that were split across multiple source lines, making them
much harder to find with grep.
Fixes https://github.com/llvm/llvm-project/issues/125878.
Commit: 161d002a0949046131ecaa6574ddfece5cfd225e
https://github.com/llvm/llvm-project/commit/161d002a0949046131ecaa6574ddfece5cfd225e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
Log Message:
-----------
[flang] Silence warnings from hermetic module files (#128763)
Modules read from module files must have their symbols tagged with the
ModFile flag to suppress all warnings messages that might be emitted for
their contents. (Actionable warnings will have been emitted when the
modules were originally compiled, so we don't want to repeat them later
when the modules are USE'd.) The module symbols of the additional
modules in hermetic module files were not being tagged with that flag;
fix.
Commit: e1ba1be787b845e9c174430e5005584e9d23362a
https://github.com/llvm/llvm-project/commit/e1ba1be787b845e9c174430e5005584e9d23362a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve34.f90
Log Message:
-----------
[flang] Account for accessibility in extensibility check (#128765)
A derived type with a component of the same name as the type is not
extensible... unless the extension occurs in another module where the
conflicting component is inaccessible.
Fixes https://github.com/llvm/llvm-project/issues/126114.
Commit: 8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
https://github.com/llvm/llvm-project/commit/8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call09.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/definable01.f90
Log Message:
-----------
[flang] Accept proc ptr function result as actual argument without IN… (#128771)
…TENT
A dummy procedure pointer with no INTENT attribute may associate with an
actual argument that is the result of a reference to a function that
returns a procedure pointer, we think.
Fixes https://github.com/llvm/llvm-project/issues/126950.
Commit: 523537f0c90b192b0f81d14e454fb8b889b07ce8
https://github.com/llvm/llvm-project/commit/523537f0c90b192b0f81d14e454fb8b889b07ce8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Silence spurious error (#128777)
When checking for conflicts between type-bound generic defined I/O
procedures and non-type-bound defined I/O generic interfaces, don't
worry about conflicts where the type-bound generic interface is
inaccessible in the scope around the non-type-bound interface.
Fixes https://github.com/llvm/llvm-project/issues/126797.
Commit: e843d514b12fd07e8bf49898cf66716e4b2833ce
https://github.com/llvm/llvm-project/commit/e843d514b12fd07e8bf49898cf66716e4b2833ce
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Semantics/doconcurrent08.f90
Log Message:
-----------
[flang] Refine handling of SELECT TYPE associations in analyses (#128935)
A few bits of semantic checking need a variant of the
ResolveAssociations utility function that stops when hitting a construct
entity for a type or class guard. This is necessary for cases like the
bug below where the analysis is concerned with the type of the name in
context, rather than its shape or storage or whatever. So add a flag to
ResolveAssociations and GetAssociationRoot to make this happen, and use
it at the appropriate call sites.
Fixes https://github.com/llvm/llvm-project/issues/128608.
Commit: 78acf7bb0a6e3a0948deece3d49f155cbc1ce891
https://github.com/llvm/llvm-project/commit/78acf7bb0a6e3a0948deece3d49f155cbc1ce891
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/abstract02.f90
Log Message:
-----------
[flang] Enforce C1503 (#128962)
Enforce an obscure constraint from the standard: an abstract interface
is not allowed to have the same name as an intrinsic type keyword. I
suspect this is meant to prevent a declaration like "PROCEDURE(REAL),
POINTER :: P" from being ambiguous.
Fixes https://github.com/llvm/llvm-project/issues/128744.
Commit: c6dd9f4278d156976d7694fb34d0bb614082ce46
https://github.com/llvm/llvm-project/commit/c6dd9f4278d156976d7694fb34d0bb614082ce46
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/array-constr-len.f90
Log Message:
-----------
[flang] Catch usage of : and * lengths in array c'tors (#128974)
The definition of an array constructor doesn't preclude the use of
[character(:)::] or [character(*)::] directly, but there is language
elsewhere in the standard that restricts their use to specific contexts,
neither of which include explicitly typed array constructors.
Fixes https://github.com/llvm/llvm-project/issues/128755.
Commit: cbef629838b06166c54e59fdfe8649f792293f61
https://github.com/llvm/llvm-project/commit/cbef629838b06166c54e59fdfe8649f792293f61
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/generic07.f90
M flang/test/Semantics/resolve117.f90
Log Message:
-----------
[flang] Catch type-bound generic with inherited indistinguishable spe… (#128980)
…cific
When checking generic procedures for indistinguishable specific
procedures, don't neglect to include specific procedures from any
accessible instance of the generic procedure inherited from its parent
type..
Fixes https://github.com/llvm/llvm-project/issues/128760.
Commit: 44c6616a4a9f5c8e8e68364609f018c62670d114
https://github.com/llvm/llvm-project/commit/44c6616a4a9f5c8e8e68364609f018c62670d114
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Semantics/check-declarations.cpp:2009:15: error: unused
variable 'kind' [-Werror,-Wunused-variable]
Commit: f3b18491e840c23dfe25e399ddf6475425481835
https://github.com/llvm/llvm-project/commit/f3b18491e840c23dfe25e399ddf6475425481835
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
Log Message:
-----------
[RISCV] Consolidate some DecoderNamespaces for standard extensions. (#128954)
First thing to know is that the subtarget feature checks used to block
accessing a decoder table are only a performance optimization and not
required for functionality. The tables have their own predicate checks.
I've removed them from all the standard extension tables.
-RV32 Zacas decoder namespace has been renamed to RV32GPRPair, I think
Zilsd(rv32 load/store pair) can go in here too.
-The RV32 Zdinx table has been renamed to also use RV32GPRPair.
-The Zfinx table has been renamed to remove superflous "RV" prefix.
-Zcmp and Zcmt tables have been combined into a ZcOverlap table. I think
Zclsd(rv32 compressed load/store pair) can go in here too.
-All the extra standard extension tables are checked after the main
standard extension table. This makes the common case of the main table
matching occur earlier.
-Zicfiss is the exception to this as it needs to be checked before
the main table since it overrides some encodings from Zcmop. This
can't be handled by a predicate based priority as Zicfiss only overrides
a subset of Zcmop encodings.
Commit: 63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
https://github.com/llvm/llvm-project/commit/63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Reduce dynamic relocations for RISCVOpcodesList table. NFC
Inline the strings directly into the table instead of storing a pointer.
Similar to what was done for other searchable tables in the last couple
months.
Commit: 11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
https://github.com/llvm/llvm-project/commit/11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/pr62908.ll
Log Message:
-----------
[JumpThreading] Remove deleted BB from Unreachable (#126984)
Although an unreachable BB is skipped by processBlock, its successor can
still be handled by processBlock, and maybeMergeBasicBlockIntoOnlyPred
may merge the two BBs and delete the unreachable BB. Then the garbage
pointer is left in Unreachable set. This patch avoids merging a BB into
unreachable predecessor.
Commit: 0ebf7b473a98a7433568d0a225d8b38767bdae50
https://github.com/llvm/llvm-project/commit/0ebf7b473a98a7433568d0a225d8b38767bdae50
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Other/print-inst-addrs.ll
A llvm/test/Other/print-inst-debug-locs.ll
A llvm/test/Other/print-mi-addrs.ll
Log Message:
-----------
IR, CodeGen: Add command line flags for dumping instruction addresses and debug locations.
As previously discussed [1], it is sometimes useful to be able to see
instruction addresses and debug locations as part of IR dumps. The
same applies to MachineInstrs which already dump debug locations but
not addresses. Therefore add some flags that can be used to enable
dumping of this information.
[1] https://discourse.llvm.org/t/small-improvement-to-llvm-debugging-experience/79914
Reviewers: rnk
Reviewed By: rnk
Pull Request: https://github.com/llvm/llvm-project/pull/127944
Commit: 85f8bd111f0553699baa7ec8ea396a373497cf45
https://github.com/llvm/llvm-project/commit/85f8bd111f0553699baa7ec8ea396a373497cf45
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
Log Message:
-----------
[NVPTX] Combine addressing-mode variants of ld, st, wmma (#129102)
This change fold together the _ari, _ari64, and _asi variants of these
instructions into a single instruction capable of holding any address.
This allows for the removal of a lot of unnecessary code and moves us
towards a standard way of representing an address in NVPTX.
Commit: 30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
https://github.com/llvm/llvm-project/commit/30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
Log Message:
-----------
[MCA][RISCV] Mark one of the internal CustomBehavior functions static. NFC
This function is only used in the same file.
Commit: 5401c675ebe4114198af068b333aa541fac42491
https://github.com/llvm/llvm-project/commit/5401c675ebe4114198af068b333aa541fac42491
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/avoid-wx-segment.c
Log Message:
-----------
[BOLT][instr] Avoid WX segment (#128982)
BOLT instrumented binary today has a readable (R), writeable (W) and also
executable (X) segment, which Android system won't load due to its WX
attribute. Such RWX segment was produced because BOLT has a two step linking,
first for everything in the updated or rewritten input binary and next for
runtime library. Each linking will layout sections in the order of RX sections
followed by RO sections and then followed by RW sections. So we could end up
having a RW section `.bolt.instr.counters` surrounded by a number of RO and RX
sections, and a new text segment was then formed by including all RX sections
which includes the RW section in the middle, and hence the RWX segment. One
way to fix this is to separate the RW `.bolt.instr.counters` section into its
own segment by a). assigning the starting addresses for section
`.bolt.instr.counters` and its following section with regular page aligned
addresses and b). creating two extra program headers accordingly.
Commit: abe1ecff5428871ea79be41b6db38e585dbd79e8
https://github.com/llvm/llvm-project/commit/abe1ecff5428871ea79be41b6db38e585dbd79e8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang][runtime] Detect byte order reversal problems (#129093)
When reading an unformatted sequential file with variable-length
records, detect byte order reversal problems with the first record's
header and footer words, and emit a more detailed error message.
Commit: 51dc52631c7b0f69f84ff558ce872f1e080d338a
https://github.com/llvm/llvm-project/commit/51dc52631c7b0f69f84ff558ce872f1e080d338a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Lower/io-derived-type.f90
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Catch more defined I/O conflicts (#129115)
The code that checks for conflicts between type-bound defined I/O
generic procedures and non-type-bound defined I/O interfaces only works
when then procedures are defined in the same module as subroutines. It
doesn't catch conflicts when either are external procedures, procedure
pointers, dummy procedures, &c. Extend the checking to cover those cases
as well.
Fixes https://github.com/llvm/llvm-project/issues/128752.
Commit: da85b2a86403fb4bf065a4463691914f444bc07a
https://github.com/llvm/llvm-project/commit/da85b2a86403fb4bf065a4463691914f444bc07a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
Log Message:
-----------
[WebAssembly] Generate __clang_call_terminate for Emscripten EH (#129020)
When an exception thrown ends up calling `std::terminate`, for example,
because an exception is thrown within a `noexcept` function or an
exception is thrown from `__cxa_end_catch` during handling the previous
exception, the libc++abi spec says we are supposed to call
`__cxa_begin_catch` before `std::terminate`:
https://libcxxabi.llvm.org/spec.html
> When the personality routine encounters a termination condition, it
will call `__cxa_begin_catch()` to mark the exception as handled and
then call `terminate()`, which shall not return to its caller.
The default Itanium ABI generates a call to `__clang_call_terminate()`,
which is a function that calls `__cxa_begin_catch` and then
`std::terminate`:
```ll
define void @__clang_call_terminate(ptr noundef %0) {
%2 = call ptr @__cxa_begin_catch(ptr %0)
call void @_ZSt9terminatev()
unreachable
}
```
But we replaced this with just a call to `std::terminate` in
https://github.com/llvm/llvm-project/commit/561abd83ffecc8d4ba8fcbbbcadb31efc55985c2
because this caused some tricky transformation problems for Wasm EH. The
detailed explanation why is in the commit description, but the summary
is for Wasm EH it needed a `try` with both `catch` and `catch_all` and
it was tricky to deal with.
But that commit replaced `__clang_call_terminate` with `std::terminate`
for all Wasm programs and not only the ones that use Wasm EH. So
Emscripten EH was also affected by that commit. Emscripten EH is not
able to catch foreign exceptions anyway, so this is unnecessary
compromise.
This makes we use `__clang_call_terminate` as in the default Itanium EH
for Emscripten EH. We may later fix Wasm EH too but that requires more
efforts in the backend.
Related issue:
https://github.com/emscripten-core/emscripten/issues/23720
Commit: 6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
https://github.com/llvm/llvm-project/commit/6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/avx10_2convertintrin.h
Log Message:
-----------
[X86][AVX10.2] Add comments for the avx10_2convertintrin.h file (#120766)
As in title. I will create a sibling pr with comments to the 512
variant.
Commit: 0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
https://github.com/llvm/llvm-project/commit/0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
Author: KAWASHIMA Takahiro <t-kawashima at fujitsu.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang][docs][NFC] Fix Markdown `/*comments*/` (#129018)
`*` in `/*comments*/` were interpreted as emphasis marks and were not
displayed in https://flang.llvm.org/docs/Extensions.html.
Commit: 9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
https://github.com/llvm/llvm-project/commit/9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
Log Message:
-----------
[RISCV] Move RISCVVInversePseudosTable from RISCVMCTargetDesc.cpp to RISCVBaseInfo.cpp. NFC
RISCVMCTargetDesc contains the instruction, register, etc. descriptions
from TableGen. Other searchable tables in MCTargetDesc live in RISCVBaseInfo.cpp
Commit: 1594fa8e5a719b33b1cd584af92e06981d6b3e59
https://github.com/llvm/llvm-project/commit/1594fa8e5a719b33b1cd584af92e06981d6b3e59
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/asan/asan_win.cpp
Log Message:
-----------
[asan][win] Fix CreateThread leak (#126738)
Fix #126541
Since ```t->Destroy``` cannot be called after ```start_routine```(When
calling standard thread_start in crt)
Intercept `ExitThread` and free the memory created by `VirtualAlloc'
Commit: fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
https://github.com/llvm/llvm-project/commit/fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adaptor -> Adapter (NFC) (#129110)
Both spellings are considered correct and acceptable, with adapter being
more common in American English. Given that DAP stands for Debug Adapter
Protocol (with an e) let's go with that as the canonical spelling.
Commit: 28d76714714a2cdcbdd62265de15115015eb9469
https://github.com/llvm/llvm-project/commit/28d76714714a2cdcbdd62265de15115015eb9469
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/unittests/IR/ShapedTypeTest.cpp
Log Message:
-----------
[mlir] Add two clone methods about encoding to RankedTensorType. (#127709)
There are clone methods for shape and element type, but not for
encodings. The revision adds two clone method to RankedTensorType:
- dropEncoding(): Return a clone of this type without the encoding.
- cloneWithEncoding(Attribute encoding): Return a clone of this type
with the given new encoding and the same shape and element type as this
type.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 531c48546d71b193309d79551bd69a3d24944367
https://github.com/llvm/llvm-project/commit/531c48546d71b193309d79551bd69a3d24944367
Author: sstipano <sstipano7 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU][NFC] Move isXDL and isDGEMM to SIInstrInfo. (#129103)
Commit: 1b622a43c4f992e07c6d2cb278291798d8994a00
https://github.com/llvm/llvm-project/commit/1b622a43c4f992e07c6d2cb278291798d8994a00
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
Log Message:
-----------
[ORC] Make callWrapperAsync forwards explicit in ExecutionSession. NFCI.
This change is intended to make the overloads of callWrapperAsync clearer
for clients that only look at the ExecutionSession API.
Previously we forwarded calls to the three callWrapperAsync overloads in
ExecutorProcessControl using one variadic template, but this obscures the
API for clients who only look at ExecutionSession.
Commit: 1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
https://github.com/llvm/llvm-project/commit/1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Fix a misuse of the getShuffleCost API [NFC] (#129137)
The getShuffleCost api, in concept, expects to only deal with non-length
changing shuffles. We were failing to extend the mask appropriately
before invoking it. This came up in
https://github.com/llvm/llvm-project/pull/128537 in discussion of a
potential invariant, but is otherwise unrelated.
Commit: 4904728cab8596320a77a895cb712fba07ea7bb1
https://github.com/llvm/llvm-project/commit/4904728cab8596320a77a895cb712fba07ea7bb1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 14170b16028c087ca154878f5ed93d3089a965c6
https://github.com/llvm/llvm-project/commit/14170b16028c087ca154878f5ed93d3089a965c6
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/resource_binding_attr.hlsl
Log Message:
-----------
[HLSL] Add HLSLResourceBindingAttr to default constant buffer numeric declarations ($Globals) (#128981)
Translates `register(c#`) annotations on numeric constants in the global
scope to `HLSLResourceBindingAttr`. Applies to scalar, vector and array
constants.
Fixes #128964
Commit: 81387754c3ebdb0591f6886a5a426fd00703c905
https://github.com/llvm/llvm-project/commit/81387754c3ebdb0591f6886a5a426fd00703c905
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Add VL and VTYPE to implicit uses on MC vector instructions that also use FRM (#129130)
We accidentally overwote the VL, VTYPE uses from the base class on any
instruction that also uses FRM.
Not sure why the llvm-mca test changed cycle time.
Commit: 0b5bb12534fe95441c1898f345ec867a3ca7c4b0
https://github.com/llvm/llvm-project/commit/0b5bb12534fe95441c1898f345ec867a3ca7c4b0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Move RISCV vector load/store searchable tables from RISCVISelDAGToDAG.cpp to RISCVBaseInfo.cpp. NFC (#129172)
llvm-mca needs some of them for #128978.
I'm relying on -ffunction-sections and -fdata-sections allowing these to
be stripped from tools that don't need them like llvm-mc.
Commit: 39c6c8be2f3f607b413e3f05ab1f4678efdd129a
https://github.com/llvm/llvm-project/commit/39c6c8be2f3f607b413e3f05ab1f4678efdd129a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Fix the locale base API on Linux with musl (#128936)
Since `363bfd6090b0 ([libc++] Use the new locale base API on Linux
(#128007), 2025-02-24)`, musl targets will fail to build with errors
due to missing strtoll_l functions.
Co-authored-by: Pirama Arumuga Nainar <pirama at google.com>
Commit: bafd44bff58cff9efe569a221b232bab004d55cd
https://github.com/llvm/llvm-project/commit/bafd44bff58cff9efe569a221b232bab004d55cd
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add py_binary rule to build hdrgen. (#129161)
Commit: 80f34e2716e8e69347ae16da5fff7114442db310
https://github.com/llvm/llvm-project/commit/80f34e2716e8e69347ae16da5fff7114442db310
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Change BracedInitializerIndentWidth to int (#128988)
Fixes #108526
Commit: 84934674907781c50494a125889ed16e23de2b9f
https://github.com/llvm/llvm-project/commit/84934674907781c50494a125889ed16e23de2b9f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-null-global.s
Log Message:
-----------
[JITLink][AArch64] Ensure that nulls remain null during ptrauth signing.
Signing a null pointer value can, and usually will, result in some high bits
being set, causing null checks to fail. E.g. in
extern void __attribute__((weak_import)) f(void);
void (*p) = &f;
if f is undefined then p should be null (left unsigned).
This patch updates lowerPointer64AuthEdgesToSigningFunction to check for
Pointer64Authenticated edges to null targets. Where found, these edges are
turned into plain Pointer64 edges (which we know from context will write a null
value to the fixup location), and signing instructions for these locations are
omitted from the signing function.
Commit: 746d8b0740095ea3939fef0112a51953ca22cd29
https://github.com/llvm/llvm-project/commit/746d8b0740095ea3939fef0112a51953ca22cd29
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
Log Message:
-----------
[Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (#129101)
Currently, the index of SWMMAC builtins is of type `short`, likely based
on the
assumption that K can only be up to 32, meaning there are only 16
non-zero
elements. However, this is not future-proof. This patch updates all of
them to
`int`.
The intrinsics themselves don't need to be updated since they accept any
integer
type, and in the backend, they are already extended to 32-bit.
Additionally, the
tests already use various kinds of integers.
Partially fixes SWDEV-518183.
Commit: 55f254726ee1a83a40c14cfc39306071044cc68c
https://github.com/llvm/llvm-project/commit/55f254726ee1a83a40c14cfc39306071044cc68c
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[mlir][math] Rsqrt math expand pass expects static shaped operand (#129006)
Similar to the issue reported in
https://github.com/llvm/llvm-project/pull/128299#pullrequestreview-2636142506,
ExpandMath pattern for rsqrt expects the static shaped operands.
Otherwise, it crashes due to the assertion violation.
See: https://github.com/llvm/llvm-project/pull/128299
Commit: e0c690990de97e4de08853d674a316d23ce4a83a
https://github.com/llvm/llvm-project/commit/e0c690990de97e4de08853d674a316d23ce4a83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
Log Message:
-----------
[flang][OpenMP] Add `reduction` clause support to `loop` directive (#128849)
Extends `loop` directive transformation by adding support for the
`reduction` clause.
Commit: 9f28621fae33ecaab2c99af66303d40830182c25
https://github.com/llvm/llvm-project/commit/9f28621fae33ecaab2c99af66303d40830182c25
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Attributor][NFC] Clang format (#129163)
Commit: 3cccb2017ff96d67b0e737eeddb58ff054cedc6e
https://github.com/llvm/llvm-project/commit/3cccb2017ff96d67b0e737eeddb58ff054cedc6e
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Tensor/bufferize.mlir
Log Message:
-----------
[MLIR][Tensor] Enhance bufferization of tensor.expand_shape op (#128871)
Instead of inferring the output shape argument of
memref.expand_shape op, use output_shape argument of tensor.expand_shape
op by adding dynamic dimension support for bufferization of
tensor.expand_shape when there are more than one dynamic dim within a
reassociation set.
Commit: 170b5736824bd4f70a7bf9dd0028b997d85ba76f
https://github.com/llvm/llvm-project/commit/170b5736824bd4f70a7bf9dd0028b997d85ba76f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/module-fgen-reduced-bmi.cppm
Log Message:
-----------
[Driver] [C++20] [Modules] Warning for the surprising useless case for reduced BMI
Found in downstream. I didn't realize the output file for precompile and
reduced BMI refers to the same location. Then the generating process of
reduced BMI is basically a waste of time.
Commit: 2fa6c5265eda03925cef217f388a11a2a1616c54
https://github.com/llvm/llvm-project/commit/2fa6c5265eda03925cef217f388a11a2a1616c54
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Add baseline tests for simplify elts of readfirstlane (#128645)
Commit: d410f093da7b9e3cd245dac62682ec1acd29d117
https://github.com/llvm/llvm-project/commit/d410f093da7b9e3cd245dac62682ec1acd29d117
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Simplify demanded vector elts of readfirstlane sources (#128646)
Stub implementation of simplifyDemandedVectorEltsIntrinsic for
readfirstlane.
Commit: b2152823e003bb29c9161a55fabe76a3a3cb8b0a
https://github.com/llvm/llvm-project/commit/b2152823e003bb29c9161a55fabe76a3a3cb8b0a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Revert "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
This reverts commit 4904728cab8596320a77a895cb712fba07ea7bb1. Downstream
test failed, reverting during investigation.
Commit: 9fefc013dbd0d8478b22a38925b3a171a34edc98
https://github.com/llvm/llvm-project/commit/9fefc013dbd0d8478b22a38925b3a171a34edc98
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
M llvm/test/Transforms/GVN/PRE/atomic.ll
M llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/nonintegral.ll
M llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
Log Message:
-----------
[GVN/PRE] Remove triple from GVN/PRE tests (#129073)
The tests in GVN/PRE need not to depend on target triple. Removing the
triple dependence from all the tests in this directory.
Commit: 97da0856b0fd895a76306bbb3d2023469ed8a0be
https://github.com/llvm/llvm-project/commit/97da0856b0fd895a76306bbb3d2023469ed8a0be
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
Log Message:
-----------
[PowerPC] Simplify ELFStreamer and XCOFFStreamer
Commit: 50064db174acf672c7e72e10a72d1302c7aecadd
https://github.com/llvm/llvm-project/commit/50064db174acf672c7e72e10a72d1302c7aecadd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#129189)
Commit: 192b13bc9fa914d4ca87f2cd43aec40650ed5663
https://github.com/llvm/llvm-project/commit/192b13bc9fa914d4ca87f2cd43aec40650ed5663
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#129194)
Commit: 9b514bc89310de941939e6889b326da781adea84
https://github.com/llvm/llvm-project/commit/9b514bc89310de941939e6889b326da781adea84
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix affine data copy generate for zero-ranked memrefs (#129186)
Fix affine data copy generate for zero-ranked memrefs.
Fixes: https://github.com/llvm/llvm-project/issues/122210 and
https://github.com/llvm/llvm-project/issues/61167
Test cases borrowed from https://reviews.llvm.org/D147298, authored by
Lewuathe <Kai Sasaki>.
Co-authored-by: Kai Sasaki <lewuathe at gmail.com>
Commit: 497d4f175e7460a5a76bff44a5fa95c7ce1bb393
https://github.com/llvm/llvm-project/commit/497d4f175e7460a5a76bff44a5fa95c7ce1bb393
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIRV] Remove unused variable. NFC
Commit: f4aea1324d78778e86541ffc64859154cc9064d9
https://github.com/llvm/llvm-project/commit/f4aea1324d78778e86541ffc64859154cc9064d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#129193)
Commit: 44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
https://github.com/llvm/llvm-project/commit/44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129190)
Commit: 15c49b9db3f60bdbd320271d5e97f118c00b95dd
https://github.com/llvm/llvm-project/commit/15c49b9db3f60bdbd320271d5e97f118c00b95dd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't change AST in CodeGen/Coroutines
The root source of other odd bugs.
We performed a hack in CodeGen/Coroutines. But we didn't recognize that
the CodeGen is a consumer of AST. The CodeGen shouldn't change AST in
any ways. It'll break the assumption about the ASTConsumer in Clang's
framework, which may break any other clang-based tools which depends on
multiple consumers to work together.
The fix here is simple. But I am not super happy about the test. It is
too specific and verbose. We can remove this if we can get the signature
of the AST in ASTContext.
Commit: 2871f6905257169f8a49b13289421a668bf24051
https://github.com/llvm/llvm-project/commit/2871f6905257169f8a49b13289421a668bf24051
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/SemaCXX/embed-init-list.cpp
Log Message:
-----------
[clang] Fix issues with #embed and intializer lists/template arguments (#128890)
Sometimes number of expressions in InitListExpr is used for template
argument deduction. So, in these cases we need to pay attention to real
number of expressions including expanded #embed data.
Fixes https://github.com/llvm/llvm-project/issues/122306
Commit: a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
https://github.com/llvm/llvm-project/commit/a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Fir/Todo/coordinate_of_2.fir
M flang/test/Fir/Todo/coordinate_of_3.fir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-value-copy.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/field-index.fir
M flang/test/Fir/pdt.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
M flang/test/Lower/HLFIR/c_ptr-constant-init.f90
M flang/test/Lower/HLFIR/intrinsic-module-procedures.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_f_pointer.f90
M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/call-by-value.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/forall/array-pointer.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
Log Message:
-----------
[flang] update fir.coordinate_of to carry the fields (#127231)
This patch updates fir.coordinate_op to carry the field index as
attributes instead of relying on getting it from the fir.field_index
operations defining its operands.
The rational is that FIR currently has a few operations that require
DAGs to be preserved in order to be able to do code generation. This is
the case of fir.coordinate_op, which requires its fir.field operand
producer to be visible.
This makes IR transformation harder/brittle, so I want to update FIR to
get rid if this.
Codegen/printer/parser of fir.coordinate_of and many tests need to be
updated after this change.
Commit: d0edd931bcc328b9502289d346f2b2219341f853
https://github.com/llvm/llvm-project/commit/d0edd931bcc328b9502289d346f2b2219341f853
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
Log Message:
-----------
[Coroutines] Mark parameter allocas with coro.outside.frame metadata (#127653)
Parameters to a coroutine get copied (moved) to coroutine-local
instances which code inside the coroutine then uses.
The original parameters should not be part of the frame. Normally
CoroSplit figures that out by itself, but for [[clang::trivial_abi]]
parameters which, get destructed at the end of the ramp function, it
does not (see bug), causing use-after-free's if the frame is destroyed
before the end of the ramp (as happens if it doesn't suspend).
Since Clang knows these should never be part of the frame, use metadata
to make it so.
Fixes #127499
Commit: ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
https://github.com/llvm/llvm-project/commit/ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
Author: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/vecintrin.h
Log Message:
-----------
[SystemZ] Add header guard macros to vecintrin.h (#129170)
Add header guard macros to clang/lib/Headers/vecintrin.h. Found while
compiling the latest numpy with clang 19 on s390x which ends up
including vecintrin.h twice. The gcc version of this file has header
guards so numpy compiles fine with gcc.
Signed-off-by: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Commit: a278b28a945a8354627303604671a28751f3ca51
https://github.com/llvm/llvm-project/commit/a278b28a945a8354627303604671a28751f3ca51
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] fix build after bafd44bff58cff9efe569a221b232bab004d55cd
Commit: 751f2fc8d5f465be5634b39adb8256a02f419984
https://github.com/llvm/llvm-project/commit/751f2fc8d5f465be5634b39adb8256a02f419984
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/unique_object_duplication.h
Log Message:
-----------
Disable unique-object-duplication warning in templates (#129120)
I've been trying to resolve instances of the unique-object-duplication
warning in chromium code. Unfortunately, I've found that practically
speaking, it's near-impossible to actually fix the problem when
templates are involved.
My understanding is that the warning is correct -- the variables it's
flagging are indeed duplicated and potentially causing bugs as a result.
The problem is that hiddenness is contagious: if a templated class or
variable depends on something hidden, then it itself must also be
hidden, even if the user explicitly marked it visible. In order to make
it actually visible, the user must manually figure out everything that
it depends on, mark them as visible, and do so recursively until all of
its ancestors are visible.
This process is extremely difficult and unergonomic, negating much of
the benefits of templates since now each new use requires additional
work. Furthermore, the process doesn't work if the user can't edit some
of the files, e.g. if they're in a third-party library.
Since a warning that can't practically be fixed isn't useful, this PR
disables the warning for _all_ templated code by inverting the check.
The warning remains active (and, in my experience, easily fixable) in
non-templated code.
Commit: f09e245b35f291ab48f6efeb4986e7f9818b7cb7
https://github.com/llvm/llvm-project/commit/f09e245b35f291ab48f6efeb4986e7f9818b7cb7
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[NFC][clang] Remove trailing whitespace in Options.td
Commit: 1adb00110e35c6963175ecc000e42caf858b4c07
https://github.com/llvm/llvm-project/commit/1adb00110e35c6963175ecc000e42caf858b4c07
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] port 15c49b9db3f60bdbd320271d5e97f118c00b95dd
Commit: 62f15a042b2fd2ed668ba592dc4d13b0c1e84540
https://github.com/llvm/llvm-project/commit/62f15a042b2fd2ed668ba592dc4d13b0c1e84540
Author: klensy <klensy at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/test/Driver/config-file.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/HLFIR/type-info-components.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
Log Message:
-----------
[flang][test] Fix filecheck annotation typos [2/n] (#126099)
Few more fixes, previous: #92387
Co-authored-by: klensy <nightouser at gmail.com>
Commit: 0ba4767feac7878044b1352d86806e8e5a9bcf29
https://github.com/llvm/llvm-project/commit/0ba4767feac7878044b1352d86806e8e5a9bcf29
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
Log Message:
-----------
[AMDGPU] Cosmetic tweaks in AMDGPUAtomicOptimizer. NFC. (#129081)
Simplify iteration over the ToReplace vector, and some related cosmetic
cleanups.
Commit: abd97d9685c07c4787ff22e56c0a7b8963630063
https://github.com/llvm/llvm-project/commit/abd97d9685c07c4787ff22e56c0a7b8963630063
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
Log Message:
-----------
[CaptureTracking] Take non-willreturn calls into account
We can leak one bit of information about the address by either
diverging or not.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: 6a46cf4dc6e134e4999ea655faac28cfd92534b2
https://github.com/llvm/llvm-project/commit/6a46cf4dc6e134e4999ea655faac28cfd92534b2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISel: Restore disabled test (#129001)
Commit: 76910f914cdd4b86b28e0d5852155244ee47dc53
https://github.com/llvm/llvm-project/commit/76910f914cdd4b86b28e0d5852155244ee47dc53
Author: Meng Zhuo <mengzhuo at iscas.ac.cn>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Log Message:
-----------
[tsan][RISCV] Add Go support for linux/riscv64 (#127295)
This is needed to support race detector in Golang.
See also: https://github.com/golang/go/issues/64345
Commit: 36f0838a3dd19de085d10f79cf0577d8bc4a1922
https://github.com/llvm/llvm-project/commit/36f0838a3dd19de085d10f79cf0577d8bc4a1922
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
Log Message:
-----------
[FunctionAttrs] Consider non-willreturn functions during capture inference
Matching the CaptureTracking change in abd97d9685c07c4787ff22e56c0a7b8963630063,
only directly infer captures(none) for
readonly+nocapture+willreturn+void.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: f363cfaa74cd209ff972695787d084c6b77b0756
https://github.com/llvm/llvm-project/commit/f363cfaa74cd209ff972695787d084c6b77b0756
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa][tosa-to-linalg] Ignore Int NaN Mode (#129041)
For non floating point operations NaN propagation mode has no meaning
and can be safely ignored. For non integer types skip the compare and
select materialization for NaN propagation even in "IGNORE" mode. This
fixes a bug where an unchecked `cast<FloatType>()` was called in the
"IGNORE" case even when the operation is acting on integers.
Update the lit tests for the NaN propagation lowering to check that the
propagation logic is not materialized in the case of a non floating
point type e.g. i8.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: c93dc581d979eb20ded470d2c16e51b3e775f6e7
https://github.com/llvm/llvm-project/commit/c93dc581d979eb20ded470d2c16e51b3e775f6e7
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)
The default triple of Amazon Linux on AArch64 is aarch64-amazon-linux,
see issue highlighded by PR #109263, somewhat serious linker issues are
encountered if any other triple is being used.
Unfortunately, this makes XFAIL lines like:
`XFAIL: target=aarch64{{.*}}-linux-gnu` ineffective,
making it impossible to complete all of the check-cxx without failures.
Commit: 1aea0241f1cce9eb4eba3e4add3be9370e30e415
https://github.com/llvm/llvm-project/commit/1aea0241f1cce9eb4eba3e4add3be9370e30e415
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-select.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based select operations. (#128881)
Patch also adds missing tests for unpacked half and float types.
Commit: 1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
https://github.com/llvm/llvm-project/commit/1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[libc++] Enable algorithm vectorization on arm neon (#128873)
Previously the wrong detection macro has been used to check whether arm
NEON is available. This fixes it, and removes a few unnecessary includes
from `__algorithm/simd_utils.h` as a drive-by.
Commit: a19979166c343822be5cb7744da322d2eddff3bc
https://github.com/llvm/llvm-project/commit/a19979166c343822be5cb7744da322d2eddff3bc
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A clang/test/Modules/pr28744.cpp
Log Message:
-----------
[modules] Add missing test file for b21ee08e57173102b67bc18237b135550 (#129221)
The commit missed a test file.
Commit: 89e7f4d31b2673fd3bfaf065f930ca9139d92e10
https://github.com/llvm/llvm-project/commit/89e7f4d31b2673fd3bfaf065f930ca9139d92e10
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/VectorUtils.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/sincos.ll
Log Message:
-----------
[LV] Teach the vectorizer to cost and vectorize modf and sincospi intrinsics (#129064)
Follow on to #128035. It is a small extension to support vectorizing
`llvm.modf.*` and `llvm.sincospi.*` too.
This renames the test files from `sincos.ll` ->
`multiple-result-intrinsics.ll` to group together the similar tests
(which make up most of this PR).
Commit: 26fc3aa983ab4615dfc32cebf74076c118de2a9d
https://github.com/llvm/llvm-project/commit/26fc3aa983ab4615dfc32cebf74076c118de2a9d
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
M clang/test/OpenMP/metadirective_ast_print.c
A clang/test/OpenMP/metadirective_otherwise.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
Log Message:
-----------
[OpenMP] Missing implicit otherwise clause in metadirective. (#127113)
Compiling this:
`int main() {`
` #pragma omp metadirective when(use r= {condition(0)}`
`: parallel for)`
`for (int i=0; i<10; i++)`
;
}`
is generating an error:
`error: expected expression`
The compiler is interpreting this as if it's compiling a `#pragma omp
metadirective` with no `otherwise` clause.
In the OMP5.2 specs chapter 7.4 it's mentioned that:
`If no otherwise clause is specified the effect is as if one was
specified without an associated directive variant.`
This patch fixes the issue.
Commit: 5d89123a3962016216e377463b4b3c97df927016
https://github.com/llvm/llvm-project/commit/5d89123a3962016216e377463b4b3c97df927016
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-phi.ll
Log Message:
-----------
[X86] Add tests for sspstrong with phi nodes (NFC)
Commit: e481943f5f02ce841677cd0a08ca1651c89384a7
https://github.com/llvm/llvm-project/commit/e481943f5f02ce841677cd0a08ca1651c89384a7
Author: gdehame <gabrieldehame at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/control_flow.mlir
Log Message:
-----------
[MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression op in the emitted if condition of a cf.cond_br (#128958)
emitc.expression ops are expected to be inlined in the if condition in
the lowering of cf.cond_br if this is their only use but they weren't
inlined.
Instead, a use of the variable corresponding to the expression result
was generated but with no declaration/definition.
Commit: c298f71ea6fd2965e1768307496ee3aa0c40fd07
https://github.com/llvm/llvm-project/commit/c298f71ea6fd2965e1768307496ee3aa0c40fd07
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/test/CodeGen/SystemZ/cond-move-10.mir
A llvm/test/CodeGen/SystemZ/cond-move-11.mir
Log Message:
-----------
[SystemZ] Fix regstate of SELRMux operand in selectSLRMux(). (#128555)
It seems that there can be other cases with this that also can lead to
wrong code (discovered with csmith). This time it involved not the kill
flag but the undef flag.
Use the intersection of the flags from both MachineOperand:s instead
of the RegState from just one of them.
Commit: 9e2eb95c238d5d7b059da766b24e5a01c683bf7a
https://github.com/llvm/llvm-project/commit/9e2eb95c238d5d7b059da766b24e5a01c683bf7a
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't actually emit an output file from unit test
Commit: 2477f82db927174444f6ed7bee9d842e5fd27d53
https://github.com/llvm/llvm-project/commit/2477f82db927174444f6ed7bee9d842e5fd27d53
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/arm-mfp8.c
Log Message:
-----------
[clang] Update SVE load and store intrinsics to have FP8 variants (#126726)
Commit: 00f5763943205f6e29ef08c7d2056599ecf942fd
https://github.com/llvm/llvm-project/commit/00f5763943205f6e29ef08c7d2056599ecf942fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
AMDGPU: Remove nocapture attribute from is.shared and is.private intrinsics (#129238)
This should be replaced with captures(address), but tablegen currently
has
no way to indicate that on an intrinsic. I opened issue #129184 to fix
this.
Commit: 71389e565db6c4f9b5b4515baaf711271ed29877
https://github.com/llvm/llvm-project/commit/71389e565db6c4f9b5b4515baaf711271ed29877
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
Log Message:
-----------
[NFC][analyzer] OOB test consolidation III: 'outofbound' tests (#128508)
Before commit 6e17ed9 the test files `outofbound.c` and
`outofbound-notwork.c` tested the behavior of the old alpha checker
`alpha.security.ArrayBound` (V1); then that commit converted them into
tests for the checker `security.ArrayBound` which was previously called
`alpha.security.ArrayBoundV2`.
This commit removes these test files and migrates their useful content
to `out-of-bounds.c`. The file `outofbound.c` contained lots of
testcases that covered features which are also covered in
`out-of-bounds.c` or `out-of-bounds-diagnostics.c`; those redundant
cases are discarded during this migration process.
This is part of a commit series that reorganizes the tests of
`security.ArrayBound` to a system that's easier to understand and
maintain.
Commit: db973cea7cae3a14c89fc57ea3717b7313d24b97
https://github.com/llvm/llvm-project/commit/db973cea7cae3a14c89fc57ea3717b7313d24b97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
A llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] True16 Add OpSel when optimizing exec mask (#128928)
True16 Add OpSel when optimizing exec mask
True16 VOPCX have the opsel argument. Add it when we create these
instructions in SIOptimizeExecMasking.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: dea08c2b67f38dba707003374f41b2277ab564d4
https://github.com/llvm/llvm-project/commit/dea08c2b67f38dba707003374f41b2277ab564d4
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/region-store.cpp
Log Message:
-----------
Fix RegionStore assertion failure after #127602 (#129224)
Basically, we may leave the loop because if exhaust the fields, array
elements or other subobjects to initialize.
In that case, the Bindings may be in an exhausted state, thus no further
addBinding calls are allowed.
Let's harden the code by sprinkling some early exists in the recursive
dispatcher functions.
And to actually fix the issue, I added a check guarding the single
unguarded addBinding right after a loop I mentioned.
Fixes #129211
Commit: e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
https://github.com/llvm/llvm-project/commit/e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++][ci] Update the Windows toolchains to Clang 19 (#129232)
This also fixes test failures in the clang-cl build configs that started
a couple days ago. It seems like the failures were triggered by an update
to the base image on the Github provided runners.
There were failures in test/libcxx/system_reserved_names.gen.py, due to
an issue in an Clang intrinsics header (avx512fp16intrin.h); this issue
was observed and fixed for Clang 19 in 6f04f46927c. The test does
#define A SYSTEM_RESERVED_NAME
which clashes with a parameter with the name `A` in that header.
By upgrading the toolchain to Clang 19, we get fixed version of this
intrinsics header.
Also update the llvm-mingw toolchains to a version with Clang 19.1.7.
Commit: 0f0665db067f9680f0a90ad07c2f42842acc693f
https://github.com/llvm/llvm-project/commit/0f0665db067f9680f0a90ad07c2f42842acc693f
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCUDA/dtor.cu
Log Message:
-----------
[CUDA][HIP] check dtor in deferred diag (#129117)
Currently the deferred diag fails to diagnose calling of host function
in host device function in device compilation triggered by destructors.
This can be further divided into two issuse:
1. the deferred diag visitor does not visit dtor of member and parent
class when visiting dtor, which it should
2. the deferred diag visitor does not visit virtual dtor of explicit
template class instantiation, which it should
Due to these issues, some constexpr functions which call host functions
are emitted on device side, which causes undefind symbols in linking
stage, as revealed by
https://github.com/llvm/llvm-project/issues/108548
By fixing these issue, clang will diag the issues early during
compilation instead of linking.
Commit: 037cf12b0772654225dded8116f48ee23b9285c2
https://github.com/llvm/llvm-project/commit/037cf12b0772654225dded8116f48ee23b9285c2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/libcxx/xopen_source.gen.py
Log Message:
-----------
[libc++] Mark _XOPEN_SOURCE test as unsupported on FreeBSD (#128950)
The test otherwise fails on FreeBSD, which wasn't noticed when
originally landing the patch that added the test because FreeBSD
CI was disabled at that moment.
Commit: 24abf2c7285df7b5c1b442df10cd0b090a841358
https://github.com/llvm/llvm-project/commit/24abf2c7285df7b5c1b442df10cd0b090a841358
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/utils/lui/sourcewin.py
Log Message:
-----------
[lldb] fix(lldb/**.py): fix invalid escape sequences (#94034)
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: 94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
https://github.com/llvm/llvm-project/commit/94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
Log Message:
-----------
[SelectionDAG][RISCV] Promote VECREDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM} (#128800)
This patch also adds the tests for VP_REDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM}, which have been supported for a while.
Commit: 4a477eeefa5be85f51e146aca8f76e2421a63971
https://github.com/llvm/llvm-project/commit/4a477eeefa5be85f51e146aca8f76e2421a63971
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
Fix fp8-init-list.c test failure (#129259)
Fix error in fp8-init-list.c introduced by PR #126726
Commit: a73e591f33159d177dbd123d1bc9d9352e3e531e
https://github.com/llvm/llvm-project/commit/a73e591f33159d177dbd123d1bc9d9352e3e531e
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
A llvm/test/CodeGen/PowerPC/v1024ls.ll
Log Message:
-----------
[PowerPC] custom lower v1024i1 load/store (#126969)
Support moving PPC dense math register values to and from storage with
LLVM IR load/store.
Commit: 2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
https://github.com/llvm/llvm-project/commit/2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 15c49b9db3f6
Commit: 09c64e56d4b79421ea3ccb3e8766d1056725874d
https://github.com/llvm/llvm-project/commit/09c64e56d4b79421ea3ccb3e8766d1056725874d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
Log Message:
-----------
[lldb] Restore register state if PrepareTrivialCall fails (#129038)
Fixes #124269
PrepareTrivalCall always had the possibility of failing, but given that
it only wrote to general purpose registers, if it did, you had bigger
problems.
When it failed, we did not mark the thread plan valid and when it was
torn down we didn't try to restore the register state. This meant that
if you tried to continue, the program was unlikely to work.
When I added AArch64 GCS support, I needed to handle the situation where
the GCS pointer points to unmapped memory and we fail to write the extra
entry we need. So I added code to restore the gcspr_el0 register
specifically if this happened, and ordered the operations so that we
tried this first.
In this change I've made the teardown of an invalid thread plan restore
the register state if one was saved. It may be there isn't one if
ConstructorSetup fails, but this is ok because that function does not
modify anything.
Now that we're doing that, I don't need the GCS specific code anymore,
and all thread plans are protected from this in the rare event something
does fail.
Testing is done by the existing GCS test case that points the gcspr into
unmapped memory which causes PrepareTrivialCall to fail. I tried adding
a simulated test using a mock gdb server. This was not possible because
they all use DynamicLoaderStatic which disables all JIT features.
Commit: 248be98418225fd409bc3ffb1834573c7890085e
https://github.com/llvm/llvm-project/commit/248be98418225fd409bc3ffb1834573c7890085e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Reapply "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
With a fix for fully undef masks. These can't reach the lowering code, but
can reach the costing code via e.g. SLP.
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 9af10e3d9d97403bc389ed92ee63c80d0ab1df57
https://github.com/llvm/llvm-project/commit/9af10e3d9d97403bc389ed92ee63c80d0ab1df57
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129191)
Commit: b2525dc66379f2c9942ed3cff6101b035003532c
https://github.com/llvm/llvm-project/commit/b2525dc66379f2c9942ed3cff6101b035003532c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/MCA/InstrBuilder.cpp
Log Message:
-----------
[MCA] Avoid repeated hash lookups (NFC) (#129192)
Commit: 7e33bebe7c8c1258248567670209e6756a6cf77a
https://github.com/llvm/llvm-project/commit/7e33bebe7c8c1258248567670209e6756a6cf77a
Author: ShatianWang <38512325+ShatianWang at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
R bolt/include/bolt/Passes/ContinuityStats.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/profile-quality-reporting.test
Log Message:
-----------
[BOLT] Report flow conservation scores (#127954)
Add two additional profile quality stats for CG (call graph) and CFG
(control flow graph) flow conservations besides the CFG discontinuity
stats introduced in #109683. The two new stats quantify how different
"in-flow" is from "out-flow" in the following cases where they should be
equal. The smaller the reported stats, the better the flow conservations
are.
CG flow conservation: for each function that is not a program entry, the
number of times the function is called according to CG ("in-flow")
should be equal to the number of times the transition from an entry
basic block of the function to another basic block within the function
is recorded ("out-flow").
CFG flow conservation: for each basic block that is not a function entry
or exit, the number of times the transition into this basic block from
another basic block within the function is recorded ("in-flow") should
be equal to the number of times the transition from this basic block to
another basic block within the function is recorded ("out-flow").
Use `-v=1` for more detailed bucketed stats, and use `-v=2` to dump
functions / basic blocks with bad flow conservations.
Commit: 3f63e1c834e000d4ea95d667ae224cc232927196
https://github.com/llvm/llvm-project/commit/3f63e1c834e000d4ea95d667ae224cc232927196
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 7e33bebe7c8c
Commit: 43eb18e51f5582b73665306a45c640a880976ec1
https://github.com/llvm/llvm-project/commit/43eb18e51f5582b73665306a45c640a880976ec1
Author: Michael Flanders <flanders.michaelk at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
A clang/test/Analysis/new-user-defined.cpp
Log Message:
-----------
[analyzer] Do list initialization for CXXNewExpr with initializer list arg (#127702)
Fixes #116444.
Closed #127700 because I accidentally updated it in github UI.
### Current vs expected behavior
Previously, the result of a `CXXNewExpr` was not always list initialized
when using an initializer list.
In this example:
```
struct S { int x; };
void F() {
S *s = new S{1};
delete s;
}
```
there would be a binding of `s` to `compoundVal{1}`, but this isn't used
during later field binding lookup. After this PR, there is instead a
binding of `s->x` to `1`. This is the cause of #116444 since the field
binding lookup returns undefined in some cases currently.
### Changes
This PR swaps around the handling of typed value regions (seems to be
the usual region type when doing non-CXX-new-expr list initialization)
and symbolic regions (the result of the CXX new expr), so that symbolic
regions also get list initialized. In the below snippet, it swaps the
order of the two conditionals.
https://github.com/llvm/llvm-project/blob/8529bd7b964cc9fafe8fece84f7bd12dacb09560/clang/lib/StaticAnalyzer/Core/RegionStore.cpp#L2426-L2448
### Followup work
This PR only makes CSA do list init for `CXXNewExpr`s. After this, I
would like to make some changes to `RegionStoreMananger::bind` in how it
handles list initialization generally.
I've added some straightforward test cases here for the `new` expr with
a list initializer. I started adding some more before realizing that the
current general (not just `new` expr) list initialization could be
changed to handle more cases like list initialization of unions and
arrays (like https://github.com/llvm/llvm-project/issues/54910). Lmk if
it is preferred to then leave these test cases out for now.
Commit: 9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
https://github.com/llvm/llvm-project/commit/9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libc/include/CMakeLists.txt
A libc/include/Uefi.h.def
A libc/include/Uefi.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/EFIAPI-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/EFI_ALLOCATE_TYPE.h
A libc/include/llvm-libc-types/EFI_BOOT_SERVICES.h
A libc/include/llvm-libc-types/EFI_CAPSULE.h
A libc/include/llvm-libc-types/EFI_CONFIGURATION_TABLE.h
A libc/include/llvm-libc-types/EFI_DEVICE_PATH_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_EVENT.h
A libc/include/llvm-libc-types/EFI_GUID.h
A libc/include/llvm-libc-types/EFI_HANDLE.h
A libc/include/llvm-libc-types/EFI_INTERFACE_TYPE.h
A libc/include/llvm-libc-types/EFI_LOCATE_SEARCH_TYPE.h
A libc/include/llvm-libc-types/EFI_MEMORY_DESCRIPTOR.h
A libc/include/llvm-libc-types/EFI_MEMORY_TYPE.h
A libc/include/llvm-libc-types/EFI_OPEN_PROTOCOL_INFORMATION_ENTRY.h
A libc/include/llvm-libc-types/EFI_PHYSICAL_ADDRESS.h
A libc/include/llvm-libc-types/EFI_RUNTIME_SERVICES.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_INPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_STATUS.h
A libc/include/llvm-libc-types/EFI_SYSTEM_TABLE.h
A libc/include/llvm-libc-types/EFI_TABLE_HEADER.h
A libc/include/llvm-libc-types/EFI_TIME.h
A libc/include/llvm-libc-types/EFI_TIMER_DELAY.h
A libc/include/llvm-libc-types/EFI_TPL.h
A libc/include/llvm-libc-types/EFI_VIRTUAL_ADDRESS.h
Log Message:
-----------
[libc] Add UEFI headers (#127126)
Originated from #120687
This PR simply adds the necessary headers for UEFI which defines all the
necessary types. This PR unlocks the ability to work on other PR's for
UEFI support.
Commit: 029becebfd76e8ba05f6dd978eec1daba8c34505
https://github.com/llvm/llvm-project/commit/029becebfd76e8ba05f6dd978eec1daba8c34505
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
[clang][HIP] Make some math not not work with AMDGCN SPIR-V (#128360)
Do not hardcode `address_space(5)` (`private`) in the ROCDL interface,
as that breaks SPIRV generation (the latter uses 0). Add test. In the
long run we should stop using ROCDL inline.
Commit: c0bf4b2c5778056de0949aceba2cf9e26bed2f24
https://github.com/llvm/llvm-project/commit/c0bf4b2c5778056de0949aceba2cf9e26bed2f24
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Remove unneeded VPValue::getLiveInIRValue() const (NFC).
The accessor is not needed/used.
Commit: 1b25c0c4da968fe78921ce77736e5baef4db75e3
https://github.com/llvm/llvm-project/commit/1b25c0c4da968fe78921ce77736e5baef4db75e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
Log Message:
-----------
[RISCV] Improve assembler error message for Zcmp stack adjustment. (#129180)
Instead of referring the user to the spec, print the expected range.
Commit: 7c26356703f02eb72ab6a39d89cb507dceef5164
https://github.com/llvm/llvm-project/commit/7c26356703f02eb72ab6a39d89cb507dceef5164
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
A llvm/test/tools/llvm-objdump/ELF/verdef-invalid.test
M llvm/test/tools/llvm-objdump/ELF/verdef.test
M llvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-objdump] Rework .gnu.version_d dumping
and fix crash when vd_aux is invalid (#86611).
vd_version, vd_flags, vd_ndx, and vd_cnt in Elf{32,64}_Verdef are
16-bit. Change VerDef to use uint16_t instead.
vda_name specifies a NUL-terminated string. Update getVersionDefinitions
to remove some `.c_str()`.
Pull Request: https://github.com/llvm/llvm-project/pull/128434
Commit: bdace105387f24ada9744147e06e789503a74143
https://github.com/llvm/llvm-project/commit/bdace105387f24ada9744147e06e789503a74143
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Rename the result of MATMUL from `c` to `output` (#129274)
This renames the output of TOSA MatMul operator from `c` to `output`
to align to TOSA spec
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 926600a8051882a2895b98a635aaa41f13c7c4ff
https://github.com/llvm/llvm-project/commit/926600a8051882a2895b98a635aaa41f13c7c4ff
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
Revert "[clang][HIP] Make some math not not work with AMDGCN SPIR-V" (#129280)
Reverts llvm/llvm-project#128360 pending resolution of odd test break.
Commit: 992b451f0837b08961b4aa5dab5e90bc2443b482
https://github.com/llvm/llvm-project/commit/992b451f0837b08961b4aa5dab5e90bc2443b482
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
Log Message:
-----------
[Utils][UnifyLoopExits] Avoid costly updates if nothing changed (#129179)
If the ControlFlowHub did not perform any change to the control flow,
there is no need to repair SSA, update the loop structure, and verify a
bunch of things. This is not completely NFC though, repairSSA introduced
PHI nodes with a single entry that are now missing.
My code went from 400+ seconds to 1 second, since no loop required the
exits to be unified, but there were many "complex" loops.
Commit: 818bca820ffd3e30fbd3852da0436c24ff15f8a3
https://github.com/llvm/llvm-project/commit/818bca820ffd3e30fbd3852da0436c24ff15f8a3
Author: Valentyn Yukhymenko <valentin.yukhymenko at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang-tidy] [dataflow] Cache reference accessors for `bugprone-unchecked-optional-access` (#128437)
Fixes https://github.com/llvm/llvm-project/issues/126283
Extending https://github.com/llvm/llvm-project/pull/112605 to cache
const getters which return references.
Fixes false positives from const reference accessors to object
containing optional member
Commit: 7446601c6a9b71945fdc9d7434d8347789708858
https://github.com/llvm/llvm-project/commit/7446601c6a9b71945fdc9d7434d8347789708858
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix a potential overflow bug reported by #126334 (#129169)
`MeasureTokenLength` may return an unsigned 0 representing failure in
obtaining length of a token. The analysis now gives up on such cases.
Otherwise, there might be issues caused by unsigned integer "overflow".
Commit: f5749e7893eec74da75ff9e40282e35ccd3046b2
https://github.com/llvm/llvm-project/commit/f5749e7893eec74da75ff9e40282e35ccd3046b2
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Remove out_shape from transpose_conv2d (#129133)
Commit: af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
https://github.com/llvm/llvm-project/commit/af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for empty global ctor/dtor lists (#128969)
LLVM IR emitted in from C++ may contain `@llvm.global_ctors = appending
global [0 x { i32, ptr, ptr }] zeroinitializer`. Before this PR, if we
try to roundtrip code like this from the importer, we'll end up with
nothing in place.
Note that `llvm::appendToGlobalCtors` ignores empty lists and this PR
uses the same approach as `llvm-as`, which doesn't use the utilities
from `llvm/lib/Transforms/Utils/ModuleUtils.cpp` in order to build this
- it calls into creating a global variable from scratch.
Commit: a3ac1f2278dec155e0e0b4d06ec816ba325f6979
https://github.com/llvm/llvm-project/commit/a3ac1f2278dec155e0e0b4d06ec816ba325f6979
Author: John Harrison <harjohn at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
Log Message:
-----------
[lldb-dap] Adding server mode support to lldb-dap VSCode extension. (#128957)
This adds support for launching lldb-dap in server mode. The extension
will start lldb-dap in server mode on-demand and retain the server until
the VSCode window is closed (when the extension context is disposed).
While running in server mode, launch performance for binaries is greatly
improved by improving caching between debug sessions.
For example, on my local M1 Max laptop it takes ~5s to attach for the
first attach to an iOS Simulator process and ~0.5s to attach each time
after the first.
Commit: 9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
https://github.com/llvm/llvm-project/commit/9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Remove non-portable vsetvli instructions from llvm-mca test. NFC (#129134)
Not all fractional LMULs are required to be support for all SEWs. This
test previously printed a warning for these cases.
Commit: 80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
https://github.com/llvm/llvm-project/commit/80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A lld/test/wasm/rpath.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Add RUNTIME_PATH support to wasm-ld (#129050)
This finishes adding RPATH support for WebAssembly.
See my previous PR which added RPATH support to yaml2obj and obj2yaml:
https://github.com/llvm/llvm-project/pull/126080
See corresponding update to the WebAssembly/tool-conventions repo on
dynamic linking:
https://github.com/WebAssembly/tool-conventions/pull/246
Commit: fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
https://github.com/llvm/llvm-project/commit/fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[asan] Define mallopt and mallinfo for Fuchsia asan runtime (#129105)
Commit: dd3c4fbec9ce72cd741280aedbba7a643ff78654
https://github.com/llvm/llvm-project/commit/dd3c4fbec9ce72cd741280aedbba7a643ff78654
Author: Marco C. <46560192+Marcondiro at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy][doc] Contributing.rst update snippet and docs (#129209)
This reflects the add_new_check.py changes: isLanguageVersionSupported
is now overridden by default by the script
The changes were instroduced in
https://github.com/llvm/llvm-project/pull/100129
Thanks
Commit: c7529248cd439f001f60f4567a028fda0c72cc2c
https://github.com/llvm/llvm-project/commit/c7529248cd439f001f60f4567a028fda0c72cc2c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-bndl flag for debugging (#129132)
This patch adds a helper flag for bisection debugging. This flag
force-stops vectorization after this many bundles have been considered
for vectorization.
Using -sbvec-stop-bndl=0 will not vectorize the code at all.
Commit: b923f6cf8faca82b8df2a936d8ff36a6125aedcc
https://github.com/llvm/llvm-project/commit/b923f6cf8faca82b8df2a936d8ff36a6125aedcc
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
Log Message:
-----------
[mlir][tosa] Require PadOp's pad_const to be rank1 (#129156)
Update PadOp's pad_const input to be rank1.
Fix various lit tests for this change including some conv ops
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Signed-off-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
https://github.com/llvm/llvm-project/commit/c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
A llvm/test/tools/llvm-exegesis/RISCV/rvv/eligible-inst.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/self-aliasing.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vlmax-only.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vtype-rm-setup.test
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPasses.h
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPostprocessing.cpp
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[Exegesis][RISCV] Add initial RVV support (#128767)
This patch adds initial vector extension support to RISC-V's exegesis.
The strategy here is to enumerate all RVV _pseudo_ opcodes as their MC
opcode counterparts are kind of useless under this circumstance. We also
enumerate all possible VTYPE operands in each CodeTemplate
configuration. Various of MachineFunction Passes are used for post
processing the snippets, like inserting VSETVLI instructions.
See https://llvm.org/devmtg/2024-10/slides/techtalk/Hsu-RVV-Exegesis.pdf
for more technical details.
Commit: 9869f84f7ea3ac10b885931d4ed3dd064819684b
https://github.com/llvm/llvm-project/commit/9869f84f7ea3ac10b885931d4ed3dd064819684b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect analysis for UITOFP for signed operand
Commit: a1fdcfa1ea8acc7493e45e9350108bc566044597
https://github.com/llvm/llvm-project/commit/a1fdcfa1ea8acc7493e45e9350108bc566044597
Author: David Green <david.green at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/hadd-combine.ll
Log Message:
-----------
[AArch64] Protect against scalar types in isNVCastToHalfWidthElements.
Fixes #129227
Commit: 56cc9299b78042575422229edb4a7ba15999cbb5
https://github.com/llvm/llvm-project/commit/56cc9299b78042575422229edb4a7ba15999cbb5
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream func args alloca handling (#129167)
This change adds support for collecting function arguments and storing
them in alloca memory slots.
Commit: e1e20c07e48b135c9f9118797f25679132702aea
https://github.com/llvm/llvm-project/commit/e1e20c07e48b135c9f9118797f25679132702aea
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP]Fix bitwidth analysis for signed nodes, incoming into UITOFP nodes
If the signed node is the operand of UITOFP, the bitwidth analysis
should consider minimum value between incoming bitwidth and the bitwidth
of the UITOFP node.
Fixes #129244
Commit: 494f67282f93f4a5c995434a3530a7a76f3aa63c
https://github.com/llvm/llvm-project/commit/494f67282f93f4a5c995434a3530a7a76f3aa63c
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/ptr-access-chain-type.ll
Log Message:
-----------
[SPIR-V] Prevent type change of GEP results in type inference (#129250)
The following reproducer demonstrates the issue with invalid definition
of GEP results during type inference
```
define spir_kernel void @foo(i1 %fl, i64 %idx, ptr addrspace(1) %dest, ptr addrspace(3) %src) {
%p1 = getelementptr inbounds i8, ptr addrspace(1) %dest, i64 %idx
%res = tail call spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32 2, ptr addrspace(1) %p1, ptr addrspace(3) %src, i64 128, i64 1, target("spirv.Event") zeroinitializer)
ret void
}
declare dso_local spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32, ptr addrspace(1), ptr addrspace(3), i64, i64, target("spirv.Event"))
```
Here `OpGroupAsyncCopy` expects i32* arguments and type inference fails
to set a correct type of the GEP result `%p1`, because it is an argument
of `OpGroupAsyncCopy`.
This PR fixes the issue by preventing type change of GEP results in type
inference.
Commit: b8337bc5126d2728f84ce0e06bd019c486203b31
https://github.com/llvm/llvm-project/commit/b8337bc5126d2728f84ce0e06bd019c486203b31
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-size/radix.test
Log Message:
-----------
[llvm-size] Add test for invalid conversion spec on error (#128941)
Follow up to #128447.
Commit: d9edca4fe05245ace93f7f1577a2eb79ec6898b1
https://github.com/llvm/llvm-project/commit/d9edca4fe05245ace93f7f1577a2eb79ec6898b1
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
Log Message:
-----------
[CodeGen] Ensure relative vtables use llvm.type.checked.load.relative (#126785)
This intrinsic is used when whole program vtables is used in conjunction
with either CFI or virtual function elimination. The
`llvm.type.checked.load` is unconditionally used, but we need to use the
relative intrinsic for WPD and CFI to work correctly.
Commit: c13be8f0d554d8a7b5f2aa042a97a9174e198168
https://github.com/llvm/llvm-project/commit/c13be8f0d554d8a7b5f2aa042a97a9174e198168
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/addrspacecast-folding.ll
Log Message:
-----------
[NVPTX] Add some basic folds for ADDRSPACECAST (#129157)
Commit: 4485d91786e9f624cdb4c7579d0938809291e0f9
https://github.com/llvm/llvm-project/commit/4485d91786e9f624cdb4c7579d0938809291e0f9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg] Add vectorization to the e2e test for tensor.unpack (#123032)
Following on from #122927 + #123031 that added support for masked
vectorization of `tensor.insert_slice`, this PR extends the e2e test for
`tensor.unpack` to leverage the new functionality.
Commit: fda7373daf5790833101c504be1c749bbb0fceb8
https://github.com/llvm/llvm-project/commit/fda7373daf5790833101c504be1c749bbb0fceb8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/codecvt
Log Message:
-----------
[libc++] Guard <codecvt> contents on _LIBCPP_HAS_LOCALIZATION (#129112)
The codecvt class is defined in <locale> and the contents of the
<codecvt> header don't work when localization is disabled. Without this
guard, builds with localization disabled that happen to include
<codecvt> could be broken because they would try to include <__locale>,
which ends up trying to include the locale base API and eventually
platform headers like <xlocale.h> that may not exist.
Commit: f9b249705598b31d2313458207668eeae896e4c6
https://github.com/llvm/llvm-project/commit/f9b249705598b31d2313458207668eeae896e4c6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Use const for VPBasicBlock* in key in VPBB2IRBB (NFC).
This allows queries in places where only a const pointer to VPBasiBlocks
is available.
Commit: 88ae5bd13b1206871f6639b18f1fde03f2ca7adc
https://github.com/llvm/llvm-project/commit/88ae5bd13b1206871f6639b18f1fde03f2ca7adc
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
Log Message:
-----------
[PAC] Make ValueMapper handle ConstantPtrAuth values (#129088)
Fix assertion failure when building PAuth-hardened code with LTO. W/o assertions we end with invalid codegen.
Commit: 23efe734fc27544b473ad60ea6eecbd2ec66d20c
https://github.com/llvm/llvm-project/commit/23efe734fc27544b473ad60ea6eecbd2ec66d20c
Author: metkarpoonam <poonammetkar at microsoft.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/or.hlsl
R clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
Log Message:
-----------
[HLSL] Add "or" intrinsic (#128979)
Include HLSL or_intrinsic, add codegen in CGBuiltin, and the
corresponding tests in or.hlsl. Additionally, incorporate
logical-operator-errors to handle both 'and' and 'or' semantic
diagnostics.
Commit: 275baedfde9dcd344bc4f11f552b046a69a4bf3f
https://github.com/llvm/llvm-project/commit/275baedfde9dcd344bc4f11f552b046a69a4bf3f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
Log Message:
-----------
[LAA] Consider accessed addrspace when mapping underlying obj to access. (#129087)
In some cases, it is possible for the same underlying object to be
accessed via pointers to different address spaces. This could lead to
pointers from different address spaces ending up in the same dependency
set, which isn't allowed (and triggers an assertion).
Update the mapping from underlying object -> last access to also include
the accessing address space.
Fixes https://github.com/llvm/llvm-project/issues/124759.
PR: https://github.com/llvm/llvm-project/pull/129087
Commit: c363975da41dc331300e9c6e675b37e77fd9902d
https://github.com/llvm/llvm-project/commit/c363975da41dc331300e9c6e675b37e77fd9902d
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
Revert "[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)" (#129271)
The effect of this commit is too broad and may affect also those
variants of Linux systems on which the affected test cases are known to
pass.
An alternative version of this commit will be prepared afresh.
This reverts commit c93dc581d979eb20ded470d2c16e51b3e775f6e7.
Commit: 8c5cd773228a6c3fd1c274d32e20508ba5acee97
https://github.com/llvm/llvm-project/commit/8c5cd773228a6c3fd1c274d32e20508ba5acee97
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
Log Message:
-----------
[Exegesis][RISCV] Add missing linked components
LLVMExegesisRISCV should link against MC and TargetParser as well.
Commit: 5faa5f848a35de13196f2f516f51aa970da942b4
https://github.com/llvm/llvm-project/commit/5faa5f848a35de13196f2f516f51aa970da942b4
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix copy generation for missing memref definition depth check (#129187)
Fixes: https://github.com/llvm/llvm-project/issues/122210
Commit: a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
https://github.com/llvm/llvm-project/commit/a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll
Log Message:
-----------
[SLP]Fix the analysis of the user buildvector nodes for minbitwidth
If the user node is a buildvector/gather node and it has no internal
instructions state, need to check properly for this state and check the
type of the node itself, not its operands.
Fixes #129242
Commit: f909b2229ac16ae3898d8b158bee85c384173dfa
https://github.com/llvm/llvm-project/commit/f909b2229ac16ae3898d8b158bee85c384173dfa
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Provide locale conversions to tests through lit substitution (#105651)
There are 2 problems today that this PR resolves:
libcxx tests assume the thousands separator for fr_FR locale is x00A0 on
Windows. This currently fails when run on newer versions of Windows (it
seems to have been updated to the new correct value of 0x202F around
windows 11. The exact windows version where it changed doesn't seem to
be documented anywhere). Depending the OS version, you need different
values.
There are several ifdefs to determine the environment/platform-specific
locale conversion values and it leads to maintenance as things change
over time.
This PR includes the following changes:
- Provide the environment's locale conversion values through a
substitution. The test can opt in by placing the substitution value in a
define flag.
- Remove the platform ifdefs (the swapping of values between Windows,
Linux, Apple, AIX).
This is accomplished through a lit feature action that fetches the
environment's locale conversions (lconv) for members like
'thousands_sep' that we need to provide. This should ensure that we
don't lose the effectiveness of the test itself.
In addition, as a result of the above, this PR:
- Fixes a handful of locale tests which unexpectedly fail on newer
Windows versions.
- Resolves 3 XFAIL FIX-MEs.
Originally submitted in https://github.com/llvm/llvm-project/pull/86649.
Co-authored-by: Rodrigo Salazar <4rodrigosalazar at gmail.com>
Commit: ddbce2fd2380a4eafce9065ad991318f46a3292b
https://github.com/llvm/llvm-project/commit/ddbce2fd2380a4eafce9065ad991318f46a3292b
Author: jimingham <jingham at apple.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
Log Message:
-----------
Control the "step out through thunk" logic explicitly when pushing thread plans (#129301)
Jonas recently added a trampoline handling strategy for simple language
thunks that does: "step through language thunks stepping in one level
deep and stopping if you hit user code". That was actually pulled over
from the swift implementation. However, this strategy and the strategy
we have to "step out past language thunks" when stepping out come into
conflict if the thunk you are stepping through calls some other function
before dispatching to the intended method. When you step out of the
called function back into the thunk, should you keep stepping out past
the thunk or not?
In most cases, you want to step out past the thunk, but in this
particular case you don't.
This patch adds a way to inform the thread plan (or really it's
ShouldStopHere behavior) of which behavior it should have, and passes
the don't step through thunks to the step through plan it uses to step
through thunks.
I didn't add a test for this because I couldn't find a C++ thunk that
calls another function before getting to the target function. I asked
the clang folks here if they could think of a case where clang would do
this, and they couldn't. If anyone can think of such a construct, it
will be easy to write the step through test for it...
This does happen in swift, however, so when I cherry-pick this to the
swift fork I'll test it there.
Commit: d2cbd5fe6b6e280b71994c30da878751bc2a435a
https://github.com/llvm/llvm-project/commit/d2cbd5fe6b6e280b71994c30da878751bc2a435a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Change visibility of Region::add()/remove() (#129277)
The vectorizer's passes should not be allowed to manually add/remove
elements. This should only be done automatically by the callbacks.
Commit: 006534315972728390d82fc8381c9ab1bf6e6490
https://github.com/llvm/llvm-project/commit/006534315972728390d82fc8381c9ab1bf6e6490
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-array.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Improve device function byval parameter lowering (#129188)
PTX supports 2 methods of accessing device function parameters:
- "simple" case: If a parameters is only loaded, and all loads can
address the parameter via a constant offset, then the parameter may be
loaded via the ".param" address space. This case is not possible if the
parameters is stored to or has it's address taken. This method is
preferable when possible.
- "move param" case: For more complex cases the address of the param may
be placed in a register via a "mov" instruction. This mov also
implicitly moves the param to the ".local" address space and allows for
it to be written to. This essentially defers the responsibilty of the
byval copy to the PTX calling convention.
The handling of these cases in the NVPTX backend for byval pointers has
some major issues. We currently attempt to determine if a copy is
necessary in NVPTXLowerArgs and either explicitly make an additional
copy in the IR, or insert "addrspacecast" to move the param to the param
address space. Unfortunately the criteria for determining which case is
possible are not correct, leading to miscompilations
(https://godbolt.org/z/Gq1fP7a3G). Further, the criteria for the
"simple" case aren't enforceable in LLVM IR across other transformations
and instruction selection, making deciding between the 2 cases in
NVPTXLowerArgs brittle and buggy.
This patch aims to fix these issues and improve address space related
optimization. In NVPTXLowerArgs, we conservatively assume that all
parameters will use the "move param" case and the local address space.
Responsibility for switching to the "simple" case is given to a new
MachineIR pass, NVPTXForwardParams, which runs once it has become clear
whether or not this is possible. This ensures that the correct address
space is known for the "move param" case allowing for optimization,
while still using the "simple" case where ever possible.
Commit: 7e11ef170edccfe5ff85ce4756b58adf9e3455ba
https://github.com/llvm/llvm-project/commit/7e11ef170edccfe5ff85ce4756b58adf9e3455ba
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
[mlir][scf] Fix typo of `epilogue`(NFC) (#128707)
Commit: 6ff0f69fec0ebdc86abf2e6af75f2edcccc2f936
https://github.com/llvm/llvm-project/commit/6ff0f69fec0ebdc86abf2e6af75f2edcccc2f936
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix vectorization of vector constants (#129290)
This patch fixes the value we generate when we vectorize constants.
Commit: a19e685ea228ec367a7fa01bbf811c3cded37a83
https://github.com/llvm/llvm-project/commit/a19e685ea228ec367a7fa01bbf811c3cded37a83
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
R clang/include/clang/CIR/Dialect/IR/CIRAttrVisitor.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
Log Message:
-----------
[CIR] Realign CIR-to-LLVM IR lowering code with incubator (#129293)
The previously upstreamed lowering from ClangIR to LLVM IR diverged from
the incubator implementation, but when the incubator was updated to
incorporate these changes some issues arose which require the upstream
implementation to be modified to re-align with the incubator.
First, in the earlier upstream implementation a CIRAttrVisitor class was
introduced with the intention that an mlir-tblgen based extension would
be created to automatically add all CIR attributes to the visitor. When
I proposed this in mlir-tblgen a reviewer suggested that what I wanted
could be better accomplished with TypeSwitch.
See https://github.com/llvm/llvm-project/pull/126332
This was done in the incubator, and here I am bringing that
implementation upstream.
The other issue was that the global op initialization in the incubator
had more cases than I had accounted for in my previous upstream
refactoring. I did still refactor the incubator code, but not in quite
the same way as the upstream code. This change re-aligns the two.
Commit: 22965dc5f9c72d6b411458d4115e05a310d619eb
https://github.com/llvm/llvm-project/commit/22965dc5f9c72d6b411458d4115e05a310d619eb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Simplify getStackAdjBase. NFC (#129281)
Use math instead of a switch.
Commit: 21a050049d2cdec04376cc61d92a4931f3adf380
https://github.com/llvm/llvm-project/commit/21a050049d2cdec04376cc61d92a4931f3adf380
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
Reapply "[clang][HIP] Make some math not not work with AMDGCN SPIR-V #128360" (#129306)
This reapplies #128360, the only change being that the modified tests
also checks for the availability of the SPIRV target.
Commit: b3e05d58b93c054b619c1fa9b967455a3d269484
https://github.com/llvm/llvm-project/commit/b3e05d58b93c054b619c1fa9b967455a3d269484
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][nvvm] Add conversion for math.erfc (#129329)
Add missing pattern to convert `math.erfc` operation to `__nv_erfcf` or
`__nv_erfc` function call.
Commit: ae84717d11bf89e69eb9fd74f3ddd32af51192d7
https://github.com/llvm/llvm-project/commit/ae84717d11bf89e69eb9fd74f3ddd32af51192d7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang-rt/lib/cuda/memory.cpp
Log Message:
-----------
[flang][cuda] Fix descriptor sync in data transfer (#129333)
The destination descriptor on the device needs to be sync with the
destination descriptor on the host, not the src one.
Commit: b697bf3c0176e0f9c2f1ab5d39c797469f9037bd
https://github.com/llvm/llvm-project/commit/b697bf3c0176e0f9c2f1ab5d39c797469f9037bd
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
Log Message:
-----------
[Exegesis][RISCV] Skip some of the tests under expensive checks
Under expensive checks, some of the tests will fail to pass the
MachineVerifier. It's because right after a snippet is generated, its VL
operand (if it's a register) is assigned a physical register. While
we'll replace it with virtual register in RISCVExegesisPreprocessing,
it's technically violating RISCVInstrInfo's validation rule.
Under normal circumstances, this won't trigger a MachineVerifier failure
because the codegen pipeline doesn't validate the code until the very
end -- which is not the case under EXPENSIVE_CHECKS where
MachineVerifierPass is sprinkled here and there.
This is really caused by the fact that RISCV exegesis has an odd
"codegen" Pass pipeline. And I don't have a good solution yet, so I'm
surpressing these tests under EXPENSIVE_CHECKS.
Commit: b2cc28cab113554aa63b9097f23796d59175d28f
https://github.com/llvm/llvm-project/commit/b2cc28cab113554aa63b9097f23796d59175d28f
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
Log Message:
-----------
[Exegesis][RISCV] Only check if vd and vs2 are alias in rvv/reduction.test
This test was designed to check if we alias between vd and vs2. While we
make sure there is no alias relationship between vd and vs1 in the
snippet generator, there is nothing preventing the randomizer to assign
the same register between vs1 and vs2. Which makes this test pretty
unstable.
However, we really only care if vd and vs2 are alias, so instead of
going an extra mile to check whether vd and vs1 are NOT alias, which is
actually irrelevant, we should just focusing on checking if vd and vs2
are alias.
Commit: 5cf9435fd4e7ab0a27ba514557e0982f9c882bc0
https://github.com/llvm/llvm-project/commit/5cf9435fd4e7ab0a27ba514557e0982f9c882bc0
Author: pirama-arumuga-nainar <pirama at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Do not intercept [f]truncate64 for musl (#129331)
Musl has 64-bit off_t by default and has macros that redefine
[f]truncate64 to [f]truncate.
Commit: 743571b5f11599232a2a0a9c396827782ed4868c
https://github.com/llvm/llvm-project/commit/743571b5f11599232a2a0a9c396827782ed4868c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Remove unused argument. NFC
Commit: 273fca94d4c4896df15f967a1388b7c533b76062
https://github.com/llvm/llvm-project/commit/273fca94d4c4896df15f967a1388b7c533b76062
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-target-private-allocatable.mlir
Log Message:
-----------
[MLIR][OpenMP] - Fix translation of omp.target when private variables need cleaning up (#129205)
This is a simple fix that ensures that the InsertPoint is properly fixed
up after we have translated the dealloc region of all privatized
variables during translation of omp.target from MLIR to LLVMIR.
Fix for https://github.com/llvm/llvm-project/issues/129202
Commit: a085da66783e9576f9a9105e7fd5726f2039303b
https://github.com/llvm/llvm-project/commit/a085da66783e9576f9a9105e7fd5726f2039303b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Remove X26 from encodeRlist. NFC
The caller already checks X26 and generates its own error.
Commit: 45d018097c8e92f1978478382426c683b19be88f
https://github.com/llvm/llvm-project/commit/45d018097c8e92f1978478382426c683b19be88f
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Debug.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionSave.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
Log Message:
-----------
[SandboxVec][NFC] Add LLVM_DEBUG dumps (#129335)
This patch updates/adds LLVM_DEBUG dumps.
It moves the DEBUG_TYPE into SandboxVectorizer/Debug.h such that it can
be shared across all components of the vectorizer.
Commit: 11b9466c04db4da7439fc1d9d8ba7241a9d68705
https://github.com/llvm/llvm-project/commit/11b9466c04db4da7439fc1d9d8ba7241a9d68705
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py
Log Message:
-----------
[lldb] Add ability to inspect backing threads with `thread info` (#129275)
When OS plugins are present, it can be helpful to query information
about the backing thread behind an OS thread, if it exists. There is no
mechanism to do so prior to this commit.
As a first step, this commit enhances `thread info` with a
`--backing-thread` flag, causing the command to use the backing thread
of the selected thread, if it exists.
Commit: 23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
https://github.com/llvm/llvm-project/commit/23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
Log Message:
-----------
[Exegesis][RISCV] Allow rvv/filter.test to retry
Sometimes it'll fail to generate any snippet because it's unable to
assign unique def and use registers.
Mark this test as ALLOW_RETRIES. Also, lower the minimum number of
instructions per snippet in the hope to increase the chance of
assigning unique registers for every instructions.
Commit: 1f27ff91b3104f3d2038324f09fb9cab2c75d037
https://github.com/llvm/llvm-project/commit/1f27ff91b3104f3d2038324f09fb9cab2c75d037
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
Log Message:
-----------
[NVPTX] Delete `IsSimpleMove` (NFC) (#129178)
This field is never used, so we should remove it.
Commit: 32dffdce0511a9e2358842b8856da1b4103d72cb
https://github.com/llvm/llvm-project/commit/32dffdce0511a9e2358842b8856da1b4103d72cb
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
Log Message:
-----------
[RISCV][MCA] Pick the correct VPseudo sched class for indexed memory operation (#128978)
It seems like we had been picking the wrong VPseudo scheduling class for
indexed memory operations in RISCVMCACustomBehavior: the VPseudo opcode
of indexed memory ops encode two EMULs, one for index and the other for
data. However, in RISCVInversePseudoTable, we're only able to look up
against one of them, yielding an incorrect VPseudo opcode with the wrong
data EEW (index EEW is encoded in the opcode). Since scheduling classes
for indexed memory ops uses data EMUL / EEW in their scheduling class,
we would eventually fetch the wrong scheduling classes with faulty data
EEW.
This patch fixes this issue by deducting the correct index EMUL with
LMUL (data EMUL), SEW (data EEW), and index EEW. With these parameters
we can thus fetch the correct VPseudo opcode with `getVLXPseudo` /
`getVLXSEGPseudo` and friends.
The new search table, RISCVBaseVXMemOpTable, is created to extract the
NF and index EEW info from MC opcode. Otherwise we need to write a
gigantic switch statement to decode this info.
Commit: 7cf2f602df40e619adef7259dac5cc50434e8769
https://github.com/llvm/llvm-project/commit/7cf2f602df40e619adef7259dac5cc50434e8769
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
Log Message:
-----------
[Vectorize] Fix unused variable warnings (NFC)
/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp:24:8: error: unused variable 'CostBefore' [-Werror,-Wunused-variable]
auto CostBefore = SB.getBeforeCost();
^
/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp:25:8: error: unused variable 'CostAfter' [-Werror,-Wunused-variable]
auto CostAfter = SB.getAfterCost();
^
2 errors generated.
Commit: 074c2c6713277c087e1c3b9938cefff012d3840c
https://github.com/llvm/llvm-project/commit/074c2c6713277c087e1c3b9938cefff012d3840c
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
Log Message:
-----------
[BOLT] Refactor MCInst target symbol lookup. NFCI (#129131)
In analyzeInstructionForFuncReference(), use MCPlusBuilder interface
while scanning symbolic operands of MCInst. Should be NFC on x86, but
will make the function work on other architectures. Note that it's
currently unused on non-x86 as its functionality is exclusive to safe
ICF that runs on x86 only.
Commit: 4ab9c13ba2a6f505fb1b72ae33753902ae9f81e8
https://github.com/llvm/llvm-project/commit/4ab9c13ba2a6f505fb1b72ae33753902ae9f81e8
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/RISCV/BUILD.gn
Log Message:
-----------
[gn] port c253e5c9917b (RISCV llvm-exegesis)
See here for the additional tblgen deps:
https://github.com/llvm/llvm-project/pull/128767#issuecomment-2691834320
Commit: 0a0775e795850503e1d7da3543e663f584c1810c
https://github.com/llvm/llvm-project/commit/0a0775e795850503e1d7da3543e663f584c1810c
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn
Log Message:
-----------
[gn] port 32dffdce0511 (more RISCV depedency things)
Looks like RISCV is picking up AMDGPU's bad habits wrt generated files.
Commit: 9421e1785b837fc2645ca1e165bbf975faab4288
https://github.com/llvm/llvm-project/commit/9421e1785b837fc2645ca1e165bbf975faab4288
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[gn build] Port 006534315972
Commit: 78de27aac6b3e8d3f6394e9bbca887eb721af07b
https://github.com/llvm/llvm-project/commit/78de27aac6b3e8d3f6394e9bbca887eb721af07b
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
Log Message:
-----------
[MLIR] NFC. Improve API signature + clang-tidy warning in IntegerRelation (#128993)
Commit: 3c518940b0bdb7acd0692d280e1b4e2337fb5236
https://github.com/llvm/llvm-project/commit/3c518940b0bdb7acd0692d280e1b4e2337fb5236
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Make Metrics Container Use Python Logging
This patch makes the metrics container use the python logging library. This
is more of what we want given we're essentially just logging the status of
things. It also means we do not have to explicitly specify an output file
and lets us control verbosity a bit more cleanly.
Commit: cef6dbbe544ff4c49fca65cdc50df783d8c39c28
https://github.com/llvm/llvm-project/commit/cef6dbbe544ff4c49fca65cdc50df783d8c39c28
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Add Logging for Workflow Jobs
This patch adds some logging information for individual workflow jobs inside
the metrics container. This is mainly intended for debugging why we seem to be
missing metrics from some workflows within Grafana.
Commit: 84b365c26b963de47ed4b712f59d276b15871ddb
https://github.com/llvm/llvm-project/commit/84b365c26b963de47ed4b712f59d276b15871ddb
Author: Trevor Gross <t.gross35 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Correct documentation for `roundeven` (#125452)
Langref for `roundeven` implies that the C standard function `roundeven`
may raise floating point exceptions. However, this is not correct; C23
does not mention exceptions for `roundeven`, and per [1] `FE_INEXACT` is
never raised.
Clarify that LLVM's `roundeven` behaves the same.
[1]: https://en.cppreference.com/w/c/numeric/math/roundeven
Commit: 620953328dc768ef6b205077214a01ae0579975c
https://github.com/llvm/llvm-project/commit/620953328dc768ef6b205077214a01ae0579975c
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libc/utils/MPCWrapper/MPCUtils.h
Log Message:
-----------
[libc] Fix warning in libc/utils/MPCWrapper/MPCUtils.h (#129349)
`cpp::is_complex_type_same<T1, T2>` is a function, so we need
parentheses in order to call it. Otherwise the expression is treated
like a function pointer which is always true in this boolean context.
Commit: dfca4f9519e6c55364d791f26fcde374cb67fb67
https://github.com/llvm/llvm-project/commit/dfca4f9519e6c55364d791f26fcde374cb67fb67
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls][NFC] Fix Typo in Header Comment (#114314)
Commit: 810150bcb64b59bd90364f981e72b9f58137adc4
https://github.com/llvm/llvm-project/commit/810150bcb64b59bd90364f981e72b9f58137adc4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Remove the offset numbers from the FixedCSRFIMap. NFC (#129297)
Use the position within the table instead with a little bit of
arithmetic.
Commit: ef1128b48209cf906d6973e71a9b11c5e2bb8fdd
https://github.com/llvm/llvm-project/commit/ef1128b48209cf906d6973e71a9b11c5e2bb8fdd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Sort an instruction definition by opcode (#129350)
Commit: 8d1f385d40634fcffabe701334efb90c57243636
https://github.com/llvm/llvm-project/commit/8d1f385d40634fcffabe701334efb90c57243636
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/SCCIterator.h
Log Message:
-----------
[ADT] Avoid repeated hash lookups (NFC) (#129355)
Commit: 83d2c68fc151ab50e005ecd36edb53a2af89e71c
https://github.com/llvm/llvm-project/commit/83d2c68fc151ab50e005ecd36edb53a2af89e71c
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
Log Message:
-----------
Prune a redundant include "RISCVISelDAGToDAG.h" (fixup for #128978)
Seems it is not affected.
Commit: cab738bea1a6d06c6aaebc0e9ad5954a2c5c1e0b
https://github.com/llvm/llvm-project/commit/cab738bea1a6d06c6aaebc0e9ad5954a2c5c1e0b
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
R clang/test/CoverageMapping/mcdc-error-nests.cpp
A clang/test/CoverageMapping/mcdc-nested-expr.cpp
Log Message:
-----------
[MC/DC] Update CoverageMapping tests (#125404)
To resolve the error, rename mcdc-error-nests.cpp ->
mcdc-nested-expr.cpp at first.
- `func_condop` A corner case that contains close decisions.
- `func_expect` Uses `__builtin_expect`. (#124565)
- `func_lnot` Contains logical not(s) `!` among MC/DC binary operators.
(#124563)
Commit: 7e8a06cfa4a2951b8ee77e19e34926e6e535b4d1
https://github.com/llvm/llvm-project/commit/7e8a06cfa4a2951b8ee77e19e34926e6e535b4d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/aarch64-bti-pac-cli-error.s
M lld/test/ELF/aarch64-feature-bti.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/i386-feature-cet.s
M lld/test/ELF/x86-64-feature-cet.s
Log Message:
-----------
[ELF] Make -z *-report=unknown error message conventional
Commit: 24921a9cb5f127f138ad7a36b10aee81b53bf4bf
https://github.com/llvm/llvm-project/commit/24921a9cb5f127f138ad7a36b10aee81b53bf4bf
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/IR/Types.cpp
Log Message:
-----------
[mlir] Remove duplicate comment(NFC) (#128304)
The comments in the source file duplicate the documentation already
present in the header file `mlir/IR/Types.h`.
https://github.com/llvm/llvm-project/blob/876174ffd7533dc220f94721173bb767b659fa7f/mlir/include/mlir/IR/Types.h#L136-L141
Commit: f611e95d30df6e8e25818008c8abb57b7ebb8f5c
https://github.com/llvm/llvm-project/commit/f611e95d30df6e8e25818008c8abb57b7ebb8f5c
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
Log Message:
-----------
[mlir][tosa] Add missing controlflow extension comment (#129338)
A previous patch(#128216) that added the support for the control flow
extension overlooked adding a comment. This patch adds the comment.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 8f4d2e02bea6933d7f4c35f577bf5780bad93beb
https://github.com/llvm/llvm-project/commit/8f4d2e02bea6933d7f4c35f577bf5780bad93beb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[VectorCombine] scalarizeLoadExtract - add debug message for match + cost-comparison
Helps with debugging to show to that the fold found the match, and shows the old + new costs to indicate whether the fold was/wasn't profitable.
Commit: 0751418024442ac97b8ff484c01f9386aa5723b8
https://github.com/llvm/llvm-project/commit/0751418024442ac97b8ff484c01f9386aa5723b8
Author: João Gouveia <jtalonegouveia at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
Log Message:
-----------
[X86] Extend `combinei64TruncSrlAdd` to handle patterns with `or` and `xor` (#128435)
As discussed in #126448, the fold implemented by #126448 / #128353 can
be extended to operations other than `add`. This patch extends the fold
performed by `combinei64TruncSrlAdd` to include `or` and `xor` (proof:
https://alive2.llvm.org/ce/z/AXuaQu). There's no need to extend it to
`sub` and `and`, as similar folds are already being performed for those
operations.
CC: @phoebewang @RKSimon
Commit: 65f105b6cf4a36e45565b5ab7eafa1904497f61e
https://github.com/llvm/llvm-project/commit/65f105b6cf4a36e45565b5ab7eafa1904497f61e
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__iterator/istream_iterator.h
M libcxx/include/iterator
M libcxx/test/std/iterators/stream.iterators/istream.iterator/istream.iterator.cons/copy.pass.cpp
Log Message:
-----------
[libc++] Implements LWG3600 Making istream_iterator copy constructor trivial is an ABI break (#127343)
Closes: #105003
Commit: d2b09e21bccac364962cacdd63e63c1d23ce87ac
https://github.com/llvm/llvm-project/commit/d2b09e21bccac364962cacdd63e63c1d23ce87ac
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/include/initializer_list
A libcxx/test/std/language.support/support.initlist/support.initlist.syn/specialization.verify.cpp
Log Message:
-----------
[libc++] Prohibits initializer_list specializations. (#128042)
This relies on Clang's no_specializations attribute which is not
supported by GCC.
Implements:
- LWG2129: User specializations of std::initializer_list
Fixes: #126270
Commit: 2709366f75b054e2cba4f61310de5a9605f4aa24
https://github.com/llvm/llvm-project/commit/2709366f75b054e2cba4f61310de5a9605f4aa24
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/vselect-constants.ll
Log Message:
-----------
[DAGCombiner] Don't ignore N2's undef elements in `foldVSelectOfConstants` (#129272)
Since N2 will be reused in the fold, we cannot skip N2's undef elements
if the corresponding element in N1 is well-defined.
For example:
```
t2: v4i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>
t24: v4i32 = BUILD_VECTOR undef:i32, undef:i32, Constant:i32<1>, undef:i32
t11: v4i32 = vselect t8, t2, t10
```
Before this patch, we fold t11 into:
```
t26: v4i32 = sign_extend t8
t27: v4i32 = add t26, t24
```
The last element of t27 is incorrect.
Closes https://github.com/llvm/llvm-project/issues/129181.
Commit: 39edcf9126ee1709753728205d2ed211aac4f7b3
https://github.com/llvm/llvm-project/commit/39edcf9126ee1709753728205d2ed211aac4f7b3
Author: R <rqou at berkeley.edu>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
[WebAssembly] Make WASI -threads environment behave as -pthread (#129164)
If the user specifies a target triple of wasm32-wasi-threads, then
enable all of the same flags as if `-pthread` were passed. This helps
prevent user error, as the whole point of selecting this target is to
gain pthread support.
The reverse does not happen (passing `-pthread` does not alter the
target triple) so as to not interfere with custom environments and/or
custom multilib setups.
Commit: 9f37cdca52331c4feebcadebb921e7e975c3d0e3
https://github.com/llvm/llvm-project/commit/9f37cdca52331c4feebcadebb921e7e975c3d0e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Update VPTransformState accessors to take const VPValue (NFC).
This will enable using const VPValue * pointers are in more places.
Commit: 60b44d31afe53556ec707dc855983b93971d83c4
https://github.com/llvm/llvm-project/commit/60b44d31afe53556ec707dc855983b93971d83c4
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/IR/AffineExpr.cpp
M mlir/test/Dialect/Affine/simplify-structures.mlir
Log Message:
-----------
[MLIR][Affine] Fix bug in `simplifySemiAffine` utility (#129200)
Whenever `symbolicDivide` returns nullptr when called from inside
`simplifySemiAffine` we substitute the result with the original
expression (`expr`). nullptr simply indicates that the floordiv
expression cannot be simplified further.
Fixes: https://github.com/llvm/llvm-project/issues/122231
Commit: 37374fbcd33c6b96637d0d6195e269a46f0daa04
https://github.com/llvm/llvm-project/commit/37374fbcd33c6b96637d0d6195e269a46f0daa04
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/load.ll
Log Message:
-----------
[InstCombine] Simplify nonnull phi nodes (#128466)
Fix some regressions caused by
https://github.com/llvm/llvm-project/pull/128111.
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=1e0e4169dd00bf8a37cef8d74d0add7861982c4e&to=3a27268e264826ef9cf493f645507e490f05e7f3&stat=instructions%3Au
Commit: cc5d8a4b2fc765c3c432f1ad0b185dae518d41bd
https://github.com/llvm/llvm-project/commit/cc5d8a4b2fc765c3c432f1ad0b185dae518d41bd
Author: Sebastian Schaller <4145046+sschaller at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
Log Message:
-----------
[AArch64] fall back to SDAG for instructions with emulated TLS variables (#129215)
Fixes #126200
At the moment, GlobalISel is missing an implementation for emulated TLS
variables.
I fixed the issue by falling back to SDAG in this case, as I currently
don't have the knowledge to implement it myself.
Co-authored-by: Schaller, Sebastian <sebastian.schaller at dentsplysirona.com>
Commit: 00414c3371701961363f243338e0e848d8066509
https://github.com/llvm/llvm-project/commit/00414c3371701961363f243338e0e848d8066509
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
Log Message:
-----------
[Hexagon] Avoid repeated hash lookups (NFC) (#129357)
Commit: 0bcc37cf1efd563e1683ad79a42b88b9d5d31d9d
https://github.com/llvm/llvm-project/commit/0bcc37cf1efd563e1683ad79a42b88b9d5d31d9d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129358)
Commit: f892dc7440c17ca880359174e7bd1ea599869f7d
https://github.com/llvm/llvm-project/commit/f892dc7440c17ca880359174e7bd1ea599869f7d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#129359)
Commit: 70af83ff5f87f2b36c5dbbbb050f705ec4389e24
https://github.com/llvm/llvm-project/commit/70af83ff5f87f2b36c5dbbbb050f705ec4389e24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#129360)
Commit: 70f4e6abf653afadd29e91ef2bfa4b2db46a4013
https://github.com/llvm/llvm-project/commit/70f4e6abf653afadd29e91ef2bfa4b2db46a4013
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129356)
Commit: 88460137d97c0b8d3742203e0173ab9ed6c5c8a7
https://github.com/llvm/llvm-project/commit/88460137d97c0b8d3742203e0173ab9ed6c5c8a7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Use llvm::equal in stackFrameIncludesInlinedCallStack (NFC) (#129372)
llvm::equal hides all the iterator manipulation behind the scenes
while reducing the line count.
Commit: 5ddf40fa78705384966c22da78e12134df7bd723
https://github.com/llvm/llvm-project/commit/5ddf40fa78705384966c22da78e12134df7bd723
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/load-extractelement-scalarization.ll
Log Message:
-----------
[VectorCombine] scalarizeLoadExtract - don't create scalar loads if any extract is waiting to be erased (#129375)
If any extract is waiting to be erased, then bail out as this will distort the cost calculation and possibly lead to infinite loops.
Fixes #129373
Commit: bc35510725e5d55f7798cc6eb3be7e5f19c38d59
https://github.com/llvm/llvm-project/commit/bc35510725e5d55f7798cc6eb3be7e5f19c38d59
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/icmp-monotonic.ll
Log Message:
-----------
[InstSimplify] Fold `X * C >= X` to `true` (#129352)
Proof: https://alive2.llvm.org/ce/z/T_ocLy
Discovered in: https://github.com/rust-lang/rust/issues/114386
This PR folds `X * C >= X` to `true` when `C` is known to be non-zero
and `mul` is `nuw`.
Folds for other math operators exist already:
https://llvm-ir.godbolt.org/z/GKcYEf5Kb
Commit: b356a3085be43fda14a9f34f9e81bdf36b73e915
https://github.com/llvm/llvm-project/commit/b356a3085be43fda14a9f34f9e81bdf36b73e915
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
Log Message:
-----------
[Mips] Format some MCTargetDesc files. NFC
In preparation for #127581
Commit: b65e0947cade9bd39036a7700b54c1df4ec00756
https://github.com/llvm/llvm-project/commit/b65e0947cade9bd39036a7700b54c1df4ec00756
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
A llvm/test/MC/Mips/fixup-expr.s
M llvm/test/MC/Mips/imm-operand-err.s
Log Message:
-----------
[Mips] Allow expressions in some immediate operands
e.g.
`addiu $t2, $t3, .Lend-.Lstart-4`
used by libdragon/boot/boot_trampoline.S
To make this work, update a few places:
* AsmParser: When matching a isSImm/isUImm, consider an expression
that does not evaluate to an assemble-time constant an immediate.
* MCCodeEmitter: If this is an I-type instruction and the expression
does not evaluate to an assemble-time constant, append a
`fixup_Mips_AnyImm16`.
TODO: in MipsInstrInfo.td, more `Operand` should switch from the
default `getMachineOpValue` to `getImmOpValue` like RISCV.
* AsmBackend: If the expression does not evaluate to a constant
with assembler layout information, report "unknown relocation type"
like X86. If the result is not within [-32768,65535] (the bound gas
uses when parsing a constant integer for ADDIU)
Fix #126531
Pull Request: https://github.com/llvm/llvm-project/pull/127581
Commit: 9b7b7d60755c914e38337ec43a92497e5c1afef0
https://github.com/llvm/llvm-project/commit/9b7b7d60755c914e38337ec43a92497e5c1afef0
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/aarch64-execute-only-report.s
A lld/test/ELF/arm-execute-only-report.s
M lld/test/ELF/target-specific-options.s
Log Message:
-----------
[LLD][ELF] Add `-z execute-only-report` that checks PURECODE section flags (#128883)
`-z execute-only-report` checks that all executable sections have either
the SHF_AARCH64_PURECODE or SHF_ARM_PURECODE section flag set on AArch64
and ARM respectively.
Commit: fe187961427674257a9b4012d37b4798e65d1598
https://github.com/llvm/llvm-project/commit/fe187961427674257a9b4012d37b4798e65d1598
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
[Offload][AMDGPU] Enable SPIRV target in build conf (#129323)
Enable the SPIRV backend on the CMake-cache file buildbots.
Commit: 304c053a5c7b8a67f6f3fddf9492971a57901715
https://github.com/llvm/llvm-project/commit/304c053a5c7b8a67f6f3fddf9492971a57901715
Author: Trevor Laughlin <trevor.w.laughlin at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/tools/libclang/CIndexCXX.cpp
M clang/tools/libclang/libclang.map
Log Message:
-----------
[cindex] Add API to query the class methods of a type (#123539)
Inspired by https://github.com/llvm/llvm-project/pull/120300, add a new
API `clang_visitCXXMethods` to libclang (and the Python bindings) which
allows iterating over the class methods of a type.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 75270e3750db13e20ddbf42df6b7094c6266ed57
https://github.com/llvm/llvm-project/commit/75270e3750db13e20ddbf42df6b7094c6266ed57
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Don't print VPlan DT after VPlan construction. (NFC)
Remove unnecessary code to just print VPlan dominator tree.
Commit: 038731c709c665634714275996559c21f36372f2
https://github.com/llvm/llvm-project/commit/038731c709c665634714275996559c21f36372f2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/UndefinedBehaviorSanitizer.rst
M clang/include/clang/Basic/Sanitizers.def
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[ubsan] Remove -fsanitizer=vptr from -fsanitizer=undefined (#121115)
This makes `undefined` more consistent.
`vptr` check adds additional constraints:
1. trap is off, or silently disabled
2. rtti is no, or compilation error
3. c++abi, or linking error
So it's not obvious if `-fsanitizer=undefined`
will have it on.
https://discourse.llvm.org/t/rfc-remove-vptr-from-undefined/83830
Commit: 872e4a33884b56384ca1ac92aed135bb0d9cc280
https://github.com/llvm/llvm-project/commit/872e4a33884b56384ca1ac92aed135bb0d9cc280
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Log Message:
-----------
[X86] Replace reloc_global_offset_table8 with R_X86_64_GOTPC64
Commit: 8910e41c86ccf350188369d3cf2b5ce7f8e454e5
https://github.com/llvm/llvm-project/commit/8910e41c86ccf350188369d3cf2b5ce7f8e454e5
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Refactor ADR to ADRP+ADD conversion pass. NFCI (#129399)
In preparation of using the new interface in more places, refactor the
ADR conversion pass.
Commit: e3e9c5c8733a87455cf59b91e5e802f427cf5152
https://github.com/llvm/llvm-project/commit/e3e9c5c8733a87455cf59b91e5e802f427cf5152
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
Log Message:
-----------
[MC] Remove unneeded onLabelParsed and onLabelParsed from HLASM
They are only used by ARM and wasm.
Commit: 5e6c0853fd121fa9179fd5edda9ac8649b70aff6
https://github.com/llvm/llvm-project/commit/5e6c0853fd121fa9179fd5edda9ac8649b70aff6
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
Log Message:
-----------
[MCParser] Clean up onEndOfFile
and modernize NumOfMacroInstantiations
Commit: 8ec0d60e28f77149eef9c865515b79bc0a5e8f41
https://github.com/llvm/llvm-project/commit/8ec0d60e28f77149eef9c865515b79bc0a5e8f41
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/API/tools/lldb-dap/variables/children/main.cpp
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb-dap] Add: show return value on step out (#106907)
https://github.com/user-attachments/assets/cff48c6f-37ae-4f72-b881-3eff4178fb3c
Commit: 077497d180c6ad52d7c3ee6c36ee5ae56ac8c1d1
https://github.com/llvm/llvm-project/commit/077497d180c6ad52d7c3ee6c36ee5ae56ac8c1d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
Log Message:
-----------
[MCParser] Remove parseParenExprOfDepth
Introduced by http://reviews.llvm.org/D9742 as a hack, which then became
unneeded.
Primary test: llvm/test/MC/Mips/memory-offsets.s
Commit: 43c3014ec1eda1d14d836f19395f0232c06f4536
https://github.com/llvm/llvm-project/commit/43c3014ec1eda1d14d836f19395f0232c06f4536
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused parser functions
Commit: b6d5fa05ada6e51ede32c62ff47f046ca5085d28
https://github.com/llvm/llvm-project/commit/b6d5fa05ada6e51ede32c62ff47f046ca5085d28
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused DWARF/Mach-O/ARM If-Then functions
Commit: 83941577cf82d0831d2e363438b6517ff2421e5c
https://github.com/llvm/llvm-project/commit/83941577cf82d0831d2e363438b6517ff2421e5c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-rc/windres-preproc.test
Log Message:
-----------
llvm-rc: Relax error message checked in test (#129243)
In the fork path, it does not print the piece about posix_spawn failed
Part of #129208
Commit: a0540e6c98972954f42d3b72d70976d8286113ea
https://github.com/llvm/llvm-project/commit/a0540e6c98972954f42d3b72d70976d8286113ea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
unittests: Use EXPECT_ instead of ASSERT_ in a few tests (#129251)
Commit: 5a11912ece2731eb9c50f80fdfd75bd1dfc2ebc8
https://github.com/llvm/llvm-project/commit/5a11912ece2731eb9c50f80fdfd75bd1dfc2ebc8
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Passes/PatchEntries.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/PatchEntries.cpp
Log Message:
-----------
[BOLT] Refactor interface for creating instruction patches. NFCI (#129404)
Add BinaryContext::createInstructionPatch() interface for patching parts
of the original binary with new instruction sequences. Refactor
PatchEntries pass to use the new interface.
Commit: 1b1dc505057322f4fa1110ef4f53c44347f52986
https://github.com/llvm/llvm-project/commit/1b1dc505057322f4fa1110ef4f53c44347f52986
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/test/MC/AsmParser/directive_loc.s
M llvm/test/MC/COFF/cv-errors.s
Log Message:
-----------
[MCParser] Improve parseIntToken error message
Add a default argument, which is more readable than existing call sites
and encourages new call sites to omit the argument.
Omit " in ... directive" since this the error message includes the line.
Commit: 74638f16349768c5ddde0f2dd43715471d5de910
https://github.com/llvm/llvm-project/commit/74638f16349768c5ddde0f2dd43715471d5de910
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/test/X86/Inputs/define_bar.s
M lld/test/ELF/linkerscript/lma-align.test
M lld/test/ELF/linkerscript/section-address-align.test
M lld/test/ELF/linkerscript/section-align2.test
Log Message:
-----------
[test] Replace .data.rel.ro with .section .data.rel.ro,"aw"
to avoid using the extension unsupported by gas.
Commit: 99ff3d0bcb2781f6bb7fe78e7d970d072f2f901f
https://github.com/llvm/llvm-project/commit/99ff3d0bcb2781f6bb7fe78e7d970d072f2f901f
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/test/MC/ELF/elf_directive_section.s
Log Message:
-----------
[MCParser] Remove some section directive not supported by gas
and not emitted by AsmPrinter.
The intention was to remove `.eh_frame`, which had the wrong
section flags. Let's also remove .data.rel and .data.rel.ro
but keep other extensions like .rodata
Commit: 81a8b5c579acc7597fdb1069355e733aaa7466d4
https://github.com/llvm/llvm-project/commit/81a8b5c579acc7597fdb1069355e733aaa7466d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[MachineSink] Use Register and MCRegUnit. NFC
Commit: 2c1e9f14be32c30f6f561274292bef1f52635f82
https://github.com/llvm/llvm-project/commit/2c1e9f14be32c30f6f561274292bef1f52635f82
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Explicit composite array descriptor types (#129376)
When creating descriptor for array element types, we only save the
original source, e.g. int[2][2][2]. So later calls to getType() of the
element descriptors will also return int[2][2][2], instead of e.g.
int[2][2] for the second dimension.
Fix this by explicitly tracking the array types.
The last attached test case used to have an lvalue offset of 32 instead
of 24.
We should do this for more desriptor types though and not just composite
array, but I'm leaving that to a later patch.
Commit: 69c7336c77f80b8f3417f2fb5143cbaa2fcb1c2a
https://github.com/llvm/llvm-project/commit/69c7336c77f80b8f3417f2fb5143cbaa2fcb1c2a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#129417)
Commit: 2bbb394a9820aea28258de974acfafec4a9741a9
https://github.com/llvm/llvm-project/commit/2bbb394a9820aea28258de974acfafec4a9741a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129418)
Commit: c1211d5cc41fe245245a33e8a69389ea618ecec8
https://github.com/llvm/llvm-project/commit/c1211d5cc41fe245245a33e8a69389ea618ecec8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129419)
Commit: 4eef3de58840a62042d727a764c73ae2edc98c8f
https://github.com/llvm/llvm-project/commit/4eef3de58840a62042d727a764c73ae2edc98c8f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
Log Message:
-----------
[Mips] Avoid repeated hash lookups (NFC) (#129420)
Commit: 1fd014c13d29b45031d13389b8812d9162abd419
https://github.com/llvm/llvm-project/commit/1fd014c13d29b45031d13389b8812d9162abd419
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129421)
Commit: 4b3f0fa7e7af69a514d7b855cff523539082b292
https://github.com/llvm/llvm-project/commit/4b3f0fa7e7af69a514d7b855cff523539082b292
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Avoid repeated hash lookups (NFC) (#129422)
Commit: 4a8412d4302e15db28a24b80af6902b9e267991b
https://github.com/llvm/llvm-project/commit/4a8412d4302e15db28a24b80af6902b9e267991b
Author: AdityaK <hiraditya at msn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/numerics/numeric.ops/numeric.ops.gcd/gcd.pass.cpp
Log Message:
-----------
[libc++] Add tests for gcd that result in something other than zero or one (#129395)
@colincross identified gcd does not have a single case whose answer is
not 0, 1, or the smaller of the two inputs.
Commit: fa5db05ca36a732bffb8128ff017c575ec6e1201
https://github.com/llvm/llvm-project/commit/fa5db05ca36a732bffb8128ff017c575ec6e1201
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
[libc++][test] XFAIL for FreeBSD in thread_create_failure.pass.cpp (#129413)
Per https://man.freebsd.org/cgi/man.cgi?query=setrlimit, FreeBSD's
`setrlimit` seems to limit the number of processes, not threads via
`RLIMIT_NPROC`. So this test should be XFAIL for FreeBSD.
Commit: f937b17e8570082d4710b6dca7a91b5c235c1c70
https://github.com/llvm/llvm-project/commit/f937b17e8570082d4710b6dca7a91b5c235c1c70
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
Log Message:
-----------
[LV] Don't query SCEV for non-invariant values in cost model.
This fixes a divergence between VPlan and legacy cost model, matching
behavior further up in getInstructionCost as well.
Fixes https://github.com/llvm/llvm-project/issues/129236.
Commit: 416c7b370e3285b06b36a0b853b70070b8741f10
https://github.com/llvm/llvm-project/commit/416c7b370e3285b06b36a0b853b70070b8741f10
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/TargetParser/ARMTargetParser.h
Log Message:
-----------
[ARM] Remove unneeded global inits (NFCI) (#129299)
Theses consts in ASMTargetParser were causing unnecessary global
initialization fuctions.
_GLOBAL__sub_I_ARMTargetParser.cpp
_GLOBAL__sub_I_Triple.cpp
Both functions init the same consts. I messed up the first PR on this
sorry.
Commit: 60afce2df97d1f8fd78405a039e8e818c5154565
https://github.com/llvm/llvm-project/commit/60afce2df97d1f8fd78405a039e8e818c5154565
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[clang-tidy] fix fp when modifying variant by ``operator[]`` with template in parameters (#128407)
`ArraySubscriptExpr` can switch base and idx. For dependent array
subscript access, we should check both base and idx conservatively.
Commit: ba7e27381f1ce56b46839dca89e5d56ea170714e
https://github.com/llvm/llvm-project/commit/ba7e27381f1ce56b46839dca89e5d56ea170714e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Use VP_CLASSOF_IMPL in VPWidenRecipe. (NFC)
Commit: ac8b5a9e47a550f4171020f619b51b69310766d5
https://github.com/llvm/llvm-project/commit/ac8b5a9e47a550f4171020f619b51b69310766d5
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
Log Message:
-----------
[mlir][scf]-Fix reverse iterator overflow in loop traversal (#128421)
Fix a bug in method `getUntiledProducerFromSliceSource` where address
sanitizer fails compilation on heap
buffer overflow for accessing value out of the iteration range.
This PR fixes the issue and adds a lit test to reproduce it.
Commit: f858ac7acc33ac6c1a32510b9938d63a59276cc2
https://github.com/llvm/llvm-project/commit/f858ac7acc33ac6c1a32510b9938d63a59276cc2
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-arm64ec-data.test
Log Message:
-----------
[LLD][COFF] Correct relocation size comments in autoimport tests (NFC) (#129403)
Commit: c6598f6ddf62e88af6c4c20b12264503ad11f234
https://github.com/llvm/llvm-project/commit/c6598f6ddf62e88af6c4c20b12264503ad11f234
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Writer.cpp
A lld/test/COFF/autoimport-arm64x-data.test
Log Message:
-----------
[LLD][COFF] Add support for autoimports on ARM64X (#129282)
Commit: 8eba02288634e5b14f5d2a13763ddfd0ea89068b
https://github.com/llvm/llvm-project/commit/8eba02288634e5b14f5d2a13763ddfd0ea89068b
Author: Billy Laws <blaws05 at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
A llvm/test/CodeGen/AArch64/arm64ec-eh.ll
Log Message:
-----------
[CodeGen][ARM64EC] Mangle EH personality handler names (#121652)
Commit: d403f33886a3eda18e1a7368e6d5607b1fd83f0c
https://github.com/llvm/llvm-project/commit/d403f33886a3eda18e1a7368e6d5607b1fd83f0c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
A lld/test/COFF/gc-dwarf-eh-arm64x.s
Log Message:
-----------
[LLD][COFF] Mark personality functions as live in both symbol tables on ARM64X (#129295)
Commit: f5f5286da3a64608b5874d70b32f955267039e1c
https://github.com/llvm/llvm-project/commit/f5f5286da3a64608b5874d70b32f955267039e1c
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/tuple
R libcxx/test/libcxx/utilities/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/tuple/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/variant/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Implement LWG3990 for Clang (#128834)
This patch adds `[[_Clang::__no_specializations__]]` to `tuple`, with
warning/error suppressed for `tuple<>`.
Commit: 376ffec876acddb95fabf4fac30a8f77652f54d2
https://github.com/llvm/llvm-project/commit/376ffec876acddb95fabf4fac30a8f77652f54d2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.locking/enable_nonlocking_formatter_optimization.compile.pass.cpp
Log Message:
-----------
[libc++][format] Enables formattable tests for chrono formatters. (#128356)
These were forgotten when these types were implemented.
Commit: 00e74632051688e194685e91119fc607f1fb110a
https://github.com/llvm/llvm-project/commit/00e74632051688e194685e91119fc607f1fb110a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/include/chrono
Log Message:
-----------
[libc++][chrono][doc] Use stable names in synopsis. (#129381)
Fixes: #80895
Commit: 3a11d5a8dfb6c95a5ba0c6b4463e15494005a369
https://github.com/llvm/llvm-project/commit/3a11d5a8dfb6c95a5ba0c6b4463e15494005a369
Author: isuckatcs <65320245+isuckatcs at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/PPExpressions.cpp
A clang/test/Preprocessor/warn-macro-undef-true.c
Log Message:
-----------
[clang][diagnostics] add `-Wundef-true` warning option (#128265)
New option `-Wundef-true` added and enabled by default to warn when `true` is used in the C preprocessor without being defined before C23.
Commit: 6d847b1aada50d59c3e29f2e7eff779c0ee8182c
https://github.com/llvm/llvm-project/commit/6d847b1aada50d59c3e29f2e7eff779c0ee8182c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
Commit: 18e09da2552d99a641b8257e22b4067730cdb2bc
https://github.com/llvm/llvm-project/commit/18e09da2552d99a641b8257e22b4067730cdb2bc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmMacro.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmLexer.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/test/MC/Mips/expr1.s
M llvm/test/MC/Mips/macro-aliases-invalid-wrong-error.s
Log Message:
-----------
[Mips] Rework relocation expression parsing
A relocation expression might be used in an immediate operand or a
memory offset. https://reviews.llvm.org/D23110 , which intended to
generalize chained relocation operators (%hi(%neg(%gp_rel(x)))),
inappropriated introduced intrusive changes to the generic code. This
patch drops the intrusive changes and significantly simplifies the code.
The new style is similar to pre-D23110 but much cleaner.
Some weird expressions allowed by gas are not supported for simplicity,
e.g. "%lo foo", "(%lo(foo))", "%lo(foo)+1".
"(%lo(foo))", while previously parsed, is not used in practice.
"%lo(foo)+1" and "%lo(2*4)+foo" were previously parsed but would lead to
an error anyway as the expression is not relocatable
(`evaluateSymbolicAdd` does not fold the Add when RefKind are
different).
Commit: a9f02a49979c84cd8c1b75acfe7e7cef56cb8623
https://github.com/llvm/llvm-project/commit/a9f02a49979c84cd8c1b75acfe7e7cef56cb8623
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CFIInstrInserter.cpp
Log Message:
-----------
[CFIInstrInserter] Don't store Dwarf register number in Register. NFC
Commit: 527af302b90eaf686959dfe569dceadd8e58d611
https://github.com/llvm/llvm-project/commit/527af302b90eaf686959dfe569dceadd8e58d611
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/cmake/caches/BOLT.cmake
M clang/tools/driver/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
Add support for dynamic libraries in CLANG_BOLT (#127020)
Commit: 20362c51dd94a1dfbf1c7e8327a9b6280609c572
https://github.com/llvm/llvm-project/commit/20362c51dd94a1dfbf1c7e8327a9b6280609c572
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Log Message:
-----------
[TwoAddressInstructionPass] Use Register. NFC
Commit: 2fb7f09f6323c69e48e0e5fe86a34a6bec87dbdd
https://github.com/llvm/llvm-project/commit/2fb7f09f6323c69e48e0e5fe86a34a6bec87dbdd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
Commit: 1d9207fda0fef28cb304ad922fe8223b01b18889
https://github.com/llvm/llvm-project/commit/1d9207fda0fef28cb304ad922fe8223b01b18889
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/TailDuplicator.cpp
Log Message:
-----------
[TailDuplicator] Use Register. NFC
Commit: fd3326b65f83968541d7df32c07c12892bd2dc04
https://github.com/llvm/llvm-project/commit/fd3326b65f83968541d7df32c07c12892bd2dc04
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
[AggressiveAntiDepBreaker] Use MCRegister. NFC
Commit: dcca3f407cf138eee8d935fdbe24b4ccd1970968
https://github.com/llvm/llvm-project/commit/dcca3f407cf138eee8d935fdbe24b4ccd1970968
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
Revert "[AggressiveAntiDepBreaker] Use MCRegister. NFC"
This reverts commit fd3326b65f83968541d7df32c07c12892bd2dc04.
Getting a failure on the buildbots
Commit: 31bf16a7a2e1f5e783af9055fa2a1d815c090da2
https://github.com/llvm/llvm-project/commit/31bf16a7a2e1f5e783af9055fa2a1d815c090da2
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
Log Message:
-----------
[MC] Add MCTargetStreamer::getContext to simplify code
Commit: 60486292b79885b7800b082754153202bef5b1f0
https://github.com/llvm/llvm-project/commit/60486292b79885b7800b082754153202bef5b1f0
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/test/MC/Mips/relocation.s
M llvm/tools/llvm-mca/CodeRegionGenerator.h
Log Message:
-----------
[MC] Move MIPS-specific gprel/tprel/dtprel from MCStreamer to MipsTargetStreamer
https://reviews.llvm.org/D23669 inappropriately added MIPS-specific
dtprel/tprel directives to MCStreamer. In addition,
llvm-mc -filetype=null parsing these directives will crash.
This patch moves these functions to MipsTargetStreamer and fixes
-filetype=null.
gprel32 and gprel64, called by AsmPrinter, are moved to
MCTargetStreamer.
Commit: ca0612c383bc1c487b8dabff9e5830af173a7da8
https://github.com/llvm/llvm-project/commit/ca0612c383bc1c487b8dabff9e5830af173a7da8
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libcxx/include/locale
A libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_overlong.pass.cpp
Log Message:
-----------
[libc++] Fix `money_get::do_get` with huge input (#126273)
`money_get::do_get` needs to be fixed to handle extremely huge input
(e.g. more than 100 digits).
1. `__double_or_nothing` needs to copy the contents of the stack buffer
on the initial allocation.
2. The `sscanf` call in `do_get` needs to scan the dynamic buffer if
dynamic allocation happens.
Commit: f745cb68f1adae854fe1ff7cc43b4bbe36db3ac2
https://github.com/llvm/llvm-project/commit/f745cb68f1adae854fe1ff7cc43b4bbe36db3ac2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
[AggressiveAntiDepBreaker] Use MCRegister. NFC
Commit: 0c5d709301b25b588ccb9cfb4d9c219cc5bdcaf1
https://github.com/llvm/llvm-project/commit/0c5d709301b25b588ccb9cfb4d9c219cc5bdcaf1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
Log Message:
-----------
Move MIPS-specific GPRel32Directive and EK_GPRel32BlockAddress from generic code to Mips/
Follow-up to 60486292b79885b7800b082754153202bef5b1f0
gprel/gprel64 functions can now be moved from MCTargetStreamer
to MipsTargetStreamer.
Commit: b02cfbd73c8007aa52f6f1e2df557d742b6be151
https://github.com/llvm/llvm-project/commit/b02cfbd73c8007aa52f6f1e2df557d742b6be151
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused VariantKind parsing code
Commit: d1fd3698a9b755250f622fd1b14c57a27e2a9d77
https://github.com/llvm/llvm-project/commit/d1fd3698a9b755250f622fd1b14c57a27e2a9d77
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Semantics/assignment.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Allow unsupported data transfer to be done on the host (#129160)
Some data transfer marked as unsupported can actually be deferred to an
assignment on the host when the variables involved are unified or
managed.
Commit: 3c80d9b8dda38162016f72defe24baf79d4cf0ef
https://github.com/llvm/llvm-project/commit/3c80d9b8dda38162016f72defe24baf79d4cf0ef
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/Transforms/LoopDeletion/diundef.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
Log Message:
-----------
[Instruction] Set metadata to `poison` on deletion (#129449)
Represent extant metadata uses of a deleted instruction with `poison`
instead of `undef`.
Commit: 8c7c791284877e36f73c41ffa56b52c13e613993
https://github.com/llvm/llvm-project/commit/8c7c791284877e36f73c41ffa56b52c13e613993
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Log Message:
-----------
[MCParser] Use getVariantKindForName and move PPC specific VariantKind to PowerPC/
Commit: 14951a5a3120e50084b3c5fb217e2d47992a24d1
https://github.com/llvm/llvm-project/commit/14951a5a3120e50084b3c5fb217e2d47992a24d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Log Message:
-----------
[MCParser] Extract some VariantKind from getVariantKindForName
All VariantKinds except VK_None/VK_Invalid are target-specific (e.g. a
target may not support "@plt" even if it is widely available).
Move the parsers to lib/Target to ensure that VariantKind from unrelated
targets will not be parsed.
Commit: f5f3612453fb3568a76056daea41f67df82636af
https://github.com/llvm/llvm-project/commit/f5f3612453fb3568a76056daea41f67df82636af
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtend.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/libclang_rt.builtins.a
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/loongarch64-linux-ohos/.keep
M clang/test/Driver/ohos.c
M clang/test/Preprocessor/ohos.c
Log Message:
-----------
[clang][LoongArch] Add OHOS target (#127555)
Add support for OHOS on loongarch64.
Commit: cb7030dbe7f3f1947c31b3059958ff3968cc22ff
https://github.com/llvm/llvm-project/commit/cb7030dbe7f3f1947c31b3059958ff3968cc22ff
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
Log Message:
-----------
[LoongArch] use TypeWidenVector for most illegal vector types (#126456)
`TypeWidenVector` makes an illegal vector a larger one
e.g. in lsx
v2i32 -> v4i32
v4i16 -> v8i16
With this we can make good use of `vilvh`, `vilvl` instructions in
vector `sext`, `zext` in later pr.
Previous action is `TypePromoteInteger`, which replaces integer with a
larger one
e.g. in lsx
v2i32 -> v2i64
v4i16 -> v4i32
Commit: db0e7c72aff622849abbc92c3ed0d06efb8e2d16
https://github.com/llvm/llvm-project/commit/db0e7c72aff622849abbc92c3ed0d06efb8e2d16
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/CMakeLists.txt
A mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
Reapply [MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrin… (#129174)
…sic_call
Original introduced in https://github.com/llvm/llvm-project/pull/128626,
reverted in https://github.com/llvm/llvm-project/pull/128973
Reproduced the issue on a shared lib build locally on Linux, moved
content around to satisfy both static and shared lib builds.
### Original commit message
Currently, the llvm importer can only cover intrinsics that have a first
class representation in an MLIR dialect (arm-neon, etc). This PR
introduces a fallback mechanism that allow "unregistered" intrinsics to
be imported by using the generic `llvm.intrinsic_call` operation. This
is useful in several ways:
1. Allows round-trip the LLVM dialect output lowered from other dialects
(example: ClangIR)
2. Enables MLIR-linking tools to operate on imported LLVM IR without
requiring to add new operations to dozen of different targets.
If multiple dialects implement this interface hook, the last one to
register is the one converting all unregistered intrinsics.
---------
Co-authored-by: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Commit: e42ab4c54eca0e792a0ae461481f9acbd0260363
https://github.com/llvm/llvm-project/commit/e42ab4c54eca0e792a0ae461481f9acbd0260363
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/RISCV/rvv/zvbb-demanded-bits.ll
Log Message:
-----------
[RISCV] Handle zvbb instructions in getVectorLowDemandedScalarBits. (#129011)
Commit: cf00ac81ac049cddb80aec1d6d88b8fab4f209e8
https://github.com/llvm/llvm-project/commit/cf00ac81ac049cddb80aec1d6d88b8fab4f209e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
Log Message:
-----------
[Hexagon] Call MCExpr::print with valid MAI
operator<< should be avoided when operands with VariantKind are dumped.
This prepares for the upcoming change that moves target-specific
VariantKind printer to MCAsmInfo.
Commit: e6aae2a4905982c10412e7f35b4f3c940a1a86f5
https://github.com/llvm/llvm-project/commit/e6aae2a4905982c10412e7f35b4f3c940a1a86f5
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
Log Message:
-----------
[analyzer] Handle structured bindings in alpha.webkit.UncountedCallArgsChecker (#129424)
Simply add awareness of BindingDecl to the logic for identifying local
assignments.
Commit: 98a640a2faf4d5557e3a949dd87a01ba900745d6
https://github.com/llvm/llvm-project/commit/98a640a2faf4d5557e3a949dd87a01ba900745d6
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
[MC] Move VariantKind info to MCAsmInfo
Follow-up to 14951a5a3120e50084b3c5fb217e2d47992a24d1
* Unify getVariantKindName and getVariantKindForName
* Allow each target to specify the preferred case (albeit ignored in MCParser)
Note: targets that use variant kinds should call MCExpr::print with a
non-null MAI to print variant kinds. operator<< passes a nullptr to
`MCExpr::print`, which should be avoided (e.g. Hexagon; fixed in
commit cf00ac81ac049cddb80aec1d6d88b8fab4f209e8).
Commit: c804e86f558a42f328946331af391d700747fa90
https://github.com/llvm/llvm-project/commit/c804e86f558a42f328946331af391d700747fa90
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Specifiers.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp
M clang/tools/libclang/CXType.cpp
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/IR/CallingConv.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/Assembler/riscv_vls_cc.ll
M llvm/test/Bitcode/compatibility.ll
Log Message:
-----------
[RISCV][VLS] Support RISCV VLS calling convention (#100346)
This patch adds a function attribute `riscv_vls_cc` for RISCV VLS
calling
convention which takes 0 or 1 argument, the argument is the `ABI_VLEN`
which is the `VLEN` for passing the fixed-vector arguments, it wraps the
argument as a scalable vector(VLA) using the `ABI_VLEN` and uses the
corresponding mechanism to handle it. The range of `ABI_VLEN` is [32,
65536],
if not specified, the default value is 128.
Here is an example of VLS argument passing:
Non-VLS call:
```
void original_call(__attribute__((vector_size(16))) int arg) {}
=>
define void @original_call(i128 noundef %arg) {
entry:
...
ret void
}
```
VLS call:
```
void __attribute__((riscv_vls_cc(256))) vls_call(__attribute__((vector_size(16))) int arg) {}
=>
define riscv_vls_cc void @vls_call(<vscale x 1 x i32> %arg) {
entry:
...
ret void
}
}
```
The first Non-VLS call passes generic vector argument of 16 bytes by
flattened integer.
On the contrary, the VLS call uses `ABI_VLEN=256` which wraps the
vector to <vscale x 1 x i32> where the number of scalable vector
elements
is calaulated by: `ORIG_ELTS * RVV_BITS_PER_BLOCK / ABI_VLEN`.
Note: ORIG_ELTS = Vector Size / Type Size = 128 / 32 = 4.
PsABI PR: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/418
C-API PR: https://github.com/riscv-non-isa/riscv-c-api-doc/pull/68
Commit: e9c8d42b895fe4934a149478788fa020bd69f7bf
https://github.com/llvm/llvm-project/commit/e9c8d42b895fe4934a149478788fa020bd69f7bf
Author: Baranov Victor <70346889+vbvictor at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
Log Message:
-----------
[clang-tidy] `misc-unused-using-decls`: add correct handling of `operator""` with template parametes (#129392)
Fixes false-positives when operator"" has template paremetes, e.g.
```cpp
template <char... Ts>
int operator""_r() {
return {};
}
```
Closes https://github.com/llvm/llvm-project/issues/53444.
---------
Co-authored-by: Congcong Cai <congcongcai0907 at 163.com>
Commit: f244b8eed37a12539fb11b76e19ec7a7eb41dccc
https://github.com/llvm/llvm-project/commit/f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MC] Port initializeVariantKinds to a few targets
Commit: aa1fe57b196de4255bb2516ef6c5515491c4aaab
https://github.com/llvm/llvm-project/commit/aa1fe57b196de4255bb2516ef6c5515491c4aaab
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
M llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
M llvm/test/CodeGen/AArch64/pr51516.mir
M llvm/test/CodeGen/AArch64/spill-fold.mir
M llvm/test/CodeGen/MIR/Generic/runPass.mir
M llvm/test/CodeGen/SystemZ/clear-liverange-spillreg.mir
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/X86/limit-split-cost.mir
A llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
Use `-passes="regallocgreedy<[all|sgpr|wwm|vgpr]>` to insert the greedy
RA with a filter and `-regalloc-npm=<type>` to control which RA to use
in existing pipeline.
Commit: e11867039f0806bdfebeb33bb71d8ce3ba8ee33d
https://github.com/llvm/llvm-project/commit/e11867039f0806bdfebeb33bb71d8ce3ba8ee33d
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/test/DebugInfo/ARM/tls.ll
Log Message:
-----------
[test] Replace tlsldo with TLSLDO to be consistent with most TLS*
Commit: 69c8312c0ab30e0906a374ecfc88c60ea7ffe5a4
https://github.com/llvm/llvm-project/commit/69c8312c0ab30e0906a374ecfc88c60ea7ffe5a4
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/X86/cycle-info.mir
Log Message:
-----------
[CodeGen][NewPM] Port MachineCycleInfo to NPM (#114745)
Commit: 04b49b11a8f70424263a3fc1f9c5bc69a9f46844
https://github.com/llvm/llvm-project/commit/04b49b11a8f70424263a3fc1f9c5bc69a9f46844
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MCExpr] Remove generic getVariantKindName and getVariantKindForName
They are error-prone as MCParser may parse a variant kind,
which cannot be handled by the target.
The replacement in MCAsmInfo should be used instead.
Follow-up to f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Commit: 03015805804c8d334382a2c7fcdb6d3d368cd94f
https://github.com/llvm/llvm-project/commit/03015805804c8d334382a2c7fcdb6d3d368cd94f
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[PowerPC] Remove VK_PPC_TLSGD and VK_PPC_TLSLD
52cf8e44880bcf614068b66b63393aa8da1edd76 (2013) introduced the
VK_PPC_TLSGD workaround to prevent unconditional reference to
_GLOBAL_OFFSET_TABLE_ in ELFObjectWriter.
e2b355d651ed8f2cbe61672c4c39b6419e471265 (2015) removed the
`_GLOBAL_OFFSET_TABLE_` hack for the generic VK_TLSGD,
making the VK_PPC_TLSGD workaround unneeded.
Commit: 7bd2be42666dfd5ceac5fb5b2fa793b6534206fc
https://github.com/llvm/llvm-project/commit/7bd2be42666dfd5ceac5fb5b2fa793b6534206fc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[SelectionDAG] Use Register and MCRegister. NFC
Add operators to Register to supporting adding an offset to get
another Register.
Commit: e56215d17ce8edd06d728742d7a97b7fccf073f0
https://github.com/llvm/llvm-project/commit/e56215d17ce8edd06d728742d7a97b7fccf073f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
[RegAllocFast] Use Register and MCRegister. NFC
Commit: 13cce8c0bcf0f2e5d02f863fcbee47e3d7956eca
https://github.com/llvm/llvm-project/commit/13cce8c0bcf0f2e5d02f863fcbee47e3d7956eca
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterScavenging.cpp
Log Message:
-----------
[CodeGen] Use Register::id() to avoid implicit cast. NFC
Commit: a70175ab932412ac7d46f3c82cd19384c33fc868
https://github.com/llvm/llvm-project/commit/a70175ab932412ac7d46f3c82cd19384c33fc868
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.h
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/StackMaps.cpp
Log Message:
-----------
[CodeGen] Use MCRegister and Register. NFC
Commit: dd9bb32b9774f0e993837081a79d08e11cfeda02
https://github.com/llvm/llvm-project/commit/dd9bb32b9774f0e993837081a79d08e11cfeda02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
[MachineCSE] Const correct some function arguments. NFC
Commit: aaaaa4d2567fa8ac3468b51390a688cf5d6cdfe7
https://github.com/llvm/llvm-project/commit/aaaaa4d2567fa8ac3468b51390a688cf5d6cdfe7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[MachineLICM] Use Register. NFC
Commit: 1b043c25573aa0b13ad4241c641c38ca26f26bc1
https://github.com/llvm/llvm-project/commit/1b043c25573aa0b13ad4241c641c38ca26f26bc1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Log Message:
-----------
[RISCV] Simplify RISCVMCExpr::evaluateAsConstant
Most VariantKind cannot be evaluated at the parsing time.
It makes more sense to list the evaluable cases.
Commit: 71f4c7dabec0f32b2d475e8e08f0da99628a067c
https://github.com/llvm/llvm-project/commit/71f4c7dabec0f32b2d475e8e08f0da99628a067c
Author: chrisPyr <32153107+chrisPyr at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/examples/Kaleidoscope/MCJIT/cached/toy.cpp
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/InlineSizeEstimatorAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/tools/bugpoint/ExecutionDriver.cpp
M llvm/tools/bugpoint/OptimizerDriver.cpp
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-cat/llvm-cat.cpp
M llvm/tools/llvm-cfi-verify/llvm-cfi-verify.cpp
M llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp
M llvm/tools/llvm-cxxmap/llvm-cxxmap.cpp
M llvm/tools/llvm-diff/llvm-diff.cpp
M llvm/tools/llvm-extract/llvm-extract.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-undname/llvm-undname.cpp
M llvm/tools/reduce-chunk-list/reduce-chunk-list.cpp
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/yaml-bench/YAMLBench.cpp
Log Message:
-----------
[NFC]Make file-local cl::opt global variables static (#126486)
#125983
Commit: 59138a603fca2a4e848ecf97af81c61559e9301d
https://github.com/llvm/llvm-project/commit/59138a603fca2a4e848ecf97af81c61559e9301d
Author: Huibin Wang <fighter90 at 163.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Cleanup MatchFunnelPosNeg by using SDPatternMatch matchers (#129482)
Fixes issue: https://github.com/llvm/llvm-project/issues/129034
Commit: 6a161cbfd458ab2af39b382056dff515ff549eb6
https://github.com/llvm/llvm-project/commit/6a161cbfd458ab2af39b382056dff515ff549eb6
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Passes/PatchEntries.cpp
Log Message:
-----------
[BOLT] Remove BinaryFunction::IsPatched. NFC (#129461)
BinaryFunction::IsPatched is no longer used.
Commit: 8a9a363ffb96b569a52825d8c2b41ac412f4eb28
https://github.com/llvm/llvm-project/commit/8a9a363ffb96b569a52825d8c2b41ac412f4eb28
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
Log Message:
-----------
[MIRCanonicalizerPass] Use MCRegister. NFC
Commit: 49ba565913e189f45e0822f475b0f61f50670c55
https://github.com/llvm/llvm-project/commit/49ba565913e189f45e0822f475b0f61f50670c55
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/IfConversion.cpp
Log Message:
-----------
[IfConversion] Use MCRegister. NFC
Commit: 3fe22559c7e743c9e19c55d4263ca21b5cf06ddf
https://github.com/llvm/llvm-project/commit/3fe22559c7e743c9e19c55d4263ca21b5cf06ddf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[InlineSpiller] Use Register. NFC
Commit: 9f8e148a6cdcdb8e89c284c2bc71e3ea28d2c5f1
https://github.com/llvm/llvm-project/commit/9f8e148a6cdcdb8e89c284c2bc71e3ea28d2c5f1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
Log Message:
-----------
[CalcSpillWeights] Use Register. NFC
Commit: 7cee4c7c59fdbb28fb7b502ea39da521b1e634a2
https://github.com/llvm/llvm-project/commit/7cee4c7c59fdbb28fb7b502ea39da521b1e634a2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/lib/CodeGen/CallingConvLower.cpp
Log Message:
-----------
[CallingConvLower] Use MCRegister. NFC
Commit: caa798cb1e5cc8d4d75ed2347e3f2df533367c25
https://github.com/llvm/llvm-project/commit/caa798cb1e5cc8d4d75ed2347e3f2df533367c25
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Log Message:
-----------
[GlobalISel] Use Register. NFC
Commit: 5387a77f8b82d154a98c8c2fd8bfa4b2b1ee67d9
https://github.com/llvm/llvm-project/commit/5387a77f8b82d154a98c8c2fd8bfa4b2b1ee67d9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
Log Message:
-----------
[CodeGen] Use MCRegister in CalleeSavedInfo. NFC
Commit: 3f48d34dfffac81bc73db626438f531c5324f85b
https://github.com/llvm/llvm-project/commit/3f48d34dfffac81bc73db626438f531c5324f85b
Author: foxtran <39676482+foxtran at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp_taskdeps.cpp
Log Message:
-----------
[OpenMP][runtime] Fix comparison of integer expressions of different signedness (#128204)
This PR fixes warning which occurs if one compiles OpenMP runtime with
GCC:
```
warning: comparison of integer expressions of different signedness: 'kmp_intptr_t' {aka 'long int'} and 'long unsigned int' [-Wsign-compare]
```
Commit: 8d1e260fc419e31bb11cb5a2f1f872a2b679d217
https://github.com/llvm/llvm-project/commit/8d1e260fc419e31bb11cb5a2f1f872a2b679d217
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
Log Message:
-----------
[MLIR] Fix IntegerPolyhedron ctors to avoid copy (#129446)
Use const ref. NFC otherwise.
Commit: 9db72e55edf8c10b2a1b72f1a2d4594d312dd91c
https://github.com/llvm/llvm-project/commit/9db72e55edf8c10b2a1b72f1a2d4594d312dd91c
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Fix support for dynamic libraries in CLANG_BOLT
Patch typo introduced in #127020
Commit: c13ebb527961e96e96ec1913dbbbcc6782512e18
https://github.com/llvm/llvm-project/commit/c13ebb527961e96e96ec1913dbbbcc6782512e18
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/test/Conversion/GPUCommon/lower-memcpy-to-gpu-runtime-calls.mlir
Log Message:
-----------
Fix bug in gpu.memcpy lowering for dynamically shaped operands. (#128820)
Compute the number of elements to be copied by multiplying dim sizes
along all the dimensions.
Commit: 2af4007822c75b231d90c84552bc0a4e101e1171
https://github.com/llvm/llvm-project/commit/2af4007822c75b231d90c84552bc0a4e101e1171
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
Revert "[MCExpr] Remove generic getVariantKindName and getVariantKindForName"
This reverts commit 04b49b11a8f70424263a3fc1f9c5bc69a9f46844.
This patch breaks ThinLTO/X86/memprof-tailcall-nonunique.ll.
Builtbot failures:
https://lab.llvm.org/buildbot/#/builders/108/builds/9933
https://lab.llvm.org/buildbot/#/builders/25/builds/6868
https://lab.llvm.org/buildbot/#/builders/46/builds/12890
Commit: 9805854699d6aca242ec63ca64dfab142a8bb951
https://github.com/llvm/llvm-project/commit/9805854699d6aca242ec63ca64dfab142a8bb951
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/test/Analysis/AliasAnalysis/alias-analysis-3.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/boxproc-2.fir
M flang/test/Transforms/omp-map-info-finalization.fir
Log Message:
-----------
[flang][NFC] clean-up fir.field_index legacy usages in tests (#129219)
After #127231, fir.coordinate_of should directly carry the field.
I updated the lowering and codegen tests in #12731, but not the FIR to
FIR tests, which is what this patch is cleaning up.
Commit: 178fb96f72b95b9df87227832b3dd495d9b9f91c
https://github.com/llvm/llvm-project/commit/178fb96f72b95b9df87227832b3dd495d9b9f91c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129466)
Commit: 0e5826ea07b17d05d6ea5a397288e9cc96f1d8cd
https://github.com/llvm/llvm-project/commit/0e5826ea07b17d05d6ea5a397288e9cc96f1d8cd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129467)
Commit: ec66c87c3455f2b22e8c8b830e5b1c3e477bd2cf
https://github.com/llvm/llvm-project/commit/ec66c87c3455f2b22e8c8b830e5b1c3e477bd2cf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#129468)
Commit: 1891281a15817996c0caada09dadc9d026331345
https://github.com/llvm/llvm-project/commit/1891281a15817996c0caada09dadc9d026331345
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#129470)
Commit: cb113a78126ad54109738c298794ff2293a47b37
https://github.com/llvm/llvm-project/commit/cb113a78126ad54109738c298794ff2293a47b37
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
RegisterCoalescer: Avoid repeated getRegClass on all paths (#129490)
Commit: 59f407020ea60d46af974563e4b87b8d9f188802
https://github.com/llvm/llvm-project/commit/59f407020ea60d46af974563e4b87b8d9f188802
Author: Robert Konicar <xkonicar at fi.muni.cz>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
Log Message:
-----------
[MLIR] Fix printing of switch case for negative value (#129266)
This patch fixes the printer for the `llvm.switch` operation with
negative values in a case.
The previous behaviour printed the value as an unsigned integer, as the
`getLimitedValue()` returns unsigned value. This caused the roundtrip to
fail (assertion in `APInt`), as the printed unsigned integer could not
be parsed into the same amount of bits in a signed integer.
I don't see a good reason for keeping any restriction on the printed
value, as LLVMIR `switch` afaik does not have a limit on the bitwidth of
the values and `APInt` handles printing just fine.
Commit: 7be8b78f827a0f30bbd9fc3ee84a62f440b41546
https://github.com/llvm/llvm-project/commit/7be8b78f827a0f30bbd9fc3ee84a62f440b41546
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Add mir test for agpr constant reg_sequence handling (#129058)
Commit: 49a533a4859eac99efac3220a1ffc62616cb3664
https://github.com/llvm/llvm-project/commit/49a533a4859eac99efac3220a1ffc62616cb3664
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Stop introducing v_accvgpr_write_b32 for reg-to-reg copy (#129059)
This was trying to hack around the intermediate VGPR requirement
to copy to AGPRs on gfx908. We should still use a copy for all
reg-to-reg cases. This should matter less these days, as we
reserve a VGPR to handle it when required (and no end to end tests
need updating).
This was also an obstacle to handling this fold for input registers
which are larger than 32-bits.
Commit: 3d5348b54ca91ac081a97b37d53e1ef4db62fdbe
https://github.com/llvm/llvm-project/commit/3d5348b54ca91ac081a97b37d53e1ef4db62fdbe
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/test/Dialect/Affine/parallelize.mlir
Log Message:
-----------
[MLIR][Affine] Fix addInductionVarOrTerminalSymbol to return status (#129476)
Fixes: https://github.com/llvm/llvm-project/issues/64287
This method is failable on valid IR and we should've been returning
failure instead of asserting, and checking status at its users.
Commit: 1119b7297780e870e8ae05651389913e09ae2036
https://github.com/llvm/llvm-project/commit/1119b7297780e870e8ae05651389913e09ae2036
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
Log Message:
-----------
[RISCV][clang] Add address space argument to getNaturalAlignIndirect (#129493)
This is introduced in 39ec9de7c23063b87f5c56f4e80c8d0f8b511a4b
Commit: da7403ed1d5727cd758560ffc7957bba5c395745
https://github.com/llvm/llvm-project/commit/da7403ed1d5727cd758560ffc7957bba5c395745
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/concrete-address.c
M clang/test/Analysis/misc-ps.m
A clang/test/Analysis/suppress-dereferences-from-any-address-space.c
Log Message:
-----------
[clang][analyzer] Add checker 'alpha.core.FixedAddressDereference' (#127191)
Commit: 75bfdebdeee3a8783a5e6cae3fb8370091329a83
https://github.com/llvm/llvm-project/commit/75bfdebdeee3a8783a5e6cae3fb8370091329a83
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAG] Use `poison` instead of `undef` for `dbg.values` (#127915)
`undef dbg.values` can be replaced with `poison dbg.values`.
Commit: 05589ee455334530addaabc56205f05df0954caf
https://github.com/llvm/llvm-project/commit/05589ee455334530addaabc56205f05df0954caf
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/test/DebugInfo/X86/undef-dbg-val.ll
Log Message:
-----------
[Metadata] Replace `undef` VAMs with `poison` VAMs (#129450)
`undef` debug info can be replaced with `poison` debug info.
Commit: 77f44a964212a54ebc014a703c6787ae236b6ef4
https://github.com/llvm/llvm-project/commit/77f44a964212a54ebc014a703c6787ae236b6ef4
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/MachineSink.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/loop-sink.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/ARM/machine-sink-multidef.mir
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
M llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
M llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
M llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
Log Message:
-----------
[CodeGen][NewPM] Port MachineSink to NPM (#115434)
Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for
the NPM pipeline in buildCodeGenPipeline(... &Opts, ...)
Commit: c545d571c596a2d59e1d164bc9dc5f40881c3ff1
https://github.com/llvm/llvm-project/commit/c545d571c596a2d59e1d164bc9dc5f40881c3ff1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - use ConcatSubOperand helper to concat VPERMV3 subvector operands together.
Shouldn't affect existing test coverage, but aggressively peeking through bitcasts before concatenation will help in a future patch.
Commit: 44607666b3429868bce9f0489715eb367d0e08f8
https://github.com/llvm/llvm-project/commit/44607666b3429868bce9f0489715eb367d0e08f8
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
Log Message:
-----------
[AMDGPU] Simplify conditional expressions. NFC. (#129228)
Simplfy `cond ? val : false` to `cond && val` and similar.
Commit: a55786170df204ca38caf922850df68ac188c7e0
https://github.com/llvm/llvm-project/commit/a55786170df204ca38caf922850df68ac188c7e0
Author: Sergey Kachkov <sergey.kachkov at syntacore.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
Log Message:
-----------
[RISCV][NFC] Add pre-commit test
Commit: 370d34fe40162946905b900097ed746dd4aeb6ad
https://github.com/llvm/llvm-project/commit/370d34fe40162946905b900097ed746dd4aeb6ad
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/fd-lines-as.f90
A flang/test/Preprocessing/fd-lines-as.f90
Log Message:
-----------
[flang][Driver] Add support of -fd-lines-as-comments and -fd-lines-as-code flags (#127605)
`-fd-lines-as-code` and `-fd-lines-as-comments` enables treatment for
lines beginning with `d` or `D` in fixed form sources.
Using these options in free form has no effect.
If the `-fd-lines-as-code` option is given they are treated as if the
first column contained a blank.
If the `-fd-lines-as-comments` option is given, they are treated as
comment lines.
Commit: 742fa8ac67796198dde99e18cdadeaf9b96c2f88
https://github.com/llvm/llvm-project/commit/742fa8ac67796198dde99e18cdadeaf9b96c2f88
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-thread-pointer.c
Log Message:
-----------
[ARM] Introduce -mtp=auto and make it the default (#128901)
This adds a new value auto to the possible values of the existing -mtp=
clang option which controls how the thread pointer is found. auto means
the same as soft if the target architecture doesn't support a hardware
thread pointer at all; otherwise it means the same as cp15.
This behavior is the default in gcc version 4.1.0 and later. The new
auto option is therefore also the default in clang, so this change
aligns clang with gcc.
Fixes #123864.
Commit: 55fdeccc4567bcd4e3f8df0d177195880a194a6a
https://github.com/llvm/llvm-project/commit/55fdeccc4567bcd4e3f8df0d177195880a194a6a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
Log Message:
-----------
[SDAG][X86] Remove hack needed to avoid missing x87 FPU stack pops (#128055)
If a (two-result) node like `FMODF` or `FFREXP` is expanded to a library
call, where said library has the function prototype like: `float(float,
float*)` -- that is it returns a float from the call and via an output
pointer. The first result of the node maps to the value returned by
value and the second result maps to the value returned via the output
pointer.
If only the second result is used after the expansion, we hit an issue
on x87 targets:
```
// Before expansion:
t0, t1 = fmodf x
return t1 // t0 is unused
```
Expanded result:
```
ptr = alloca
ch0 = call modf ptr
t0, ch1 = copy_from_reg, ch0 // t0 unused
t1, ch2 = ldr ptr, ch1
return t1
```
So far things are alright, but the DAGCombiner optimizes this to:
```
ptr = alloca
ch0 = call modf ptr
// copy_from_reg optimized out
t1, ch1 = ldr ptr, ch0
return t1
```
On most targets this is fine. The optimized out `copy_from_reg` is
unused and is a NOP. However, x87 uses a floating-point stack, and if
the `copy_from_reg` is optimized out it won't emit a pop needed to
remove the unused result.
The prior solution for this was to attach the chain from the
`copy_from_reg` to the root, which did work, however, the root is not
always available (it's set to null during legalize types). So the
alternate solution in this patch is to replace the `copy_from_reg` with
an `X86ISD::POP_FROM_X87_REG` within the X86 call lowering. This node is
the same as `copy_from_reg` except this node makes it explicit that it
may lower to an x87 FPU stack pop. Optimizations should be more cautious
when handling this node than a normal CopyFromReg to avoid removing a
required FPU stack pop.
```
ptr = alloca
ch0 = call modf ptr
t0, ch1 = pop_from_x87_reg, ch0 // t0 unused
t1, ch2 = ldr ptr, ch1
return t1
```
Using this node ensures a required x87 FPU pop is not removed due to the
DAGCombiner.
This is an alternate solution for #127976.
Commit: f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6
https://github.com/llvm/llvm-project/commit/f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6
Author: Tobi <9053039+devtbi at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ByteProvider.h
M llvm/include/llvm/ProfileData/Coverage/MCDCTypes.h
M llvm/include/llvm/Support/thread.h
Log Message:
-----------
[llvm] Fix missing includes (#128000)
Compilation with `LLVM_ENABLE_MODULES:BOOL=ON` fails due to missing
includes. This patch adds these includes (+missing tuple include in
thread.h), fixing the module build for me.
Commit: 6abe148bac6f61850f80f3687d68a0d299a7ff35
https://github.com/llvm/llvm-project/commit/6abe148bac6f61850f80f3687d68a0d299a7ff35
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/RemoveRedundantDebugValues.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
Log Message:
-----------
[CodeGen][NewPM] Port "RemoveRedundantDebugValues" to NPM (#129005)
Commit: 3c9429f133e8624e572bb50d11348494a219a1a6
https://github.com/llvm/llvm-project/commit/3c9429f133e8624e572bb50d11348494a219a1a6
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/test/CodeGen/X86/apx/setzucc.ll
Log Message:
-----------
[X86] Remove redundant test after setzucc (#129506)
Patch #96594 substitutes setcc + zext pair with setzucc, but it results
in redundant test because X86FlagsCopyLowering doesn't recognize it.
This patch removes redundant test by reverting setzucc to setcc
(optimized) + zext.
Commit: 9b4ad2fe508d8e008bdfcc3036541026f2ad4ebf
https://github.com/llvm/llvm-project/commit/9b4ad2fe508d8e008bdfcc3036541026f2ad4ebf
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
Log Message:
-----------
[LV][EVL] Support fixed-order recurrence idiom with EVL tail folding. (#124093)
This patch converts the llvm.vector.splice intrinsic to
llvm.experimental.vp.splice, ensuring that fixed-order recurrences
execute correctly when tail folding by EVL is enable.
Due to the non-VFxUF penultimate EVL issue, the EVL from the previous
iteration will be preserved and used in llvm.experimental.vp.splice.
Commit: 3dc799162f4f8e3a951041d453768a9975a719f1
https://github.com/llvm/llvm-project/commit/3dc799162f4f8e3a951041d453768a9975a719f1
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
Log Message:
-----------
[RISCV] Add DAG combine to convert (iN reduce.add (zext (vXi1 A to vXiN)) into vcpop.m (#127497)
This patch combines (iN vector.reduce.add (zext (vXi1 A to vXiN)) into
vcpop.m instruction (similarly to bitcast + ctpop pattern). It can be
useful for counting number of set bits in scalable vector types, which
can't be expressed with bitcast + ctpop (this was previously discussed
here: https://github.com/llvm/llvm-project/pull/74294).
Commit: 50301052e9d65e55c90c652f2551f00f906cee2b
https://github.com/llvm/llvm-project/commit/50301052e9d65e55c90c652f2551f00f906cee2b
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
A flang/test/Semantics/OpenMP/declare-reduction-error.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
Log Message:
-----------
[flang][OpenMP]Support for subroutine call for DECLARE REDUCTION init (#127889)
The DECLARE REDUCTION allows the initialization part to be either an
expression or a call to a subroutine.
This modifies the parsing and semantic analysis to allow the use of the
subroutine, in addition to the simple expression that was already
supported.
New tests in parser and semantics sections check that the generated
structure is as expected.
DECLARE REDUCTION lowering is not yet implemented, so will end in a
TODO. A new test with an init subroutine is added, that checks that this
variant also ends with a "Not yet implemented" message.
Commit: 5470dffda2a197f93bf46d69c8c048c236438ef4
https://github.com/llvm/llvm-project/commit/5470dffda2a197f93bf46d69c8c048c236438ef4
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/test/Transforms/Attributor/value-simplify.ll
Log Message:
-----------
[Attributor] Do not optimize away externally_initialized loads. (#128170)
Fixes SWDEV-515029
Commit: 9573c621147748e5ca07f545db0d995708c29435
https://github.com/llvm/llvm-project/commit/9573c621147748e5ca07f545db0d995708c29435
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/flush01.f90
A flang/test/Semantics/OpenMP/flush03.f90
Log Message:
-----------
[flang][OpenMP] Accept modern syntax of FLUSH construct (#128975)
The syntax with the object list following the memory-order clause has
been removed in OpenMP 5.2. Still, accept that syntax with versions >=
5.2, but treat it as deprecated (and emit a warning).
Commit: 439623797230e547d1aee77d4c56f664fbc5090a
https://github.com/llvm/llvm-project/commit/439623797230e547d1aee77d4c56f664fbc5090a
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix Bazel build after db0e7c72aff622849abbc92c3ed0d06efb8e2d16. (#129532)
db0e7c72aff622849abbc92c3ed0d06efb8e2d16.
Commit: d7bc6d66cb0c443ba3ca088bbff08647e20671b2
https://github.com/llvm/llvm-project/commit/d7bc6d66cb0c443ba3ca088bbff08647e20671b2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/release-binaries.yml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/MCPlusBuilder.h
R bolt/include/bolt/Passes/ContinuityStats.h
M bolt/include/bolt/Passes/PatchEntries.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/PatchEntries.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/X86/Inputs/define_bar.s
M bolt/test/X86/bolt-address-translation-yaml.test
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/entry-point-fallthru.s
A bolt/test/X86/profile-quality-reporting.test
A bolt/test/avoid-wx-segment.c
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
M bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
M clang/Maintainers.rst
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/cmake/caches/BOLT.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/docs/UndefinedBehaviorSanitizer.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
R clang/include/clang/CIR/Dialect/IR/CIRAttrVisitor.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CIR/Passes.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/include/clang/Sema/HeuristicResolver.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/AttrImpl.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/SPIR.h
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/vecintrin.h
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
A clang/test/AST/ByteCode/libcxx/pointer-subscript.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/unions.cpp
A clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
A clang/test/AST/ast-dump-atomic-options.hip
A clang/test/AST/cc-modifier.cpp
A clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
A clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/concrete-address.c
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
M clang/test/Analysis/misc-ps.m
A clang/test/Analysis/new-user-defined.cpp
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
M clang/test/Analysis/region-store.cpp
M clang/test/Analysis/stack-addr-ps.cpp
A clang/test/Analysis/suppress-dereferences-from-any-address-space.c
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
A clang/test/CIR/CodeGen/basic.cpp
A clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/global.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
M clang/test/CMakeLists.txt
M clang/test/CXX/drs/cwg29xx.cpp
A clang/test/ClangScanDeps/modules-debug-dir.c
A clang/test/CodeGen/AArch64/fp8-init-list.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/asm.c
A clang/test/CodeGen/attr-malloc.c
A clang/test/CodeGen/bounds-checking-debuginfo.c
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGen/memtag-globals-asm.cpp
M clang/test/CodeGen/partial-reinitialization2.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
M clang/test/CodeGenCXX/merge-functions.cpp
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
A clang/test/CodeGenHLSL/BasicFeatures/ArrayReturn.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
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A clang/test/CodeGenHLSL/builtins/or.hlsl
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A clang/test/CodeGenHLSL/default_cbuffer.hlsl
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A clang/test/CodeGenSPIRV/Builtins/reflect.c
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A clang/test/CoverageMapping/mcdc-nested-expr.cpp
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A clang/test/Frontend/verify-mulptiple-prefixes.c
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M clang/test/Modules/export_as_test.c
A clang/test/Modules/no-transitive-source-location-change-2.cppm
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A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
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M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
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M flang/include/flang/Optimizer/Dialect/FIRDialect.td
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A flang/include/flang/Optimizer/Transforms/RuntimeFunctions.inc
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M flang/include/flang/Support/Fortran-features.h
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M flang/lib/Evaluate/intrinsics.cpp
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M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IO.cpp
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A libclc/clc/include/clc/math/clc_log10.h
A libclc/clc/include/clc/math/clc_log2.h
A libclc/clc/include/clc/math/clc_nan.h
A libclc/clc/include/clc/math/clc_nan.inc
A libclc/clc/include/clc/math/clc_round.h
A libclc/clc/include/clc/math/clc_rsqrt.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_ldexp.cl
A libclc/clc/lib/generic/math/clc_log.cl
A libclc/clc/lib/generic/math/clc_log10.cl
A libclc/clc/lib/generic/math/clc_log2.cl
A libclc/clc/lib/generic/math/clc_log_base.h
A libclc/clc/lib/generic/math/clc_nan.cl
A libclc/clc/lib/generic/math/clc_nan.inc
A libclc/clc/lib/generic/math/clc_round.cl
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/clspv/lib/SOURCES
M libclc/generic/include/clc/math/log10.h
R libclc/generic/include/math/binary_intrin.inc
R libclc/generic/include/math/clc_ldexp.h
R libclc/generic/include/math/clc_sqrt.h
R libclc/generic/include/math/ternary_intrin.inc
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_ldexp.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log2.cl
R libclc/generic/lib/math/log_base.h
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/nan.inc
M libclc/generic/lib/math/round.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
M libclc/spirv/lib/SOURCES
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/traits.h
M libcxx/include/__config
M libcxx/include/__filesystem/path.h
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__iterator/istream_iterator.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/__vector/comparison.h
M libcxx/include/bitset
M libcxx/include/chrono
M libcxx/include/codecvt
M libcxx/include/cwchar
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/initializer_list
M libcxx/include/iterator
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/regex
M libcxx/include/string
M libcxx/include/tuple
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
R libcxx/test/libcxx/utilities/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/tuple/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/variant/no_specializations.verify.cpp
M libcxx/test/libcxx/xopen_source.gen.py
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
M libcxx/test/std/iterators/stream.iterators/istream.iterator/istream.iterator.cons/copy.pass.cpp
A libcxx/test/std/language.support/support.initlist/support.initlist.syn/specialization.verify.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
A libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_overlong.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.gcd/gcd.pass.cpp
M libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.comp/equal.pass.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
A libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.locking/enable_nonlocking_formatter_optimization.compile.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/params.py
M lld/COFF/Driver.cpp
M lld/COFF/Writer.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-arm64ec-data.test
A lld/test/COFF/autoimport-arm64x-data.test
A lld/test/COFF/gc-dwarf-eh-arm64x.s
M lld/test/ELF/aarch64-bti-pac-cli-error.s
A lld/test/ELF/aarch64-execute-only-report.s
M lld/test/ELF/aarch64-feature-bti.s
M lld/test/ELF/aarch64-feature-pauth.s
A lld/test/ELF/arm-execute-only-report.s
M lld/test/ELF/i386-feature-cet.s
M lld/test/ELF/linkerscript/lma-align.test
M lld/test/ELF/linkerscript/section-address-align.test
M lld/test/ELF/linkerscript/section-align2.test
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
M lld/test/ELF/target-specific-options.s
M lld/test/ELF/x86-64-feature-cet.s
A lld/test/wasm/rpath.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SyntheticSections.cpp
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
A lldb/examples/python/fzf_history.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Core/Telemetry.h
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBProgress.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Telemetry.cpp
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/run_locker/TestRunLocker.py
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
A lldb/test/API/tools/lldb-dap/source/Makefile
A lldb/test/API/tools/lldb-dap/source/TestDAP_source.py
A lldb/test/API/tools/lldb-dap/source/main.c
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/API/tools/lldb-dap/variables/children/main.cpp
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
A lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ExceptionInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
M lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetDataBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetExceptionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetFunctionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetInstructionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/TestGetTargetBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M lldb/unittests/Host/PipeTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M lldb/utils/lui/sourcewin.py
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/docs/CodingStandards.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/Kaleidoscope/MCJIT/cached/toy.cpp
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/SCCIterator.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ByteProvider.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
A llvm/include/llvm/CodeGen/MachineSink.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
A llvm/include/llvm/CodeGen/RemoveRedundantDebugValues.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
A llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/Metadata.def
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmMacro.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/Coverage/MCDCTypes.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/AlignOf.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Support/thread.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Debug.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/InlineSizeEstimatorAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CallingConvLower.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.h
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterScavenging.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/StackMaps.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
A llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DroppedVariableStats.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmLexer.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DirectXInstrInfo.h
M llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp
M llvm/lib/Target/DirectX/DirectXRegisterInfo.h
M llvm/lib/Target/DirectX/DirectXSubtarget.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionSave.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/lib/WindowsManifest/WindowsManifestMerger.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
M llvm/test/Analysis/LoopAccessAnalysis/safe-with-dep-distance.ll
M llvm/test/Analysis/LoopAccessAnalysis/stride-access-dependence.ll
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
A llvm/test/Assembler/riscv_vls_cc.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/Bitcode/subrange_type.ll
A llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/argument-blocks.ll
A llvm/test/CodeGen/AArch64/arm64ec-eh.ll
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
A llvm/test/CodeGen/AArch64/build-attributes-all.ll
A llvm/test/CodeGen/AArch64/build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
A llvm/test/CodeGen/AArch64/expand-load-got-pseudo.mir
M llvm/test/CodeGen/AArch64/hadd-combine.ll
M llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
M llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
A llvm/test/CodeGen/AArch64/inline-asm-speculation.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/loop-sink.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/pr51516.mir
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spill-fold.mir
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
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M llvm/test/CodeGen/AArch64/sve-alloca.ll
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M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
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M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
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M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
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M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
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M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
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A llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
R llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
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A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
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M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
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M llvm/test/CodeGen/AMDGPU/div_i128.ll
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M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
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M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
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M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
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M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
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M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
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M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
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M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
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M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/issue48473.mir
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M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
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M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
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M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
A llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
A llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
A llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
A llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
A llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/ARM/machine-sink-multidef.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/ARM/select-imm.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
A llvm/test/CodeGen/Hexagon/bittracker-regclass.ll
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
M llvm/test/CodeGen/MIR/Generic/runPass.mir
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
M llvm/test/CodeGen/MSP430/shift-amount-threshold.ll
A llvm/test/CodeGen/NVPTX/addrspacecast-folding.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
A llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
A llvm/test/CodeGen/NVPTX/cmpxchg.py
A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-array.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/lit.local.cfg
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/upgrade-nvvm-annotations.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
A llvm/test/CodeGen/PowerPC/llvm.sincos.ll
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
A llvm/test/CodeGen/PowerPC/v1024ls.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
A llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
A llvm/test/CodeGen/RISCV/rvv/zvbb-demanded-bits.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-access-chain-type.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
M llvm/test/CodeGen/SystemZ/clear-liverange-spillreg.mir
M llvm/test/CodeGen/SystemZ/cond-move-10.mir
A llvm/test/CodeGen/SystemZ/cond-move-11.mir
M llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
M llvm/test/CodeGen/Thumb/branchless-cmp.ll
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
A llvm/test/CodeGen/Thumb2/peephole-opt-check-reg-sequence-compose-supports-subreg-index.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/half-precision.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
A llvm/test/CodeGen/X86/andnot-blsmsk.ll
M llvm/test/CodeGen/X86/apx/setzucc.ll
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
M llvm/test/CodeGen/X86/cycle-info.mir
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/inline-asm-assertion.ll
M llvm/test/CodeGen/X86/limit-split-cost.mir
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
A llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
A llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
M llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
A llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
A llvm/test/CodeGen/X86/stack-protector-phi.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/vselect-constants.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/ARM/tls.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
M llvm/test/DebugInfo/X86/undef-dbg-val.ll
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_main_ret_foo.s
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-null-global.s
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_weak_link.test
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/LTO/X86/coro.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-aeabi-known.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-bti.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-attrs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-headers.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-gcs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-mixed.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-none.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-numerical-tags.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-out-of-order.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-pac.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi-err.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AsmParser/directive_loc.s
M llvm/test/MC/COFF/cv-errors.s
A llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_vop3cx_warn.txt
A llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
M llvm/test/MC/ELF/elf_directive_section.s
M llvm/test/MC/Mips/expr1.s
A llvm/test/MC/Mips/fixup-expr.s
M llvm/test/MC/Mips/imm-operand-err.s
M llvm/test/MC/Mips/macro-aliases-invalid-wrong-error.s
M llvm/test/MC/Mips/relocation.s
A llvm/test/MC/PowerPC/case-insensitive-regs.s
A llvm/test/MC/RISCV/rv32xqccmp-invalid.s
A llvm/test/MC/RISCV/rv32xqccmp-valid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
A llvm/test/MC/RISCV/rv64e-xqccmp-valid.s
A llvm/test/MC/RISCV/rv64xqccmp-invalid.s
A llvm/test/MC/RISCV/rv64xqccmp-valid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqcia-valid.s
A llvm/test/MC/RISCV/xqcilia-invalid.s
A llvm/test/MC/RISCV/xqcilia-valid.s
A llvm/test/MC/RISCV/xrivosvisni-valid.s
M llvm/test/MC/RISCV/xrivosvizip-invalid.s
M llvm/test/MC/RISCV/xrivosvizip-valid.s
A llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
M llvm/test/ObjectYAML/wasm/dylink_section.yaml
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Other/print-inst-addrs.ll
A llvm/test/Other/print-inst-debug-locs.ll
A llvm/test/Other/print-mi-addrs.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/value-simplify.ll
M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
M llvm/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
M llvm/test/Transforms/FunctionAttrs/arg_returned.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/stats.ll
M llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
M llvm/test/Transforms/GVN/PRE/atomic.ll
M llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/nonintegral.ll
M llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
A llvm/test/Transforms/Inline/PowerPC/inline-target-attr.ll
R llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
A llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
A llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/udiv-pow2-vscale.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
M llvm/test/Transforms/InstSimplify/icmp-monotonic.ll
M llvm/test/Transforms/JumpThreading/pr62908.ll
M llvm/test/Transforms/LoopDeletion/diundef.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling-multi-exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
A llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
A llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
A llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
M llvm/test/Transforms/MergeFunc/comdat.ll
A llvm/test/Transforms/MergeFunc/linkonce.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
A llvm/test/Transforms/MergeFunc/metadata-call-arguments.ll
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-block-inline.ll
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-optin.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
A llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
A llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
A llvm/test/Transforms/SandboxVectorizer/allow_files.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
A llvm/test/Transforms/SandboxVectorizer/stop_at.ll
A llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
A llvm/test/Transforms/Scalarizer/deinterleave2.ll
R llvm/test/Transforms/Scalarizer/sincos.ll
A llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
M llvm/test/Transforms/VectorCombine/X86/load-extractelement-scalarization.ll
M llvm/test/Verifier/invoke.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
A llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
A llvm/test/tools/llvm-exegesis/RISCV/rvv/eligible-inst.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/self-aliasing.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vlmax-only.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vtype-rm-setup.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
M llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
A llvm/test/tools/llvm-objdump/ELF/verdef-invalid.test
M llvm/test/tools/llvm-objdump/ELF/verdef.test
M llvm/test/tools/llvm-rc/windres-preproc.test
M llvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
M llvm/test/tools/llvm-size/radix.test
M llvm/test/tools/llvm-symbolizer/skip-line-zero.s
M llvm/test/tools/llvm-symbolizer/sym-verbose.test
M llvm/tools/bugpoint/ExecutionDriver.cpp
M llvm/tools/bugpoint/OptimizerDriver.cpp
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-cat/llvm-cat.cpp
M llvm/tools/llvm-cfi-verify/llvm-cfi-verify.cpp
M llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp
M llvm/tools/llvm-cxxmap/llvm-cxxmap.cpp
M llvm/tools/llvm-diff/llvm-diff.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPasses.h
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPostprocessing.cpp
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-extract/llvm-extract.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-mca/CodeRegionGenerator.h
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/tools/llvm-undname/llvm-undname.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
M llvm/tools/reduce-chunk-list/reduce-chunk-list.cpp
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
M llvm/unittests/Support/ProgramTest.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
A llvm/unittests/Target/DirectX/RegisterCostTests.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Telemetry/TelemetryTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/DirectX/BUILD.gn
M llvm/utils/mlgo-utils/mlgo/corpus/combine_training_corpus.py
M llvm/utils/mlgo-utils/mlgo/corpus/extract_ir.py
A llvm/utils/mlgo-utils/mlgo/corpus/flags.py
M llvm/utils/yaml-bench/YAMLBench.cpp
M mlir/cmake/modules/CMakeLists.txt
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.td
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.h
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/NanobindUtils.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
A mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/RemoveShapeConstraints.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/IR/AffineExpr.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Conversion/GPUCommon/lower-memcpy-to-gpu-runtime-calls.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
A mlir/test/Dialect/AMDGPU/amdgpu-resolve-strided-metadata.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Dialect/Affine/parallelize.mlir
M mlir/test/Dialect/Affine/simplify-structures.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/MemRef/resolve-dim-ops.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/Tensor/bufferize.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Tosa/transpose-fold.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/Vector/vector-gather-lowering.mlir
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-rewrite-subbyte-ext-and-trunci.mlir
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
R mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
A mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Examples/mlir-opt/loop_fusion_options.mlir
M mlir/test/IR/invalid-builtin-attributes.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
M mlir/test/Target/Cpp/control_flow.mlir
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-target-private-allocatable.mlir
A mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
A mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/selection.mlir
A mlir/test/Target/SPIRV/selection.spv
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lit.cfg.py
M mlir/test/python/ir/operation.py
M mlir/unittests/IR/ShapedTypeTest.cpp
M offload/cmake/caches/AMDGPUBot.cmake
M offload/plugins-nextgen/host/CMakeLists.txt
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_many.c
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompt-general.cpp
M openmp/runtime/src/ompt-internal.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/src/ompt-specific.h
M openmp/runtime/test/ompt/callback.h
M openmp/tools/archer/ompt-tsan.cpp
M runtimes/cmake/Modules/WarningFlags.cmake
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Target/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
Rebase, address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/0cfee9886dbf...d7bc6d66cb0c
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