[all-commits] [llvm/llvm-project] 3dc799: [RISCV] Add DAG combine to convert (iN reduce.add ...

[Sergey Kachkov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3dc799162f4f8e3a951041d453768a9975a719f1
      https://github.com/llvm/llvm-project/commit/3dc799162f4f8e3a951041d453768a9975a719f1
  Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
  Date:   2025-03-03 (Mon, 03 Mar 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll

  Log Message:
  -----------
  [RISCV] Add DAG combine to convert (iN reduce.add (zext (vXi1 A to vXiN)) into vcpop.m (#127497)

This patch combines (iN vector.reduce.add (zext (vXi1 A to vXiN)) into
vcpop.m instruction (similarly to bitcast + ctpop pattern). It can be
useful for counting number of set bits in scalable vector types, which
can't be expressed with bitcast + ctpop (this was previously discussed
here: https://github.com/llvm/llvm-project/pull/74294).



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