[all-commits] [llvm/llvm-project] 77f44a: [CodeGen][NewPM] Port MachineSink to NPM (#115434)

[Akshat Oke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 77f44a964212a54ebc014a703c6787ae236b6ef4
      https://github.com/llvm/llvm-project/commit/77f44a964212a54ebc014a703c6787ae236b6ef4
  Author: Akshat Oke <Akshat.Oke at amd.com>
  Date:   2025-03-03 (Mon, 03 Mar 2025)

  Changed paths:
    A llvm/include/llvm/CodeGen/MachineSink.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/include/llvm/Target/CGPassBuilderOption.h
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/MachineSink.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/test/CodeGen/AArch64/loop-sink.mir
    M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
    M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
    M llvm/test/CodeGen/ARM/machine-sink-multidef.mir
    M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
    M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
    M llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
    M llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
    M llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
    M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir

  Log Message:
  -----------
  [CodeGen][NewPM] Port MachineSink to NPM (#115434)

Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for
the NPM pipeline in buildCodeGenPipeline(... &Opts, ...)



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