[all-commits] [llvm/llvm-project] 3e1ec4: DAG: Use phi to create vregs instead of the consta...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/dag/use-phi-op-to-create-register-type-constant-input
  Home:   https://github.com/llvm/llvm-project
  Commit: 3e1ec4a802554ef9fad9707d5835177cd7025fe1
      https://github.com/llvm/llvm-project/commit/3e1ec4a802554ef9fad9707d5835177cd7025fe1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-03-03 (Mon, 03 Mar 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
    M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
    M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
    M llvm/test/CodeGen/AMDGPU/loop_break.ll
    M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
    M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
    M llvm/test/CodeGen/AMDGPU/mmra.ll
    M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/rem_i128.ll
    M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
    M llvm/test/CodeGen/AMDGPU/sdiv64.ll
    M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
    M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/srem64.ll
    M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
    M llvm/test/CodeGen/AMDGPU/udiv64.ll
    M llvm/test/CodeGen/AMDGPU/urem64.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll

  Log Message:
  -----------
  DAG: Use phi to create vregs instead of the constant input

For most targets, the register class comes from the type so this
makes no difference. For AMDGPU, the selected register class depends
on the divergence of the value. For a constant phi input, this will
always be false. The heuristic for whether to treat the value as
a scalar or vector constant based on the uses would then incorrectly
think this is a scalar use, when really the phi is a copy from S to V.

This avoids an intermediate s_mov_b32 plus a copy in some cases. These
would often, but not always, fold out in mi passes.

This only adjusts the constant input case. It may make sense to do
this for the non-constant case as well.



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