[all-commits] [llvm/llvm-project] b65e09: [Mips] Allow expressions in some immediate operands

[Fangrui Song via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b65e0947cade9bd39036a7700b54c1df4ec00756
      https://github.com/llvm/llvm-project/commit/b65e0947cade9bd39036a7700b54c1df4ec00756
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-03-01 (Sat, 01 Mar 2025)

  Changed paths:
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
    M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
    A llvm/test/MC/Mips/fixup-expr.s
    M llvm/test/MC/Mips/imm-operand-err.s

  Log Message:
  -----------
  [Mips] Allow expressions in some immediate operands

e.g.
`addiu   $t2, $t3, .Lend-.Lstart-4`
used by libdragon/boot/boot_trampoline.S

To make this work, update a few places:

* AsmParser: When matching a isSImm/isUImm, consider an expression
  that does not evaluate to an assemble-time constant an immediate.
* MCCodeEmitter: If this is an I-type instruction and the expression
  does not evaluate to an assemble-time constant, append a
  `fixup_Mips_AnyImm16`.
  TODO: in MipsInstrInfo.td, more `Operand` should switch from the
  default `getMachineOpValue` to `getImmOpValue` like RISCV.
* AsmBackend: If the expression does not evaluate to a constant
  with assembler layout information, report "unknown relocation type"
  like X86. If the result is not within [-32768,65535] (the bound gas
  uses when parsing a constant integer for ADDIU)

Fix #126531

Pull Request: https://github.com/llvm/llvm-project/pull/127581



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications