[all-commits] [llvm/llvm-project] 31897e: [LTO][Pipelines][Coro] De-duplicate Coro passes (#...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Fri Feb 28 14:25:55 PST 2025
Branch: refs/heads/users/vitalybuka/spr/ubsan-remove-fsanitizervptr-from-fsanitizerundefined
Home: https://github.com/llvm/llvm-project
Commit: 31897e651a1aa69207806d497a7080e252c53ebe
https://github.com/llvm/llvm-project/commit/31897e651a1aa69207806d497a7080e252c53ebe
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/LTO/X86/coro.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
Log Message:
-----------
[LTO][Pipelines][Coro] De-duplicate Coro passes (#128654)
```
if (!isLTOPostLink(Phase))
CoroPM.addPass(CoroEarlyPass());
if (!isLTOPreLink(Phase))
// Other Coro passes
```
Followup to #126168.
Commit: 852923822fd085d304988c24f9b02edebe5e7903
https://github.com/llvm/llvm-project/commit/852923822fd085d304988c24f9b02edebe5e7903
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
Log Message:
-----------
[AMDGPU][NewPM] Port AMDGPUInsertDelayAlu to NPM (#128003)
Commit: 472ea0b7821fa8054906c7477e6089f2aa8e3a67
https://github.com/llvm/llvm-project/commit/472ea0b7821fa8054906c7477e6089f2aa8e3a67
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Merge some of the Sifive decoder tables. (#128794)
This makes a single table for vector and another table for system. I
left sf.cease out of system because its not in custom encoding space.
The other system instructions are in the custom part of OPC_SYSTEM.
Commit: e927cf6653a9df804ca0556d8a5985f86ed9147c
https://github.com/llvm/llvm-project/commit/e927cf6653a9df804ca0556d8a5985f86ed9147c
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128… (#128662)
…471)"
Reland https://github.com/llvm/llvm-project/pull/128471
The Passes library was not linked in earlier.
Commit: e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
https://github.com/llvm/llvm-project/commit/e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
Reverts llvm/llvm-project#128662
Still a link error.
Commit: 98542a3d6d087e1baf6c90d134140e2ed858f823
https://github.com/llvm/llvm-project/commit/98542a3d6d087e1baf6c90d134140e2ed858f823
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/Vector/vector-gather-lowering.mlir
Log Message:
-----------
[mlir][Vector] Move vector.extract canonicalizers for DenseElementsAttr to folders (#127995)
This PR moves vector.extract canonicalizers for DenseElementsAttr (splat
and non splat case) to folders. Folders are local, and it's always
better to implement a folder than a canonicalization pattern.
This PR is mostly NFC-ish, because the functionality mostly remains
same, but is now run as part of a folder, which is why some tests are
changed, because GreedyPatternRewriter tries to fold by default.
There is also a test change which makes the indices of a vector.extract
test dynamic. This is so that it doesn't fold away after this pr.
Commit: b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
https://github.com/llvm/llvm-project/commit/b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/X86/inline-asm-assertion.ll
Log Message:
-----------
VirtRegRewriter: Fix verifier errors after regalloc failures (#128280)
Commit: 75aff78f64d2f915b38be1c3635eb6f0f9911514
https://github.com/llvm/llvm-project/commit/75aff78f64d2f915b38be1c3635eb6f0f9911514
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
Log Message:
-----------
RegAllocFast: Fix verifier errors after assigning to reserved registers (#128281)
Commit: fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
https://github.com/llvm/llvm-project/commit/fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NewPM] Port RegAllocGreedy to NPM (#119540)
Leaving out NPM command line support for the next patch.
Commit: 8dd609598e498faa34c7bdb777718d6c6622fa27
https://github.com/llvm/llvm-project/commit/8dd609598e498faa34c7bdb777718d6c6622fa27
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Support/Unix/Program.inc
M llvm/test/tools/llvm-rc/windres-preproc.test
Log Message:
-----------
Support: Do not check if a file exists before executing (#128821)
Let the actual syscall error if the file doesn't exist. This produces
a more standard "no such file or directory" phrasing of the error
message,
and avoids an extra step.
The same antipattern appears in the windows code, we should probably
fix that one too.
Commit: 3f648992bf317a3496c4d137374d2c1532423d1c
https://github.com/llvm/llvm-project/commit/3f648992bf317a3496c4d137374d2c1532423d1c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
Log Message:
-----------
[clang][bytecode] Fix initing incomplete arrays from ImplicitValueIni… (#128729)
…tExpr
If the ImplicitValueInitExpr is of incomplete array type, we ignore it
in its Visit function. This is a special case here, so pull out the
element type and zero the elements.
Commit: 29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
https://github.com/llvm/llvm-project/commit/29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Add baseline tests for bitcast + readlane intrinsics (#128493)
Commit: 2015626783aa7510ccdf6098f2112417cf56a8d0
https://github.com/llvm/llvm-project/commit/2015626783aa7510ccdf6098f2112417cf56a8d0
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2918 'Consideration of constraints for address of overloaded function' (#127773)
Closes https://github.com/llvm/llvm-project/issues/122523
Commit: cdfcce48d5c290a77ab868fb62c18f6ba16e58df
https://github.com/llvm/llvm-project/commit/cdfcce48d5c290a77ab868fb62c18f6ba16e58df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Passes/MachinePassRegistry.def
Log Message:
-----------
[Passes] Fix a warning
This patch fixes:
llvm/include/llvm/Passes/MachinePassRegistry.def:202:6: error:
lambda capture 'PB' is not used [-Werror,-Wunused-lambda-capture]
Commit: a522c227a1d7d5dd4cd855a5fe4460193faf0856
https://github.com/llvm/llvm-project/commit/a522c227a1d7d5dd4cd855a5fe4460193faf0856
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-rewrite-subbyte-ext-and-trunci.mlir
Log Message:
-----------
[mlir][vector] Move tests for `rewriteAlignedSubByteInt{Ext|Trunc}` (nfc) (#126416)
Moves tests for `rewriteAlignedSubByteIntExt` and
`rewriteAlignedSubByteIntTrunc` into a dedicated files. Also adds +
fixes some comments.
This is merely for better organisation and so that it's easier to
identify the patterns and edge cases being tested.
Commit: ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
https://github.com/llvm/llvm-project/commit/ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Add scanning cache (#125988)
Previously, everytime we want to get a source file declaring a specific
module, we need to scan the whole projects again and again. The
performance is super bad. This patch tries to improve this by
introducing a simple cache.
Commit: 92d822245b0f034133fb958c1a067330236f9dea
https://github.com/llvm/llvm-project/commit/92d822245b0f034133fb958c1a067330236f9dea
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for vector sext & zext (#128835)
Commit: e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
https://github.com/llvm/llvm-project/commit/e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
Log Message:
-----------
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)" (#128400)
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)"
This reverts commit 0c50054820799578be8f62b6fd2cc3fbc751c01e.
Reapply with more fixes to avoid expensive_checks failures. Make sure to
call splitSeparateComponents after shrinkToUses, and update the VirtRegMap
with the split registers. Also set undef on all physical register aliases to
the assigned register.
Move physreg handling. Not sure if necessary
Remove intervals from regunits. Not sure if necessary
Commit: 1a114fa302b48fc761a58a8d3be5962d92fa581b
https://github.com/llvm/llvm-project/commit/1a114fa302b48fc761a58a8d3be5962d92fa581b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
A llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
R llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
Log Message:
-----------
RegAlloc: Use new approach to handling failed allocations (#128469)
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
Commit: d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
https://github.com/llvm/llvm-project/commit/d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
DAG: Preserve range metadata when load is narrowed (#128144)
In DAGCombiner.cpp preserve range metadata when load is narrowed to load
LSBs if original range metadata bounds can fit in the narrower type.
Utilize preserved range metadata to reduce 64-bit shl to 32-bit shl.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: b8d1f3d62746110ff0c969a136fc15f1d52f811d
https://github.com/llvm/llvm-project/commit/b8d1f3d62746110ff0c969a136fc15f1d52f811d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Fix an integer overflow issue in computing CTAD's parameter depth (#128704)
There were some cases where we computed incorrect template parameter
depths for synthesized CTAD, invalid as they might be, we still
shouldn't crash anyway.
Technically the only scenario in which the inner function template's
depth is 0 is when it lives within an explicit template specialization,
where the template parameter list is empty.
Fixes https://github.com/llvm/llvm-project/issues/128691
Commit: bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
https://github.com/llvm/llvm-project/commit/bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
Log Message:
-----------
[DWARFLinker] Avoid repeated hash lookups (NFC) (#128825)
Commit: e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
https://github.com/llvm/llvm-project/commit/e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated map lookups (NFC) (#128826)
Commit: 67d92cf3841660e9ba58a02223b7801e74db1051
https://github.com/llvm/llvm-project/commit/67d92cf3841660e9ba58a02223b7801e74db1051
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128827)
Commit: b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
https://github.com/llvm/llvm-project/commit/b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
Log Message:
-----------
[Passes] Avoid repeated hash lookups (NFC) (#128828)
Commit: e264b0e85627d52e2c696c99f8937f7612f00228
https://github.com/llvm/llvm-project/commit/e264b0e85627d52e2c696c99f8937f7612f00228
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProf.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#128829)
Commit: ec9c2935e19171ce8004e1d970f9b7bf068d92a7
https://github.com/llvm/llvm-project/commit/ec9c2935e19171ce8004e1d970f9b7bf068d92a7
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
Log Message:
-----------
[MLIR][Bufferization] Remove `GEN_PASS_DEF_BUFFERIZATIONBUFFERIZE` (#128842)
It was related to the old bufferization mechanism, which has since been
retired.
Commit: 2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
https://github.com/llvm/llvm-project/commit/2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] add missing header for RelayoutOptInterface
for a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Commit: 13245cea11050f875891389ce36115c78aaedd4a
https://github.com/llvm/llvm-project/commit/13245cea11050f875891389ce36115c78aaedd4a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Modernize ABI-based unwind plan creation (#128505)
Replace the by-ref return value with an actual result.
Commit: 5cbff437fadd4c2983fb73e727c82044ae269a6f
https://github.com/llvm/llvm-project/commit/5cbff437fadd4c2983fb73e727c82044ae269a6f
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/onehot_merge.ll
Log Message:
-----------
[InstCombine] Test for trunc to i1 in foldLogOpOfMaskedICmps.
Commit: a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
https://github.com/llvm/llvm-project/commit/a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
Log Message:
-----------
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors (#128830)
Follow up of
https://github.com/llvm/llvm-project/commit/ee52af74d8e5e3083cf5195d11c92f8df95b8072
Handles the multiple use come from different vectors:
https://godbolt.org/z/GMb3Endhr
Commit: 0ba2000b3cece317fd0ec6c433e49185885c4ef7
https://github.com/llvm/llvm-project/commit/0ba2000b3cece317fd0ec6c433e49185885c4ef7
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Enhance the conv2d verifier (#128693)
This commit adds additional checks to the conv2d verifier that check
error_if conditions from the tosa specification. Notably, it adds
padding, stride and dilation invalid value checking, output height and
width checking and bias size checking.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
https://github.com/llvm/llvm-project/commit/28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/udiv-pow2-vscale.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
Log Message:
-----------
[LLVM] Port a few InstCombine tests to use splat instead of shufflevector.
Commit: 575656877f1f42a4996a551caa7a2c9145810813
https://github.com/llvm/llvm-project/commit/575656877f1f42a4996a551caa7a2c9145810813
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
R llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE InstCombine tests.
Also removes a largely duplicate test file and changes the other
one to use autogenerated CHECK lines.
Commit: 6f2345a20e361c7748578b0c3bae37589989e3b8
https://github.com/llvm/llvm-project/commit/6f2345a20e361c7748578b0c3bae37589989e3b8
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
Log Message:
-----------
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
The affected tests were using the longwinded syntax for constant
splats. By using the splat() syntax the tests get simplified whilst
also removing the need for "undef".
Commit: 01371d64a91ed65d18670a1ee570058a0678ce0b
https://github.com/llvm/llvm-project/commit/01371d64a91ed65d18670a1ee570058a0678ce0b
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
M llvm/test/CodeGen/AArch64/sub-splat-sub.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-build-vector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
Using "poison" better reflects realworld generated IR. The main idioms
ported are:
* Inserting into an undefined vector.
* Vector splats.
* Masked load/gather operations with an undefined passthrough.
Commit: d5038b3774485d617e1300cf2f7b98c2460b9042
https://github.com/llvm/llvm-project/commit/d5038b3774485d617e1300cf2f7b98c2460b9042
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgcn/lib/SOURCES
R libclc/amdgcn/lib/math/ldexp.cl
A libclc/clc/include/clc/math/clc_ldexp.h
A libclc/clc/include/clc/math/clc_ldexp.inc
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_ldexp.cl
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_ldexp.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move __clc_ldexp to CLC library (#126078)
This function was already conceptually in the CLC namespace - this just
formally moves it over.
Note however that this commit marks a change in how libclc functions may
be overridden by targets.
Until now we have been using a purely build-system-based approach where
targets could register identically-named files which took responsibility
for the implementation of the builtin in its entirety.
This system wasn't well equipped to deal with AMD's overriding of
__clc_ldexp for only a subset of types, and furthermore conditionally on
a pre-defined macro.
One option for handling this would be to require AMD to duplicate code
for the versions of __clc_ldexp it's *not* interested in overriding. We
could also make it easier for targets to re-define CLC functions through
macros or .inc files. Both of these have obvious downsides. We could
also keep AMD's overriding in the OpenCL layer and bypass CLC
altogether, but this has limited use.
We could use weak linkage on the "base" implementations of CLC
functions, and allow targets to opt-in to providing their own
implementations on a much finer granularity. This commit supports this
as a proof of concept; we could expand it to all CLC builtins if
accepted.
Note that the existing filename-based "claiming" approach is still in
effect, so targets have to name their overrides differently to have both
files compiled. This could also be refined.
Commit: 178b9e5375dd42a4b590803a81b3831923288c91
https://github.com/llvm/llvm-project/commit/178b9e5375dd42a4b590803a81b3831923288c91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/linkonce.ll
Log Message:
-----------
[MergeFunc] Add linkonce test with discardable functions.
Commit: 900220d444257633cc7d1be1475d4da1be58e0ed
https://github.com/llvm/llvm-project/commit/900220d444257633cc7d1be1475d4da1be58e0ed
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
Log Message:
-----------
[CostModel] Handle vector struct results and cost `llvm.sincos` (#123210)
This patch updates the cost model to cost intrinsics that return
multiple values (in structs) correctly. Previously, the cost model only
thought intrinsics that return `VectorType` need scalarizing, which
meant it cost intrinsics that return multiple vectors (that need
scalarizing) way too cheap (giving it the cost of a single function
call).
This patch also adds a custom cost for llvm.sincos when a vector
function library is available, as certain VFs can be expanded (later in
code gen) to a vector function, reducing the cost to a single call (+
the possible loads from the vector function returns values via output
pointers).
Commit: 5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
https://github.com/llvm/llvm-project/commit/5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_ldexp.cl
Log Message:
-----------
[libclc] Make CLC library warning-free (#128864)
There is a long-standing workaround in the libclc build system that
silences a warning about the use of parentheses in bitwise conditional
operations.
In an effort to remove this workaround, this commit re-enables the
warning on the internal CLC library, where most of the bodies of the
builtins will eventually be defined. Thus as we move builtin
implementations into this library, the warnings will trigger and we can
clean up the codebase as we go.
As it happens the only instance in the CLC library which triggered the
warning was in __clc_ldexp.
Commit: 5231736329224fa3f812c22e1e5250e776956550
https://github.com/llvm/llvm-project/commit/5231736329224fa3f812c22e1e5250e776956550
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readfirstlane_b32 dst (#128851)
M0 can only be written to by the SALU, so `v_readfirstlane_b32 m0` is
effectively useless. Represent this by restricting the dest RC of that
instruction to `SReg_32_XM0` which excludes M0.
There is a lot of test changes due to the register class changing, but
most changes are trivial. In some cases, an extra register and
`s_mov_b32` is needed.
Fixes SWDEV-513269
Commit: a00586171cdf835148c66704a877740a9f742a3a
https://github.com/llvm/llvm-project/commit/a00586171cdf835148c66704a877740a9f742a3a
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
Log Message:
-----------
[clang-tidy]improve performance-unnecessary-value-param performance (#128383)
Tolerate fix-it breaking compilation when functions is used as pointers.
`isReferencedOutsideOfCallExpr` will visit the whole translate unit for
each matched function decls. It will waste lots of cpu time in some big
cpp files.
But the benefits of this validation are limited. Lots of function usage
are out of current translation unit.
After removing this validation step, the check profiling changes from
5.7 to 1.1 in SemaExprCXX.cpp, which is similar to version 18.
Commit: 8138d85f630726d2ddbf4a7950683c7db3853eb8
https://github.com/llvm/llvm-project/commit/8138d85f630726d2ddbf4a7950683c7db3853eb8
Author: David Tarditi <d_tarditi at apple.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
Log Message:
-----------
[analyzer] Update the undefined assignment checker diagnostics to not use the term 'garbage' (#126596)
A clang user pointed out that messages for the static analyzer undefined
assignment checker use the term ‘garbage’, which might have a negative
connotation to some users. This change updates the messages to use the
term ‘uninitialized’. This is the usual reason why a value is undefined
in the static analyzer and describes the logical error that a programmer
should take action to fix.
Out-of-bounds reads can also produce undefined values in the static
analyzer. The right long-term design is to have to the array bounds
checker cover out-of-bounds reads, so we do not cover that case in the
updated messages. The recent improvements to the array bounds checker
make it a candidate to add to the core set of checkers.
rdar://133418644
Commit: aace6a2f9d8bffd84a225ef76633421ff541a5d0
https://github.com/llvm/llvm-project/commit/aace6a2f9d8bffd84a225ef76633421ff541a5d0
Author: Luke Quinn <quic_lquinn at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqcia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the TD files associated and increments the Extension number in the clang driver. This is mostly a MC change as there is no other generated code for these instructions yet.
Signed-off-by: Luke Quinn <quic_lquinn at quicinc.com>
Commit: 0f0d3fb6b59b27628a05f2da536b0294c99d61bc
https://github.com/llvm/llvm-project/commit/0f0d3fb6b59b27628a05f2da536b0294c99d61bc
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readlane_b32 dst (#128867)
See #128851 - this is the same patch, but for v_readlane_b32.
This instruction is used much less often so there were less changes
required.
Commit: 83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
https://github.com/llvm/llvm-project/commit/83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove pointless check for subregister def (#128850)
Subregister defs are illegal in SSA
Commit: 3c4fa5a20aff390959385bf959a8c0b87e81d36c
https://github.com/llvm/llvm-project/commit/3c4fa5a20aff390959385bf959a8c0b87e81d36c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/metadata-call-arguments.ll
Log Message:
-----------
[MergeFunc] Add tests showing incorrect handling of metadata call args.
Commit: a5d8b7aeb6b360f20eec88715081ecfdb286b83d
https://github.com/llvm/llvm-project/commit/a5d8b7aeb6b360f20eec88715081ecfdb286b83d
Author: David Green <david.green at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
Log Message:
-----------
[AArch64] Improve urem by constant costs (#122236)
A urem by a constant, much like a udiv by a constant, can be expanded
into a series of mul/add/shift instructions. The exact sequence of
instructions depends on the constants and the types.
If the constant is a power-2 then a shift / and will be used, so the
cost will be 1. This canonicalization happens relatively early so this
likely has very little effect in practice (it does help the cost of
funnel shifts).
For a non-power 2 the code for div will expand to a series of UMULH +
Add + Shift + Add, depending on the constant. urem is generally udiv +
mul + sub, so involves a few extra instructions. The UMULH is not always
available, i32 will use umull+shift, and vector types will use
umull+shift or umull+umull2+uzp depending on the vector size. v2i64 will
be scalarized because there is no mul available. SVE does have a UMULH
instruction.
The end result is that the costs should be closer to reality, with
scalable types a little lower cost than the fixed-width versions. (In
the future we might be able to use umulh for fixed-width when the SVE
instruction is available, but for the moment this should favour scalable
vectorization a little).
I've tried to make this patch only apply to constant UREM/UDIV
instructions. SDIV and SREM are left until a later patch to prevent this
becoming too complex. The funnel shift costs are changing as it believes
it will need a urem to clamp the shift amount, which should be a power-2
value for most common types.
Commit: 15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
https://github.com/llvm/llvm-project/commit/15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/split-vector-insert.ll
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sve-aliasing.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll
M llvm/test/CodeGen/AArch64/sve-min-max-pred.ll
M llvm/test/CodeGen/AArch64/sve-pr92779.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-reassocadd.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-unaligned-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-combine-rshrnb.ll
M llvm/test/CodeGen/AArch64/sve2-rsh.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
Currently, given:
```cpp
svuint8_t foo(uint8_t *x) {
return svld1(svptrue_b8(), x);
}
```
We generate:
```gas
foo:
ptrue p0.b
ld1b { z0.b }, p0/z, [x0]
ret
```
However, on little-endian and with unaligned memory accesses allowed, we
could instead be using LDR as follows:
```gas
foo:
ldr z0, [x0]
ret
```
The second form avoids the predicate dependency.
Likewise for other types and stores.
Commit: 4277c21059a80fdd915aef9abd7be3d2b161f1b0
https://github.com/llvm/llvm-project/commit/4277c21059a80fdd915aef9abd7be3d2b161f1b0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Introduce explicit broadcasts for live-ins. (#124644)
Add a new VPInstruction::Broadcast opcode and use it to materialize
explicit broadcasts of live-ins. The initial patch only materlizes the
broadcasts if the vector preheader dominates all uses that need it.
Later patches will pick the best valid insert point, thus retiring
implicit hoisting of broadcasts from VPTransformsState::get().
PR: https://github.com/llvm/llvm-project/pull/124644
Commit: 8634635d689c5a7adfb19cde4a313d7c02e95194
https://github.com/llvm/llvm-project/commit/8634635d689c5a7adfb19cde4a313d7c02e95194
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Stop reading uninitalized memory
Found by msan.
==8138==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x559016395beb in allocVirtRegUndef llvm/lib/CodeGen/RegAllocFast.cpp:1010:6
Commit: 0f6240c4ddc815283f7bd42fe80847295de4a92c
https://github.com/llvm/llvm-project/commit/0f6240c4ddc815283f7bd42fe80847295de4a92c
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseHLSL.cpp
M clang/test/SemaHLSL/cb_error.hlsl
Log Message:
-----------
[HLSL] Allow EmptyDecl in cbuffer/tbuffer (#128250)
We do handle EmptyDecls in codegen already as of #124886, but we were
blocking them in Sema. EmptyDecls tend to be caused by extra semicolons
which are not illegal.
Fixes #128238
Commit: 56379b29042db9dfc63e74f065cc50b7fb01eddf
https://github.com/llvm/llvm-project/commit/56379b29042db9dfc63e74f065cc50b7fb01eddf
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/bitset
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
Log Message:
-----------
Simplify flip() for std::bitset (#120807)
This PR simplifies the internal bitwise logic of the `flip()` function
for `std::bitset`.
Commit: 2c1df2206189be8550a0e36a39cc185e9e3e0051
https://github.com/llvm/llvm-project/commit/2c1df2206189be8550a0e36a39cc185e9e3e0051
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Fix 8634635d689c5a7adfb19cde4a313d7c02e95194 to not trip assertions
Commit: defe43bbffb0d25ec468f0e54b20548ec192ff90
https://github.com/llvm/llvm-project/commit/defe43bbffb0d25ec468f0e54b20548ec192ff90
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/abs.hlsl
Log Message:
-----------
Add unsigned integer overloads for abs (#128257)
This seems silly, but DXC supports unsigned integer versions of abs that
are just no-ops. This adds the overloads for source compatability
because apparently users actually use them...
Fixes #128249
Commit: 8dd8e5f7d692cc43f4322f04034f5c472381aa43
https://github.com/llvm/llvm-project/commit/8dd8e5f7d692cc43f4322f04034f5c472381aa43
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinTemplatesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[Clang] Add BuiltinTemplates.td to generate code for builtin templates (#123736)
This makes it significantly easier to add new builtin templates, since
you only have to modify two places instead of a dozen or so.
The `BuiltinTemplates.td` could also be extended to generate
documentation from it in the future.
Commit: 7f332423b090abb396adb078000e0fa4958306ea
https://github.com/llvm/llvm-project/commit/7f332423b090abb396adb078000e0fa4958306ea
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
Log Message:
-----------
[MemCpyOpt] Add stack move test with ret-only capture (NFC)
From:
https://github.com/llvm/llvm-project/pull/125880#issuecomment-2685231008
Commit: 1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
https://github.com/llvm/llvm-project/commit/1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86] Allow select(cond,pshufb,pshufb) -> or(pshufb,pshufb) fold to peek through bitcasts (#128876)
Peek through one use bitcasts and rescale the condition mask to a vXi8 type to allow more aggressive use of pshufb zeroing.
Commit: 35bf925f7ea95e71208a839cf4b02de2ee473f75
https://github.com/llvm/llvm-project/commit/35bf925f7ea95e71208a839cf4b02de2ee473f75
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RISCV] Delete dead COPYs to vmv0 during vmv0 elimination
This fixes a crash reported at
https://github.com/llvm/llvm-project/pull/126850#issuecomment-2685166388,
where we may leave around a COPY to vmv0 after peeking through it.
Even though the COPY is dead, there's no pass between vmv0 elimination
and regalloc that will delete it so regalloc will try to allocate
something for it.
The test showcasing this is added in vmv0-elimination.mir. Removing
the dead COPY results in changes in spills in the >= LMUL 16 VP tests,
but it's worth noting that these tests are very noisy and not
representative of real world code.
Commit: ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
https://github.com/llvm/llvm-project/commit/ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Make isValidLoopInterchangePermutation efficient (#128863)
Avoid doing dependency checks for the trivial case when size of `loops`
is 1.
Commit: fd08b0793fbb1729872a89ae9a7f1be662b4947f
https://github.com/llvm/llvm-project/commit/fd08b0793fbb1729872a89ae9a7f1be662b4947f
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Port 8dd8e5f7d692cc43f4322f04034f5c472381aa43
Commit: 5c8e22bb2653b5229cb90b9e28c4a19692a2445b
https://github.com/llvm/llvm-project/commit/5c8e22bb2653b5229cb90b9e28c4a19692a2445b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Export BuiltinTemplates.inc from clang:basic
Commit: 3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
https://github.com/llvm/llvm-project/commit/3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
Log Message:
-----------
Thread Safety Analysis: Handle address-of followed by dereference
Correctly analyze expressions where the address of a guarded variable is
taken and immediately dereferenced, such as (*(type-specifier *)&x).
Previously, such patterns would result in false negatives.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: de10e44b6fe7f3d3cfde3afd8e1222d251172ade
https://github.com/llvm/llvm-project/commit/de10e44b6fe7f3d3cfde3afd8e1222d251172ade
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Support warning on passing/returning pointers to guarded variables
Introduce `-Wthread-safety-pointer` to warn when passing or returning
pointers to guarded variables or guarded data. This is is analogous to
`-Wthread-safety-reference`, which performs similar checks for C++
references.
Adding checks for pointer passing is required to avoid false negatives
in large C codebases, where data structures are typically implemented
through helpers that take pointers to instances of a data structure.
The feature is planned to be enabled by default under `-Wthread-safety`
in the next release cycle. This gives time for early adopters to address
new findings.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: eeb8c2085fb96dbb59446ba1d142803b12a43e18
https://github.com/llvm/llvm-project/commit/eeb8c2085fb96dbb59446ba1d142803b12a43e18
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix a warning
This patch fixes:
llvm/lib/Target/X86/X86ISelLowering.cpp:47257:15: error: comparison
of integers of different signs: 'int' and 'size_t' (aka 'unsigned
long') [-Werror,-Wsign-compare]
Commit: 30b021ffa483e7c0ea9b3b0526eb4597b7e31486
https://github.com/llvm/llvm-project/commit/30b021ffa483e7c0ea9b3b0526eb4597b7e31486
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
Log Message:
-----------
[lldb] Deindent UnwindAssemblyInstEmulation (#128874)
by three levels using early returns/continues.
Commit: bb62af7d14f7fe1301311234352f9652d45ba354
https://github.com/llvm/llvm-project/commit/bb62af7d14f7fe1301311234352f9652d45ba354
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen for valu op (#124797)
true16 selection for valu ops, enable `real-true16` attribute and update
the codegen test
Commit: a955426a16bcbb9bf05eb0e3894663dff4983b00
https://github.com/llvm/llvm-project/commit/a955426a16bcbb9bf05eb0e3894663dff4983b00
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Handle UsingDirectiveDecls (#128888)
By ignoring them.
Commit: 15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
https://github.com/llvm/llvm-project/commit/15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
Log Message:
-----------
[lldb] Build the API unittests with -Wdocumentation (#128893)
The LLDB SB API headers should be -Wdocumentation clean as they might
get included by projects building with -Wdocumentation. Although I'd
love for all of LLDB to be clean, we're pretty far removed from that
goal. Until that changes, this PR will detect issues in the SB API
headers by including all the headers in the unittests (by including
LLDB/API.h) and building that with the warning, if the compiler supports
it.
rdar://143597614
Commit: 1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
https://github.com/llvm/llvm-project/commit/1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineOutliner.cpp
Log Message:
-----------
[MachineOutliner] Add skipModule call for opt-bisect-limit. (#128836)
Commit: 1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
https://github.com/llvm/llvm-project/commit/1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
Log Message:
-----------
[libc++][test] Augment ranges::{fill, fill_n, find} with missing tests (#121209)
libc++ currently has very limited test coverage for `std::ranges{fill, fill_n, find}`
with `vector<bool>::iterator` optimizations. Specifically, the existing tests for
`std::ranges::fill` only covers cases of 1 - 2 bytes, which is merely 1/8 to 1/4
of the `__storage_type` word size. This renders the tests insufficient to validate
functionality for whole words, with or without partial words (which necessitates at
least 8 bytes of data). Moreover, no tests were provided for `ranges::{find, fill_n}`
with `vector<bool>::iterator` optimizations. This PR fills in the gap.
Commit: 14da7d5c1fc64006f731d7715a523d59a9e501e2
https://github.com/llvm/llvm-project/commit/14da7d5c1fc64006f731d7715a523d59a9e501e2
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/hip-gz-options.hip
Log Message:
-----------
Match .exe on Windows (#128894)
If you have zlib (not standard) on Windows, this test runs, and it was
missing a match for the file extension on lld.
Commit: 6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
https://github.com/llvm/llvm-project/commit/6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/thread_limit_nvptx.c
M llvm/docs/NVPTXUsage.rst
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
M llvm/test/CodeGen/NVPTX/upgrade-nvvm-annotations.ll
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Convert vector function nvvm.annotations to attributes (#127736)
Replace some more nvvm.annotations with function attributes,
auto-upgrading the annotations as needed. These new attributes will be
more idiomatic and compile-time efficient than the annotations.
- !"maxntid[xyz]" -> "nvvm.maxntid"
- !"reqntid[xyz]" -> "nvvm.reqntid"
- !"cluster_dim_[xyz]" -> "nvvm.cluster_dim"
Commit: ffc5d2b5d46f979b41cfc822efe8017d919f3d58
https://github.com/llvm/llvm-project/commit/ffc5d2b5d46f979b41cfc822efe8017d919f3d58
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for ranges::swap_range algorithms (#121138)
This PR refactors tests for `ranges::swap_range`, `std::{swap_range,
iter_swap, swap}` algorithms to eliminate redundant code.
Commit: d7b3606f7f8665af6b16263c27b132966e0345b2
https://github.com/llvm/llvm-project/commit/d7b3606f7f8665af6b16263c27b132966e0345b2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
Log Message:
-----------
[libc++] Updates ostream's println LWG status. (#128214)
std::println was originally implemented with support for LWG4088 by
mistake (in 2fd4084fca0c).
The tests already validate the behaviour required by LWG4088.
Fixes: #118348
Commit: a841cf91b3e07000e4397f401630dbbd9556d1c2
https://github.com/llvm/llvm-project/commit/a841cf91b3e07000e4397f401630dbbd9556d1c2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/__ostream/print.h
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
Log Message:
-----------
[lib++][print] Don't pad the ostream output. (#128354)
Per [ostream.formatted.reqmts]/3 padding should only be done when
explicitly stated.
Fixes: #116054
Commit: 26be07b8511b703326f2e10864486b5bb9e76196
https://github.com/llvm/llvm-project/commit/26be07b8511b703326f2e10864486b5bb9e76196
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_string.h
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
Log Message:
-----------
[libc++][format] Disables narrow string to wide string formatters. (#128355)
Implements LWG3944: Formatters converting sequences of char to sequences
of wchar_t
Fixes: #105342
Commit: dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
https://github.com/llvm/llvm-project/commit/dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] fix test for true16 codegen valu op (#128905)
This is a NFC change. Update the test file and fix the build
https://github.com/llvm/llvm-project/pull/124797 is causing a build
issue
Commit: 8039f8e139aa52561d3482d61328fe7f370056e7
https://github.com/llvm/llvm-project/commit/8039f8e139aa52561d3482d61328fe7f370056e7
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
A llvm/test/MC/RISCV/xrivosvisni-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add assembler support for XRivosVisni (#128773)
This implements assembler support for the XRivosVisni custom/vendor
extension from Rivos Inc. which is defined in:
https://github.com/rivosinc/rivos-custom-extensions (See
src/xrivosvisni.adoc)
Codegen support will follow in separate changes.
Commit: f161b1b5265baadc443506b88bd1084adccaef90
https://github.com/llvm/llvm-project/commit/f161b1b5265baadc443506b88bd1084adccaef90
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for rotate and rotate_copy (#126458)
This PR refactors the tests and fix some problems:
- Refactor similar tests using `types::for_each` to remove redundant code;
- Explicitly include the missing header `type_algorithms.h` instead of relying
on a transitive include;
- Fix the incorrect constexpr declaration in `rotate.pass.cpp`, where
the `test()` function is incorrectly defined as `TEST_CONSTEXPR_CXX17`,
which is wrong since `std::rotate()` becomes constexpr only since C++20.
Commit: 8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
https://github.com/llvm/llvm-project/commit/8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Update MicroOpBufferSize in P400 & P600 scheduling models (#128786)
The numbers we previously picked for MicroOpBufferSize in both P400 and
P600's scheduling models turned out to be too conservative and didn't
properly reflect the characteristics of our microarchitectures. This
patch updates these numbers to be more faithful to our hardware.
This is unlikely to have any significant impact on MachineScheduler as
it only uses MicroOpBufferSize in few places. That said, it is supposed
to improve the accuracy of llvm-mca.
Commit: c0abae33d6e73356389295a6d897a21630fcff58
https://github.com/llvm/llvm-project/commit/c0abae33d6e73356389295a6d897a21630fcff58
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-private.mlir
Log Message:
-----------
[MLIR][OPENMP] Relax requirement about branches as terminator of private alloc (#128481)
Fixes #126966
Commit: 7ffeab3121c984cc00f79b0a78f372a4f7526e3b
https://github.com/llvm/llvm-project/commit/7ffeab3121c984cc00f79b0a78f372a4f7526e3b
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
Log Message:
-----------
[LLD][ELF] Generically report "address assignment did not converge" (#128774)
There are considerable number of changes done in the address assignment
fixed point loop, and errors in any of them could cause address
assignment not to converge. However, this is reported to the user as
either "thunk creation not converged" or "relaxation not converged".
We saw a confused bug about this in the wild when spilling failed to
converge. (I'm working on a fix for that.)
We may eventually want a complete reason system when reporting address
assignment taking too many passes, but in the interim it seems prudent
to generalize the error message to "address assignment did not
converge".
Commit: 7717a549e91c4fb554b78fce38e75b0147fb6cac
https://github.com/llvm/llvm-project/commit/7717a549e91c4fb554b78fce38e75b0147fb6cac
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/equal.h
M libcxx/include/__bit_reference
M libcxx/include/__vector/comparison.h
M libcxx/include/bitset
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::equal for vector<bool>::iterator (#121084)
This PR optimizes the performance of `std::ranges::equal` for
`vector<bool>::iterator`, addressing a subtask outlined in issue #64038.
The optimizations yield performance improvements of up to 188x for
aligned equality comparison and 82x for unaligned equality
comparison. Moreover, comprehensive tests covering up to 4 storage words
(256 bytes) with odd and even bit sizes are provided, which validate the
proposed optimizations in this patch.
Commit: 722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
https://github.com/llvm/llvm-project/commit/722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile72.f90
A flang/test/Semantics/modfile72.f90
Log Message:
-----------
[flang][Semantics] Ensure deterministic mod file output (#128655)
This PR adds a test to ensure deterministic ordering in `.mod` files. It
also includes related changes to prevent non-deterministic symbol
ordering caused by pointers outside the cooked source. This issue is
particularly noticeable when using Flang as a library and compiling the
same files multiple times.
Commit: 5d501c6137976ff1f14f3b0e2e593fb9740d0146
https://github.com/llvm/llvm-project/commit/5d501c6137976ff1f14f3b0e2e593fb9740d0146
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] RISCV -> RISC-V in RISCVUsage.rst. NFC (#128906)
Commit: 870b376f0059458df382de0f2cfa712a20e710dc
https://github.com/llvm/llvm-project/commit/870b376f0059458df382de0f2cfa712a20e710dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX] Support the CBufferLoadLegacy operation (#128699)
Fixes #112992
Commit: 317461ed61002de7f6e54ab0a26780c6d2726bb0
https://github.com/llvm/llvm-project/commit/317461ed61002de7f6e54ab0a26780c6d2726bb0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Avoid a std::string allocation for the help output (NFC)
Don't create a temporary `std::string` for the help output, just write
it to `llvm::outs()` directly.
Commit: 159b872b37363511a359c800bcc9230bb09f2457
https://github.com/llvm/llvm-project/commit/159b872b37363511a359c800bcc9230bb09f2457
Author: Vy Nguyen <vyng at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/lib/CMakeLists.txt
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/Telemetry/TelemetryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[llvm][telemetry]Change Telemetry-disabling mechanism. (#128534)
Details:
- Previously, we used the LLVM_BUILD_TELEMETRY flag to control whether
any Telemetry code will be built. This has proven to cause more nuisance
to both users of the Telemetry and any further extension of it. (Eg., we
needed to put #ifdef around caller/user code)
- So the new approach is to:
+ Remove this flag and introduce LLVM_ENABLE_TELEMETRY which would be
true by default.
+ If LLVM_ENABLE_TELEMETRY is set to FALSE (at buildtime), the library
would still be built BUT Telemetry cannot be enabled. And no data can be
collected.
The benefit of this is that it simplifies user (and extension) code
since we just need to put the check on Config::EnableTelemetry. Besides,
the Telemetry library itself is very small, hence the additional code to
be built would not cause any difference in build performance.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: 4059faf61355f15818d4bb800e8a3337658f3b97
https://github.com/llvm/llvm-project/commit/4059faf61355f15818d4bb800e8a3337658f3b97
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Update comment for size of NumToSkip field in DecoderEmitter. NFC
NumToSkip is 24 bits. It used to be 16 bits.
Commit: 5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
https://github.com/llvm/llvm-project/commit/5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Telemetry/Telemetry.h
Log Message:
-----------
[Telemetry] Fix a warning
This patch fixes:
llvm/include/llvm/Telemetry/Telemetry.h:66:8: error:
'llvm::telemetry::Config' has virtual functions but non-virtual
destructor [-Werror,-Wnon-virtual-dtor]
Commit: 74306afe87b85cb9b5734044eb6c74b8290098b3
https://github.com/llvm/llvm-project/commit/74306afe87b85cb9b5734044eb6c74b8290098b3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Fix the schedule of vectorizer improvement monthly sync
Commit: c690b3065d58168c2da0b580cfd770ea256d2f82
https://github.com/llvm/llvm-project/commit/c690b3065d58168c2da0b580cfd770ea256d2f82
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Port 128541 (#128809)
Commit: 1be48fdf8bb25f82889aa75ca130e7aaf86295fe
https://github.com/llvm/llvm-project/commit/1be48fdf8bb25f82889aa75ca130e7aaf86295fe
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
Log Message:
-----------
[mlir][TosaToLinalg] Fix TosaToLinalg to restrict `tosa.cast` types to integer or float (#128859)
This PR fixes a bug where `TosaToLinalg` incorrectly allows `tosa.cast`
to accept types other than integer or float.
Fixes #116342.
Commit: f6703a4ff56972ed6bd1693cdb51cc3bd5848582
https://github.com/llvm/llvm-project/commit/f6703a4ff56972ed6bd1693cdb51cc3bd5848582
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-block-inline.ll
Log Message:
-----------
[ctxprof] don't inline weak symbols after instrumentation (#128811)
Contextual profiling identifies functions by GUID. Functions that may get overridden by the linker with a prevailing copy may have, during instrumentation, different variants in different modules. If these variants get inlined before linking (here I assume thinlto), they will identify themselves to the ctxprof runtime as their GUID, leading to issues - they may have different counter counts, for instance.
If we block their inlining in the pre-thinlink compilation, only the prevailing copy will survive post-thinlink and the confusion is avoided.
The change introduces a small pass just for this purpose, which marks any symbols that could be affected by the above as `noinline` (even if they were `alwaysinline`). We already carried out some inlining (via the preinliner), before instrumenting, so technically the `alwaysinline` directives were honored.
We could later (different patch) choose to mark them back to their original attribute (none or `alwaysinline`) post-thinlink, if we want to - but experimentally that doesn't really change much of the performance of the instrumented binary.
Commit: cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
https://github.com/llvm/llvm-project/commit/cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Port 8dd8e5f7d692 (BuiltinTemplates.td)
Commit: 1e246704e23e3dcae16adbf68cc10b668a8db680
https://github.com/llvm/llvm-project/commit/1e246704e23e3dcae16adbf68cc10b668a8db680
Author: John Harrison <harjohn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Use existing lldb::IOObjectSP for DAP IO (NFC). (#128750)
This simplifies the IOStream.cpp implementation by building on top of
the existing lldb::IOObjectSP.
Additionally, this should help ensure clients connected of a
`--connection` specifier properly detect shutdown requests when the
Socket is closed. Previously, the StreamDescriptor was just accessing
the underlying native handle and was not aware of the `Close()` call to
the Socket itself.
This is both nice to have for simplifying the existing code and this
unblocks an upcoming refactor to support the cancel request.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 2c36411ed26e9ad0cc7e20bac11a34461682bccf
https://github.com/llvm/llvm-project/commit/2c36411ed26e9ad0cc7e20bac11a34461682bccf
Author: elhewaty <mohamedatef1698 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/forward_list
M libcxx/include/list
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
Log Message:
-----------
[libcxx] Add LWG4135: The helper lambda of std::erase for list should specify return type as bool (#128358)
Fixes https://github.com/llvm/llvm-project/issues/118355
Commit: be28365ca78ed305c66b824075323e839f042e4a
https://github.com/llvm/llvm-project/commit/be28365ca78ed305c66b824075323e839f042e4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Generate check lines for if-conversion.ll
The limited check lines make it difficult to reason about test changes
in https://github.com/llvm/llvm-project/pull/128375.
Commit: ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
https://github.com/llvm/llvm-project/commit/ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Change zero points of convolution ops to required inputs (#127679)
This patch changes the input_zp and weight_zp for convolution operators
to be required inputs
in order to align with the TOSA Spec 1.0.
Convolution operators affected are:
CONV2D, CONV3D, DEPTHWISE_CONV2D, and TRANSPOSE_CONV2D.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 177ede2122b8a913b1a86d86cb3acf17cdd93a86
https://github.com/llvm/llvm-project/commit/177ede2122b8a913b1a86d86cb3acf17cdd93a86
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Rename ReduceProd to ReduceProduct (#128751)
This patch renames TOSA ReduceProd operator to ReduceProduct to align
with the TOSA Spec 1.0
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
https://github.com/llvm/llvm-project/commit/579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for stdbit functions (#128934)
Adds targets for the stdbit functions. Since the names follow a strict
pattern, this is done via list comprehensions. I don't want to handwrite
all 50.
Commit: 7b6abd827ff25eacdea14a09d1b74e0eeece854a
https://github.com/llvm/llvm-project/commit/7b6abd827ff25eacdea14a09d1b74e0eeece854a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Remove stray check lines after be28365ca78.
Commit: 364b97f23b4de7732179023220ff23a24bec4919
https://github.com/llvm/llvm-project/commit/364b97f23b4de7732179023220ff23a24bec4919
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
A llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/spillv16.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] 16bit spill support in true16 mode (#128060)
Enables 16-bit values to be spilled to scratch.
Note, the memory instructions used are defined as reading and writing
VGPR_32, but do not clobber the unspecified 16-bits of those registers,
and so spills and reloads of lo and hi halves of the registers work.
Commit: 7f482aa848c5f136d2b32431f91f88492c78c709
https://github.com/llvm/llvm-project/commit/7f482aa848c5f136d2b32431f91f88492c78c709
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-debug-dir.c
Log Message:
-----------
[clang modules] Setting `DebugCompilationDir` when it is safe to ignore current working directory (#128446)
This PR explicitly sets `DebugCompilationDir` to the system's root
directory if it is safe to ignore the current working directory.
This fixes a problem where a PCM file's embedded debug information can
lead to compilation failure. The compiler may have decided it is indeed
safe to ignore the current working directory. In this case, the PCM
file's content is functionally correct regardless of the current working
directory because no inputs use relative paths (see
https://github.com/llvm/llvm-project/pull/124786). However, a PCM may
contain debug info. If debug info is requested, the compiler uses the
current working directory value to set `DW_AT_comp_dir`. This may lead
to the following situation:
1. Two different compilations need the same PCM file.
2. The PCM file is compiled assuming a working directory, which is
embedded in the debug info, but otherwise has no effect.
3. The second compilation assumes a different working directory, and
expects an identically-sized pcm file. However, it cannot find such a
PCM, because the existing PCM file has been compiled assuming a
different `DW_AT_comp_dir `, which is embedded in the debug info.
This PR resets the `DebugCompilationDir` if it is functionally safe to
ignore the working directory so the above situation is avoided, since
all debug information will share the same working directory.
rdar://145249881
Commit: 418a9872851ef5342b29baa36dd672129f129953
https://github.com/llvm/llvm-project/commit/418a9872851ef5342b29baa36dd672129f129953
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
Log Message:
-----------
[SLP]Do not use node, if it is a subvector or buildvector node
If the buildvector has some matches with another node, which is
a subvector of another buildvector node, need to check for this and
cancel matching to avoid incorrect ordering of the nodes.
Fixes #128770
Commit: eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
https://github.com/llvm/llvm-project/commit/eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add more math intrinsic interfaces in cudadevice (#128931)
Commit: 7371f691b97986fd3f32d8618131ca40788c7b8b
https://github.com/llvm/llvm-project/commit/7371f691b97986fd3f32d8618131ca40788c7b8b
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
Log Message:
-----------
[MLIR][Vector]: Generalize conversion of `vector.insert` to LLVM in line with `vector.extract` (#128915)
This is doing the same as
https://github.com/llvm/llvm-project/pull/117731 did for
`vector.extract`, but for `vector.insert`.
It is a bit more complicated as the insertion destination may itself
need to be extracted.
As the test shows, this fixes two previously unsupported cases:
- Dynamic indices
- 0-D vectors.
---------
Signed-off-by: Benoit Jacob <jacob.benoit.1 at gmail.com>
Commit: 42526d240cc953963ea48bae0b4c2ab548e9d897
https://github.com/llvm/llvm-project/commit/42526d240cc953963ea48bae0b4c2ab548e9d897
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
A mlir/test/Dialect/AMDGPU/amdgpu-resolve-strided-metadata.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Plumb address space 7 through MLIR, add address_space attr. (#125594)
This commit adds support for casting memrefs into fat raw buffer
pointers to the AMDGPU dialect.
Fat raw buffer pointers - or, in LLVM terms, ptr addrspcae(7), allow
encapsulating a buffer descriptor (as produced by the make.buffer.rsrc
intrinsic or provided from some API) into a pointer that supports
ordinary pointer operations like load or store. This allows people to
take advantage of the additional semantics that buffer_load and similar
instructions provide without forcing the use of entirely separate
amdgpu.raw_buffer_* operations.
Operations on fat raw buffer pointers are translated to the
corresponding LLVM intrinsics by the backend.
This commit also goes and and defines a #amdgpu.address_space<>
attribute so that AMDGPU-specific memory spaces can be represented. Only
#amdgpu.address_space<fat_raw_buffer> will work correctly with the
memref dialect, but the other possible address spaces are included for
completeness.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Co-authored-by: Prashant Kumar <pk5561 at gmail.com>
Commit: 469757efafebdd5772d993fca4dc0dfa7cbda17c
https://github.com/llvm/llvm-project/commit/469757efafebdd5772d993fca4dc0dfa7cbda17c
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)
Since LowerBufferFatPointers runs before PreISelIntrinsicLowering, which
normally handles unsupported memcpy()s,, and since you can't have a
`noalias {ptr addrspace(8), i32}` becasue it crashes later passes,
manually expand memcpy()s involving buffer fat pointers to loops.
Additionally, though they're unlikely to be used, this commit adds
support for memset().
This commit doesn't implement writing direct-to-LDS loads as the
intrinsics, but leaves the option in the future.
Commit: 147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
https://github.com/llvm/llvm-project/commit/147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
Log Message:
-----------
[WebAssemblyLowerEmscriptenEHSjLj] Avoid setting import_name where possible (#128564)
This change effectively reverts 296ccef
(https://reviews.llvm.org/D77192)
Most of these symbols are just normal C symbols that get imported from
wither libcompiler-rt or from emscripten's JS library code. In most
cases it should not be necessary to give them explicit import names.
The advantage of doing this is that we can wasm-ld can/will fail with a
useful error message when these symbols are missing. As opposed to today
where it will simply import them and defer errors until later (when they
are less specific).
Commit: 02128342d2818e5a65846fec4179ed5344045102
https://github.com/llvm/llvm-project/commit/02128342d2818e5a65846fec4179ed5344045102
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
Revert "DAG: Preserve range metadata when load is narrowed" (#128948)
Reverts llvm/llvm-project#128144
Breaks clang prod x64 build (seen in Fuchsia toolchain)
Commit: 39bab1de33333ee3c62b586c4e8d26f8c443bc60
https://github.com/llvm/llvm-project/commit/39bab1de33333ee3c62b586c4e8d26f8c443bc60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
Log Message:
-----------
[SLP]Check if the operand for removal is the reduction operand, awaiting for the reduction
If the operand of the instruction-to-be-removed is a reduction value,
which is not reduced yet, and, thus, it has no users, it may be removed
during operands analysis.
Fixes #128736
Commit: 8fb88f568011fb916cda9d7927ac97c6751a8b89
https://github.com/llvm/llvm-project/commit/8fb88f568011fb916cda9d7927ac97c6751a8b89
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/test/Modules/Inputs/export_as_test.modulemap
M clang/test/Modules/diagnostics.modulemap
M clang/test/Modules/export_as_test.c
Log Message:
-----------
[clang][modules] Separate parsing of modulemaps (#119740)
This separates out parsing of modulemaps from updating the
`clang::ModuleMap` information.
Currently this has no effect other than slightly changing diagnostics.
Upcoming changes will use this to allow searching for modules without
fully processing modulemaps.
This creates a new `modulemap` namespace because there are too many
things called ModuleMap* right now that mean different things. I'd like
to clean this up, but I'm not sure yet what I want to call everything.
This also drops the `SourceLocation` from `moduleMapFileRead`. This is
never used in tree, and in future patches I plan to make the modulemap
parser use a different `SourceManager` so that we can share modulemap
parsing between `CompilerInstance`s. This will make the `SourceLocation`
meaningless.
Commit: d584d1f188553b6cb417beb903f58d763c265380
https://github.com/llvm/llvm-project/commit/d584d1f188553b6cb417beb903f58d763c265380
Author: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call (#128626)
Currently, the llvm importer can only cover intrinsics that have a first
class representation in an MLIR dialect (arm-neon, etc). This PR
introduces a fallback mechanism that allow "unregistered" intrinsics to
be imported by using the generic `llvm.intrinsic_call` operation. This
is useful in several ways:
1. Allows round-trip the LLVM dialect output lowered from other dialects
(example: ClangIR)
2. Enables MLIR-linking tools to operate on imported LLVM IR without
requiring to add new operations to dozen of different targets (cc
@xlauko @smeenai).
If multiple dialects implement this interface hook, the last one to
register is the one converting all unregistered intrinsics.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 1559a65efaf327f9c72e14d4bb1834f076e7fc20
https://github.com/llvm/llvm-project/commit/1559a65efaf327f9c72e14d4bb1834f076e7fc20
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
R llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
R llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Revert "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)"
This reverts commit 469757efafebdd5772d993fca4dc0dfa7cbda17c.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/126621
Commit: ff80bdcf734909ac837e88cafdfc1b5d66845a98
https://github.com/llvm/llvm-project/commit/ff80bdcf734909ac837e88cafdfc1b5d66845a98
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
Log Message:
-----------
[RISCV] Adding missing P600 sched model test for RVV segmented loads/stores
This is the P600 counterpart of
`test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s`.
Commit: effd7f04b678b4be1a77ae1f12f2b64469c8fa04
https://github.com/llvm/llvm-project/commit/effd7f04b678b4be1a77ae1f12f2b64469c8fa04
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
Log Message:
-----------
[gn build] Port 8fb88f568011
Commit: f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
https://github.com/llvm/llvm-project/commit/f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] truncate/ftruncate interception. (#128904)
Commit: 26ac7429d1d6aed080430e8f5d890531b1054f2d
https://github.com/llvm/llvm-project/commit/26ac7429d1d6aed080430e8f5d890531b1054f2d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] std::move matchings (NFC) (#128933)
We do not use Matchings after we call try_emplace, so we can just
std::move Matchings.
Commit: 524711c344b413d5c25d4bed1175d58670ab1720
https://github.com/llvm/llvm-project/commit/524711c344b413d5c25d4bed1175d58670ab1720
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for strfrom<float> (#128956)
Add targets and tests for strfromf, strfromd and strfroml.
No idea why the standard committee decided that the long double function
should be "strfroml" instead of "strfromld" which would match "strtold"
and leave them space to add string from integer functions in future.
Commit: 829e2a55261890e15102d978f714001a2d1acf85
https://github.com/llvm/llvm-project/commit/829e2a55261890e15102d978f714001a2d1acf85
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/enumeration.py
R libc/utils/hdrgen/function.py
R libc/utils/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/__init__.py
A libc/utils/hdrgen/hdrgen/enumeration.py
A libc/utils/hdrgen/hdrgen/function.py
A libc/utils/hdrgen/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/hdrgen/macro.py
A libc/utils/hdrgen/hdrgen/main.py
A libc/utils/hdrgen/hdrgen/object.py
A libc/utils/hdrgen/hdrgen/type.py
A libc/utils/hdrgen/hdrgen/yaml_functions_sorted.py
A libc/utils/hdrgen/hdrgen/yaml_to_classes.py
R libc/utils/hdrgen/header.py
R libc/utils/hdrgen/macro.py
M libc/utils/hdrgen/main.py
R libc/utils/hdrgen/object.py
R libc/utils/hdrgen/type.py
R libc/utils/hdrgen/yaml_functions_sorted.py
M libc/utils/hdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][hdrgen] Allow to treat hdrgen Python code as a Python module. (#128955)
Move the hdrgen code under a subdirectory to treat it as a Python
module.
This mimics the structure used by llvm/utils/lit and
llvm/utils/mlgo-utils and simplifies integration of hdrgen to the build
system which rely on Python modules. In addition to that, it clarifies
which imports are coming from the hdrgen-specific helpers (e.g. "from
type import ..." becomes "from hdrgen.type import ...".
Leave the entrypoints (top-level main.py and yaml_to_classes.py) as-is:
they can keep being referred by the CMake build system w/o any changes.
Commit: d708bfb3c0be7ffdba384eff15cd329863568453
https://github.com/llvm/llvm-project/commit/d708bfb3c0be7ffdba384eff15cd329863568453
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
A llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
Log Message:
-----------
AMDGPU: Fix si-fix-sgpr-copies asserting on VReg_1 phi (#128903)
Commit: 2761d4ca828a557d0bdd20259d60b486d360d998
https://github.com/llvm/llvm-project/commit/2761d4ca828a557d0bdd20259d60b486d360d998
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
R mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
Revert "[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call" (#128973)
Reverts llvm/llvm-project#128626
Looks like the static definition broke some bots!
Co-authored-by: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Commit: f409340cc217c55c3960a375054a17b2bc927e53
https://github.com/llvm/llvm-project/commit/f409340cc217c55c3960a375054a17b2bc927e53
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Return an llvm::Error instead of calling exit directly (NFC) (#128951)
Return an `llvm::Error` from `LaunchRunInTerminalTarget` instead of
calling `exit()` directly.
Commit: 4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
https://github.com/llvm/llvm-project/commit/4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
Log Message:
-----------
AMDGPU: Do not try to commute instruction with same input register (#127562)
There's little point to trying to commute an instruction if the
two operands are already the same.
This avoids an assertion in a future patch, but this likely isn't the
correct fix. The worklist management in SIFoldOperands is dodgy, and
we should probably fix it to work like PeepholeOpt (i.e. stop looking
at use lists, and fold from users). This is an extension of the already
handled special case which it's trying to avoid folding an instruction
which is already being folded.
Commit: a3165398db0736588daedb07650195502592e567
https://github.com/llvm/llvm-project/commit/a3165398db0736588daedb07650195502592e567
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
Log Message:
-----------
AMDGPU: Fix overly conservative immediate operand check (#127563)
The real legality check is peformed later anyway, so this was
unnecessarily blocking immediate folds in handled cases.
This also stops folding s_fmac_f32 to s_fmamk_f32 in a few tests,
but that seems better. The globalisel changes look suspicious,
it may be mishandling constants for VOP3P instructions.
Commit: c8f70d7286db0eb54b001a6621a863b96c006e45
https://github.com/llvm/llvm-project/commit/c8f70d7286db0eb54b001a6621a863b96c006e45
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/partial-reinitialization2.c
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
A clang/test/OpenMP/amdgcn_sret_ctor.cpp
Log Message:
-----------
[clang][CodeGen] Additional fixes for #114062 (#128166)
This addresses two issues introduced by moving indirect args into an
explicit AS (please see
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2659829790>
and
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2661158477>):
1. Unconditionally stripping casts from a pre-allocated return slot was
incorrect / insufficient (this is illustrated by the
`amdgcn_sret_ctor.cpp` test);
2. Putting compiler manufactured sret args in a non default AS can lead
to a C-cast (surprisingly) requiring an AS cast (this is illustrated by
the `sret_cast_with_nonzero_alloca_as.cpp test).
The way we handle (2), by subverting CK_BitCast emission iff a sret arg
is involved, is quite naff, but I couldn't think of any other way to use
a non default indirect AS and make this case work (hopefully this is a
failure of imagination on my part).
Commit: 2d585ccecc45d84483ce8a7e26dbf455e9ba3798
https://github.com/llvm/llvm-project/commit/2d585ccecc45d84483ce8a7e26dbf455e9ba3798
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug that changes keyword `or` to an identifier (#128410)
Fixes #105482
Commit: d29a1be94bc391205fa361f57f7fbc83c1e6f55a
https://github.com/llvm/llvm-project/commit/d29a1be94bc391205fa361f57f7fbc83c1e6f55a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't break before *const (#128817)
Fixes #28919
Commit: a2fac3f87be563cb588040c385f48b71cddf31e9
https://github.com/llvm/llvm-project/commit/a2fac3f87be563cb588040c385f48b71cddf31e9
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
Log Message:
-----------
[NFC] Fix Sanitizer breakage introduced in #128166 (#128990)
Remove accidental leftover unused variable.
Commit: 12c7908f67924809025c6bf669881c90322dbd57
https://github.com/llvm/llvm-project/commit/12c7908f67924809025c6bf669881c90322dbd57
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
Log Message:
-----------
[ORC] De-duplicate some logic for handling MachO::dylib-based load commands.
All such commands share a common struct layout, and we'll be introducing
another soon (LC_LOAD_WEAK_DYLIB). To avoid redundant specializations this
commit moves the logic for these commands into a common base class.
Commit: 2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
https://github.com/llvm/llvm-project/commit/2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Support adding LC_LOAD_WEAK_DYLIB commands to MachO JITDylib headers.
MachOPlatform synthesizes Mach headers for JITDylibs (see ef314d39b92). This
commit adds support for adding LC_LOAD_WEAK_DYLIB commands to these synthesized
headers (LC_LOAD_DYLIB was already supported previously).
Commit: 20cea4d410df8f92a8dc639c1747c238e1e3e65b
https://github.com/llvm/llvm-project/commit/20cea4d410df8f92a8dc639c1747c238e1e3e65b
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
Log Message:
-----------
[ORC] Sink include into implementation file.
TapiUniversal.h is only needed as an implementation detail.
Commit: 4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
https://github.com/llvm/llvm-project/commit/4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
M llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
M llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
Log Message:
-----------
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
Commit: 354eb88285c0d803b0674a3b2961b4109905383a
https://github.com/llvm/llvm-project/commit/354eb88285c0d803b0674a3b2961b4109905383a
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/examples/python/fzf_history.py
Log Message:
-----------
[lldb] Also show session history in fzf_history (#128986)
lldb's history log file is written to at the end of a debugging session.
As a result, the log does not contain commands run during the current
session.
This extends the `fzf_history` to include the output of `session
history`.
Commit: 363b05944f9212511ee6811d0eb1af841c177226
https://github.com/llvm/llvm-project/commit/363b05944f9212511ee6811d0eb1af841c177226
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)
The documents claims that it ignores sNaN, while in the current code it
may be different.
- as the finally callback, it use libc call fmin(3)/fmax(3). while C23
clarifies that fmin(3)/fmax(3) should return NaN for sNaN vs NUM.
- on some architectures, such as aarch64, it converts to `fmaxnm`, which
returns qNaN for sNaN vs NUM.
- on RISC-V (SPEC 2019+), it converts to `fmax`, which returns NUM for
sNaN vs NUM.
Since we have introduced llvm.minimumnum and llvm.maximumnum, which
follow IEEE 754-2019's minimumNumber/maximumNumber.
So, it's time for us to clarify llvm.minnum and llvm.maxnum. Since the
final fallback of llvm.minnum and llvm.maxnum is
fmin(3)/fmax(3), so that it is reasonable to follow the behaviors of
fmin(3)/fmax(3).
Although C23 clarified the behavior about sNaN and +0.0/-0.0:
(NUM or NaN) vs sNaN -> qNaN
+0.0 vs -0.0 -> either one of +0.0/-0.0
It is the same the IEEE754-2008's maxNUM and minNUM.
Not all implementation work as expected.
Since some architectures such as aarch64/MIPSr6/LoongArch, have
instructions that implements +0.0>-0.0.
So Let's define llvm.minnum and llvm.maxnum to IEEE754-2008 with
+0.0>-0.0.
The architectures without such instructions can implements `NSZ` flavor
to speed up,
and the frontend, such as clang, can call them with `nsz` attribute.
Commit: aef16edb26b2e255b6c2beda8f03a70505ffb22a
https://github.com/llvm/llvm-project/commit/aef16edb26b2e255b6c2beda8f03a70505ffb22a
Author: wheatfox <wheatfox17 at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
Log Message:
-----------
[mlir][Tosa] Add unreachable case for bad Extension type in TosaProfileCompliance (#128889)
add `llvm_unreachable` at the end of `getCooperativeProfiles` to
eliminate compiler warning of "control reaches end of non-void function"
Commit: eb1c3ace39644dbe24777a00ba4d879d23c7bb46
https://github.com/llvm/llvm-project/commit/eb1c3ace39644dbe24777a00ba4d879d23c7bb46
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-optin.ll
Log Message:
-----------
[ctxprof] Override type of instrumentation if `-profile-context-root` is specified (#128940)
This patch makes it easy to enable ctxprof instrumentation for targets where the build has a bunch of defaults for instrumented PGO that we want to inherit for ctxprof.
This is switching experimental defaults: we'll eventually enable ctxprof instrumentation through `PGOOpt` but that type is currently quite entangled and, for the time being, no point adding to that.
Commit: 5066d7b60186fe0d557223493a17c3aa9a06f58f
https://github.com/llvm/llvm-project/commit/5066d7b60186fe0d557223493a17c3aa9a06f58f
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/rv32xqccmp-invalid.s
A llvm/test/MC/RISCV/rv32xqccmp-valid.s
A llvm/test/MC/RISCV/rv64e-xqccmp-valid.s
A llvm/test/MC/RISCV/rv64xqccmp-invalid.s
A llvm/test/MC/RISCV/rv64xqccmp-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Xqccmp 0.1 Assembly Support (#128731)
Xqccmp is a new spec by Qualcomm that makes a vendor-specific effort to
solve the push/pop + frame pointers issue. Broadly, it takes the Zcmp
instructions and reverse the order they push/pop registers in, which
ends up matching the frame pointer convention.
This extension adds a new instruction not present in Zcmp,
`qc.cm.pushfp`, which will set `fp` to the incoming `sp` value after it
has pushed the registers.
This change duplicates the Zcmp implementation, with minor changes to
mnemonics (for the `qc.` prefix), predicates, and the addition of
`qc.cm.pushfp`. There is also new logic to prevent combining Xqccmp and
Zcmp. Xqccmp is kept separate to Xqci for decoding/encoding etc, as the
specs are separate today.
Specification:
https://github.com/quic/riscv-unified-db/releases/tag/Xqccmp_extension-0.1.0
Commit: 110b77f32859f39d253623153a37671f5601de65
https://github.com/llvm/llvm-project/commit/110b77f32859f39d253623153a37671f5601de65
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Handle floats in atomiccas (#128970)
Commit: 556eb8244201a81fff7b246561a677a782b69fa0
https://github.com/llvm/llvm-project/commit/556eb8244201a81fff7b246561a677a782b69fa0
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Function type return type improvements (#128787)
When a C or C++ function has a return type of `void`, the function type
is now represented in MLIR as having no return type rather than having a
return type of `!cir.void`. This avoids breaking MLIR invariants that
require the number of return types and the number of return values to
match.
Change the assembly format for `cir::FuncType` from having a leading
return type to having a trailing return type. In other words, change
```
!cir.func<!returnType (!argTypes)>
```
to
```
!cir.func<(!argTypes) -> !returnType)>
```
Unless the function returns `void`, in which case change
```
!cir.func<!cir.void (!argTypes)>
```
to
```
!cir.func<(!argTypes)>
```
Commit: 5f6a3e63a31aaebc620a18c47bc5590f6f705c98
https://github.com/llvm/llvm-project/commit/5f6a3e63a31aaebc620a18c47bc5590f6f705c98
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)
Commit: 5d404d75cf513f9926209b8dd515083226dae88f
https://github.com/llvm/llvm-project/commit/5d404d75cf513f9926209b8dd515083226dae88f
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Generalize handlePairwiseShadowOrIntrinsic, and handle x86 pairwise add/sub (#127567)
x86 pairwise add and sub are currently handled by applying the pairwise add intrinsic to the shadow (https://github.com/llvm/llvm-project/pull/124835), due to the lack of an x86 pairwise OR intrinsic. handlePairwiseShadowOrIntrinsic was added (https://github.com/llvm/llvm-project/pull/126008) to handle Arm
pairwise add, but assumes that the intrinsic operates on each pair of elements as defined by the LLVM type. In contrast, x86 pairwise add/sub may sometimes have e.g., <1 x i64> as a parameter but actually be operating on <2 x i32>.
This patch generalizes handlePairwiseShadowOrIntrinsic, to allow reinterpreting the parameters to be a vector of specified element size, and then uses this function to handle x86 pairwise add/sub.
Commit: 88ff6070a5211e0eebe9b614efbeae8082866d1a
https://github.com/llvm/llvm-project/commit/88ff6070a5211e0eebe9b614efbeae8082866d1a
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
APFloat: Fix maxnum and minnum with sNaN (#112854)
See: https://github.com/llvm/llvm-project/pull/112852
Fixes: https://github.com/llvm/llvm-project/issues/111991
We have reclarify llvm.maxnum and llvm.minnum to follow IEEE-754 2008's
maxNum and minNum with +0.0>-0.0.
So let's make APFloat::maxnum and APFloat::minnum to follow it, too.
Commit: 51a15d96fdb9818bf4e5439d4b551fc0950d3c69
https://github.com/llvm/llvm-project/commit/51a15d96fdb9818bf4e5439d4b551fc0950d3c69
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
Log Message:
-----------
[RISCV] Simplify createRISCVELFStreamer registration
Commit: 50b508cc7b2d95f92896df73f49063b5aafec43d
https://github.com/llvm/llvm-project/commit/50b508cc7b2d95f92896df73f49063b5aafec43d
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
Log Message:
-----------
[AMDGPU] Verify SdwaSel value range (#128898)
Make the MachineVerifier check that the value provided for an SDWA selection is a
valid value for the SdwaSel enum.
Commit: 7521207e415b19b2924930ac95c2fcf07d56f2f2
https://github.com/llvm/llvm-project/commit/7521207e415b19b2924930ac95c2fcf07d56f2f2
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] fix copy_file_range test. (#129010)
Passing Large File Support.
Address #125816
Commit: dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
https://github.com/llvm/llvm-project/commit/dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.td
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.h
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.td
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/RemoveShapeConstraints.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
Log Message:
-----------
[MLIR][NFC] Retire `let constructor` for Shape and MLProgram (#128869)
`let constructor` is legacy (do not use in tree!) since the table gen
backend emits most of the glue logic to build a pass. This PR retires
the td method for Shape and MLProgram
Commit: b38fdfc0f9bef696420a7d02fc1441416a146527
https://github.com/llvm/llvm-project/commit/b38fdfc0f9bef696420a7d02fc1441416a146527
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
Log Message:
-----------
[AArch64] Simplify ELFStreamer and WinCOFFStreamer
Commit: c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
https://github.com/llvm/llvm-project/commit/c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
Log Message:
-----------
[RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)
zext.w is only available on RV64.
We also never hoist UINT64_C(0xffffffff) on RV32, since the AND is
deleted by SelectionDAG after type legalization splits it.
Commit: 9a4320adb13b032a035f7c2ca5516202c4036d5c
https://github.com/llvm/llvm-project/commit/9a4320adb13b032a035f7c2ca5516202c4036d5c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port 42526d240cc953963ea48bae0b4c2ab548e9d897
include "../" looks wrong
Commit: 78aa61d8b60fc3e9d00236332078d14808abbc57
https://github.com/llvm/llvm-project/commit/78aa61d8b60fc3e9d00236332078d14808abbc57
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[InstCombine] matchOrConcat - return Value* not Instruction* (#128921)
NFC to make it easier to use builders in the future that might constant fold etc.
Commit: e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
https://github.com/llvm/llvm-project/commit/e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/as_type.cl
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
M llvm/test/Transforms/FunctionAttrs/arg_returned.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/stats.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
Log Message:
-----------
Reapply [CaptureTracking][FunctionAttrs] Add support for CaptureInfo (#125880) (#128020)
Relative to the previous attempt this includes two fixes:
* Adjust callCapturesBefore() to not skip captures(ret: address,
provenance) arguments, as these will not count as a capture
at the call-site.
* When visiting uses during stack slot optimization, don't skip
the ModRef check for passthru captures. Calls can both modref
and be passthru for captures.
------
This extends CaptureTracking to support inferring non-trivial
CaptureInfos. The focus of this patch is to only support FunctionAttrs,
other users of CaptureTracking will be updated in followups.
The key API changes here are:
* DetermineUseCaptureKind() now returns a UseCaptureInfo where the UseCC
component specifies what is captured at that Use and the ResultCC
component specifies what may be captured via the return value of the
User. Usually only one or the other will be used (corresponding to
previous MAY_CAPTURE or PASSTHROUGH results), but both may be set for
call captures.
* The CaptureTracking::captures() extension point is passed this
UseCaptureInfo as well and then can decide what to do with it by
returning an Action, which is one of: Stop: stop traversal.
ContinueIgnoringReturn: continue traversal but don't follow the
instruction return value. Continue: continue traversal and follow the
instruction return value if it has additional CaptureComponents.
For now, this patch retains the (unsound) special logic for comparison
of null with a dereferenceable pointer. I'd like to switch key code to
take advantage of address/address_is_null before dropping it.
This PR mainly intends to introduce necessary API changes and basic
inference support, there are various possible improvements marked with
TODOs.
Commit: bae41127e2adc90d5c107501a734488134b475af
https://github.com/llvm/llvm-project/commit/bae41127e2adc90d5c107501a734488134b475af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
Log Message:
-----------
[DAG] replaceShuffleOfInsert - add support for shuffle_vector(scalar_to_vector(x),y) -> insert_vector_elt(y,x,c) (#127210)
Begin extending replaceShuffleOfInsert to handle other forms of scalar insertion into a vector.
I've limited this to targets that have Custom/Legal ISD::INSERT_VECTOR_ELT handling for now - although we can probably always fold this before LegalOperations.
Commit: eec697baa01d7287bcd631494e79ffea219d1cbf
https://github.com/llvm/llvm-project/commit/eec697baa01d7287bcd631494e79ffea219d1cbf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - use getBROADCAST_LOAD helper in insert_subvector(undef, broadcast(p), hi) -> broadcast(p) fold (#128900)
Commit: 036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
https://github.com/llvm/llvm-project/commit/036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/Symbol/LineTable.cpp
Log Message:
-----------
[lldb] Reimplement LineTable::FindLineEntryByAddress on top of lower_bound (#127799)
I *think* this should be equivalent to the original implementation for
all line tables occurring in practice. One difference I'm aware of is
that the original implementation tried to return the first line entry
out of multiple ones for the same address. However, this is not possible
(anymore?) because of the check in LineTable::AppendLineEntryToSequence.
Commit: b021bdbb3997ef6dd13980dc44f24754f15f3652
https://github.com/llvm/llvm-project/commit/b021bdbb3997ef6dd13980dc44f24754f15f3652
Author: David Green <david.green at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add codesize test coverage. NFC
This adds some basic codesize test coverage for a number of instructions. Much of
the results returned are not very accurate yet, especially around larger vector
types but also some basic operations.
Commit: c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
https://github.com/llvm/llvm-project/commit/c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[mlir][OpenMP] initialize (first)private variables before task exec (#125304)
This still doesn't fix the memory safety issues because the stack
allocations created here for the private variables might go out of
scope.
I will add a more complete lit test later in this patch series.
Commit: fcc88021334d7ee904e891a9b7b29b07afd609d0
https://github.com/llvm/llvm-project/commit/fcc88021334d7ee904e891a9b7b29b07afd609d0
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GetElementPtr.rst
Log Message:
-----------
[Docs] Fix typo in GetElementPtr.rst (#127393)
I couldn't find the verb "indices", and it was actually
a bit confusing for me reading this.
I think this should be "indexes" instead.
Commit: db48d49311ddacf141e78d8b6d07f56cbe29beec
https://github.com/llvm/llvm-project/commit/db48d49311ddacf141e78d8b6d07f56cbe29beec
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
Log Message:
-----------
[mlir][OpenMP] Pack task private variables into a heap-allocated context struct (#125307)
See RFC:
https://discourse.llvm.org/t/rfc-openmp-supporting-delayed-task-execution-with-firstprivate-variables/83084
The aim here is to ensure that tasks which are not executed for a while
after they are created do not try to reference any data which are now
out of scope. This is done by packing the data referred to by the task
into a heap allocated structure (freed at the end of the task).
I decided to create the task context structure in
OpenMPToLLVMIRTranslation instead of adapting how it is done
CodeExtractor (via OpenMPIRBuilder] because CodeExtractor is (at least
in theory) generic code which could have other unrelated uses.
Commit: f5ee40154507637835b27092ed85184db1a39478
https://github.com/llvm/llvm-project/commit/f5ee40154507637835b27092ed85184db1a39478
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
Log Message:
-----------
[LLVM][NVPTX] Add codegen support for tcgen05.{ld, st} instructions (#126740)
This commit adds support for tcgen05.{ld, st} instructions with lit
tests under tcgen05-ld.ll and tcgen05-st.ll and intrinsics documentation
under NVPTXUsage.rst
Commit: 4d387c4455b78e3334f12f25adf222e67f0be050
https://github.com/llvm/llvm-project/commit/4d387c4455b78e3334f12f25adf222e67f0be050
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half.ll
Log Message:
-----------
[X86] Add custom operation actions for f16: FABS, FNEG, and FCOPYSIGN (#128877)
This pull request adds custom handling for several floating-point
operations for the `f16` type with respect to
(https://github.com/llvm/llvm-project/issues/126892)..
Fixes #126892
Commit: 3307b0374ac34188b2af189f07ba6910dcf2b6ef
https://github.com/llvm/llvm-project/commit/3307b0374ac34188b2af189f07ba6910dcf2b6ef
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/sincos.ll
A llvm/test/Transforms/Scalarizer/deinterleave2.ll
R llvm/test/Transforms/Scalarizer/sincos.ll
Log Message:
-----------
[LV] Teach the loop vectorizer llvm.sincos is trivially vectorizable (#128035)
Depends on #123210
Commit: 8b39c897bb1f0865c83961746f0d73990fc4e1c6
https://github.com/llvm/llvm-project/commit/8b39c897bb1f0865c83961746f0d73990fc4e1c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
Log Message:
-----------
[Bitcode] Avoid repeated hash lookups (NFC) (#128824)
Commit: f842a00b92e1b275e6482bc686099363568ced3b
https://github.com/llvm/llvm-project/commit/f842a00b92e1b275e6482bc686099363568ced3b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#128994)
Commit: c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
https://github.com/llvm/llvm-project/commit/c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128995)
Commit: 42e55925381ae353a4011cf32613d223eb457488
https://github.com/llvm/llvm-project/commit/42e55925381ae353a4011cf32613d223eb457488
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128997)
Commit: 25ebdfc3dd26b023b8591118492be1fea2574f03
https://github.com/llvm/llvm-project/commit/25ebdfc3dd26b023b8591118492be1fea2574f03
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/IR/DroppedVariableStats.cpp
Log Message:
-----------
[IR] Avoid repeated hash lookups (NFC) (#128998)
Commit: 4913e7bb6934c57e60db076a0331ac45ad0439f6
https://github.com/llvm/llvm-project/commit/4913e7bb6934c57e60db076a0331ac45ad0439f6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Log Message:
-----------
[SelectionDAG] Avoid repeated hash lookups (NFC) (#128999)
Commit: 3ce387231a3e9d9642b74152b9d42b364d565352
https://github.com/llvm/llvm-project/commit/3ce387231a3e9d9642b74152b9d42b364d565352
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#129000)
Commit: 0e3ba99ad65f7025d37c857f9b587b767f7709e7
https://github.com/llvm/llvm-project/commit/0e3ba99ad65f7025d37c857f9b587b767f7709e7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
Log Message:
-----------
[X86] Merge insertsubvector(load(p0),load_subv(p0),hi) -> subvbroadcast(p0) if either load is oneuse (#128857)
This fold is currently limited to cases where the load_subv(p0) has oneuse, but its beneficial if either load has oneuse and will be replaced.
Yet another yak shave for #122671
Commit: c0b5451129bba52e33cd7957d58af897a58d14c6
https://github.com/llvm/llvm-project/commit/c0b5451129bba52e33cd7957d58af897a58d14c6
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Target/Process.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Assorted improvements to the Pipe class (#128719)
The main motivation for this was the inconsistency in handling of
partial reads/writes between the windows and posix implementations
(windows was returning partial reads, posix was trying to fill the
buffer completely). I settle on the windows implementation, as that's
the more common behavior, and the "eager" version can be implemented on
top of that (in most cases, it isn't necessary, since we're writing just
a single byte).
Since this also required auditing the callers to make sure they're
handling partial reads/writes correctly, I used the opportunity to
modernize the function signatures as a forcing function. They now use
the `Timeout` class (basically an `optional<duration>`) to support both
polls (timeout=0) and blocking (timeout=nullopt) operations in a single
function, and use an `Expected` instead of a by-ref result to return the
number of bytes read/written.
As a drive-by, I also fix a problem with the windows implementation
where we were rounding the timeout value down, which meant that calls
could time out slightly sooner than expected.
Commit: 15e295d30aa356a0ab1d83e477375cf3ef314947
https://github.com/llvm/llvm-project/commit/15e295d30aa356a0ab1d83e477375cf3ef314947
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
Log Message:
-----------
[MachineScheduler][AMDGPU] Allow scheduling of single-MI regions (#128739)
The MI scheduler skips regions containing a single MI during scheduling.
This can prevent targets that perform multi-stage scheduling and move
MIs between regions during some stages to reason correctly about the
entire IR, since some MIs will not be assigned to a region at the
beginning.
This makes the machine scheduler no longer skip single-MI regions. Only
a few unit tests are affected (mainly those which check for the
scheduler's debug output).
Commit: 241a56dfadfdb14363cf98e8b57cfc507c7991f4
https://github.com/llvm/llvm-project/commit/241a56dfadfdb14363cf98e8b57cfc507c7991f4
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/applypriority.ll
Log Message:
-----------
[NVPTX] Add Intrinsics for applypriority.* (#127989)
\[NVPTX\] Add ApplyPriority intrinsics
This PR adds applypriority.\* intrinsics with relevant eviction
priorities.
* The lowering is handled from nvvm to nvptx tablegen directly.
* Lit tests are added as part of applypriority.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA
`<https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-applypriority>`_.
---------
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: e3f52690c796baca241a6771d897adc6670a1ed8
https://github.com/llvm/llvm-project/commit/e3f52690c796baca241a6771d897adc6670a1ed8
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/Modules/no-transitive-source-location-change-2.cppm
Log Message:
-----------
[NFC] [C++20] [Modules] Add a test for no transitive changes
Commit: 63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
https://github.com/llvm/llvm-project/commit/63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based (de)interleave operations. (#128875)
Commit: 8150ab93f7411009cc919022d2937d206a2f4359
https://github.com/llvm/llvm-project/commit/8150ab93f7411009cc919022d2937d206a2f4359
Author: John Brawn <john.brawn at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
A llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
A llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LoopVectorize] Use CodeSize as the cost kind for minsize (#124119)
Functions marked with minsize should aim for minimum code size, so the
vectorizer should use CodeSize for the cost kind and also the cost we
compare should be the cost for the entire loop: it shouldn't be divided
by the number of vector elements and block costs shouldn't be divided by
the block probability.
Possibly we should also be doing this for optsize as well, but there are
a lot of tests that assume the current behaviour and the definition of
optsize is less clear than minsize (for minsize the goal is to "keep the
code size of this function as small as possible" whereas for optsize
it's "keep the code size of this function low").
Commit: f6262fa035d8b942bf76e084fa875409bc8ff83a
https://github.com/llvm/llvm-project/commit/f6262fa035d8b942bf76e084fa875409bc8ff83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/loop-bind.f90
Log Message:
-----------
[flang] Extend `omp loop` semantic checks for `reduction` (#128823)
Extend semantic checks for `omp loop` directive to report errors when a
`reduction` clause is specified on a standalone `loop` directive with
`teams` binding.
This is similar to how clang behaves.
Commit: 741d7fab4e6c00dea5a38ba202ea80e03b71c59d
https://github.com/llvm/llvm-project/commit/741d7fab4e6c00dea5a38ba202ea80e03b71c59d
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
[Clang][Sema] Add special handling of mfloat8 in initializer lists (#125097)
This patch fixes assertion failures in clang, caused by unique
properties of _mfp8 type, namely it not being either scalar or vector
type and it not being either integer or float type.
Commit: 556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
https://github.com/llvm/llvm-project/commit/556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
Author: David Rivera <110955221+RiverDave at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
Log Message:
-----------
[clang-tidy] Fix performance-move-const-arg false negative in ternary… (#128402)
This PR aims to fix `performance-move-const-arg` #126515
## Changes
Enhanced the `performance-move-arg` check in Clang-Tidy to detect cases
where `std::move` is used
in **ternary operator expressions which was not being matched therefore
being tagged as a false negative**
## Testing
- A new mock class has been where the changes have been tested & all
tests pass
I'd appreciate any feedback since this is my first time contributing to
LLVM.
Commit: 7b263faf165df7dc647acae435cf9c47bdee4d1f
https://github.com/llvm/llvm-project/commit/7b263faf165df7dc647acae435cf9c47bdee4d1f
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
Log Message:
-----------
[CLANG]Update svget, svset, svcreate, svundef to have FP8 variants (#126754)
This adds FP8 variants to svget, svset, svcreate and svundef under
arm_sve.td
Commit: 56762b7ace0596404e5ae271f278cf7540b374f2
https://github.com/llvm/llvm-project/commit/56762b7ace0596404e5ae271f278cf7540b374f2
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
Log Message:
-----------
[clang-tidy] Add new check bugprone-unintended-char-ostream-output (#127720)
It wants to find unintended character output from `uint8_t` and `int8_t`
to an ostream.
e.g.
```c++
uint8_t v = 9;
std::cout << v;
```
---------
Co-authored-by: whisperity <whisperity at gmail.com>
Commit: fd534e524dd3b683077cab2dae4c87b7c2f1b574
https://github.com/llvm/llvm-project/commit/fd534e524dd3b683077cab2dae4c87b7c2f1b574
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/test/CodeGen/AArch64/argument-blocks.ll
Log Message:
-----------
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
In AAPCS64, __fp16 and __bf16 share the same machine type, so they
should be treated the same way for argument passing. In particular,
arrays of them need to be treated as homogeneous aggregates, and not
split between registers and the stack.
Commit: 649f4dcc1930ab5aa338c0f1b13ebb16767be400
https://github.com/llvm/llvm-project/commit/649f4dcc1930ab5aa338c0f1b13ebb16767be400
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LV] Fix tests after 8150ab93f741.
PR #124119 wasn't rebased & tested before merging. Update the failing
tests.
Commit: 0865a3872ceb65af2660baf6951a4cee44b65fb1
https://github.com/llvm/llvm-project/commit/0865a3872ceb65af2660baf6951a4cee44b65fb1
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Re-skip PipeTest on windows for now
The tests are flaky because the read/write calls return sooner than they
should (and #128719 does not fix them). Skip them until we figure the
best way to fix this.
Commit: 285b411e4635e8db2526d653488ee54dad2bff34
https://github.com/llvm/llvm-project/commit/285b411e4635e8db2526d653488ee54dad2bff34
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/sqrt.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
R libclc/generic/include/math/clc_sqrt.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/sqrt.cl
Log Message:
-----------
[libclc] Move sqrt to CLC library (#128748)
This is fairly straightforward for most targets.
We use the element-wise sqrt builtin by default. We also remove a legacy
pre-filtering of the input argument, which the intrinsic now officially
handles.
AMDGPU provides its own implementation of sqrt for double types. This
commit moves this into the implementation of CLC sqrt. It uses weak
linkage on the 'default' CLC sqrt to allow AMDGPU to only override the
builtin for the types it cares about.
Commit: 9c26e34fced193f446ab825dc86b1a728d39aa56
https://github.com/llvm/llvm-project/commit/9c26e34fced193f446ab825dc86b1a728d39aa56
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 56762b7ace05
Commit: 65c45bfa7dd3bc6afa34f2822e61962b810e4244
https://github.com/llvm/llvm-project/commit/65c45bfa7dd3bc6afa34f2822e61962b810e4244
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize][NFC] Fix formatting issue with a comment (#129033)
Commit: 816e7cdb131832108eee0763a354d8ba7a28d98d
https://github.com/llvm/llvm-project/commit/816e7cdb131832108eee0763a354d8ba7a28d98d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Factor agpr reg_sequence folding into a function (#129002)
Commit: 040860accbad57d2ed2ba132460ce618d4ba92fb
https://github.com/llvm/llvm-project/commit/040860accbad57d2ed2ba132460ce618d4ba92fb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
Log Message:
-----------
AMDGPU: Add a mir variant of a regalloc failure test
I have a pending patch which improves the codegen in the original IR
version, such that the allocation no longer fails. I'm still trying
to preserve the failure from IR, but add a version with a snapshot
of the current MIR before the failing RA run.
Commit: a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
https://github.com/llvm/llvm-project/commit/a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
Log Message:
-----------
AMDGPU: Fix a test typo reading a partially undefined vector
This avoids a surprising test diff in a future commit that
happened to change the read registers to something else. Also
migrate from undef to poison.
Commit: 447abfcc099ee288a5d89c7a71caacf63bdac203
https://github.com/llvm/llvm-project/commit/447abfcc099ee288a5d89c7a71caacf63bdac203
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Fold bitcasts into readfirstlane, readlane, and permlane64 (#128494)
We should handle this for all the handled readlane and dpp ops.
Commit: cad1de50ba06db8288da0e20c9aeffed328b8fce
https://github.com/llvm/llvm-project/commit/cad1de50ba06db8288da0e20c9aeffed328b8fce
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Fix header comment in CreateCheckerManager.cpp (#129055)
Apparently it was copied from `CheckerManager.h` without changes.
Commit: 46a13a5b174b031b399606f92ca049cac8aa12a0
https://github.com/llvm/llvm-project/commit/46a13a5b174b031b399606f92ca049cac8aa12a0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling-multi-exit.ll
Log Message:
-----------
[AArch64] Runtime-unroll small multi-exit loops on Apple Silicon. (#124751)
Extend unrolling preferences to allow more aggressive unrolling of
search loops with 2 exits, building on the TTI hook added in
https://github.com/llvm/llvm-project/commit/ad9da92cf6f735747ef04fd56937e1d76819e503.
In combination with
https://github.com/llvm/llvm-project/commit/eac23a5b971362cda3c646e018b9f26d0bc1ff3a
this enables unrolling loops like
std::find, which can improve performance significantly (+15% end-to-end
on a workload that makes heavy use of std::find). It increase the total
number of unrolled loops by ~2.5% across a very large corpus of
workloads.
For SPEC2017, +1.6% more loops are unrolled and the following workloads
increase in size (`__text`):
workload base patch
500.perlbench_r 1682884.00 1694104.00 0.7%
523.xalancbmk_r 3001716.00 3003832.00 0.1%
PR: https://github.com/llvm/llvm-project/pull/124751
Commit: c19a303867b0097e27e1cedb486f69064be40476
https://github.com/llvm/llvm-project/commit/c19a303867b0097e27e1cedb486f69064be40476
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
Log Message:
-----------
[SPIR-V] Support 2 more instructions from SPV_INTEL_long_composites (#128190)
This change adds support for `OpSpecConstantCompositeContinuedINTEL` and
`OpCompositeConstructContinuedINTEL` instructions and continues work
done in #126545.
Specification:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html
Commit: 61aab82135db3e5e69a660f395c2008e812b8946
https://github.com/llvm/llvm-project/commit/61aab82135db3e5e69a660f395c2008e812b8946
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] getFauxShuffleMask - insert_subvector - skip undemanded subvectors (#129042)
If the shuffle combine doesn't require the subvector of a insert_subvector node, we can just combine the base vector directly.
Commit: 3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
https://github.com/llvm/llvm-project/commit/3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/linkonce.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
Log Message:
-----------
[MergeFunc] Remove discardables function before writing alias or thunk. (#128865)
Update writeThunkOrAlias to only create an alias or thunk if it is
actually needed. Drop discardable linkone_odr functions if they are not
used before.
PR: https://github.com/llvm/llvm-project/pull/128865
Commit: dc764f5c689f5ee436b5835f8f8ccaea84317e03
https://github.com/llvm/llvm-project/commit/dc764f5c689f5ee436b5835f8f8ccaea84317e03
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
A llvm/unittests/Target/DirectX/RegisterCostTests.cpp
Log Message:
-----------
[DirectX] initialize registers properties by calling addRegisterClass and computeRegisterProperties (#128818)
This fixes #126784 for the DirectX backend.
This bug was marked critical for DX so it is going to go in first. At
least one register class needs to be added via `addRegisterClass` for
`RegClassForVT` to be valid.
Further for costing information used by loop unroll and other
optimizations to be valid we need to call `computeRegisterProperties`.
This change does both of these.
The test cases confirm that we can fetch costing information off of
`getRegisterInfo` and that `DirectXTargetLowering` maps `i32` typed
registers to `DXILClassRegClass`.
Commit: eeb672a47c59b1d94ea3198d7427314ebbd80777
https://github.com/llvm/llvm-project/commit/eeb672a47c59b1d94ea3198d7427314ebbd80777
Author: Jan Voung <jvoung at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
Log Message:
-----------
[clang-tidy] Add a release note about unchecked-optional-access smart pointer caching (#122290)
With caching added in https://github.com/llvm/llvm-project/pull/120249,
the `IgnoreSmartPointerDereference` option shouldn't be needed anymore.
Other caching also added earlier:
https://github.com/llvm/llvm-project/pull/112605
Commit: c630de934ca2c8381bdd60268179bc14f792ec19
https://github.com/llvm/llvm-project/commit/c630de934ca2c8381bdd60268179bc14f792ec19
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/DirectX/BUILD.gn
Log Message:
-----------
[gn build] Port dc764f5c689f
Commit: 240f2269ffdbd96e68b2159ae537d8486164c10c
https://github.com/llvm/llvm-project/commit/240f2269ffdbd96e68b2159ae537d8486164c10c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
A clang/test/AST/ast-dump-atomic-options.hip
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenOpenCL/atomic-ops.cl
A clang/test/Driver/atomic-options.hip
M clang/test/Driver/hip-options.hip
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
A clang/test/Parser/Inputs/cuda.h
A clang/test/Parser/atomic-options.hip
Log Message:
-----------
Add clang atomic control options and attribute (#114841)
Add option and statement attribute for controlling emitting of
target-specific
metadata to atomicrmw instructions in IR.
The RFC for this attribute and option is
https://discourse.llvm.org/t/rfc-add-clang-atomic-control-options-and-pragmas/80641,
Originally a pragma was proposed, then it was changed to clang
attribute.
This attribute allows users to specify one, two, or all three options
and must be applied
to a compound statement. The attribute can also be nested, with inner
attributes
overriding the options specified by outer attributes or the target's
default
options. These options will then determine the target-specific metadata
added to atomic
instructions in the IR.
In addition to the attribute, three new compiler options are introduced:
`-f[no-]atomic-remote-memory`, `-f[no-]atomic-fine-grained-memory`,
`-f[no-]atomic-ignore-denormal-mode`.
These compiler options allow users to override the default options
through the
Clang driver and front end. `-m[no-]unsafe-fp-atomics` is aliased to
`-f[no-]ignore-denormal-mode`.
In terms of implementation, the atomic attribute is represented in the
AST by the
existing AttributedStmt, with minimal changes to AST and Sema.
During code generation in Clang, the CodeGenModule maintains the current
atomic options,
which are used to emit the relevant metadata for atomic instructions.
RAII is used
to manage the saving and restoring of atomic options when entering
and exiting nested AttributedStmt.
Commit: 1357279df9d255ac60cec0dd755349a12083c8b0
https://github.com/llvm/llvm-project/commit/1357279df9d255ac60cec0dd755349a12083c8b0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
A libclc/clc/include/clc/math/clc_rsqrt.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
Log Message:
-----------
[libclc] Move rsqrt to the CLC library (#129045)
This also adds missing half variants to certain targets.
It also optimizes some targets' implementations to perform the operation
directly in vector types, as opposed to scalarizing.
Commit: 8635b8eb5178cbd3662fdcb9b4f0879aa633a002
https://github.com/llvm/llvm-project/commit/8635b8eb5178cbd3662fdcb9b4f0879aa633a002
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_alignbit_b32 (#119409)
Support true16 format for v_alignbit_b32 in MC.
Since we are replacing `v_alignbit_b32` to
`v_alignbit_b32_t16/v_alignbit_b32_fake16` in Post-GFX11, have to update
the CodeGen pattern for `v_alignbit_b32_fake16` to get CodeGen test
passing. There is no pattern modified/created, but just replacing the
`v_alignbit_b32` with fake16 format.
Some of the true16 CodeGen test are impacted since `v_alignbit_b32`
selection are removed in Post-GFX11 while `v_alignbit_b32_t16` are not
yet supported. The CodeGen patch for `v_alignbit_b32_t16` will be done
in the following patch.
Commit: 7defbf987a551771c275129c70fe4e59dc5125cc
https://github.com/llvm/llvm-project/commit/7defbf987a551771c275129c70fe4e59dc5125cc
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Add test for atomicrmw xchg (NFC)
This is an opt based test because usually AtomicExpand will
convert it to an integer atomicrmw first.
Commit: b2aba39001f6909965c4a9af47969e83717601c0
https://github.com/llvm/llvm-project/commit/b2aba39001f6909965c4a9af47969e83717601c0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Handle atomicrmw xchg in HasAddressTaken heuristic
Atomicrmw xchg can directly take a pointer operand, so we should
treat it similarly to store or cmpxchg.
In practice, I believe that all targets that support stack protectors
will convert this to an integer atomicrmw xchg in AtomicExpand, so
there is no issue in practice. We still should handle it correctly
if that doesn't happen.
Commit: 79a28aa0a48feba34ddc3c1791ea0be88f354542
https://github.com/llvm/llvm-project/commit/79a28aa0a48feba34ddc3c1791ea0be88f354542
Author: Alois Klink <alois at aloisklink.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/attr-malloc.c
M clang/test/Sema/attr-args.c
M clang/test/SemaCXX/attr-print.cpp
Log Message:
-----------
[clang] Ignore GCC 11 [[malloc(x)]] attribute
Ignore the `[[malloc(x)]]` or `[[malloc(x, 1)]]` function attribute
syntax added in [GCC 11][1] and print a warning instead of an error.
Unlike `[[malloc]]` with no arguments (which is supported by Clang),
GCC uses the one or two argument form to specify a deallocator for
GCC's static analyzer.
Code currently compiled with `[[malloc(x)]]` or
`__attribute((malloc(x)))` fails with the following error:
`'malloc' attribute takes no arguments`.
[1]: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;f=gcc/doc/extend.texi;h=dce6c58db87ebf7f4477bd3126228e73e4eeee97#patch6
Fixes: https://github.com/llvm/llvm-project/issues/51607
Partial-Bug: https://github.com/llvm/llvm-project/issues/53152
Commit: 4af2e36b1dcd03cae07a74038e4cd424bdac04aa
https://github.com/llvm/llvm-project/commit/4af2e36b1dcd03cae07a74038e4cd424bdac04aa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
Log Message:
-----------
[CodeGen][NVPTX] Add a TRI function get the Dwarf register number for a virtual register. (#129017)
NVPTX needs to be able to get the Dwarf register number for a virtual
register. The interface we have for this today is on MCRegisterInfo and
take a MCRegister argument. It shouldn't be legal to convert a Register
containing a virtual register to an MCRegister.
This patch adds a getDwarfRegNumForVirtReg function that takes a
Register to TRI and splits the NVPTX override of getDwarfRegNum.
Commit: d39f4a198024dcc19ee86859049e865d4a3976ce
https://github.com/llvm/llvm-project/commit/d39f4a198024dcc19ee86859049e865d4a3976ce
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP]Add prescriptiveness-modifier support to granularity clauses of taskloop construct (#128477)
Added modifier(strict) support to the granularity(grainsize and num_tasks) clauses of taskloop construct.
Commit: e8379ea46469b7f8bfec1d9610d967967a62848f
https://github.com/llvm/llvm-project/commit/e8379ea46469b7f8bfec1d9610d967967a62848f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Add a test with incorrect bitwidth after minbitwidth analysis, NFC
Commit: 6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
https://github.com/llvm/llvm-project/commit/6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
Log Message:
-----------
[MemProf] Fix handling of recursive edges during func assignment (#129066)
When we need to reclone other callees of a caller node during function
assignment due to the creation of a new function clone, we need to skip
recursive edges on that caller. We don't want to reclone the callee in
that case (which is the caller), which isn't necessary and also isn't
correct from a graph update perspective. It resulted in an assertion and
in an NDEBUG build caused an infinite loop.
Commit: 69effe054c136defda8766688ac0de4626a0eb05
https://github.com/llvm/llvm-project/commit/69effe054c136defda8766688ac0de4626a0eb05
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Check for potential safety of the truncation for vectorized scalars with multi uses
If the vectorized scalars has multiple uses, need to check if it is safe
to truncate the vectorized value, before actually trying doing it.
Otherwise, the compiler may loose some important bits, which may lead to
a miscompilation.
Fixes #129057
Commit: da618cf0a76371ca89769ca706fe39cc92fbf7d6
https://github.com/llvm/llvm-project/commit/da618cf0a76371ca89769ca706fe39cc92fbf7d6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__locale
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/cwchar
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/locale
M libcxx/include/regex
M libcxx/include/string
Log Message:
-----------
[NFC][libc++] Guard against operator& hijacking. (#128351)
This set usage of operator& instead of std::addressof seems not be easy
to "abuse". Some seem easy to misuse, like basic_ostream::operator<<,
trying to do that results in compilation errors since the `widen`
function is not specialized for the hijacking character type. Hence
there are no tests.
Commit: 326638bac19fb388a0c58324ab0072a23b77fded
https://github.com/llvm/llvm-project/commit/326638bac19fb388a0c58324ab0072a23b77fded
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/erfc.f90
Log Message:
-----------
[Flang] Generate math.erfc op for non-precise erfc interinsic calls (#128897)
This patch changes the codegen for non-precise erfc calls to generate
math.erfc ops. This wasn't done before because the math dialect did not
have a erfc operation at the time.
Commit: d91e5c301353b012b338aa9920a941d8b5fc28a4
https://github.com/llvm/llvm-project/commit/d91e5c301353b012b338aa9920a941d8b5fc28a4
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
A clang/test/Frontend/verify-mulptiple-prefixes.c
M clang/test/Frontend/verify.c
M clang/test/Frontend/verify3.c
Log Message:
-----------
[verify] Improve the error messages with multiple active prefixes (#126068)
Multiple improvements to make the messages more concrete, actionable and
less confusing when multiple prefixes are used in `-verify=`. The common
theme among these was that prior to the patch all error messages would
use the alphabetically first prefix, even if the error was associated
with a different one.
- Mention the actual expected but unseen directive: Prior to this change
when reporting expected but unseen directive, the alphabetically first
one would be used to report the error even if that's not the one present
in the source. Reword the diagnostic if multiple prefixes are active and
include the real spelling of the expected directive for each expected
but not seen line in the output.
- Reword the seen but not expected error message if multiple directives
are active to avoid having to pick an arbitrary (the first) prefix for
it.
- Include the full spelling of the directive when reporting a directive
following the no-diagnostics directive. For example "'foo-error'
directive cannot follow 'foo-no-diagnostics' directive"
- Use the first appearing `-no-diagnostics` directive, in the above
message instead of the first one alphabetically.
The new wording
> diagnostics with '(error|warning|remark|note)' severity seen but not
expected
instead of
> '<prefix>-(error|warning|remark|note)' diagnostics seen but not
expected
is only used when multiple prefixes are present, the error messages stay
the same with a single prefix only.
Commit: bc91accbfe1644912f70645b51b1fade4bd61249
https://github.com/llvm/llvm-project/commit/bc91accbfe1644912f70645b51b1fade4bd61249
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
A llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_vop3cx_warn.txt
Log Message:
-----------
[AMDGPU][MC] Disassembler warning for v_cmpx instructions (#127925)
For GFX10+ the destination reg of v_cmpx instructions is implicitly EXEC,
which is encoded as 0x7E. However, the disassembler does not check this
field, thus allowing any value. With this patch, if the field is not
EXEC a warning is issued.
Commit: f8cc509b69cc64a6973990f9f48074d211534509
https://github.com/llvm/llvm-project/commit/f8cc509b69cc64a6973990f9f48074d211534509
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Reapply "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)" (#129078)
This reverts commit 1559a65efaf327f9c72e14d4bb1834f076e7fc20.
Fixed test (I suspect broken by unrelated change in the merge)
Commit: ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
https://github.com/llvm/llvm-project/commit/ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Simplify ownership of checker objects (#128887)
Previously checker objects were created by raw `new` calls, which
necessitated managing and calling their destructors explicitly. This
commit refactors this convoluted logic by introducing `unique_ptr`s that
to manage the ownership of these objects automatically.
This change can be thought of as stand-alone code quality improvement;
but I also have a secondary motivation that I'm planning further changes
in the checker registration/initialization process (to formalize our
tradition of multi-part checker) and this commit "prepares the ground"
for those changes.
Commit: 1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
https://github.com/llvm/llvm-project/commit/1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Simplify BLEND %a, %b, NOT(%m) -> BLEND %b, %a, %m. (#128375)
Avoid negations for normalized blends by reordering operands.
PR: https://github.com/llvm/llvm-project/pull/128375
Commit: 12a9e2adc3842aee4d6ae01a33eb3103e2224af9
https://github.com/llvm/llvm-project/commit/12a9e2adc3842aee4d6ae01a33eb3103e2224af9
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompt-general.cpp
M openmp/runtime/src/ompt-internal.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/src/ompt-specific.h
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][OMPT][OMPD] Fix frame flags for OpenMP tool APIs (#114118)
In several cases the flags entries in ompt_frame_t are not initialized.
According to @jdelsign the address provided as reenter and exit address
is the canonical frame address (cfa) rather than a "framepointer". This
patch makes sure that the flags entry is always initialized and changes
the value from ompt_frame_framepointer to ompt_frame_cfa.
The assertion in the tests makes sure that the flags are always set,
when a tool (callback.h in this case) looks at the value.
Fixes #89058
Commit: ba400e862e0cc0c766883e1cc8146c0884e0df02
https://github.com/llvm/llvm-project/commit/ba400e862e0cc0c766883e1cc8146c0884e0df02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Use helper function for use/def chain walk (#129052)
PeepholeOpt has a nicer version of this which handles more
cases.
Commit: f6bfa33cdb1482df0e2f23413fbe809afbc28830
https://github.com/llvm/llvm-project/commit/f6bfa33cdb1482df0e2f23413fbe809afbc28830
Author: Krishna Pandey <47917477+krishna2803 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/bitshk.cpp
A libc/src/stdfix/bitshk.h
A libc/src/stdfix/bitshr.cpp
A libc/src/stdfix/bitshr.h
A libc/src/stdfix/bitsk.cpp
A libc/src/stdfix/bitsk.h
A libc/src/stdfix/bitslk.cpp
A libc/src/stdfix/bitslk.h
A libc/src/stdfix/bitslr.cpp
A libc/src/stdfix/bitslr.h
A libc/src/stdfix/bitsr.cpp
A libc/src/stdfix/bitsr.h
A libc/src/stdfix/bitsuhk.cpp
A libc/src/stdfix/bitsuhk.h
A libc/src/stdfix/bitsuhr.cpp
A libc/src/stdfix/bitsuhr.h
A libc/src/stdfix/bitsuk.cpp
A libc/src/stdfix/bitsuk.h
A libc/src/stdfix/bitsulk.cpp
A libc/src/stdfix/bitsulk.h
A libc/src/stdfix/bitsulr.cpp
A libc/src/stdfix/bitsulr.h
A libc/src/stdfix/bitsur.cpp
A libc/src/stdfix/bitsur.h
A libc/src/stdfix/bitusk.cpp
M libc/test/UnitTest/LibcTest.cpp
A libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/bitshk_test.cpp
A libc/test/src/stdfix/bitshr_test.cpp
A libc/test/src/stdfix/bitsk_test.cpp
A libc/test/src/stdfix/bitslk_test.cpp
A libc/test/src/stdfix/bitslr_test.cpp
A libc/test/src/stdfix/bitsr_test.cpp
A libc/test/src/stdfix/bitsuhk_test.cpp
A libc/test/src/stdfix/bitsuhr_test.cpp
A libc/test/src/stdfix/bitsuk_test.cpp
A libc/test/src/stdfix/bitsulk_test.cpp
A libc/test/src/stdfix/bitsulr_test.cpp
A libc/test/src/stdfix/bitsur_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point bitsfx functions in llvm libc (#128413)
Fixes #113359
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Commit: d2e66625bcdc09953c007cf1e9f80d38a18719f3
https://github.com/llvm/llvm-project/commit/d2e66625bcdc09953c007cf1e9f80d38a18719f3
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][deps] Propagate the entire service (#128959)
Shared state between dependency scanning workers is managed by the
dependency scanning service.
Right now, the members are individually threaded through the worker,
action, and collector. This makes any change to the service and its
members a very laborious process. Moreover, this situation causes
frequent merge conflicts in our downstream repo where the service does
have some extra members that need to be passed around.
To ease the maintenance burden, this PR starts passing a reference to
the entire service.
Commit: 403b7b66dea33a073c365d7ae9fb07da4844eb62
https://github.com/llvm/llvm-project/commit/403b7b66dea33a073c365d7ae9fb07da4844eb62
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for atan2 intrinsics op (#127970)
This is similar to https://github.com/llvm/llvm-project/pull/127317
Commit: e2b0d5df84e023910a9b4204aad249d16fd0703a
https://github.com/llvm/llvm-project/commit/e2b0d5df84e023910a9b4204aad249d16fd0703a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Enforce scheduling SchedBundle instrs back-to-back (#128092)
This patch fixes the behavior of the scheduler by making sure the instrs
that are part of a SchedBundle are scheduled back-to-back.
Commit: ead7b7be0948572a6d1feb300790f37fb83cfa00
https://github.com/llvm/llvm-project/commit/ead7b7be0948572a6d1feb300790f37fb83cfa00
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec] Fix unused variables warnings
Commit: 8f8529c137b1f659595e1064f5c8806eeb628b36
https://github.com/llvm/llvm-project/commit/8f8529c137b1f659595e1064f5c8806eeb628b36
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Gardening in lldb-dap.cpp (NFC) (#128949)
- Remove more unused includes
- Limit anonymous namespace to llvm::opt
- Fix code style
Commit: 78c96aa24f0406e630674d82eef073ea3d4c8141
https://github.com/llvm/llvm-project/commit/78c96aa24f0406e630674d82eef073ea3d4c8141
Author: bodqhrohro <bodqhrohro at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[docs] Fix typo in GettingStarted.rst Unlinke -> Unlike (NFC) (#128616)
Commit: 253d691596a72afac89ee99d79004235842b9d5c
https://github.com/llvm/llvm-project/commit/253d691596a72afac89ee99d79004235842b9d5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Update VPBranchOnMaskRecipe to always set the mask (NFC).
The mask is always available at construction time. Make it non-optional
to simlpify code.
Commit: 4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
https://github.com/llvm/llvm-project/commit/4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
Author: lntue <lntue at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/test/src/math/smoke/sqrtf128_test.cpp
Log Message:
-----------
[libc] Fix sqrtf128 smoke test for riscv32. (#129094)
Commit: 440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
https://github.com/llvm/llvm-project/commit/440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
Author: Ujan RoyBandyopadhyay <116058173+ujan-r at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
[clangd] Reduce superfluous rename conflicts (#121515)
This commit adds a namespace check to the code for detecting name
collisions, allowing `bar` to be renamed to `foo` in the following
snippet:
```c
typedef struct foo {} Foo;
Foo bar;
```
Previously, such a rename would fail because a declaration for `foo`
already exists in the same scope.
Commit: 10a9dcab0a5904ce6c12efb3555a2e31017bce92
https://github.com/llvm/llvm-project/commit/10a9dcab0a5904ce6c12efb3555a2e31017bce92
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/API/SBProgress.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB][SBProgress] Fix bad optional in sbprogress (#128971)
This fixes the obvious, but untested case of sending None/Null to
SBProgress.
Commit: 8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
https://github.com/llvm/llvm-project/commit/8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir][spirv] Fix incorrect error message in processCapability (#129079)
Commit: c3b3352f7346b06d9e17057fd5e9153e68229b9c
https://github.com/llvm/llvm-project/commit/c3b3352f7346b06d9e17057fd5e9153e68229b9c
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/test/Lower/OpenMP/math-amdgpu.f90
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add conversion of math.erfc to AMD GPU library calls (#128899)
This patch adds a pattern to convert the math.erfc operation to AMD GPU
library calls.
Depends on: #128897 for the flang test
Commit: 70828d9a919a629f11736139adfcb4ba0198ebe7
https://github.com/llvm/llvm-project/commit/70828d9a919a629f11736139adfcb4ba0198ebe7
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Stmt.cpp
A clang/test/AST/cc-modifier.cpp
M clang/test/CodeGen/asm.c
Log Message:
-----------
[clang] Alias cc modifier to c (#127719)
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#GenericOperandmodifiers
provides the `c` and `cc` modifiers. GCC 15 introduces the `cc` modifier
which does the same as `c`. This patch lets Clang handle this for
compatibility.
Commit: 62d4cc811ae132c722a2146ddb246c3710b57a93
https://github.com/llvm/llvm-project/commit/62d4cc811ae132c722a2146ddb246c3710b57a93
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang] Modifications to ieee_support_standard (#128895)
Some Arm processors support exception halting control and some do not.
An Arm executable will run on either type of processor, so it is
effectively unknown at compile time whether or not this support will be
available. ieee_support_halting is therefore implemented with a runtime
check.
The result of a call to ieee_support_standard depends in part on support
for halting control. Update the ieee_support_standard implementation to
check for support for halting control at runtime.
Commit: 9a32af25b4d22f4f1257a5491d6e372e0f216842
https://github.com/llvm/llvm-project/commit/9a32af25b4d22f4f1257a5491d6e372e0f216842
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Check fxbits as complete (#129107)
These were added in https://github.com/llvm/llvm-project/pull/114912 by
@smallp-o-p.
Commit: e5d93100b656df86854b58433816b0b03ef9f231
https://github.com/llvm/llvm-project/commit/e5d93100b656df86854b58433816b0b03ef9f231
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
R compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Revert "[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)" and fix
This reverts commit 7521207e415b19b2924930ac95c2fcf07d56f2f2.
This reverts commit 5f6a3e63a31aaebc620a18c47bc5590f6f705c98.
Commit: 6ce41db6b0275d060d6e60f88b96a1657024345c
https://github.com/llvm/llvm-project/commit/6ce41db6b0275d060d6e60f88b96a1657024345c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Preserve DebugLoc for VPBranchOnMaskRecipe.
Update code to set and generate debug location for branch recipe
Commit: 64ae0a102f5142ff780348b70db633c0261a41dd
https://github.com/llvm/llvm-project/commit/64ae0a102f5142ff780348b70db633c0261a41dd
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
A libc/src/stdlib/l64a.cpp
A libc/src/stdlib/l64a.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/l64a_test.cpp
Log Message:
-----------
[libc] implement l64a (#129099)
Adds l64a, which generates the base 64 string expected by a64l.
Commit: b31175a33a22b2ec793ddd14b61693f709e90ef7
https://github.com/llvm/llvm-project/commit/b31175a33a22b2ec793ddd14b61693f709e90ef7
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] Add int4 intrinsics, mixed-type fp8 to handle gfx12 (#128963)
1. Extend the gfx12 FP8 support to allow mixed-type intrinsics (since
they've been added), creating limited mixed-type support that mirrors
MFMA
2. Extend the `amdgpu.wmma` intrinsic lowering to correctly handle
shorter vectors because gfx12 now has instructions that logically take a
4xi8, or, as far as LLVM's concerned, an i32. Similarly, there are 4xi4
inputs, which are an i16 (that must be zero-extended to i32).
3. Correctly handle the ambiguities in the int4 intrinsics on gfx12,
which can either be 16x16x16 or 16x16x32
4. Add tests showing all WMMAs being lowered the way gfx12 expects
(mirroring LLVM's tests)
5. Add a verifier to prevent emiting ilegal instructions on gfx12.
Commit: 94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
https://github.com/llvm/llvm-project/commit/94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
Log Message:
-----------
[LLD][COFF] Use primary symbol table machine in Writer::writeHeader (NFC) (#128442)
Instead of duplicating the logic from `LinkerDriver::setMachine`.
Commit: 14bab65cbfb2bf9a410c3ce206a6b7a273441f26
https://github.com/llvm/llvm-project/commit/14bab65cbfb2bf9a410c3ce206a6b7a273441f26
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
Log Message:
-----------
[LLD][COFF] Support CF guards on ARM64X (#128440)
Both native and EC views share table chunks. Ensure relevant symbols are
set in both symbol tables.
Commit: 9a54c77aa361d0d1f98a39a89e3f543d15d182a5
https://github.com/llvm/llvm-project/commit/9a54c77aa361d0d1f98a39a89e3f543d15d182a5
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Reland copy file range san (#129114)
Commit: 310c3775c08073f59cf3c11ea8ee4e6c25856701
https://github.com/llvm/llvm-project/commit/310c3775c08073f59cf3c11ea8ee4e6c25856701
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Rephrase list comp for downstream (#129119)
The downstream build was having trouble transforming the previous list
comprehension, but it works on this one. I guess it just needs to look
like a proper target.
Commit: 73ed27ce096918f2881656d9c85c6ff44fcefa5c
https://github.com/llvm/llvm-project/commit/73ed27ce096918f2881656d9c85c6ff44fcefa5c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Order the implicit defs/uses of vl/vtype on MC instructions the same as the pseudo version. (#129104)
CodeGen pseudos and the vsetvli insertion pass put VL before VTYPE. Make
the MC layer instructions consistent.
Commit: adf0abf35448583f955e78af00d5eb473ad494a5
https://github.com/llvm/llvm-project/commit/adf0abf35448583f955e78af00d5eb473ad494a5
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_at.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-at flag for debugging (#129097)
When debugging miscompiles we need a way to force-stop the vectorizer
early. This helps figure out which invocation is generating incorrect
code.
Commit: 1618d09ce7846aca3d193aa02843ad29c8e638be
https://github.com/llvm/llvm-project/commit/1618d09ce7846aca3d193aa02843ad29c8e638be
Author: Stef Lindall <stef at modular.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
Log Message:
-----------
[TypeID] Update private typeid definition in `DeferredLocInfo` (#128968)
The parser's `DeferredLocInfo` uses an uncommon TypeID setup, where it
defines a private TypeID for pointers to the struct.
When using the fallback TypeID mechanism introduced in
https://github.com/llvm/llvm-project/pull/126999, the fallback TypeID
mechanism doesn't support anonymous namespaces, and the
`INTERNAL_INLINE` mechanism doesn't support pointer types.
Explicitly use `SELF_OWNING_TYPE_ID` for this case. This should always
be safe for anonymous namespaces.
Commit: ffecd7247921512255ce4ba46c2a76eeca4e95fb
https://github.com/llvm/llvm-project/commit/ffecd7247921512255ce4ba46c2a76eeca4e95fb
Author: Jonathon Penix <jpenix at quicinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
Log Message:
-----------
[llvm-objcopy] Let --change-section-lma change segments wth filesz=0,… (#127724)
… memsz>0
Currently, segments with a file size of 0 are ignored for the purposes
of --change-section-lma, regardless of their memory size. It seems
reasonable to me to modify such segments given that we're changing the
LMA for all sections and these LMAs may be used during loading. GNU
objcopy also seems to adjust such segments.
Additionally, segments with file size > 0 and memory size = 0 will no
longer be modified for the purposes of --change-section-lma as they
shouldn't be part of the loaded memory image.
Fixes #124680
Commit: 7842954b9d6fb3d6d673493628c75fe4cc51e936
https://github.com/llvm/llvm-project/commit/7842954b9d6fb3d6d673493628c75fe4cc51e936
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Update function names (#129129)
The remaining math functions are `mulifx` (int * fx = int), `divifx`
(int / fx = int), `fxdivi` (int / int = fx), and `idivfx` (fx / fx =
int).
Commit: 28851edf164a337c334755ae33fd58f03cffd5a2
https://github.com/llvm/llvm-project/commit/28851edf164a337c334755ae33fd58f03cffd5a2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Silence CMake's install messages in the CI (#128872)
Currently, there are a ton of `-- Installing:` and `-- Up-to-date:`
messages in the CI log, which just clutter the output. This disables
these messages to significantly shorten the CI logs, making them much
faster to load and easier to read.
Commit: f896bd36701656c9af20c6e6e6e202537de47541
https://github.com/llvm/llvm-project/commit/f896bd36701656c9af20c6e6e6e202537de47541
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/string
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/utils/libcxx/test/params.py
M runtimes/cmake/Modules/WarningFlags.cmake
Log Message:
-----------
[libc++] Diagnose when nullptrs are passed to string APIs (#122790)
This allows catching misuses of APIs that take a pointer to a
null-terminated string.
Commit: db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
https://github.com/llvm/llvm-project/commit/db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
Author: Florian Mayer <fmayer at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/CodeGen/bounds-checking-debuginfo.c
Log Message:
-----------
[NFC] [clang] [sanitize] add autogen test for array-bounds debuginfo (#128976)
Commit: 32bcc9f0d3b182ff817ded209141d867236dee6c
https://github.com/llvm/llvm-project/commit/32bcc9f0d3b182ff817ded209141d867236dee6c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
A llvm/test/Transforms/SandboxVectorizer/allow_files.ll
Log Message:
-----------
[SandboxVec] Add option -sbvec-allow-file for bisection debugging (#129127)
This new option lets you specify an allow-list of source files and
disables vectorization if the IR is not in the list. This can be used
for debugging miscompiles.
Commit: 72e00d628dd99c634c03065f6b120bc5da617868
https://github.com/llvm/llvm-project/commit/72e00d628dd99c634c03065f6b120bc5da617868
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
Log Message:
-----------
[SystemZ] Handle scalar to vector bitcasts. (#128628)
CSmith found a case where SROA produces bitcasts from scalar to vector.
This was previously asserted against in SystemZTTI, but now the BaseT
implementation takes care of it.
Commit: 3989b78fa96f6c93da0fa23c7aa29a313b56831d
https://github.com/llvm/llvm-project/commit/3989b78fa96f6c93da0fa23c7aa29a313b56831d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream basic alloca and load support (#128792)
This change implements basic support in ClangIR for local variables
using the cir.alloca and cir.load operations.
Commit: 4fcab8a587c5932c70d66481726dc14167273670
https://github.com/llvm/llvm-project/commit/4fcab8a587c5932c70d66481726dc14167273670
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/SandboxIR/Region.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Fix windows build issue (#129082)
This should fix the issue reported here:
https://discourse.llvm.org/t/second-stage-of-build-on-windows-fails-in-sandboxir/84841
Commit: 9a49a03dc95bdd2b6ef4807291136eca46370517
https://github.com/llvm/llvm-project/commit/9a49a03dc95bdd2b6ef4807291136eca46370517
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/call27.f90
Log Message:
-----------
[flang] Refine handling of NULL() actual to non-optional allocatable … (#116126)
…dummy
We presently allow a NULL() actual argument to associate with a
non-optional dummy allocatable argument only under INTENT(IN). This is
too strict, as it precludes the case of a dummy argument with default
intent. Continue to require that the actual argument be definable under
INTENT(OUT) and INTENT(IN OUT), and (contra XLF) interpret NULL() as
being an expression, not a definable variable, even when it is given an
allocatable MOLD.
Fixes https://github.com/llvm/llvm-project/issues/115984.
Commit: a21089a24bdd66347c91fa3638300b90c4dd4039
https://github.com/llvm/llvm-project/commit/a21089a24bdd66347c91fa3638300b90c4dd4039
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/coshape.f90
Log Message:
-----------
[flang] Support COSHAPE() intrinsic function (#125286)
Enable COSHAPE in the intrinsics table and enable its test.
Commit: 29025a060079d6e40c364b64b1d0b3d039a81a79
https://github.com/llvm/llvm-project/commit/29025a060079d6e40c364b64b1d0b3d039a81a79
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/pre-fir-tree04.f90
M flang/test/Semantics/allocate11.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/bind-c09.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/change_team01.f90
M flang/test/Semantics/coarrays01.f90
A flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/doconcurrent08.f90
M flang/test/Semantics/form_team01.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/resolve07.f90
M flang/test/Semantics/resolve50.f90
M flang/test/Semantics/resolve55.f90
M flang/test/Semantics/resolve88.f90
M flang/test/Semantics/resolve94.f90
M flang/test/Semantics/this_image01.f90
Log Message:
-----------
[flang] Catch more semantic errors with coarrays (#125536)
Detect and report a bunch of uncaught semantic errors with coarray
declarations. Add more tests, and clean up bad usage in existing tests.
Commit: 3e3855b0e553e66cde5ad9a55c078c9650798e4a
https://github.com/llvm/llvm-project/commit/3e3855b0e553e66cde5ad9a55c078c9650798e4a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/bug125774.f90
Log Message:
-----------
[flang] Don't flag CLASS(*) ASSOCIATED() pointer or target as error (#125890)
As I read the standard, an unlimited polymorphic pointer or target
should be viewed as compatible with any data target or data pointer when
used in the two-argument form of the intrinsic function ASSOCIATED().
Fixes https://github.com/llvm/llvm-project/issues/125774.
Commit: fce29486ac109fbf8b543c24c763703839278457
https://github.com/llvm/llvm-project/commit/fce29486ac109fbf8b543c24c763703839278457
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Fix bogus error on defined I/O procedure. (#125898)
The check that "v_list" be deferred shape is just wrong; there are no
deferred shape non-pointer non-allocatable dummy arguments in Fortran.
Correct to check for an assumed shape dummy argument. And de-split the
error messages that were split across multiple source lines, making them
much harder to find with grep.
Fixes https://github.com/llvm/llvm-project/issues/125878.
Commit: 161d002a0949046131ecaa6574ddfece5cfd225e
https://github.com/llvm/llvm-project/commit/161d002a0949046131ecaa6574ddfece5cfd225e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
Log Message:
-----------
[flang] Silence warnings from hermetic module files (#128763)
Modules read from module files must have their symbols tagged with the
ModFile flag to suppress all warnings messages that might be emitted for
their contents. (Actionable warnings will have been emitted when the
modules were originally compiled, so we don't want to repeat them later
when the modules are USE'd.) The module symbols of the additional
modules in hermetic module files were not being tagged with that flag;
fix.
Commit: e1ba1be787b845e9c174430e5005584e9d23362a
https://github.com/llvm/llvm-project/commit/e1ba1be787b845e9c174430e5005584e9d23362a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve34.f90
Log Message:
-----------
[flang] Account for accessibility in extensibility check (#128765)
A derived type with a component of the same name as the type is not
extensible... unless the extension occurs in another module where the
conflicting component is inaccessible.
Fixes https://github.com/llvm/llvm-project/issues/126114.
Commit: 8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
https://github.com/llvm/llvm-project/commit/8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call09.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/definable01.f90
Log Message:
-----------
[flang] Accept proc ptr function result as actual argument without IN… (#128771)
…TENT
A dummy procedure pointer with no INTENT attribute may associate with an
actual argument that is the result of a reference to a function that
returns a procedure pointer, we think.
Fixes https://github.com/llvm/llvm-project/issues/126950.
Commit: 523537f0c90b192b0f81d14e454fb8b889b07ce8
https://github.com/llvm/llvm-project/commit/523537f0c90b192b0f81d14e454fb8b889b07ce8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Silence spurious error (#128777)
When checking for conflicts between type-bound generic defined I/O
procedures and non-type-bound defined I/O generic interfaces, don't
worry about conflicts where the type-bound generic interface is
inaccessible in the scope around the non-type-bound interface.
Fixes https://github.com/llvm/llvm-project/issues/126797.
Commit: e843d514b12fd07e8bf49898cf66716e4b2833ce
https://github.com/llvm/llvm-project/commit/e843d514b12fd07e8bf49898cf66716e4b2833ce
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Semantics/doconcurrent08.f90
Log Message:
-----------
[flang] Refine handling of SELECT TYPE associations in analyses (#128935)
A few bits of semantic checking need a variant of the
ResolveAssociations utility function that stops when hitting a construct
entity for a type or class guard. This is necessary for cases like the
bug below where the analysis is concerned with the type of the name in
context, rather than its shape or storage or whatever. So add a flag to
ResolveAssociations and GetAssociationRoot to make this happen, and use
it at the appropriate call sites.
Fixes https://github.com/llvm/llvm-project/issues/128608.
Commit: 78acf7bb0a6e3a0948deece3d49f155cbc1ce891
https://github.com/llvm/llvm-project/commit/78acf7bb0a6e3a0948deece3d49f155cbc1ce891
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/abstract02.f90
Log Message:
-----------
[flang] Enforce C1503 (#128962)
Enforce an obscure constraint from the standard: an abstract interface
is not allowed to have the same name as an intrinsic type keyword. I
suspect this is meant to prevent a declaration like "PROCEDURE(REAL),
POINTER :: P" from being ambiguous.
Fixes https://github.com/llvm/llvm-project/issues/128744.
Commit: c6dd9f4278d156976d7694fb34d0bb614082ce46
https://github.com/llvm/llvm-project/commit/c6dd9f4278d156976d7694fb34d0bb614082ce46
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/array-constr-len.f90
Log Message:
-----------
[flang] Catch usage of : and * lengths in array c'tors (#128974)
The definition of an array constructor doesn't preclude the use of
[character(:)::] or [character(*)::] directly, but there is language
elsewhere in the standard that restricts their use to specific contexts,
neither of which include explicitly typed array constructors.
Fixes https://github.com/llvm/llvm-project/issues/128755.
Commit: cbef629838b06166c54e59fdfe8649f792293f61
https://github.com/llvm/llvm-project/commit/cbef629838b06166c54e59fdfe8649f792293f61
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/generic07.f90
M flang/test/Semantics/resolve117.f90
Log Message:
-----------
[flang] Catch type-bound generic with inherited indistinguishable spe… (#128980)
…cific
When checking generic procedures for indistinguishable specific
procedures, don't neglect to include specific procedures from any
accessible instance of the generic procedure inherited from its parent
type..
Fixes https://github.com/llvm/llvm-project/issues/128760.
Commit: 44c6616a4a9f5c8e8e68364609f018c62670d114
https://github.com/llvm/llvm-project/commit/44c6616a4a9f5c8e8e68364609f018c62670d114
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Semantics/check-declarations.cpp:2009:15: error: unused
variable 'kind' [-Werror,-Wunused-variable]
Commit: f3b18491e840c23dfe25e399ddf6475425481835
https://github.com/llvm/llvm-project/commit/f3b18491e840c23dfe25e399ddf6475425481835
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
Log Message:
-----------
[RISCV] Consolidate some DecoderNamespaces for standard extensions. (#128954)
First thing to know is that the subtarget feature checks used to block
accessing a decoder table are only a performance optimization and not
required for functionality. The tables have their own predicate checks.
I've removed them from all the standard extension tables.
-RV32 Zacas decoder namespace has been renamed to RV32GPRPair, I think
Zilsd(rv32 load/store pair) can go in here too.
-The RV32 Zdinx table has been renamed to also use RV32GPRPair.
-The Zfinx table has been renamed to remove superflous "RV" prefix.
-Zcmp and Zcmt tables have been combined into a ZcOverlap table. I think
Zclsd(rv32 compressed load/store pair) can go in here too.
-All the extra standard extension tables are checked after the main
standard extension table. This makes the common case of the main table
matching occur earlier.
-Zicfiss is the exception to this as it needs to be checked before
the main table since it overrides some encodings from Zcmop. This
can't be handled by a predicate based priority as Zicfiss only overrides
a subset of Zcmop encodings.
Commit: 63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
https://github.com/llvm/llvm-project/commit/63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Reduce dynamic relocations for RISCVOpcodesList table. NFC
Inline the strings directly into the table instead of storing a pointer.
Similar to what was done for other searchable tables in the last couple
months.
Commit: 11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
https://github.com/llvm/llvm-project/commit/11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/pr62908.ll
Log Message:
-----------
[JumpThreading] Remove deleted BB from Unreachable (#126984)
Although an unreachable BB is skipped by processBlock, its successor can
still be handled by processBlock, and maybeMergeBasicBlockIntoOnlyPred
may merge the two BBs and delete the unreachable BB. Then the garbage
pointer is left in Unreachable set. This patch avoids merging a BB into
unreachable predecessor.
Commit: 0ebf7b473a98a7433568d0a225d8b38767bdae50
https://github.com/llvm/llvm-project/commit/0ebf7b473a98a7433568d0a225d8b38767bdae50
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Other/print-inst-addrs.ll
A llvm/test/Other/print-inst-debug-locs.ll
A llvm/test/Other/print-mi-addrs.ll
Log Message:
-----------
IR, CodeGen: Add command line flags for dumping instruction addresses and debug locations.
As previously discussed [1], it is sometimes useful to be able to see
instruction addresses and debug locations as part of IR dumps. The
same applies to MachineInstrs which already dump debug locations but
not addresses. Therefore add some flags that can be used to enable
dumping of this information.
[1] https://discourse.llvm.org/t/small-improvement-to-llvm-debugging-experience/79914
Reviewers: rnk
Reviewed By: rnk
Pull Request: https://github.com/llvm/llvm-project/pull/127944
Commit: 85f8bd111f0553699baa7ec8ea396a373497cf45
https://github.com/llvm/llvm-project/commit/85f8bd111f0553699baa7ec8ea396a373497cf45
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
Log Message:
-----------
[NVPTX] Combine addressing-mode variants of ld, st, wmma (#129102)
This change fold together the _ari, _ari64, and _asi variants of these
instructions into a single instruction capable of holding any address.
This allows for the removal of a lot of unnecessary code and moves us
towards a standard way of representing an address in NVPTX.
Commit: 30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
https://github.com/llvm/llvm-project/commit/30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
Log Message:
-----------
[MCA][RISCV] Mark one of the internal CustomBehavior functions static. NFC
This function is only used in the same file.
Commit: 5401c675ebe4114198af068b333aa541fac42491
https://github.com/llvm/llvm-project/commit/5401c675ebe4114198af068b333aa541fac42491
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/avoid-wx-segment.c
Log Message:
-----------
[BOLT][instr] Avoid WX segment (#128982)
BOLT instrumented binary today has a readable (R), writeable (W) and also
executable (X) segment, which Android system won't load due to its WX
attribute. Such RWX segment was produced because BOLT has a two step linking,
first for everything in the updated or rewritten input binary and next for
runtime library. Each linking will layout sections in the order of RX sections
followed by RO sections and then followed by RW sections. So we could end up
having a RW section `.bolt.instr.counters` surrounded by a number of RO and RX
sections, and a new text segment was then formed by including all RX sections
which includes the RW section in the middle, and hence the RWX segment. One
way to fix this is to separate the RW `.bolt.instr.counters` section into its
own segment by a). assigning the starting addresses for section
`.bolt.instr.counters` and its following section with regular page aligned
addresses and b). creating two extra program headers accordingly.
Commit: abe1ecff5428871ea79be41b6db38e585dbd79e8
https://github.com/llvm/llvm-project/commit/abe1ecff5428871ea79be41b6db38e585dbd79e8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang][runtime] Detect byte order reversal problems (#129093)
When reading an unformatted sequential file with variable-length
records, detect byte order reversal problems with the first record's
header and footer words, and emit a more detailed error message.
Commit: 51dc52631c7b0f69f84ff558ce872f1e080d338a
https://github.com/llvm/llvm-project/commit/51dc52631c7b0f69f84ff558ce872f1e080d338a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Lower/io-derived-type.f90
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Catch more defined I/O conflicts (#129115)
The code that checks for conflicts between type-bound defined I/O
generic procedures and non-type-bound defined I/O interfaces only works
when then procedures are defined in the same module as subroutines. It
doesn't catch conflicts when either are external procedures, procedure
pointers, dummy procedures, &c. Extend the checking to cover those cases
as well.
Fixes https://github.com/llvm/llvm-project/issues/128752.
Commit: da85b2a86403fb4bf065a4463691914f444bc07a
https://github.com/llvm/llvm-project/commit/da85b2a86403fb4bf065a4463691914f444bc07a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
Log Message:
-----------
[WebAssembly] Generate __clang_call_terminate for Emscripten EH (#129020)
When an exception thrown ends up calling `std::terminate`, for example,
because an exception is thrown within a `noexcept` function or an
exception is thrown from `__cxa_end_catch` during handling the previous
exception, the libc++abi spec says we are supposed to call
`__cxa_begin_catch` before `std::terminate`:
https://libcxxabi.llvm.org/spec.html
> When the personality routine encounters a termination condition, it
will call `__cxa_begin_catch()` to mark the exception as handled and
then call `terminate()`, which shall not return to its caller.
The default Itanium ABI generates a call to `__clang_call_terminate()`,
which is a function that calls `__cxa_begin_catch` and then
`std::terminate`:
```ll
define void @__clang_call_terminate(ptr noundef %0) {
%2 = call ptr @__cxa_begin_catch(ptr %0)
call void @_ZSt9terminatev()
unreachable
}
```
But we replaced this with just a call to `std::terminate` in
https://github.com/llvm/llvm-project/commit/561abd83ffecc8d4ba8fcbbbcadb31efc55985c2
because this caused some tricky transformation problems for Wasm EH. The
detailed explanation why is in the commit description, but the summary
is for Wasm EH it needed a `try` with both `catch` and `catch_all` and
it was tricky to deal with.
But that commit replaced `__clang_call_terminate` with `std::terminate`
for all Wasm programs and not only the ones that use Wasm EH. So
Emscripten EH was also affected by that commit. Emscripten EH is not
able to catch foreign exceptions anyway, so this is unnecessary
compromise.
This makes we use `__clang_call_terminate` as in the default Itanium EH
for Emscripten EH. We may later fix Wasm EH too but that requires more
efforts in the backend.
Related issue:
https://github.com/emscripten-core/emscripten/issues/23720
Commit: 6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
https://github.com/llvm/llvm-project/commit/6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/avx10_2convertintrin.h
Log Message:
-----------
[X86][AVX10.2] Add comments for the avx10_2convertintrin.h file (#120766)
As in title. I will create a sibling pr with comments to the 512
variant.
Commit: 0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
https://github.com/llvm/llvm-project/commit/0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
Author: KAWASHIMA Takahiro <t-kawashima at fujitsu.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang][docs][NFC] Fix Markdown `/*comments*/` (#129018)
`*` in `/*comments*/` were interpreted as emphasis marks and were not
displayed in https://flang.llvm.org/docs/Extensions.html.
Commit: 9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
https://github.com/llvm/llvm-project/commit/9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
Log Message:
-----------
[RISCV] Move RISCVVInversePseudosTable from RISCVMCTargetDesc.cpp to RISCVBaseInfo.cpp. NFC
RISCVMCTargetDesc contains the instruction, register, etc. descriptions
from TableGen. Other searchable tables in MCTargetDesc live in RISCVBaseInfo.cpp
Commit: 1594fa8e5a719b33b1cd584af92e06981d6b3e59
https://github.com/llvm/llvm-project/commit/1594fa8e5a719b33b1cd584af92e06981d6b3e59
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/asan/asan_win.cpp
Log Message:
-----------
[asan][win] Fix CreateThread leak (#126738)
Fix #126541
Since ```t->Destroy``` cannot be called after ```start_routine```(When
calling standard thread_start in crt)
Intercept `ExitThread` and free the memory created by `VirtualAlloc'
Commit: fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
https://github.com/llvm/llvm-project/commit/fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adaptor -> Adapter (NFC) (#129110)
Both spellings are considered correct and acceptable, with adapter being
more common in American English. Given that DAP stands for Debug Adapter
Protocol (with an e) let's go with that as the canonical spelling.
Commit: 28d76714714a2cdcbdd62265de15115015eb9469
https://github.com/llvm/llvm-project/commit/28d76714714a2cdcbdd62265de15115015eb9469
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/unittests/IR/ShapedTypeTest.cpp
Log Message:
-----------
[mlir] Add two clone methods about encoding to RankedTensorType. (#127709)
There are clone methods for shape and element type, but not for
encodings. The revision adds two clone method to RankedTensorType:
- dropEncoding(): Return a clone of this type without the encoding.
- cloneWithEncoding(Attribute encoding): Return a clone of this type
with the given new encoding and the same shape and element type as this
type.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 531c48546d71b193309d79551bd69a3d24944367
https://github.com/llvm/llvm-project/commit/531c48546d71b193309d79551bd69a3d24944367
Author: sstipano <sstipano7 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU][NFC] Move isXDL and isDGEMM to SIInstrInfo. (#129103)
Commit: 1b622a43c4f992e07c6d2cb278291798d8994a00
https://github.com/llvm/llvm-project/commit/1b622a43c4f992e07c6d2cb278291798d8994a00
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
Log Message:
-----------
[ORC] Make callWrapperAsync forwards explicit in ExecutionSession. NFCI.
This change is intended to make the overloads of callWrapperAsync clearer
for clients that only look at the ExecutionSession API.
Previously we forwarded calls to the three callWrapperAsync overloads in
ExecutorProcessControl using one variadic template, but this obscures the
API for clients who only look at ExecutionSession.
Commit: 1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
https://github.com/llvm/llvm-project/commit/1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Fix a misuse of the getShuffleCost API [NFC] (#129137)
The getShuffleCost api, in concept, expects to only deal with non-length
changing shuffles. We were failing to extend the mask appropriately
before invoking it. This came up in
https://github.com/llvm/llvm-project/pull/128537 in discussion of a
potential invariant, but is otherwise unrelated.
Commit: 4904728cab8596320a77a895cb712fba07ea7bb1
https://github.com/llvm/llvm-project/commit/4904728cab8596320a77a895cb712fba07ea7bb1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 14170b16028c087ca154878f5ed93d3089a965c6
https://github.com/llvm/llvm-project/commit/14170b16028c087ca154878f5ed93d3089a965c6
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/resource_binding_attr.hlsl
Log Message:
-----------
[HLSL] Add HLSLResourceBindingAttr to default constant buffer numeric declarations ($Globals) (#128981)
Translates `register(c#`) annotations on numeric constants in the global
scope to `HLSLResourceBindingAttr`. Applies to scalar, vector and array
constants.
Fixes #128964
Commit: 81387754c3ebdb0591f6886a5a426fd00703c905
https://github.com/llvm/llvm-project/commit/81387754c3ebdb0591f6886a5a426fd00703c905
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Add VL and VTYPE to implicit uses on MC vector instructions that also use FRM (#129130)
We accidentally overwote the VL, VTYPE uses from the base class on any
instruction that also uses FRM.
Not sure why the llvm-mca test changed cycle time.
Commit: 0b5bb12534fe95441c1898f345ec867a3ca7c4b0
https://github.com/llvm/llvm-project/commit/0b5bb12534fe95441c1898f345ec867a3ca7c4b0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Move RISCV vector load/store searchable tables from RISCVISelDAGToDAG.cpp to RISCVBaseInfo.cpp. NFC (#129172)
llvm-mca needs some of them for #128978.
I'm relying on -ffunction-sections and -fdata-sections allowing these to
be stripped from tools that don't need them like llvm-mc.
Commit: 39c6c8be2f3f607b413e3f05ab1f4678efdd129a
https://github.com/llvm/llvm-project/commit/39c6c8be2f3f607b413e3f05ab1f4678efdd129a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Fix the locale base API on Linux with musl (#128936)
Since `363bfd6090b0 ([libc++] Use the new locale base API on Linux
(#128007), 2025-02-24)`, musl targets will fail to build with errors
due to missing strtoll_l functions.
Co-authored-by: Pirama Arumuga Nainar <pirama at google.com>
Commit: bafd44bff58cff9efe569a221b232bab004d55cd
https://github.com/llvm/llvm-project/commit/bafd44bff58cff9efe569a221b232bab004d55cd
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add py_binary rule to build hdrgen. (#129161)
Commit: 80f34e2716e8e69347ae16da5fff7114442db310
https://github.com/llvm/llvm-project/commit/80f34e2716e8e69347ae16da5fff7114442db310
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Change BracedInitializerIndentWidth to int (#128988)
Fixes #108526
Commit: 84934674907781c50494a125889ed16e23de2b9f
https://github.com/llvm/llvm-project/commit/84934674907781c50494a125889ed16e23de2b9f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-null-global.s
Log Message:
-----------
[JITLink][AArch64] Ensure that nulls remain null during ptrauth signing.
Signing a null pointer value can, and usually will, result in some high bits
being set, causing null checks to fail. E.g. in
extern void __attribute__((weak_import)) f(void);
void (*p) = &f;
if f is undefined then p should be null (left unsigned).
This patch updates lowerPointer64AuthEdgesToSigningFunction to check for
Pointer64Authenticated edges to null targets. Where found, these edges are
turned into plain Pointer64 edges (which we know from context will write a null
value to the fixup location), and signing instructions for these locations are
omitted from the signing function.
Commit: 746d8b0740095ea3939fef0112a51953ca22cd29
https://github.com/llvm/llvm-project/commit/746d8b0740095ea3939fef0112a51953ca22cd29
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
Log Message:
-----------
[Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (#129101)
Currently, the index of SWMMAC builtins is of type `short`, likely based
on the
assumption that K can only be up to 32, meaning there are only 16
non-zero
elements. However, this is not future-proof. This patch updates all of
them to
`int`.
The intrinsics themselves don't need to be updated since they accept any
integer
type, and in the backend, they are already extended to 32-bit.
Additionally, the
tests already use various kinds of integers.
Partially fixes SWDEV-518183.
Commit: 55f254726ee1a83a40c14cfc39306071044cc68c
https://github.com/llvm/llvm-project/commit/55f254726ee1a83a40c14cfc39306071044cc68c
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[mlir][math] Rsqrt math expand pass expects static shaped operand (#129006)
Similar to the issue reported in
https://github.com/llvm/llvm-project/pull/128299#pullrequestreview-2636142506,
ExpandMath pattern for rsqrt expects the static shaped operands.
Otherwise, it crashes due to the assertion violation.
See: https://github.com/llvm/llvm-project/pull/128299
Commit: e0c690990de97e4de08853d674a316d23ce4a83a
https://github.com/llvm/llvm-project/commit/e0c690990de97e4de08853d674a316d23ce4a83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
Log Message:
-----------
[flang][OpenMP] Add `reduction` clause support to `loop` directive (#128849)
Extends `loop` directive transformation by adding support for the
`reduction` clause.
Commit: 9f28621fae33ecaab2c99af66303d40830182c25
https://github.com/llvm/llvm-project/commit/9f28621fae33ecaab2c99af66303d40830182c25
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Attributor][NFC] Clang format (#129163)
Commit: 3cccb2017ff96d67b0e737eeddb58ff054cedc6e
https://github.com/llvm/llvm-project/commit/3cccb2017ff96d67b0e737eeddb58ff054cedc6e
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Tensor/bufferize.mlir
Log Message:
-----------
[MLIR][Tensor] Enhance bufferization of tensor.expand_shape op (#128871)
Instead of inferring the output shape argument of
memref.expand_shape op, use output_shape argument of tensor.expand_shape
op by adding dynamic dimension support for bufferization of
tensor.expand_shape when there are more than one dynamic dim within a
reassociation set.
Commit: 170b5736824bd4f70a7bf9dd0028b997d85ba76f
https://github.com/llvm/llvm-project/commit/170b5736824bd4f70a7bf9dd0028b997d85ba76f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/module-fgen-reduced-bmi.cppm
Log Message:
-----------
[Driver] [C++20] [Modules] Warning for the surprising useless case for reduced BMI
Found in downstream. I didn't realize the output file for precompile and
reduced BMI refers to the same location. Then the generating process of
reduced BMI is basically a waste of time.
Commit: 2fa6c5265eda03925cef217f388a11a2a1616c54
https://github.com/llvm/llvm-project/commit/2fa6c5265eda03925cef217f388a11a2a1616c54
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Add baseline tests for simplify elts of readfirstlane (#128645)
Commit: d410f093da7b9e3cd245dac62682ec1acd29d117
https://github.com/llvm/llvm-project/commit/d410f093da7b9e3cd245dac62682ec1acd29d117
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Simplify demanded vector elts of readfirstlane sources (#128646)
Stub implementation of simplifyDemandedVectorEltsIntrinsic for
readfirstlane.
Commit: b2152823e003bb29c9161a55fabe76a3a3cb8b0a
https://github.com/llvm/llvm-project/commit/b2152823e003bb29c9161a55fabe76a3a3cb8b0a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Revert "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
This reverts commit 4904728cab8596320a77a895cb712fba07ea7bb1. Downstream
test failed, reverting during investigation.
Commit: 9fefc013dbd0d8478b22a38925b3a171a34edc98
https://github.com/llvm/llvm-project/commit/9fefc013dbd0d8478b22a38925b3a171a34edc98
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
M llvm/test/Transforms/GVN/PRE/atomic.ll
M llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/nonintegral.ll
M llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
Log Message:
-----------
[GVN/PRE] Remove triple from GVN/PRE tests (#129073)
The tests in GVN/PRE need not to depend on target triple. Removing the
triple dependence from all the tests in this directory.
Commit: 97da0856b0fd895a76306bbb3d2023469ed8a0be
https://github.com/llvm/llvm-project/commit/97da0856b0fd895a76306bbb3d2023469ed8a0be
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
Log Message:
-----------
[PowerPC] Simplify ELFStreamer and XCOFFStreamer
Commit: 50064db174acf672c7e72e10a72d1302c7aecadd
https://github.com/llvm/llvm-project/commit/50064db174acf672c7e72e10a72d1302c7aecadd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#129189)
Commit: 192b13bc9fa914d4ca87f2cd43aec40650ed5663
https://github.com/llvm/llvm-project/commit/192b13bc9fa914d4ca87f2cd43aec40650ed5663
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#129194)
Commit: 9b514bc89310de941939e6889b326da781adea84
https://github.com/llvm/llvm-project/commit/9b514bc89310de941939e6889b326da781adea84
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix affine data copy generate for zero-ranked memrefs (#129186)
Fix affine data copy generate for zero-ranked memrefs.
Fixes: https://github.com/llvm/llvm-project/issues/122210 and
https://github.com/llvm/llvm-project/issues/61167
Test cases borrowed from https://reviews.llvm.org/D147298, authored by
Lewuathe <Kai Sasaki>.
Co-authored-by: Kai Sasaki <lewuathe at gmail.com>
Commit: 497d4f175e7460a5a76bff44a5fa95c7ce1bb393
https://github.com/llvm/llvm-project/commit/497d4f175e7460a5a76bff44a5fa95c7ce1bb393
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIRV] Remove unused variable. NFC
Commit: f4aea1324d78778e86541ffc64859154cc9064d9
https://github.com/llvm/llvm-project/commit/f4aea1324d78778e86541ffc64859154cc9064d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#129193)
Commit: 44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
https://github.com/llvm/llvm-project/commit/44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129190)
Commit: 15c49b9db3f60bdbd320271d5e97f118c00b95dd
https://github.com/llvm/llvm-project/commit/15c49b9db3f60bdbd320271d5e97f118c00b95dd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't change AST in CodeGen/Coroutines
The root source of other odd bugs.
We performed a hack in CodeGen/Coroutines. But we didn't recognize that
the CodeGen is a consumer of AST. The CodeGen shouldn't change AST in
any ways. It'll break the assumption about the ASTConsumer in Clang's
framework, which may break any other clang-based tools which depends on
multiple consumers to work together.
The fix here is simple. But I am not super happy about the test. It is
too specific and verbose. We can remove this if we can get the signature
of the AST in ASTContext.
Commit: 2871f6905257169f8a49b13289421a668bf24051
https://github.com/llvm/llvm-project/commit/2871f6905257169f8a49b13289421a668bf24051
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/SemaCXX/embed-init-list.cpp
Log Message:
-----------
[clang] Fix issues with #embed and intializer lists/template arguments (#128890)
Sometimes number of expressions in InitListExpr is used for template
argument deduction. So, in these cases we need to pay attention to real
number of expressions including expanded #embed data.
Fixes https://github.com/llvm/llvm-project/issues/122306
Commit: a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
https://github.com/llvm/llvm-project/commit/a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Fir/Todo/coordinate_of_2.fir
M flang/test/Fir/Todo/coordinate_of_3.fir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-value-copy.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/field-index.fir
M flang/test/Fir/pdt.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
M flang/test/Lower/HLFIR/c_ptr-constant-init.f90
M flang/test/Lower/HLFIR/intrinsic-module-procedures.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_f_pointer.f90
M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/call-by-value.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/forall/array-pointer.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
Log Message:
-----------
[flang] update fir.coordinate_of to carry the fields (#127231)
This patch updates fir.coordinate_op to carry the field index as
attributes instead of relying on getting it from the fir.field_index
operations defining its operands.
The rational is that FIR currently has a few operations that require
DAGs to be preserved in order to be able to do code generation. This is
the case of fir.coordinate_op, which requires its fir.field operand
producer to be visible.
This makes IR transformation harder/brittle, so I want to update FIR to
get rid if this.
Codegen/printer/parser of fir.coordinate_of and many tests need to be
updated after this change.
Commit: d0edd931bcc328b9502289d346f2b2219341f853
https://github.com/llvm/llvm-project/commit/d0edd931bcc328b9502289d346f2b2219341f853
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
Log Message:
-----------
[Coroutines] Mark parameter allocas with coro.outside.frame metadata (#127653)
Parameters to a coroutine get copied (moved) to coroutine-local
instances which code inside the coroutine then uses.
The original parameters should not be part of the frame. Normally
CoroSplit figures that out by itself, but for [[clang::trivial_abi]]
parameters which, get destructed at the end of the ramp function, it
does not (see bug), causing use-after-free's if the frame is destroyed
before the end of the ramp (as happens if it doesn't suspend).
Since Clang knows these should never be part of the frame, use metadata
to make it so.
Fixes #127499
Commit: ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
https://github.com/llvm/llvm-project/commit/ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
Author: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/vecintrin.h
Log Message:
-----------
[SystemZ] Add header guard macros to vecintrin.h (#129170)
Add header guard macros to clang/lib/Headers/vecintrin.h. Found while
compiling the latest numpy with clang 19 on s390x which ends up
including vecintrin.h twice. The gcc version of this file has header
guards so numpy compiles fine with gcc.
Signed-off-by: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Commit: a278b28a945a8354627303604671a28751f3ca51
https://github.com/llvm/llvm-project/commit/a278b28a945a8354627303604671a28751f3ca51
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] fix build after bafd44bff58cff9efe569a221b232bab004d55cd
Commit: 751f2fc8d5f465be5634b39adb8256a02f419984
https://github.com/llvm/llvm-project/commit/751f2fc8d5f465be5634b39adb8256a02f419984
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/unique_object_duplication.h
Log Message:
-----------
Disable unique-object-duplication warning in templates (#129120)
I've been trying to resolve instances of the unique-object-duplication
warning in chromium code. Unfortunately, I've found that practically
speaking, it's near-impossible to actually fix the problem when
templates are involved.
My understanding is that the warning is correct -- the variables it's
flagging are indeed duplicated and potentially causing bugs as a result.
The problem is that hiddenness is contagious: if a templated class or
variable depends on something hidden, then it itself must also be
hidden, even if the user explicitly marked it visible. In order to make
it actually visible, the user must manually figure out everything that
it depends on, mark them as visible, and do so recursively until all of
its ancestors are visible.
This process is extremely difficult and unergonomic, negating much of
the benefits of templates since now each new use requires additional
work. Furthermore, the process doesn't work if the user can't edit some
of the files, e.g. if they're in a third-party library.
Since a warning that can't practically be fixed isn't useful, this PR
disables the warning for _all_ templated code by inverting the check.
The warning remains active (and, in my experience, easily fixable) in
non-templated code.
Commit: f09e245b35f291ab48f6efeb4986e7f9818b7cb7
https://github.com/llvm/llvm-project/commit/f09e245b35f291ab48f6efeb4986e7f9818b7cb7
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[NFC][clang] Remove trailing whitespace in Options.td
Commit: 1adb00110e35c6963175ecc000e42caf858b4c07
https://github.com/llvm/llvm-project/commit/1adb00110e35c6963175ecc000e42caf858b4c07
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] port 15c49b9db3f60bdbd320271d5e97f118c00b95dd
Commit: 62f15a042b2fd2ed668ba592dc4d13b0c1e84540
https://github.com/llvm/llvm-project/commit/62f15a042b2fd2ed668ba592dc4d13b0c1e84540
Author: klensy <klensy at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/test/Driver/config-file.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/HLFIR/type-info-components.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
Log Message:
-----------
[flang][test] Fix filecheck annotation typos [2/n] (#126099)
Few more fixes, previous: #92387
Co-authored-by: klensy <nightouser at gmail.com>
Commit: 0ba4767feac7878044b1352d86806e8e5a9bcf29
https://github.com/llvm/llvm-project/commit/0ba4767feac7878044b1352d86806e8e5a9bcf29
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
Log Message:
-----------
[AMDGPU] Cosmetic tweaks in AMDGPUAtomicOptimizer. NFC. (#129081)
Simplify iteration over the ToReplace vector, and some related cosmetic
cleanups.
Commit: abd97d9685c07c4787ff22e56c0a7b8963630063
https://github.com/llvm/llvm-project/commit/abd97d9685c07c4787ff22e56c0a7b8963630063
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
Log Message:
-----------
[CaptureTracking] Take non-willreturn calls into account
We can leak one bit of information about the address by either
diverging or not.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: 6a46cf4dc6e134e4999ea655faac28cfd92534b2
https://github.com/llvm/llvm-project/commit/6a46cf4dc6e134e4999ea655faac28cfd92534b2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISel: Restore disabled test (#129001)
Commit: 76910f914cdd4b86b28e0d5852155244ee47dc53
https://github.com/llvm/llvm-project/commit/76910f914cdd4b86b28e0d5852155244ee47dc53
Author: Meng Zhuo <mengzhuo at iscas.ac.cn>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Log Message:
-----------
[tsan][RISCV] Add Go support for linux/riscv64 (#127295)
This is needed to support race detector in Golang.
See also: https://github.com/golang/go/issues/64345
Commit: 36f0838a3dd19de085d10f79cf0577d8bc4a1922
https://github.com/llvm/llvm-project/commit/36f0838a3dd19de085d10f79cf0577d8bc4a1922
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
Log Message:
-----------
[FunctionAttrs] Consider non-willreturn functions during capture inference
Matching the CaptureTracking change in abd97d9685c07c4787ff22e56c0a7b8963630063,
only directly infer captures(none) for
readonly+nocapture+willreturn+void.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: f363cfaa74cd209ff972695787d084c6b77b0756
https://github.com/llvm/llvm-project/commit/f363cfaa74cd209ff972695787d084c6b77b0756
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa][tosa-to-linalg] Ignore Int NaN Mode (#129041)
For non floating point operations NaN propagation mode has no meaning
and can be safely ignored. For non integer types skip the compare and
select materialization for NaN propagation even in "IGNORE" mode. This
fixes a bug where an unchecked `cast<FloatType>()` was called in the
"IGNORE" case even when the operation is acting on integers.
Update the lit tests for the NaN propagation lowering to check that the
propagation logic is not materialized in the case of a non floating
point type e.g. i8.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: c93dc581d979eb20ded470d2c16e51b3e775f6e7
https://github.com/llvm/llvm-project/commit/c93dc581d979eb20ded470d2c16e51b3e775f6e7
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)
The default triple of Amazon Linux on AArch64 is aarch64-amazon-linux,
see issue highlighded by PR #109263, somewhat serious linker issues are
encountered if any other triple is being used.
Unfortunately, this makes XFAIL lines like:
`XFAIL: target=aarch64{{.*}}-linux-gnu` ineffective,
making it impossible to complete all of the check-cxx without failures.
Commit: 1aea0241f1cce9eb4eba3e4add3be9370e30e415
https://github.com/llvm/llvm-project/commit/1aea0241f1cce9eb4eba3e4add3be9370e30e415
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-select.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based select operations. (#128881)
Patch also adds missing tests for unpacked half and float types.
Commit: 1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
https://github.com/llvm/llvm-project/commit/1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[libc++] Enable algorithm vectorization on arm neon (#128873)
Previously the wrong detection macro has been used to check whether arm
NEON is available. This fixes it, and removes a few unnecessary includes
from `__algorithm/simd_utils.h` as a drive-by.
Commit: a19979166c343822be5cb7744da322d2eddff3bc
https://github.com/llvm/llvm-project/commit/a19979166c343822be5cb7744da322d2eddff3bc
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A clang/test/Modules/pr28744.cpp
Log Message:
-----------
[modules] Add missing test file for b21ee08e57173102b67bc18237b135550 (#129221)
The commit missed a test file.
Commit: 89e7f4d31b2673fd3bfaf065f930ca9139d92e10
https://github.com/llvm/llvm-project/commit/89e7f4d31b2673fd3bfaf065f930ca9139d92e10
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/VectorUtils.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/sincos.ll
Log Message:
-----------
[LV] Teach the vectorizer to cost and vectorize modf and sincospi intrinsics (#129064)
Follow on to #128035. It is a small extension to support vectorizing
`llvm.modf.*` and `llvm.sincospi.*` too.
This renames the test files from `sincos.ll` ->
`multiple-result-intrinsics.ll` to group together the similar tests
(which make up most of this PR).
Commit: 26fc3aa983ab4615dfc32cebf74076c118de2a9d
https://github.com/llvm/llvm-project/commit/26fc3aa983ab4615dfc32cebf74076c118de2a9d
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
M clang/test/OpenMP/metadirective_ast_print.c
A clang/test/OpenMP/metadirective_otherwise.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
Log Message:
-----------
[OpenMP] Missing implicit otherwise clause in metadirective. (#127113)
Compiling this:
`int main() {`
` #pragma omp metadirective when(use r= {condition(0)}`
`: parallel for)`
`for (int i=0; i<10; i++)`
;
}`
is generating an error:
`error: expected expression`
The compiler is interpreting this as if it's compiling a `#pragma omp
metadirective` with no `otherwise` clause.
In the OMP5.2 specs chapter 7.4 it's mentioned that:
`If no otherwise clause is specified the effect is as if one was
specified without an associated directive variant.`
This patch fixes the issue.
Commit: 5d89123a3962016216e377463b4b3c97df927016
https://github.com/llvm/llvm-project/commit/5d89123a3962016216e377463b4b3c97df927016
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-phi.ll
Log Message:
-----------
[X86] Add tests for sspstrong with phi nodes (NFC)
Commit: e481943f5f02ce841677cd0a08ca1651c89384a7
https://github.com/llvm/llvm-project/commit/e481943f5f02ce841677cd0a08ca1651c89384a7
Author: gdehame <gabrieldehame at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/control_flow.mlir
Log Message:
-----------
[MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression op in the emitted if condition of a cf.cond_br (#128958)
emitc.expression ops are expected to be inlined in the if condition in
the lowering of cf.cond_br if this is their only use but they weren't
inlined.
Instead, a use of the variable corresponding to the expression result
was generated but with no declaration/definition.
Commit: c298f71ea6fd2965e1768307496ee3aa0c40fd07
https://github.com/llvm/llvm-project/commit/c298f71ea6fd2965e1768307496ee3aa0c40fd07
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/test/CodeGen/SystemZ/cond-move-10.mir
A llvm/test/CodeGen/SystemZ/cond-move-11.mir
Log Message:
-----------
[SystemZ] Fix regstate of SELRMux operand in selectSLRMux(). (#128555)
It seems that there can be other cases with this that also can lead to
wrong code (discovered with csmith). This time it involved not the kill
flag but the undef flag.
Use the intersection of the flags from both MachineOperand:s instead
of the RegState from just one of them.
Commit: 9e2eb95c238d5d7b059da766b24e5a01c683bf7a
https://github.com/llvm/llvm-project/commit/9e2eb95c238d5d7b059da766b24e5a01c683bf7a
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't actually emit an output file from unit test
Commit: 2477f82db927174444f6ed7bee9d842e5fd27d53
https://github.com/llvm/llvm-project/commit/2477f82db927174444f6ed7bee9d842e5fd27d53
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/arm-mfp8.c
Log Message:
-----------
[clang] Update SVE load and store intrinsics to have FP8 variants (#126726)
Commit: 00f5763943205f6e29ef08c7d2056599ecf942fd
https://github.com/llvm/llvm-project/commit/00f5763943205f6e29ef08c7d2056599ecf942fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
AMDGPU: Remove nocapture attribute from is.shared and is.private intrinsics (#129238)
This should be replaced with captures(address), but tablegen currently
has
no way to indicate that on an intrinsic. I opened issue #129184 to fix
this.
Commit: 71389e565db6c4f9b5b4515baaf711271ed29877
https://github.com/llvm/llvm-project/commit/71389e565db6c4f9b5b4515baaf711271ed29877
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
Log Message:
-----------
[NFC][analyzer] OOB test consolidation III: 'outofbound' tests (#128508)
Before commit 6e17ed9 the test files `outofbound.c` and
`outofbound-notwork.c` tested the behavior of the old alpha checker
`alpha.security.ArrayBound` (V1); then that commit converted them into
tests for the checker `security.ArrayBound` which was previously called
`alpha.security.ArrayBoundV2`.
This commit removes these test files and migrates their useful content
to `out-of-bounds.c`. The file `outofbound.c` contained lots of
testcases that covered features which are also covered in
`out-of-bounds.c` or `out-of-bounds-diagnostics.c`; those redundant
cases are discarded during this migration process.
This is part of a commit series that reorganizes the tests of
`security.ArrayBound` to a system that's easier to understand and
maintain.
Commit: db973cea7cae3a14c89fc57ea3717b7313d24b97
https://github.com/llvm/llvm-project/commit/db973cea7cae3a14c89fc57ea3717b7313d24b97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
A llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] True16 Add OpSel when optimizing exec mask (#128928)
True16 Add OpSel when optimizing exec mask
True16 VOPCX have the opsel argument. Add it when we create these
instructions in SIOptimizeExecMasking.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: dea08c2b67f38dba707003374f41b2277ab564d4
https://github.com/llvm/llvm-project/commit/dea08c2b67f38dba707003374f41b2277ab564d4
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/region-store.cpp
Log Message:
-----------
Fix RegionStore assertion failure after #127602 (#129224)
Basically, we may leave the loop because if exhaust the fields, array
elements or other subobjects to initialize.
In that case, the Bindings may be in an exhausted state, thus no further
addBinding calls are allowed.
Let's harden the code by sprinkling some early exists in the recursive
dispatcher functions.
And to actually fix the issue, I added a check guarding the single
unguarded addBinding right after a loop I mentioned.
Fixes #129211
Commit: e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
https://github.com/llvm/llvm-project/commit/e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++][ci] Update the Windows toolchains to Clang 19 (#129232)
This also fixes test failures in the clang-cl build configs that started
a couple days ago. It seems like the failures were triggered by an update
to the base image on the Github provided runners.
There were failures in test/libcxx/system_reserved_names.gen.py, due to
an issue in an Clang intrinsics header (avx512fp16intrin.h); this issue
was observed and fixed for Clang 19 in 6f04f46927c. The test does
#define A SYSTEM_RESERVED_NAME
which clashes with a parameter with the name `A` in that header.
By upgrading the toolchain to Clang 19, we get fixed version of this
intrinsics header.
Also update the llvm-mingw toolchains to a version with Clang 19.1.7.
Commit: 0f0665db067f9680f0a90ad07c2f42842acc693f
https://github.com/llvm/llvm-project/commit/0f0665db067f9680f0a90ad07c2f42842acc693f
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCUDA/dtor.cu
Log Message:
-----------
[CUDA][HIP] check dtor in deferred diag (#129117)
Currently the deferred diag fails to diagnose calling of host function
in host device function in device compilation triggered by destructors.
This can be further divided into two issuse:
1. the deferred diag visitor does not visit dtor of member and parent
class when visiting dtor, which it should
2. the deferred diag visitor does not visit virtual dtor of explicit
template class instantiation, which it should
Due to these issues, some constexpr functions which call host functions
are emitted on device side, which causes undefind symbols in linking
stage, as revealed by
https://github.com/llvm/llvm-project/issues/108548
By fixing these issue, clang will diag the issues early during
compilation instead of linking.
Commit: 037cf12b0772654225dded8116f48ee23b9285c2
https://github.com/llvm/llvm-project/commit/037cf12b0772654225dded8116f48ee23b9285c2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/libcxx/xopen_source.gen.py
Log Message:
-----------
[libc++] Mark _XOPEN_SOURCE test as unsupported on FreeBSD (#128950)
The test otherwise fails on FreeBSD, which wasn't noticed when
originally landing the patch that added the test because FreeBSD
CI was disabled at that moment.
Commit: 24abf2c7285df7b5c1b442df10cd0b090a841358
https://github.com/llvm/llvm-project/commit/24abf2c7285df7b5c1b442df10cd0b090a841358
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/utils/lui/sourcewin.py
Log Message:
-----------
[lldb] fix(lldb/**.py): fix invalid escape sequences (#94034)
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: 94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
https://github.com/llvm/llvm-project/commit/94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
Log Message:
-----------
[SelectionDAG][RISCV] Promote VECREDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM} (#128800)
This patch also adds the tests for VP_REDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM}, which have been supported for a while.
Commit: 4a477eeefa5be85f51e146aca8f76e2421a63971
https://github.com/llvm/llvm-project/commit/4a477eeefa5be85f51e146aca8f76e2421a63971
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
Fix fp8-init-list.c test failure (#129259)
Fix error in fp8-init-list.c introduced by PR #126726
Commit: a73e591f33159d177dbd123d1bc9d9352e3e531e
https://github.com/llvm/llvm-project/commit/a73e591f33159d177dbd123d1bc9d9352e3e531e
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
A llvm/test/CodeGen/PowerPC/v1024ls.ll
Log Message:
-----------
[PowerPC] custom lower v1024i1 load/store (#126969)
Support moving PPC dense math register values to and from storage with
LLVM IR load/store.
Commit: 2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
https://github.com/llvm/llvm-project/commit/2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 15c49b9db3f6
Commit: 09c64e56d4b79421ea3ccb3e8766d1056725874d
https://github.com/llvm/llvm-project/commit/09c64e56d4b79421ea3ccb3e8766d1056725874d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
Log Message:
-----------
[lldb] Restore register state if PrepareTrivialCall fails (#129038)
Fixes #124269
PrepareTrivalCall always had the possibility of failing, but given that
it only wrote to general purpose registers, if it did, you had bigger
problems.
When it failed, we did not mark the thread plan valid and when it was
torn down we didn't try to restore the register state. This meant that
if you tried to continue, the program was unlikely to work.
When I added AArch64 GCS support, I needed to handle the situation where
the GCS pointer points to unmapped memory and we fail to write the extra
entry we need. So I added code to restore the gcspr_el0 register
specifically if this happened, and ordered the operations so that we
tried this first.
In this change I've made the teardown of an invalid thread plan restore
the register state if one was saved. It may be there isn't one if
ConstructorSetup fails, but this is ok because that function does not
modify anything.
Now that we're doing that, I don't need the GCS specific code anymore,
and all thread plans are protected from this in the rare event something
does fail.
Testing is done by the existing GCS test case that points the gcspr into
unmapped memory which causes PrepareTrivialCall to fail. I tried adding
a simulated test using a mock gdb server. This was not possible because
they all use DynamicLoaderStatic which disables all JIT features.
Commit: 248be98418225fd409bc3ffb1834573c7890085e
https://github.com/llvm/llvm-project/commit/248be98418225fd409bc3ffb1834573c7890085e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Reapply "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
With a fix for fully undef masks. These can't reach the lowering code, but
can reach the costing code via e.g. SLP.
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 9af10e3d9d97403bc389ed92ee63c80d0ab1df57
https://github.com/llvm/llvm-project/commit/9af10e3d9d97403bc389ed92ee63c80d0ab1df57
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129191)
Commit: b2525dc66379f2c9942ed3cff6101b035003532c
https://github.com/llvm/llvm-project/commit/b2525dc66379f2c9942ed3cff6101b035003532c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/MCA/InstrBuilder.cpp
Log Message:
-----------
[MCA] Avoid repeated hash lookups (NFC) (#129192)
Commit: 7e33bebe7c8c1258248567670209e6756a6cf77a
https://github.com/llvm/llvm-project/commit/7e33bebe7c8c1258248567670209e6756a6cf77a
Author: ShatianWang <38512325+ShatianWang at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
R bolt/include/bolt/Passes/ContinuityStats.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/profile-quality-reporting.test
Log Message:
-----------
[BOLT] Report flow conservation scores (#127954)
Add two additional profile quality stats for CG (call graph) and CFG
(control flow graph) flow conservations besides the CFG discontinuity
stats introduced in #109683. The two new stats quantify how different
"in-flow" is from "out-flow" in the following cases where they should be
equal. The smaller the reported stats, the better the flow conservations
are.
CG flow conservation: for each function that is not a program entry, the
number of times the function is called according to CG ("in-flow")
should be equal to the number of times the transition from an entry
basic block of the function to another basic block within the function
is recorded ("out-flow").
CFG flow conservation: for each basic block that is not a function entry
or exit, the number of times the transition into this basic block from
another basic block within the function is recorded ("in-flow") should
be equal to the number of times the transition from this basic block to
another basic block within the function is recorded ("out-flow").
Use `-v=1` for more detailed bucketed stats, and use `-v=2` to dump
functions / basic blocks with bad flow conservations.
Commit: 3f63e1c834e000d4ea95d667ae224cc232927196
https://github.com/llvm/llvm-project/commit/3f63e1c834e000d4ea95d667ae224cc232927196
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 7e33bebe7c8c
Commit: 43eb18e51f5582b73665306a45c640a880976ec1
https://github.com/llvm/llvm-project/commit/43eb18e51f5582b73665306a45c640a880976ec1
Author: Michael Flanders <flanders.michaelk at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
A clang/test/Analysis/new-user-defined.cpp
Log Message:
-----------
[analyzer] Do list initialization for CXXNewExpr with initializer list arg (#127702)
Fixes #116444.
Closed #127700 because I accidentally updated it in github UI.
### Current vs expected behavior
Previously, the result of a `CXXNewExpr` was not always list initialized
when using an initializer list.
In this example:
```
struct S { int x; };
void F() {
S *s = new S{1};
delete s;
}
```
there would be a binding of `s` to `compoundVal{1}`, but this isn't used
during later field binding lookup. After this PR, there is instead a
binding of `s->x` to `1`. This is the cause of #116444 since the field
binding lookup returns undefined in some cases currently.
### Changes
This PR swaps around the handling of typed value regions (seems to be
the usual region type when doing non-CXX-new-expr list initialization)
and symbolic regions (the result of the CXX new expr), so that symbolic
regions also get list initialized. In the below snippet, it swaps the
order of the two conditionals.
https://github.com/llvm/llvm-project/blob/8529bd7b964cc9fafe8fece84f7bd12dacb09560/clang/lib/StaticAnalyzer/Core/RegionStore.cpp#L2426-L2448
### Followup work
This PR only makes CSA do list init for `CXXNewExpr`s. After this, I
would like to make some changes to `RegionStoreMananger::bind` in how it
handles list initialization generally.
I've added some straightforward test cases here for the `new` expr with
a list initializer. I started adding some more before realizing that the
current general (not just `new` expr) list initialization could be
changed to handle more cases like list initialization of unions and
arrays (like https://github.com/llvm/llvm-project/issues/54910). Lmk if
it is preferred to then leave these test cases out for now.
Commit: 9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
https://github.com/llvm/llvm-project/commit/9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libc/include/CMakeLists.txt
A libc/include/Uefi.h.def
A libc/include/Uefi.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/EFIAPI-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/EFI_ALLOCATE_TYPE.h
A libc/include/llvm-libc-types/EFI_BOOT_SERVICES.h
A libc/include/llvm-libc-types/EFI_CAPSULE.h
A libc/include/llvm-libc-types/EFI_CONFIGURATION_TABLE.h
A libc/include/llvm-libc-types/EFI_DEVICE_PATH_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_EVENT.h
A libc/include/llvm-libc-types/EFI_GUID.h
A libc/include/llvm-libc-types/EFI_HANDLE.h
A libc/include/llvm-libc-types/EFI_INTERFACE_TYPE.h
A libc/include/llvm-libc-types/EFI_LOCATE_SEARCH_TYPE.h
A libc/include/llvm-libc-types/EFI_MEMORY_DESCRIPTOR.h
A libc/include/llvm-libc-types/EFI_MEMORY_TYPE.h
A libc/include/llvm-libc-types/EFI_OPEN_PROTOCOL_INFORMATION_ENTRY.h
A libc/include/llvm-libc-types/EFI_PHYSICAL_ADDRESS.h
A libc/include/llvm-libc-types/EFI_RUNTIME_SERVICES.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_INPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_STATUS.h
A libc/include/llvm-libc-types/EFI_SYSTEM_TABLE.h
A libc/include/llvm-libc-types/EFI_TABLE_HEADER.h
A libc/include/llvm-libc-types/EFI_TIME.h
A libc/include/llvm-libc-types/EFI_TIMER_DELAY.h
A libc/include/llvm-libc-types/EFI_TPL.h
A libc/include/llvm-libc-types/EFI_VIRTUAL_ADDRESS.h
Log Message:
-----------
[libc] Add UEFI headers (#127126)
Originated from #120687
This PR simply adds the necessary headers for UEFI which defines all the
necessary types. This PR unlocks the ability to work on other PR's for
UEFI support.
Commit: 029becebfd76e8ba05f6dd978eec1daba8c34505
https://github.com/llvm/llvm-project/commit/029becebfd76e8ba05f6dd978eec1daba8c34505
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
[clang][HIP] Make some math not not work with AMDGCN SPIR-V (#128360)
Do not hardcode `address_space(5)` (`private`) in the ROCDL interface,
as that breaks SPIRV generation (the latter uses 0). Add test. In the
long run we should stop using ROCDL inline.
Commit: c0bf4b2c5778056de0949aceba2cf9e26bed2f24
https://github.com/llvm/llvm-project/commit/c0bf4b2c5778056de0949aceba2cf9e26bed2f24
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Remove unneeded VPValue::getLiveInIRValue() const (NFC).
The accessor is not needed/used.
Commit: 1b25c0c4da968fe78921ce77736e5baef4db75e3
https://github.com/llvm/llvm-project/commit/1b25c0c4da968fe78921ce77736e5baef4db75e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
Log Message:
-----------
[RISCV] Improve assembler error message for Zcmp stack adjustment. (#129180)
Instead of referring the user to the spec, print the expected range.
Commit: 7c26356703f02eb72ab6a39d89cb507dceef5164
https://github.com/llvm/llvm-project/commit/7c26356703f02eb72ab6a39d89cb507dceef5164
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
A llvm/test/tools/llvm-objdump/ELF/verdef-invalid.test
M llvm/test/tools/llvm-objdump/ELF/verdef.test
M llvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-objdump] Rework .gnu.version_d dumping
and fix crash when vd_aux is invalid (#86611).
vd_version, vd_flags, vd_ndx, and vd_cnt in Elf{32,64}_Verdef are
16-bit. Change VerDef to use uint16_t instead.
vda_name specifies a NUL-terminated string. Update getVersionDefinitions
to remove some `.c_str()`.
Pull Request: https://github.com/llvm/llvm-project/pull/128434
Commit: bdace105387f24ada9744147e06e789503a74143
https://github.com/llvm/llvm-project/commit/bdace105387f24ada9744147e06e789503a74143
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Rename the result of MATMUL from `c` to `output` (#129274)
This renames the output of TOSA MatMul operator from `c` to `output`
to align to TOSA spec
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 926600a8051882a2895b98a635aaa41f13c7c4ff
https://github.com/llvm/llvm-project/commit/926600a8051882a2895b98a635aaa41f13c7c4ff
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
Revert "[clang][HIP] Make some math not not work with AMDGCN SPIR-V" (#129280)
Reverts llvm/llvm-project#128360 pending resolution of odd test break.
Commit: 992b451f0837b08961b4aa5dab5e90bc2443b482
https://github.com/llvm/llvm-project/commit/992b451f0837b08961b4aa5dab5e90bc2443b482
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
Log Message:
-----------
[Utils][UnifyLoopExits] Avoid costly updates if nothing changed (#129179)
If the ControlFlowHub did not perform any change to the control flow,
there is no need to repair SSA, update the loop structure, and verify a
bunch of things. This is not completely NFC though, repairSSA introduced
PHI nodes with a single entry that are now missing.
My code went from 400+ seconds to 1 second, since no loop required the
exits to be unified, but there were many "complex" loops.
Commit: 818bca820ffd3e30fbd3852da0436c24ff15f8a3
https://github.com/llvm/llvm-project/commit/818bca820ffd3e30fbd3852da0436c24ff15f8a3
Author: Valentyn Yukhymenko <valentin.yukhymenko at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang-tidy] [dataflow] Cache reference accessors for `bugprone-unchecked-optional-access` (#128437)
Fixes https://github.com/llvm/llvm-project/issues/126283
Extending https://github.com/llvm/llvm-project/pull/112605 to cache
const getters which return references.
Fixes false positives from const reference accessors to object
containing optional member
Commit: 7446601c6a9b71945fdc9d7434d8347789708858
https://github.com/llvm/llvm-project/commit/7446601c6a9b71945fdc9d7434d8347789708858
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix a potential overflow bug reported by #126334 (#129169)
`MeasureTokenLength` may return an unsigned 0 representing failure in
obtaining length of a token. The analysis now gives up on such cases.
Otherwise, there might be issues caused by unsigned integer "overflow".
Commit: f5749e7893eec74da75ff9e40282e35ccd3046b2
https://github.com/llvm/llvm-project/commit/f5749e7893eec74da75ff9e40282e35ccd3046b2
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Remove out_shape from transpose_conv2d (#129133)
Commit: af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
https://github.com/llvm/llvm-project/commit/af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for empty global ctor/dtor lists (#128969)
LLVM IR emitted in from C++ may contain `@llvm.global_ctors = appending
global [0 x { i32, ptr, ptr }] zeroinitializer`. Before this PR, if we
try to roundtrip code like this from the importer, we'll end up with
nothing in place.
Note that `llvm::appendToGlobalCtors` ignores empty lists and this PR
uses the same approach as `llvm-as`, which doesn't use the utilities
from `llvm/lib/Transforms/Utils/ModuleUtils.cpp` in order to build this
- it calls into creating a global variable from scratch.
Commit: a3ac1f2278dec155e0e0b4d06ec816ba325f6979
https://github.com/llvm/llvm-project/commit/a3ac1f2278dec155e0e0b4d06ec816ba325f6979
Author: John Harrison <harjohn at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
Log Message:
-----------
[lldb-dap] Adding server mode support to lldb-dap VSCode extension. (#128957)
This adds support for launching lldb-dap in server mode. The extension
will start lldb-dap in server mode on-demand and retain the server until
the VSCode window is closed (when the extension context is disposed).
While running in server mode, launch performance for binaries is greatly
improved by improving caching between debug sessions.
For example, on my local M1 Max laptop it takes ~5s to attach for the
first attach to an iOS Simulator process and ~0.5s to attach each time
after the first.
Commit: 9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
https://github.com/llvm/llvm-project/commit/9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Remove non-portable vsetvli instructions from llvm-mca test. NFC (#129134)
Not all fractional LMULs are required to be support for all SEWs. This
test previously printed a warning for these cases.
Commit: 80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
https://github.com/llvm/llvm-project/commit/80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A lld/test/wasm/rpath.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Add RUNTIME_PATH support to wasm-ld (#129050)
This finishes adding RPATH support for WebAssembly.
See my previous PR which added RPATH support to yaml2obj and obj2yaml:
https://github.com/llvm/llvm-project/pull/126080
See corresponding update to the WebAssembly/tool-conventions repo on
dynamic linking:
https://github.com/WebAssembly/tool-conventions/pull/246
Commit: fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
https://github.com/llvm/llvm-project/commit/fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[asan] Define mallopt and mallinfo for Fuchsia asan runtime (#129105)
Commit: dd3c4fbec9ce72cd741280aedbba7a643ff78654
https://github.com/llvm/llvm-project/commit/dd3c4fbec9ce72cd741280aedbba7a643ff78654
Author: Marco C. <46560192+Marcondiro at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy][doc] Contributing.rst update snippet and docs (#129209)
This reflects the add_new_check.py changes: isLanguageVersionSupported
is now overridden by default by the script
The changes were instroduced in
https://github.com/llvm/llvm-project/pull/100129
Thanks
Commit: c7529248cd439f001f60f4567a028fda0c72cc2c
https://github.com/llvm/llvm-project/commit/c7529248cd439f001f60f4567a028fda0c72cc2c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-bndl flag for debugging (#129132)
This patch adds a helper flag for bisection debugging. This flag
force-stops vectorization after this many bundles have been considered
for vectorization.
Using -sbvec-stop-bndl=0 will not vectorize the code at all.
Commit: b923f6cf8faca82b8df2a936d8ff36a6125aedcc
https://github.com/llvm/llvm-project/commit/b923f6cf8faca82b8df2a936d8ff36a6125aedcc
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
Log Message:
-----------
[mlir][tosa] Require PadOp's pad_const to be rank1 (#129156)
Update PadOp's pad_const input to be rank1.
Fix various lit tests for this change including some conv ops
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Signed-off-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
https://github.com/llvm/llvm-project/commit/c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
A llvm/test/tools/llvm-exegesis/RISCV/rvv/eligible-inst.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/self-aliasing.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vlmax-only.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vtype-rm-setup.test
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPasses.h
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPostprocessing.cpp
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[Exegesis][RISCV] Add initial RVV support (#128767)
This patch adds initial vector extension support to RISC-V's exegesis.
The strategy here is to enumerate all RVV _pseudo_ opcodes as their MC
opcode counterparts are kind of useless under this circumstance. We also
enumerate all possible VTYPE operands in each CodeTemplate
configuration. Various of MachineFunction Passes are used for post
processing the snippets, like inserting VSETVLI instructions.
See https://llvm.org/devmtg/2024-10/slides/techtalk/Hsu-RVV-Exegesis.pdf
for more technical details.
Commit: 9869f84f7ea3ac10b885931d4ed3dd064819684b
https://github.com/llvm/llvm-project/commit/9869f84f7ea3ac10b885931d4ed3dd064819684b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect analysis for UITOFP for signed operand
Commit: a1fdcfa1ea8acc7493e45e9350108bc566044597
https://github.com/llvm/llvm-project/commit/a1fdcfa1ea8acc7493e45e9350108bc566044597
Author: David Green <david.green at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/hadd-combine.ll
Log Message:
-----------
[AArch64] Protect against scalar types in isNVCastToHalfWidthElements.
Fixes #129227
Commit: 56cc9299b78042575422229edb4a7ba15999cbb5
https://github.com/llvm/llvm-project/commit/56cc9299b78042575422229edb4a7ba15999cbb5
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream func args alloca handling (#129167)
This change adds support for collecting function arguments and storing
them in alloca memory slots.
Commit: e1e20c07e48b135c9f9118797f25679132702aea
https://github.com/llvm/llvm-project/commit/e1e20c07e48b135c9f9118797f25679132702aea
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP]Fix bitwidth analysis for signed nodes, incoming into UITOFP nodes
If the signed node is the operand of UITOFP, the bitwidth analysis
should consider minimum value between incoming bitwidth and the bitwidth
of the UITOFP node.
Fixes #129244
Commit: 494f67282f93f4a5c995434a3530a7a76f3aa63c
https://github.com/llvm/llvm-project/commit/494f67282f93f4a5c995434a3530a7a76f3aa63c
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/ptr-access-chain-type.ll
Log Message:
-----------
[SPIR-V] Prevent type change of GEP results in type inference (#129250)
The following reproducer demonstrates the issue with invalid definition
of GEP results during type inference
```
define spir_kernel void @foo(i1 %fl, i64 %idx, ptr addrspace(1) %dest, ptr addrspace(3) %src) {
%p1 = getelementptr inbounds i8, ptr addrspace(1) %dest, i64 %idx
%res = tail call spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32 2, ptr addrspace(1) %p1, ptr addrspace(3) %src, i64 128, i64 1, target("spirv.Event") zeroinitializer)
ret void
}
declare dso_local spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32, ptr addrspace(1), ptr addrspace(3), i64, i64, target("spirv.Event"))
```
Here `OpGroupAsyncCopy` expects i32* arguments and type inference fails
to set a correct type of the GEP result `%p1`, because it is an argument
of `OpGroupAsyncCopy`.
This PR fixes the issue by preventing type change of GEP results in type
inference.
Commit: b8337bc5126d2728f84ce0e06bd019c486203b31
https://github.com/llvm/llvm-project/commit/b8337bc5126d2728f84ce0e06bd019c486203b31
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-size/radix.test
Log Message:
-----------
[llvm-size] Add test for invalid conversion spec on error (#128941)
Follow up to #128447.
Commit: d9edca4fe05245ace93f7f1577a2eb79ec6898b1
https://github.com/llvm/llvm-project/commit/d9edca4fe05245ace93f7f1577a2eb79ec6898b1
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
Log Message:
-----------
[CodeGen] Ensure relative vtables use llvm.type.checked.load.relative (#126785)
This intrinsic is used when whole program vtables is used in conjunction
with either CFI or virtual function elimination. The
`llvm.type.checked.load` is unconditionally used, but we need to use the
relative intrinsic for WPD and CFI to work correctly.
Commit: c13be8f0d554d8a7b5f2aa042a97a9174e198168
https://github.com/llvm/llvm-project/commit/c13be8f0d554d8a7b5f2aa042a97a9174e198168
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/addrspacecast-folding.ll
Log Message:
-----------
[NVPTX] Add some basic folds for ADDRSPACECAST (#129157)
Commit: 4485d91786e9f624cdb4c7579d0938809291e0f9
https://github.com/llvm/llvm-project/commit/4485d91786e9f624cdb4c7579d0938809291e0f9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg] Add vectorization to the e2e test for tensor.unpack (#123032)
Following on from #122927 + #123031 that added support for masked
vectorization of `tensor.insert_slice`, this PR extends the e2e test for
`tensor.unpack` to leverage the new functionality.
Commit: fda7373daf5790833101c504be1c749bbb0fceb8
https://github.com/llvm/llvm-project/commit/fda7373daf5790833101c504be1c749bbb0fceb8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/codecvt
Log Message:
-----------
[libc++] Guard <codecvt> contents on _LIBCPP_HAS_LOCALIZATION (#129112)
The codecvt class is defined in <locale> and the contents of the
<codecvt> header don't work when localization is disabled. Without this
guard, builds with localization disabled that happen to include
<codecvt> could be broken because they would try to include <__locale>,
which ends up trying to include the locale base API and eventually
platform headers like <xlocale.h> that may not exist.
Commit: f9b249705598b31d2313458207668eeae896e4c6
https://github.com/llvm/llvm-project/commit/f9b249705598b31d2313458207668eeae896e4c6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Use const for VPBasicBlock* in key in VPBB2IRBB (NFC).
This allows queries in places where only a const pointer to VPBasiBlocks
is available.
Commit: 88ae5bd13b1206871f6639b18f1fde03f2ca7adc
https://github.com/llvm/llvm-project/commit/88ae5bd13b1206871f6639b18f1fde03f2ca7adc
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
Log Message:
-----------
[PAC] Make ValueMapper handle ConstantPtrAuth values (#129088)
Fix assertion failure when building PAuth-hardened code with LTO. W/o assertions we end with invalid codegen.
Commit: 23efe734fc27544b473ad60ea6eecbd2ec66d20c
https://github.com/llvm/llvm-project/commit/23efe734fc27544b473ad60ea6eecbd2ec66d20c
Author: metkarpoonam <poonammetkar at microsoft.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/or.hlsl
R clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
Log Message:
-----------
[HLSL] Add "or" intrinsic (#128979)
Include HLSL or_intrinsic, add codegen in CGBuiltin, and the
corresponding tests in or.hlsl. Additionally, incorporate
logical-operator-errors to handle both 'and' and 'or' semantic
diagnostics.
Commit: 275baedfde9dcd344bc4f11f552b046a69a4bf3f
https://github.com/llvm/llvm-project/commit/275baedfde9dcd344bc4f11f552b046a69a4bf3f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
Log Message:
-----------
[LAA] Consider accessed addrspace when mapping underlying obj to access. (#129087)
In some cases, it is possible for the same underlying object to be
accessed via pointers to different address spaces. This could lead to
pointers from different address spaces ending up in the same dependency
set, which isn't allowed (and triggers an assertion).
Update the mapping from underlying object -> last access to also include
the accessing address space.
Fixes https://github.com/llvm/llvm-project/issues/124759.
PR: https://github.com/llvm/llvm-project/pull/129087
Commit: c363975da41dc331300e9c6e675b37e77fd9902d
https://github.com/llvm/llvm-project/commit/c363975da41dc331300e9c6e675b37e77fd9902d
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
Revert "[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)" (#129271)
The effect of this commit is too broad and may affect also those
variants of Linux systems on which the affected test cases are known to
pass.
An alternative version of this commit will be prepared afresh.
This reverts commit c93dc581d979eb20ded470d2c16e51b3e775f6e7.
Commit: 8c5cd773228a6c3fd1c274d32e20508ba5acee97
https://github.com/llvm/llvm-project/commit/8c5cd773228a6c3fd1c274d32e20508ba5acee97
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
Log Message:
-----------
[Exegesis][RISCV] Add missing linked components
LLVMExegesisRISCV should link against MC and TargetParser as well.
Commit: 5faa5f848a35de13196f2f516f51aa970da942b4
https://github.com/llvm/llvm-project/commit/5faa5f848a35de13196f2f516f51aa970da942b4
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix copy generation for missing memref definition depth check (#129187)
Fixes: https://github.com/llvm/llvm-project/issues/122210
Commit: a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
https://github.com/llvm/llvm-project/commit/a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll
Log Message:
-----------
[SLP]Fix the analysis of the user buildvector nodes for minbitwidth
If the user node is a buildvector/gather node and it has no internal
instructions state, need to check properly for this state and check the
type of the node itself, not its operands.
Fixes #129242
Commit: f909b2229ac16ae3898d8b158bee85c384173dfa
https://github.com/llvm/llvm-project/commit/f909b2229ac16ae3898d8b158bee85c384173dfa
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Provide locale conversions to tests through lit substitution (#105651)
There are 2 problems today that this PR resolves:
libcxx tests assume the thousands separator for fr_FR locale is x00A0 on
Windows. This currently fails when run on newer versions of Windows (it
seems to have been updated to the new correct value of 0x202F around
windows 11. The exact windows version where it changed doesn't seem to
be documented anywhere). Depending the OS version, you need different
values.
There are several ifdefs to determine the environment/platform-specific
locale conversion values and it leads to maintenance as things change
over time.
This PR includes the following changes:
- Provide the environment's locale conversion values through a
substitution. The test can opt in by placing the substitution value in a
define flag.
- Remove the platform ifdefs (the swapping of values between Windows,
Linux, Apple, AIX).
This is accomplished through a lit feature action that fetches the
environment's locale conversions (lconv) for members like
'thousands_sep' that we need to provide. This should ensure that we
don't lose the effectiveness of the test itself.
In addition, as a result of the above, this PR:
- Fixes a handful of locale tests which unexpectedly fail on newer
Windows versions.
- Resolves 3 XFAIL FIX-MEs.
Originally submitted in https://github.com/llvm/llvm-project/pull/86649.
Co-authored-by: Rodrigo Salazar <4rodrigosalazar at gmail.com>
Commit: ddbce2fd2380a4eafce9065ad991318f46a3292b
https://github.com/llvm/llvm-project/commit/ddbce2fd2380a4eafce9065ad991318f46a3292b
Author: jimingham <jingham at apple.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
Log Message:
-----------
Control the "step out through thunk" logic explicitly when pushing thread plans (#129301)
Jonas recently added a trampoline handling strategy for simple language
thunks that does: "step through language thunks stepping in one level
deep and stopping if you hit user code". That was actually pulled over
from the swift implementation. However, this strategy and the strategy
we have to "step out past language thunks" when stepping out come into
conflict if the thunk you are stepping through calls some other function
before dispatching to the intended method. When you step out of the
called function back into the thunk, should you keep stepping out past
the thunk or not?
In most cases, you want to step out past the thunk, but in this
particular case you don't.
This patch adds a way to inform the thread plan (or really it's
ShouldStopHere behavior) of which behavior it should have, and passes
the don't step through thunks to the step through plan it uses to step
through thunks.
I didn't add a test for this because I couldn't find a C++ thunk that
calls another function before getting to the target function. I asked
the clang folks here if they could think of a case where clang would do
this, and they couldn't. If anyone can think of such a construct, it
will be easy to write the step through test for it...
This does happen in swift, however, so when I cherry-pick this to the
swift fork I'll test it there.
Commit: d2cbd5fe6b6e280b71994c30da878751bc2a435a
https://github.com/llvm/llvm-project/commit/d2cbd5fe6b6e280b71994c30da878751bc2a435a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Change visibility of Region::add()/remove() (#129277)
The vectorizer's passes should not be allowed to manually add/remove
elements. This should only be done automatically by the callbacks.
Commit: 006534315972728390d82fc8381c9ab1bf6e6490
https://github.com/llvm/llvm-project/commit/006534315972728390d82fc8381c9ab1bf6e6490
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-array.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Improve device function byval parameter lowering (#129188)
PTX supports 2 methods of accessing device function parameters:
- "simple" case: If a parameters is only loaded, and all loads can
address the parameter via a constant offset, then the parameter may be
loaded via the ".param" address space. This case is not possible if the
parameters is stored to or has it's address taken. This method is
preferable when possible.
- "move param" case: For more complex cases the address of the param may
be placed in a register via a "mov" instruction. This mov also
implicitly moves the param to the ".local" address space and allows for
it to be written to. This essentially defers the responsibilty of the
byval copy to the PTX calling convention.
The handling of these cases in the NVPTX backend for byval pointers has
some major issues. We currently attempt to determine if a copy is
necessary in NVPTXLowerArgs and either explicitly make an additional
copy in the IR, or insert "addrspacecast" to move the param to the param
address space. Unfortunately the criteria for determining which case is
possible are not correct, leading to miscompilations
(https://godbolt.org/z/Gq1fP7a3G). Further, the criteria for the
"simple" case aren't enforceable in LLVM IR across other transformations
and instruction selection, making deciding between the 2 cases in
NVPTXLowerArgs brittle and buggy.
This patch aims to fix these issues and improve address space related
optimization. In NVPTXLowerArgs, we conservatively assume that all
parameters will use the "move param" case and the local address space.
Responsibility for switching to the "simple" case is given to a new
MachineIR pass, NVPTXForwardParams, which runs once it has become clear
whether or not this is possible. This ensures that the correct address
space is known for the "move param" case allowing for optimization,
while still using the "simple" case where ever possible.
Commit: 942fda2873fb0fff6c66b6f4d4bf13e87b782a6f
https://github.com/llvm/llvm-project/commit/942fda2873fb0fff6c66b6f4d4bf13e87b782a6f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
R bolt/include/bolt/Passes/ContinuityStats.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
M bolt/lib/Passes/Instrumentation.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/profile-quality-reporting.test
A bolt/test/avoid-wx-segment.c
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/vecintrin.h
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/HLSL/resource_binding_attr.hlsl
A clang/test/AST/ast-dump-atomic-options.hip
A clang/test/AST/cc-modifier.cpp
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
A clang/test/Analysis/new-user-defined.cpp
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
M clang/test/Analysis/region-store.cpp
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
A clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
M clang/test/CXX/drs/cwg29xx.cpp
A clang/test/ClangScanDeps/modules-debug-dir.c
A clang/test/CodeGen/AArch64/fp8-init-list.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/asm.c
A clang/test/CodeGen/attr-malloc.c
A clang/test/CodeGen/bounds-checking-debuginfo.c
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGen/partial-reinitialization2.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
M clang/test/CodeGenHLSL/builtins/abs.hlsl
A clang/test/CodeGenHLSL/builtins/or.hlsl
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/as_type.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
A clang/test/Driver/atomic-options.hip
M clang/test/Driver/hip-gz-options.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/module-fgen-reduced-bmi.cppm
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/Frontend/verify-mulptiple-prefixes.c
M clang/test/Frontend/verify.c
M clang/test/Frontend/verify3.c
M clang/test/Modules/Inputs/export_as_test.modulemap
M clang/test/Modules/diagnostics.modulemap
M clang/test/Modules/export_as_test.c
A clang/test/Modules/no-transitive-source-location-change-2.cppm
A clang/test/Modules/pr28744.cpp
A clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/metadirective_ast_print.c
A clang/test/OpenMP/metadirective_otherwise.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/thread_limit_nvptx.c
A clang/test/Parser/Inputs/cuda.h
A clang/test/Parser/atomic-options.hip
M clang/test/Sema/attr-args.c
M clang/test/Sema/warn-thread-safety-analysis.c
A clang/test/SemaCUDA/dtor.cu
M clang/test/SemaCXX/attr-print.cpp
A clang/test/SemaCXX/embed-init-list.cpp
M clang/test/SemaCXX/unique_object_duplication.h
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
R clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
M clang/test/SemaHLSL/cb_error.hlsl
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinTemplatesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/www/cxx_dr_status.html
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/module/cudadevice.f90
M flang/test/Driver/config-file.f90
M flang/test/Fir/Todo/coordinate_of_2.fir
M flang/test/Fir/Todo/coordinate_of_3.fir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-value-copy.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/field-index.fir
M flang/test/Fir/pdt.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
M flang/test/Lower/HLFIR/c_ptr-constant-init.f90
M flang/test/Lower/HLFIR/intrinsic-module-procedures.f90
M flang/test/Lower/HLFIR/type-info-components.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_f_pointer.f90
M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/erfc.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/math-amdgpu.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/call-by-value.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/forall/array-pointer.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/pre-fir-tree04.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/structure-constructors.f90
A flang/test/Semantics/Inputs/modfile72.f90
M flang/test/Semantics/OpenMP/loop-bind.f90
M flang/test/Semantics/abstract02.f90
M flang/test/Semantics/allocate11.f90
M flang/test/Semantics/array-constr-len.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/bind-c09.f90
A flang/test/Semantics/bug125774.f90
M flang/test/Semantics/call09.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/call27.f90
M flang/test/Semantics/change_team01.f90
M flang/test/Semantics/coarrays01.f90
A flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/coshape.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/definable01.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/doconcurrent08.f90
M flang/test/Semantics/form_team01.f90
M flang/test/Semantics/generic07.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/io11.f90
A flang/test/Semantics/modfile72.f90
M flang/test/Semantics/resolve07.f90
M flang/test/Semantics/resolve117.f90
M flang/test/Semantics/resolve34.f90
M flang/test/Semantics/resolve50.f90
M flang/test/Semantics/resolve55.f90
M flang/test/Semantics/resolve88.f90
M flang/test/Semantics/resolve94.f90
M flang/test/Semantics/this_image01.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
M flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/header_generation.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/headers/math/stdfix.rst
M libc/include/CMakeLists.txt
A libc/include/Uefi.h.def
A libc/include/Uefi.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/EFIAPI-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/EFI_ALLOCATE_TYPE.h
A libc/include/llvm-libc-types/EFI_BOOT_SERVICES.h
A libc/include/llvm-libc-types/EFI_CAPSULE.h
A libc/include/llvm-libc-types/EFI_CONFIGURATION_TABLE.h
A libc/include/llvm-libc-types/EFI_DEVICE_PATH_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_EVENT.h
A libc/include/llvm-libc-types/EFI_GUID.h
A libc/include/llvm-libc-types/EFI_HANDLE.h
A libc/include/llvm-libc-types/EFI_INTERFACE_TYPE.h
A libc/include/llvm-libc-types/EFI_LOCATE_SEARCH_TYPE.h
A libc/include/llvm-libc-types/EFI_MEMORY_DESCRIPTOR.h
A libc/include/llvm-libc-types/EFI_MEMORY_TYPE.h
A libc/include/llvm-libc-types/EFI_OPEN_PROTOCOL_INFORMATION_ENTRY.h
A libc/include/llvm-libc-types/EFI_PHYSICAL_ADDRESS.h
A libc/include/llvm-libc-types/EFI_RUNTIME_SERVICES.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_INPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_STATUS.h
A libc/include/llvm-libc-types/EFI_SYSTEM_TABLE.h
A libc/include/llvm-libc-types/EFI_TABLE_HEADER.h
A libc/include/llvm-libc-types/EFI_TIME.h
A libc/include/llvm-libc-types/EFI_TIMER_DELAY.h
A libc/include/llvm-libc-types/EFI_TPL.h
A libc/include/llvm-libc-types/EFI_VIRTUAL_ADDRESS.h
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/bitshk.cpp
A libc/src/stdfix/bitshk.h
A libc/src/stdfix/bitshr.cpp
A libc/src/stdfix/bitshr.h
A libc/src/stdfix/bitsk.cpp
A libc/src/stdfix/bitsk.h
A libc/src/stdfix/bitslk.cpp
A libc/src/stdfix/bitslk.h
A libc/src/stdfix/bitslr.cpp
A libc/src/stdfix/bitslr.h
A libc/src/stdfix/bitsr.cpp
A libc/src/stdfix/bitsr.h
A libc/src/stdfix/bitsuhk.cpp
A libc/src/stdfix/bitsuhk.h
A libc/src/stdfix/bitsuhr.cpp
A libc/src/stdfix/bitsuhr.h
A libc/src/stdfix/bitsuk.cpp
A libc/src/stdfix/bitsuk.h
A libc/src/stdfix/bitsulk.cpp
A libc/src/stdfix/bitsulk.h
A libc/src/stdfix/bitsulr.cpp
A libc/src/stdfix/bitsulr.h
A libc/src/stdfix/bitsur.cpp
A libc/src/stdfix/bitsur.h
A libc/src/stdfix/bitusk.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
A libc/src/stdlib/l64a.cpp
A libc/src/stdlib/l64a.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/math/smoke/sqrtf128_test.cpp
A libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/bitshk_test.cpp
A libc/test/src/stdfix/bitshr_test.cpp
A libc/test/src/stdfix/bitsk_test.cpp
A libc/test/src/stdfix/bitslk_test.cpp
A libc/test/src/stdfix/bitslr_test.cpp
A libc/test/src/stdfix/bitsr_test.cpp
A libc/test/src/stdfix/bitsuhk_test.cpp
A libc/test/src/stdfix/bitsuhr_test.cpp
A libc/test/src/stdfix/bitsuk_test.cpp
A libc/test/src/stdfix/bitsulk_test.cpp
A libc/test/src/stdfix/bitsulr_test.cpp
A libc/test/src/stdfix/bitsur_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/l64a_test.cpp
R libc/utils/hdrgen/enumeration.py
R libc/utils/hdrgen/function.py
R libc/utils/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/__init__.py
A libc/utils/hdrgen/hdrgen/enumeration.py
A libc/utils/hdrgen/hdrgen/function.py
A libc/utils/hdrgen/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/hdrgen/macro.py
A libc/utils/hdrgen/hdrgen/main.py
A libc/utils/hdrgen/hdrgen/object.py
A libc/utils/hdrgen/hdrgen/type.py
A libc/utils/hdrgen/hdrgen/yaml_functions_sorted.py
A libc/utils/hdrgen/hdrgen/yaml_to_classes.py
R libc/utils/hdrgen/header.py
R libc/utils/hdrgen/macro.py
M libc/utils/hdrgen/main.py
R libc/utils/hdrgen/object.py
R libc/utils/hdrgen/type.py
R libc/utils/hdrgen/yaml_functions_sorted.py
M libc/utils/hdrgen/yaml_to_classes.py
M libclc/CMakeLists.txt
M libclc/amdgcn/lib/SOURCES
R libclc/amdgcn/lib/math/ldexp.cl
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/sqrt.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_ldexp.h
A libclc/clc/include/clc/math/clc_ldexp.inc
A libclc/clc/include/clc/math/clc_rsqrt.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_ldexp.cl
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_ldexp.h
R libclc/generic/include/math/clc_sqrt.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_ldexp.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
M libclc/spirv/lib/SOURCES
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/traits.h
M libcxx/include/__config
M libcxx/include/__filesystem/path.h
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/__vector/comparison.h
M libcxx/include/bitset
M libcxx/include/codecvt
M libcxx/include/cwchar
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/regex
M libcxx/include/string
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/test/libcxx/xopen_source.gen.py
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/params.py
M lld/COFF/Writer.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
A lld/test/wasm/rpath.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SyntheticSections.cpp
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
M lldb/examples/python/fzf_history.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBProgress.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Telemetry.cpp
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M lldb/unittests/Host/PipeTest.cpp
M lldb/utils/lui/sourcewin.py
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DroppedVariableStats.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/argument-blocks.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
M llvm/test/CodeGen/AArch64/hadd-combine.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/split-vector-insert.ll
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sub-splat-sub.ll
M llvm/test/CodeGen/AArch64/sve-aliasing.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-min-max-pred.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pr92779.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-reassocadd.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-build-vector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-unaligned-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-combine-rshrnb.ll
M llvm/test/CodeGen/AArch64/sve2-rsh.ll
M llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
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A llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
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M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
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A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
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A llvm/test/CodeGen/AMDGPU/spillv16.mir
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M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
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A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
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A llvm/test/CodeGen/NVPTX/applypriority.ll
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A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
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M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
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M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
A llvm/test/CodeGen/PowerPC/v1024ls.ll
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M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
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A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-access-chain-type.ll
M llvm/test/CodeGen/SystemZ/cond-move-10.mir
A llvm/test/CodeGen/SystemZ/cond-move-11.mir
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M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
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M llvm/test/CodeGen/X86/inline-asm-assertion.ll
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M llvm/test/CodeGen/X86/llvm.cosh.ll
M llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
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A llvm/test/CodeGen/X86/stack-protector-phi.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-null-global.s
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/LTO/X86/coro.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
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M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
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A llvm/test/MC/RISCV/xrivosvisni-valid.s
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M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Other/print-inst-addrs.ll
A llvm/test/Other/print-inst-debug-locs.ll
A llvm/test/Other/print-mi-addrs.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
M llvm/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
M llvm/test/Transforms/FunctionAttrs/arg_returned.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/stats.ll
M llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
M llvm/test/Transforms/GVN/PRE/atomic.ll
M llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/nonintegral.ll
M llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
R llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
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M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
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M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
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A llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
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A llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
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M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
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M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
A llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
A llvm/test/Transforms/MergeFunc/linkonce.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
A llvm/test/Transforms/MergeFunc/metadata-call-arguments.ll
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-block-inline.ll
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-optin.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
A llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
A llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll
A llvm/test/Transforms/SandboxVectorizer/allow_files.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
A llvm/test/Transforms/SandboxVectorizer/stop_at.ll
A llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
A llvm/test/Transforms/Scalarizer/deinterleave2.ll
R llvm/test/Transforms/Scalarizer/sincos.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
A llvm/test/tools/llvm-exegesis/RISCV/rvv/eligible-inst.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/self-aliasing.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vlmax-only.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vtype-rm-setup.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
M llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
A llvm/test/tools/llvm-objdump/ELF/verdef-invalid.test
M llvm/test/tools/llvm-objdump/ELF/verdef.test
M llvm/test/tools/llvm-rc/windres-preproc.test
M llvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
M llvm/test/tools/llvm-size/radix.test
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPasses.h
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPostprocessing.cpp
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/SandboxIR/RegionTest.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
A llvm/unittests/Target/DirectX/RegisterCostTests.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Telemetry/TelemetryTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/DirectX/BUILD.gn
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.h
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/RemoveShapeConstraints.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
A mlir/test/Dialect/AMDGPU/amdgpu-resolve-strided-metadata.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Tensor/bufferize.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/Vector/vector-gather-lowering.mlir
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-rewrite-subbyte-ext-and-trunci.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Target/Cpp/control_flow.mlir
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
A mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/unittests/IR/ShapedTypeTest.cpp
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompt-general.cpp
M openmp/runtime/src/ompt-internal.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/src/ompt-specific.h
M openmp/runtime/test/ompt/callback.h
M runtimes/cmake/Modules/WarningFlags.cmake
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
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Compare: https://github.com/llvm/llvm-project/compare/51f2b7582b57...942fda2873fb
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