[all-commits] [llvm/llvm-project] b31175: [mlir][AMDGPU] Add int4 intrinsics, mixed-type fp8...

[Krzysztof Drewniak via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b31175a33a22b2ec793ddd14b61693f709e90ef7
      https://github.com/llvm/llvm-project/commit/b31175a33a22b2ec793ddd14b61693f709e90ef7
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2025-02-27 (Thu, 27 Feb 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
    M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
    M mlir/test/Target/LLVMIR/rocdl.mlir

  Log Message:
  -----------
  [mlir][AMDGPU] Add int4 intrinsics, mixed-type fp8 to handle gfx12 (#128963)

1. Extend the gfx12 FP8 support to allow mixed-type intrinsics (since
they've been added), creating limited mixed-type support that mirrors
MFMA
2. Extend the `amdgpu.wmma` intrinsic lowering to correctly handle
shorter vectors because gfx12 now has instructions that logically take a
4xi8, or, as far as LLVM's concerned, an i32. Similarly, there are 4xi4
inputs, which are an i16 (that must be zero-extended to i32).
3. Correctly handle the ambiguities in the int4 intrinsics on gfx12,
which can either be 16x16x16 or 16x16x32
4. Add tests showing all WMMAs being lowered the way gfx12 expects
(mirroring LLVM's tests)
5. Add a verifier to prevent emiting ilegal instructions on gfx12.



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