[all-commits] [llvm/llvm-project] 8635b8: [AMDGPU][True16][MC] true16 for v_alignbit_b32 (#1...

[Brox Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8635b8eb5178cbd3662fdcb9b4f0879aa633a002
      https://github.com/llvm/llvm-project/commit/8635b8eb5178cbd3662fdcb9b4f0879aa633a002
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-02-27 (Thu, 27 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
    M llvm/test/CodeGen/AMDGPU/bswap.ll
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][True16][MC] true16 for v_alignbit_b32 (#119409)

Support true16 format for v_alignbit_b32 in MC.

Since we are replacing `v_alignbit_b32` to
`v_alignbit_b32_t16/v_alignbit_b32_fake16` in Post-GFX11, have to update
the CodeGen pattern for `v_alignbit_b32_fake16` to get CodeGen test
passing. There is no pattern modified/created, but just replacing the
`v_alignbit_b32` with fake16 format.

Some of the true16 CodeGen test are impacted since `v_alignbit_b32`
selection are removed in Post-GFX11 while `v_alignbit_b32_t16` are not
yet supported. The CodeGen patch for `v_alignbit_b32_t16` will be done
in the following patch.



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