[all-commits] [llvm/llvm-project] 15e295: [MachineScheduler][AMDGPU] Allow scheduling of sin...

[Lucas Ramirez via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 15e295d30aa356a0ab1d83e477375cf3ef314947
      https://github.com/llvm/llvm-project/commit/15e295d30aa356a0ab1d83e477375cf3ef314947
  Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
  Date:   2025-02-27 (Thu, 27 Feb 2025)

  Changed paths:
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
    M llvm/test/CodeGen/ARM/misched-branch-targets.mir
    M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
    M llvm/test/CodeGen/X86/fake-use-scheduler.mir

  Log Message:
  -----------
  [MachineScheduler][AMDGPU] Allow scheduling of single-MI regions (#128739)

The MI scheduler skips regions containing a single MI during scheduling.
This can prevent targets that perform multi-stage scheduling and move
MIs between regions during some stages to reason correctly about the
entire IR, since some MIs will not be assigned to a region at the
beginning.

This makes the machine scheduler no longer skip single-MI regions. Only
a few unit tests are affected (mainly those which check for the
scheduler's debug output).



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