[all-commits] [llvm/llvm-project] d85685: [AArch64][NPM] Chalk out the CodeGenPassBuilder fo...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Feb 25 15:09:25 PST 2025
Branch: refs/heads/users/vitalybuka/spr/main.ltopipelinescoro-de-duplicate-coro-passes
Home: https://github.com/llvm/llvm-project
Commit: d85685eb863641dce62a9f858ebcd6bab56c605b
https://github.com/llvm/llvm-project/commit/d85685eb863641dce62a9f858ebcd6bab56c605b
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128471)
This allows for testing AArch64 passes with the new pass manager.
Commit: b9cf684d7c39a9c36c562b67e6e53882f645fe74
https://github.com/llvm/llvm-project/commit/b9cf684d7c39a9c36c562b67e6e53882f645fe74
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
Log Message:
-----------
[mlir][scf] Fix typo of square brackets(NFC) (#128455)
Commit: 83ddb43cad3ee32b0df81aa641c4c0275334729d
https://github.com/llvm/llvm-project/commit/83ddb43cad3ee32b0df81aa641c4c0275334729d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Revert "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128471)"
This reverts commit d85685eb863641dce62a9f858ebcd6bab56c605b.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/128471
Commit: ecc7e6ce4cd57a614985e95daf7027918cb8723e
https://github.com/llvm/llvm-project/commit/ecc7e6ce4cd57a614985e95daf7027918cb8723e
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Handle instantiating captures in addInstantiatedCapturesToScope() (#128478)
addInstantiatedCapturesToScope() might be called when transforming a
lambda body. In this situation, it would look into all the lambda's
parents and figure out all the instantiated captures. However, the
instantiated captures are not visible from lambda's class decl until the
lambda is rebuilt (i.e. after the lambda body transform). So this patch
corrects that by also examining the LambdaScopeInfo, serving as a
workaround for not having deferred lambda body instantiation in Clang
20, to avoid regressing some real-world use cases.
Fixes #128175
Commit: 6e3b47597fabb8df8cf822331461cecbac907c6f
https://github.com/llvm/llvm-project/commit/6e3b47597fabb8df8cf822331461cecbac907c6f
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
Log Message:
-----------
Reland "[mlir] Silence -Wdangling-assignment-gsl in OperationSupport.h"
This warning is causing lots of build spam when I use a recent Clang as
my host compiler. It's a potential false positive, so silence it until
https://github.com/llvm/llvm-project/issues/126600 is resolved.
Reland of https://github.com/llvm/llvm-project/pull/126140 with fix for
non-Clang compilers (the preprocessor doesn't short-circuit conditionals
the way I thought it did).
Commit: f58fde585775a7c25dc673076db914f8d1866081
https://github.com/llvm/llvm-project/commit/f58fde585775a7c25dc673076db914f8d1866081
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
Log Message:
-----------
Exclude RedirectingFileSystem with null OverlayFileDir in VFSUsage (#128267)
This is to avoid assertion failures like the following when
RedirectingFileSystem's are created and used outside
createVFSFromOverlayFiles.
```
Assertion failed: VFSUsage.size() == getHeaderSearchOpts().VFSOverlayFiles.size() && "A different number of RedirectingFileSystem's were present than " "-ivfsoverlay options passed to Clang!", file S:\SourceCache\llvm-project\clang\lib\Lex\HeaderSearch.cpp, line 162
```
Commit: e67cd152cf4d0344efba19985b005dae15e6bde0
https://github.com/llvm/llvm-project/commit/e67cd152cf4d0344efba19985b005dae15e6bde0
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/tools/llvm-size/llvm-size.cpp
Log Message:
-----------
[llvm-size] Initialize Radix to correct value (#128447)
Without the patch, invalid --radix, makes Radix to be 0, and result
in invalid format specifier ` %#7 `, instead of e.g ` %#7x `.
Commit: 9b298a1d3d2280c2b09f4a905d079bab008b5290
https://github.com/llvm/llvm-project/commit/9b298a1d3d2280c2b09f4a905d079bab008b5290
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
Log Message:
-----------
[WebAssembly] Use Register instead of unsigned. NFC
Commit: d7903c9f28bdfd17fcc2d5be1096c504b6a94ec1
https://github.com/llvm/llvm-project/commit/d7903c9f28bdfd17fcc2d5be1096c504b6a94ec1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
Log Message:
-----------
AMDGPU: Add more codegen tests for readfirstlane
Commit: f5d80c335d79d0b35741bfc762f8157a24f5491a
https://github.com/llvm/llvm-project/commit/f5d80c335d79d0b35741bfc762f8157a24f5491a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
Log Message:
-----------
[lldb] Avoid Function::GetAddressRange in SymbolFileCTF (#128517)
SymbolFileCTF never creates discontinuous functions, so this is
technically NFC, but it takes us one step closer to removing the
deprecated API.
Commit: d3dae841c05c9447b665a8334aa3cfeac904d749
https://github.com/llvm/llvm-project/commit/d3dae841c05c9447b665a8334aa3cfeac904d749
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
Log Message:
-----------
[NVPTX] Switch to imm offset variants for LDG and LDU (#128270)
Commit: 3872503d6eb3eed7f2b2db13daad27307369f0be
https://github.com/llvm/llvm-project/commit/3872503d6eb3eed7f2b2db13daad27307369f0be
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
Log Message:
-----------
[lldb] Don't hand out UnwindPlan::Row shared_ptrs (#128181)
The whole unwind plan is already stored in a shared pointer, and there's
no need to persist Rows individually. If there's ever a need to do that,
there are at least two options:
- copy the row (they're not that big, and they're being copied left and
right during construction already)
- use the shared_ptr subobject constructor to create a shared_ptr which
points to a Row but holds the entire unwind plan alive
This also changes all of the getter functions to return const Row
pointers, which is important for safety because all of these objects are
cached and potentially accessed from multiple threads. (Technically one
could hand out `shared_ptr<const Row>`s, but we don't have a habit of
doing that.)
As a next step, I'd like to remove the internal UnwindPlan usages of the
shared pointer, but I'm doing this separately to gauge feedback, and
also because the patch got rather big.
Commit: 6c17380ea896e9966645958ad3d76441cc25430c
https://github.com/llvm/llvm-project/commit/6c17380ea896e9966645958ad3d76441cc25430c
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Target/StackFrame.cpp
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
Log Message:
-----------
[lldb] Fix TestDiagnoseDereferenceFunctionReturn on linux (#128512)
The test was failing because it was looking up the immediate value from
the call instruction as a load address, whereas in fact it was a file
address. This worked on darwin because (with ASLR disabled) the two
addresses are generally the same. On linux, this depends on the build
mode, but with the default (PIE) build type, the two are never the same.
The test also fails on a mac with ASLR enabled.
This path fixes the code to look up the value as a file address.
Commit: 3083aea4441493b11b72218207564bf54516bf3e
https://github.com/llvm/llvm-project/commit/3083aea4441493b11b72218207564bf54516bf3e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#128633)
Commit: 5088e1b435fd06de2bfccd3894dcc2f2c326630f
https://github.com/llvm/llvm-project/commit/5088e1b435fd06de2bfccd3894dcc2f2c326630f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/source/Target/ThreadPlanStepRange.cpp
Log Message:
-----------
[lldb] Avoid Function::GetAddressRange in ThreadPlanStepRange::InSymbol (#128515)
The existing implementation would probably produce false positives for
discontinuous functions. I haven't tried reproducing it because setting
up discontinuous functions (and executing them, in particular) is pretty
complex and there's nothing particularly interesting happening here.
Commit: d254fa877f419e61e54709f0a6f2e891da893a60
https://github.com/llvm/llvm-project/commit/d254fa877f419e61e54709f0a6f2e891da893a60
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Make `FLANG_RT_INSTALL_RESOURCE_PATH` configurable (#128561)
Make it possible to change the path used to install flang-rt library.
This is particularly necessary for standalone builds, where the CMake
script currently hardwires the default clang install path, and therefore
is incorrect for distributions that override it. However, for
consistency I have made it configurable unconditionally, preserving the
current defaults.
Commit: 5114b9b386ca69058d19d9c3dac53b4b429c71a6
https://github.com/llvm/llvm-project/commit/5114b9b386ca69058d19d9c3dac53b4b429c71a6
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
R llvm/include/llvm/ExecutionEngine/Orc/GetTapiInterface.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
R llvm/lib/ExecutionEngine/Orc/GetTapiInterface.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC][llvm-jitlink] Extend weak-linking emulation to real dylibs.
Commit 253e11695ba added support for emulating weak-linking against dylibs
that are (under the emulation) absent at runtime. This commit extends emulated
weak linking support to allow a real dylib to supply the interface (i.e.
-weak-lx / -weak_library can be pointed at a dylib, in which case they should
be read as "weak-link against this dylib, behavining as if it weren't actually
present at runtime").
Commit: ea4e19df53abb21a1f1df725e3728fabec902978
https://github.com/llvm/llvm-project/commit/ea4e19df53abb21a1f1df725e3728fabec902978
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/PowerPC/llvm.sincos.ll
Log Message:
-----------
[SDAG] Add missing ppc_fp128 ExpandFloatRes for sincos[pi] (#128514)
Commit: 0087523e1a273b738b94a15547dbf308d0470283
https://github.com/llvm/llvm-project/commit/0087523e1a273b738b94a15547dbf308d0470283
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR][Affine] Add missing check on fusion compute tolerance on a path (#128454)
When profitability analysis can't be performed, we should still be
respecting the compute tolerance specified. Refactor to pull the
additional computation factor computation and check.
Fixes: https://github.com/llvm/llvm-project/issues/54541
Commit: 49f60b4e098493f5128ba4276b3fbb985b0c61c8
https://github.com/llvm/llvm-project/commit/49f60b4e098493f5128ba4276b3fbb985b0c61c8
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
Log Message:
-----------
[AMDGPU][NFC] Added test for live-in CSR SGPR used partially giving MachineVerifier error (#126696)
Commit: 674dbcfe8f400db65f0d066ea638e977e8b82781
https://github.com/llvm/llvm-project/commit/674dbcfe8f400db65f0d066ea638e977e8b82781
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.comp/equal.pass.cpp
Log Message:
-----------
[libc++][NFC] Use TEST_STD_VER instead of _LIBCPP_STD_VER in re.tokiter.comp/equal.pass.cpp
Commit: d7211693af27760c939b6610f0c79a3ecd2790d2
https://github.com/llvm/llvm-project/commit/d7211693af27760c939b6610f0c79a3ecd2790d2
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port e5ce0304335dc1cae6856c880d1d4e14dcf8265d
Commit: 60cc3af0d93ecb8bfc9d6bebc6cbc395df3bb4b6
https://github.com/llvm/llvm-project/commit/60cc3af0d93ecb8bfc9d6bebc6cbc395df3bb4b6
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][xegpu] Fix bazel build failure (#128595)
Removes unnecessary headers creating wrong dependencies.
Commit: 275eeb56ddc4c236219f7df9618e7b03ff12e9fb
https://github.com/llvm/llvm-project/commit/275eeb56ddc4c236219f7df9618e7b03ff12e9fb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 5114b9b386ca
Commit: 87dc245f3e65ee926081e575ffb2e57a32a91ba3
https://github.com/llvm/llvm-project/commit/87dc245f3e65ee926081e575ffb2e57a32a91ba3
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
Log Message:
-----------
[analyzer] Partial revert of #127017 (#128642)
This assertion was hit, as reported by a user.
https://github.com/llvm/llvm-project/issues/128427#issuecomment-2677724438
Ideally, we would reduce and add a regression test for this, but I don't
have the bandwidth for it.
See the summary of the issue #128427 for the reproducer.
Commit: a4656bbc595839b57e6f021aa2a728b4cf321d54
https://github.com/llvm/llvm-project/commit/a4656bbc595839b57e6f021aa2a728b4cf321d54
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Allow conv ops zero point to be variable (#128533)
The TOSA specification allows the zero point of conv ops to be variable
when the dynamic extension is being used, but information about which
extensions are in use is only known when the validation pass is run. A
variable zero point should be allowed in the conv ops verifiers.
In terms of testing, there didn't seem to be an existing set of tests
for the verifiers to add this check to, so the opportunity has been
taken to run the verifiers on the tests in `ops.mlir`. Since the conv2d
test there had variable zero points, this change in functionality is
being tested.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Georgios Pinitas <georgios.pinitas at arm.com>
Commit: b36a18df96f9b8f206ec4b7f1036bdd4701c117e
https://github.com/llvm/llvm-project/commit/b36a18df96f9b8f206ec4b7f1036bdd4701c117e
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/CodeGen/AArch64/build-attributes-all.ll
A llvm/test/CodeGen/AArch64/build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-aeabi-known.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-bti.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-attrs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-headers.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-gcs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-mixed.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-none.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-numerical-tags.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-out-of-order.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-pac.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi-err.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi.s
Log Message:
-----------
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
- Removed assertion for duplicate values as adding them is valid.
- Fix parsing: reject strings for unknown tags, allow any value for
Tag_PAuth_Platform and Tag_PAuth_Schema.
- Print tags by using numbers with comments to reduce compiler-assembler
dependencies.
- Parsing error messages now only point to the symbol (^) instead of
printing it.
Commit: 547a8bc2365d9f1dc7bce52580a3ab64d69c80ed
https://github.com/llvm/llvm-project/commit/547a8bc2365d9f1dc7bce52580a3ab64d69c80ed
Author: Alcaro <floating at muncher.se>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Headers/cpuid.h
M clang/test/Headers/cpuid.c
Log Message:
-----------
[clang][x86] Support -masm=intel in cpuid.h (#127331)
Fixes #127271
Testing mostly done in Compiler Explorer https://godbolt.org/z/q1h3ohxr7
Commit: 85cf95876c4b21ee6ecd0253a2c9de0e90c4a521
https://github.com/llvm/llvm-project/commit/85cf95876c4b21ee6ecd0253a2c9de0e90c4a521
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64] Improve codegen for some fixed-width partial reductions (#126529)
This patch teaches optimizeExtendOrTruncateConversion to bail out
if the user of a zero-extend is a partial reduction intrinsic
that we know will get lowered efficiently to a udot instruction.
Commit: 2a0946bc0dffca89d16cd9d5208ec9416ed8100e
https://github.com/llvm/llvm-project/commit/2a0946bc0dffca89d16cd9d5208ec9416ed8100e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Match coding standards (#128683)
As per LLVM coding standards
"Variable names should be nouns (as they represent state).
The name should be camel case, and start with an upper
case letter (e.g. Leader or Boats)."
Commit: 7ff87af533a7acf47134eabe656702180d8ad171
https://github.com/llvm/llvm-project/commit/7ff87af533a7acf47134eabe656702180d8ad171
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Host lowering of standalone distribute (#127817)
This patch adds MLIR to LLVM IR translation support for standalone
`omp.distribute` operations, as well as `distribute simd` through
ignoring SIMD information (similarly to `do/for simd`).
Co-authored-by: Dominik Adamski <dominik.adamski at amd.com>
Commit: 88163ca79cab1a9a2be1cfa71000f43fd642d91e
https://github.com/llvm/llvm-project/commit/88163ca79cab1a9a2be1cfa71000f43fd642d91e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMPIRBuilder] Add support for distribute-parallel-for/do constructs (#127818)
This patch adds codegen for `kmpc_dist_for_static_init` runtime calls,
used to support worksharing a single loop across teams and threads. This
can be used to implement `distribute parallel for/do` support.
Commit: 9fc2f786934599c51427cf6f581450ee951ece4a
https://github.com/llvm/llvm-project/commit/9fc2f786934599c51427cf6f581450ee951ece4a
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
A llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
A llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
Log Message:
-----------
[X86][NFC] Added/Updated Trigonometric functions testcases (#127094)
- Added sin/cos testcases.
- Added i686 checks for all testcases.
- Moved fp16 and fp128 cases into separate files.
- Dropped tests for ppc_fp128 type.
- Added global-isel runs as precommit testing for #126931
Commit: 446899e7bed5555c2bacfe0d09c4f4f00c41bc0f
https://github.com/llvm/llvm-project/commit/446899e7bed5555c2bacfe0d09c4f4f00c41bc0f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Host lowering of distribute-parallel-do/for (#127819)
This patch adds support for translating composite `omp.parallel` +
`omp.distribute` + `omp.wsloop` loops to LLVM IR on the host. This is
done by passing an updated `WorksharingLoopType` to the call to
`applyWorkshareLoop` associated to the lowering of the `omp.wsloop`
operation, so that `__kmpc_dist_for_static_init` is called at runtime in
place of `__kmpc_for_static_init`.
Existing translation rules take care of creating a parallel region to
hold the workshared and workdistributed loop.
Commit: 48397fe41ee67557e00f13f35d60c3c9b8485e89
https://github.com/llvm/llvm-project/commit/48397fe41ee67557e00f13f35d60c3c9b8485e89
Author: David Green <david.green at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add cost model for REV shuffles. (#128498)
These patterns represent rev instructions, which reverse inside a
portion of the full vector. See llvm/test/CodeGen/AArch64/arm64-rev.ll
for codegen tests.
Commit: 56975b4ecd188a77b4f9420ff8aa5d5a72e4e076
https://github.com/llvm/llvm-project/commit/56975b4ecd188a77b4f9420ff8aa5d5a72e4e076
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[OpenMPIRBuilder] Split calculation of canonical loop trip count, NFC (#127820)
This patch splits off the calculation of canonical loop trip counts from
the creation of canonical loops. This makes it possible to reuse this
logic to, for instance, populate the `__tgt_target_kernel` runtime call
for SPMD kernels.
This feature is used to simplify one of the existing OpenMPIRBuilder
tests.
Commit: 29e14958090cb01150bda068f721a09d4bb1c36b
https://github.com/llvm/llvm-project/commit/29e14958090cb01150bda068f721a09d4bb1c36b
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Support target SPMD (#127821)
This patch implements MLIR to LLVM IR translation of host-evaluated loop
bounds, completing initial support for `target teams distribute parallel
do [simd]` and `target teams distribute [simd]`.
Commit: 25c19eb1178a26b09e8ee58c825d4ed0260b70da
https://github.com/llvm/llvm-project/commit/25c19eb1178a26b09e8ee58c825d4ed0260b70da
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/host-eval.f90
Log Message:
-----------
[Flang][OpenMP] Allow host evaluation of loop bounds for distribute (#127822)
This patch adds `target teams distribute [simd]` and equivalent
construct nests to the list of cases where loop bounds can be evaluated
in the host, as they represent kernels for which the trip count must
also be evaluated in advance to the kernel call.
Commit: dfa3af9255fd542fed5149021289404e92a8a6f3
https://github.com/llvm/llvm-project/commit/dfa3af9255fd542fed5149021289404e92a8a6f3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/libcxx/pointer-subscript.cpp
Log Message:
-----------
[clang][bytecode] Expand subscript base if of pointer type (#128511)
This is similar to what we do in the AddOffset instruction when adding
an offset to a pointer.
Commit: 820aa438a6ec5e028d96bf6b345f41c585f91572
https://github.com/llvm/llvm-project/commit/820aa438a6ec5e028d96bf6b345f41c585f91572
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
Log Message:
-----------
[mlir][vector] Update tests for xfer permutation lowering (4/N) (#127624)
* Document the remaining test cases, add a note that these are
exercising `TransferOpReduceRank` (addresses an existing TODO).
* Add missing cases (for fixed-width and scalable vectors).
* Remove scalable vectors from the negative test (the masked case) - this test
will also fail with fixed-width vectors. For consistency, lets make all
negative test use fixed-width vectors.
Commit: f95ad44068e48c4d8c66f7d65147349b7dd16efa
https://github.com/llvm/llvm-project/commit/f95ad44068e48c4d8c66f7d65147349b7dd16efa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
Log Message:
-----------
AMDGPU: Mark v_mov_b64_pseudo as a VOP1 instruction (#128677)
This is mostly true, and it tricks the rematerialization
code into handling this without special casing it.
Commit: b57e63b07a7b70ebfb5f794648e2102b7c1bd3a3
https://github.com/llvm/llvm-project/commit/b57e63b07a7b70ebfb5f794648e2102b7c1bd3a3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libclc/amdgcn/lib/workitem/get_global_size.cl
Log Message:
-----------
libclc: Stop using asm declarations for r600 on amdgcn for get_global_size (#128692)
Comparing the case where each dimension is used alone, the only codegen
difference is a missed addressing mode fold for the constant offset in the old
version due to an ancient bug.
Commit: 6aeec5eabfe11f017dd4e427ff5e9a4695f2a24a
https://github.com/llvm/llvm-project/commit/6aeec5eabfe11f017dd4e427ff5e9a4695f2a24a
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
Log Message:
-----------
[ConstraintElim] Test for #128588
Commit: f8948d3c4754e06cdd3e2903bfbfe74438f6b463
https://github.com/llvm/llvm-project/commit/f8948d3c4754e06cdd3e2903bfbfe74438f6b463
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_log.h
A libclc/clc/include/clc/math/clc_log10.h
A libclc/clc/include/clc/math/clc_log2.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_log.cl
A libclc/clc/lib/generic/math/clc_log10.cl
A libclc/clc/lib/generic/math/clc_log2.cl
A libclc/clc/lib/generic/math/clc_log_base.h
M libclc/generic/include/clc/math/log10.h
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log2.cl
R libclc/generic/lib/math/log_base.h
Log Message:
-----------
[libclc] Move log/log2/log10 to CLC library (#128540)
This commit also enables fp16 log, which was previously missing.
Other than that, no changes to codegen for AMDGPU/Nvidia targets.
Note that for simplicity this commit doesn't try to refactor or optimize
the implementations. Notably, each log is only implementated for scalar
types; vector types are scalarized. It doesn't look too difficult to
make the implementations suitable for vector codegen, so I'll try that
in a future commit.
There's also an unused implementation of log in clc_log_base.h, whereas
the implementation currently used by libclc targets re-uses log2 with an
additional multiplication. That should also be cleaned up as on first
inspection it looks a more optimal implementation, though it would have
to be checked against the OpenCL CTS for good measure.
Commit: dff2ca424c20c672b418ec86ac3a120fad4fb364
https://github.com/llvm/llvm-project/commit/dff2ca424c20c672b418ec86ac3a120fad4fb364
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Add special case for anonymous unions (#128681)
This fixes the expected output to match the one of the current
interpreter.
Commit: 70de57edcad0055d962e9fe899b347b16a6efaa3
https://github.com/llvm/llvm-project/commit/70de57edcad0055d962e9fe899b347b16a6efaa3
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[clang] Add alternative email for steakhal (#128558)
Both steakhal and balazs-benics-sonarsource accounts are mine. See
#125859
Commit: 0f9720a61b1deea225f172851210550f8a60d49f
https://github.com/llvm/llvm-project/commit/0f9720a61b1deea225f172851210550f8a60d49f
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Target/BUILD.bazel
Log Message:
-----------
[bazel] port 29e14958090cb01150bda068f721a09d4bb1c36b
Commit: 11766a40972f5cc853e296231e5d90ca3c886cc1
https://github.com/llvm/llvm-project/commit/11766a40972f5cc853e296231e5d90ca3c886cc1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/include/future
A libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
[libc++] Don't try to wait on a thread that hasn't started in std::async (#125433)
If the creation of a thread fails, this causes an idle loop that will
never end because the thread wasn't started in the first place.
Fixes #125428
Commit: a93cda47ad97af7c69563b3b02dfd9c9a63faefa
https://github.com/llvm/llvm-project/commit/a93cda47ad97af7c69563b3b02dfd9c9a63faefa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShuffleChain - pull out repeated getOpcode() calls. NFC.
Commit: e47cd4694851dd71c877b72fa59ec169260cbd32
https://github.com/llvm/llvm-project/commit/e47cd4694851dd71c877b72fa59ec169260cbd32
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShuffleChain - pass IsMaskedShuffle flag as argument from combineX86ShufflesRecursively instead of computing it internally. NFC.
Prep work toward better handling of shuffle combining across different vector widths.
Commit: 4b29c285645eb0ab8c795044c64072eabd3c041e
https://github.com/llvm/llvm-project/commit/4b29c285645eb0ab8c795044c64072eabd3c041e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
Log Message:
-----------
[ConstraintElim] Preserve analyses when IR is unchanged. (#128588)
Commit: 089f988f46d7350827c38c1718d47caa56c5a206
https://github.com/llvm/llvm-project/commit/089f988f46d7350827c38c1718d47caa56c5a206
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc] Fix defaulting the full build
Summary:
This was missing the architecture macros as they were defined just
below.
Commit: d21b2e619a5e23fd2f4cb05f5929990ee517d164
https://github.com/llvm/llvm-project/commit/d21b2e619a5e23fd2f4cb05f5929990ee517d164
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[SPIR-V] Fix generation of gMIR vs. SPIR-V code from utility methods (#128159)
The SPIR-V Backend uses the same set of utility functions, mostly though
not entirely from SPIRVGlobalRegistry, to generate gMIR and SPIR-V
opcodes, depending on the current stage of translation. This is
controlled by an explicit EmitIR flag rather than the current
translation pass, and there are legacy pieces of code where the EmitIR
flag is declared so that it has a default true value, allowing using
utility functions without explicitly declaring their intent to work
either in gMIR or in SPIR-V part of the lowering process.
While it may be ok to leave this default EmitIR flag as is in generation
of scalar integer/float types, as we don't expect to see any dependent
opcodes derived from such OpTypeXXX instructions, using of EmitIR by
default in aggregation types is a source of hidden logical flaws and
actual issues.
This PR provides a partial fix to the problem by removing default status
of EmitIR, requiring a user call site to explicitly announce its intent
to generate gMIR or SPIR-V code, fixes several cases of misuse of
EmitIR, and, the most important, fixes a nasty logical error that breaks
passing of actually asked EmitIR value by the default value in the
middle of the chain of calls, in the `findSPIRVType` call. The latter
error was a source of issues in the post-instruction selection pass that
has been getting gMIR code where SPIR-V was explicitly requested due to
overloaded with default parameters internal API in SPIRVGlobalRegistry
(most notably, `findSPIRVType`).
Commit: 44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
https://github.com/llvm/llvm-project/commit/44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
Log Message:
-----------
[X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618)
f80 is not a valid IEEE floating-point type.
Closes https://github.com/llvm/llvm-project/issues/128528.
Commit: d23da7d6300ec6732b462d475c331f289170cb83
https://github.com/llvm/llvm-project/commit/d23da7d6300ec6732b462d475c331f289170cb83
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/load.ll
Log Message:
-----------
[InstCombine] Increase recursion limit to 3 in `simplifyNonNullOperand` (#128695)
Address review comment
https://github.com/llvm/llvm-project/pull/128466#discussion_r1967228790
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=72781f58efddecee19feb07fec4e6104ef4c4812&to=3853aee61626b0eda06671b4cbbc4cdd1344440c&stat=instructions:u
Commit: 522b05afb636229acd1f2a50eff14a29c79b4a1a
https://github.com/llvm/llvm-project/commit/522b05afb636229acd1f2a50eff14a29c79b4a1a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Construct immutable VPIRBBs for exit blocks at construction(NFC) (#128374)
Constract immutable VPIRBasicBlocks for all exit blocks up front and
keep a list of them. Same as the scalar header, they are leaf nodes of
the VPlan and won't change. Some exit blocks may be unreachable, e.g. if
the scalar epilogue always executes or depending on optimizations.
This simplifies both the way we retrieve the exit blocks as well as
hooking up the exit blocks.
PR: https://github.com/llvm/llvm-project/pull/128374
Commit: 1e0e4169dd00bf8a37cef8d74d0add7861982c4e
https://github.com/llvm/llvm-project/commit/1e0e4169dd00bf8a37cef8d74d0add7861982c4e
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R libclc/generic/include/math/binary_intrin.inc
R libclc/generic/include/math/ternary_intrin.inc
Log Message:
-----------
[libclc][NFC] Remove unused intrinsics helpers (#128708)
We want to move away from using asm declarations to define builtins.
Commit: af68927a831c45b92248b1f6fc24d445be42dd91
https://github.com/llvm/llvm-project/commit/af68927a831c45b92248b1f6fc24d445be42dd91
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/IR/Instruction.cpp
A llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
Log Message:
-----------
Do not treat llvm.fake.use as a debug instruction (#128684)
The llvm.fake.use intrinsic is used to prevent certain values from being
optimized out for the benefit of debug info; it is not, however, a debug
or pseudo instruction itself and necessarily must not be treated as one,
since its purpose is to act like a normal instruction. In the original
commit that added them, the IR intrinsic however was treated as one in
`getPrevNonDebugInstruction` (but _not_ in `getNextNonDebugInstruction`,
or in the MIR equivalents). This patch correctly treats it as a
non-debug instruction.
Commit: 352c48f278c89ac4c65642d3fadf52032e7fe734
https://github.com/llvm/llvm-project/commit/352c48f278c89ac4c65642d3fadf52032e7fe734
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/ARM/select-imm.ll
M llvm/test/CodeGen/MSP430/shift-amount-threshold.ll
M llvm/test/CodeGen/Thumb/branchless-cmp.ll
Log Message:
-----------
[SelectionDAG] Utilizing target hook convertSelectOfConstantsToMath for SelectwithConstant (#127599)
The Target hook convertSelectOfConstantsToMath() needs to be used within
SimplifySelectCC helper combine function in SelectionDAG Isel, where
generic select folding with constants is happening into simple maths op
using the condition as it is.
It necessarily fixes #121145.
Commit: 4f7d8948d9d9a0d366ac737247abab2246834e05
https://github.com/llvm/llvm-project/commit/4f7d8948d9d9a0d366ac737247abab2246834e05
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
A llvm/test/CodeGen/Hexagon/bittracker-regclass.ll
Log Message:
-----------
[Hexagon] Add a case to BitTracker for new register class (#128580)
Code in the HexagonBitTracker checks for a specific register class when
processing sub-registers. A crash occurred due to a register class that
was not handled. The register class is
DoubleRegs_with_isub_hi_in_IntRegsLow8RegClassID, which is a class
formed by creating a register pair when one of the sub registers is a
Low8 integer register.
Fixes #128078
Patch by: Brendon Cahoon
Commit: a12ca57c1cb070be8e0048004c6b4e820029b6ee
https://github.com/llvm/llvm-project/commit/a12ca57c1cb070be8e0048004c6b4e820029b6ee
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][REVEC] Add getScalarizationOverhead helper function to reduce error when REVEC is enabled. (#128530)
Commit: 1affadb7c662a2eb1cfd01fdfa014ffe473c0dc2
https://github.com/llvm/llvm-project/commit/1affadb7c662a2eb1cfd01fdfa014ffe473c0dc2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
Log Message:
-----------
AMDGPU: Drop legacy r600.read.global.size intrinsics from amdgcn (#128700)
These ancient intrinsics were still consumed by the backend for libclc,
which no longer uses them.
Commit: 148111fdcf0e807fe74274b18fcf65c4cff45d63
https://github.com/llvm/llvm-project/commit/148111fdcf0e807fe74274b18fcf65c4cff45d63
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M .github/workflows/release-binaries.yml
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Enable bolt optimization for clang on Linux (#128090)
Also stop buiding the bolt project on other platforms since bolt only
supports ELF.
Commit: 85eb7259d9e1ab57e9fac248096d73505a60c072
https://github.com/llvm/llvm-project/commit/85eb7259d9e1ab57e9fac248096d73505a60c072
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[clang] Fix use-after-scope when diagnosting __attribute__((format_matches))
I don't think this will ever crash, but asan complains about it.
SUMMARY: AddressSanitizer: stack-use-after-scope clang/lib/Sema/SemaChecking.cpp:6925:43 in void (anonymous namespace)::CheckFormatHandler::EmitFormatDiagnostic<clang::CharSourceRange>(clang::PartialDiagnostic, clang::SourceLocation, bool, clang::CharSourceRange, llvm::ArrayRef<clang::FixItHint>)
While there switch to stable_sort to not give a flipped error message
half of the time.
Commit: 5fd188833c4cc2f18aa53908fd6237f6a432d629
https://github.com/llvm/llvm-project/commit/5fd188833c4cc2f18aa53908fd6237f6a432d629
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
A mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
Log Message:
-----------
[mlir][spirv] Refactor image operations (#128552)
This patch makes multiple changes to images ops:
1) The assembly format is unified with the rest of the dialect to use
`%0 = spirv.op %1, %2, %3 : f32, f32, f32` rather than having each type
directly attached to each argument.
2) The verification is moved from `SPIRVOps.cpp` to a new file so the
ops can be easier maintained.
3) Majority of C++ verification is removed and moved into ODS.
Verification of `ImageQuerySizeOp` is left in C++ due to the complexity
of rules.
4) `spirv::bitEnumContainsAll` is replaced by
`spirv::bitEnumContainsAny` in `verifyImageOperands`. In this context
`...Any` seems to be the correct function, as we want to check whether
unsupported operand is being used - in opposite to checking if all
unsupported operands are being used.
5) Simplify target tests by removing entry points and adding `Linkage`
capability to the modules.
This change is made in preparation for adding more Image ops. Change to
the assembly format was previously mentioned in #124124.
Commit: f10e0f7321b34693697a0bf895d440f82b32ba54
https://github.com/llvm/llvm-project/commit/f10e0f7321b34693697a0bf895d440f82b32ba54
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/test/CodeGenCXX/merge-functions.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/comdat.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
Log Message:
-----------
[MergeFuncs] Don't introduce calls to (linkonce,weak)_odr functions. (#125050)
Avoid creating new calls to linkonce_odr/weak_odr functions when
merging 2 functions, as this may introduce an infinite call
cycle.
Consider 2 functions below, both present in 2 modules.
Module X
--
define linkonce_odr void @"A"() {
call void @"foo"()
}
define linkonce_odr void @"B"() {
call void @"foo"()
}
---
Module Y
---
global @"g" = @"B"
define linkonce_odr void @"A"() {
%l = load @"g"
call void %l()
}
define linkonce_odr void @"B"() {
call void @"foo"()
}
---
@"A" and @"B" in both modules are semantically equivalent
Module X after function merging:
---
define linkonce_odr void @"A"() {
call void @"foo"()
}
define linkonce_odr void @"B"() {
call void @"A"()
}
---
Module Y is unchanged.
Then the linker picks @"A" from module Y and @"B" from module X. Now there's an infinite call cycle
PR: https://github.com/llvm/llvm-project/pull/125050
Commit: 83c6b1a88852ac6462e2ae58cb4e5ebdeb0eadd3
https://github.com/llvm/llvm-project/commit/83c6b1a88852ac6462e2ae58cb4e5ebdeb0eadd3
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A lldb/examples/python/fzf_history.py
Log Message:
-----------
[lldb] Add fzf_history command to examples (#128571)
Adds a `fzf_history` to the examples directory.
This python command invokes [fzf](https://github.com/junegunn/fzf) to
select from lldb's command history.
Tighter integration is available on macOS, via commands for copy and
paste. The user's chosen history entry back is pasted into the lldb
console (via AppleScript). By pasting it, users have the opportunity to
edit it before running it. This matches how fzf's history search works.
Without copy and paste, the user's chosen history entry is printed to
screen and then run automatically.
Commit: cf3b0368a55c1c285dd80f12b044b58e87a425ac
https://github.com/llvm/llvm-project/commit/cf3b0368a55c1c285dd80f12b044b58e87a425ac
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa][tosa-to-linalg] Add NaN Mode Lowering (#125668)
Add support for NaN propagation lowering in the `tosa-to-linalg` and
`tosa-to-linalg-named` conversions by conditionally checking for NaN in
the case of ignore semantics and materializing the appropriate select
operations. Note that the default behviour of "propagate" matches that
of the arith dialect and so in that case we can avoid creating the
checks altogether.
Add appropriate lit tests including negative tests which check the
various comparisons and selects are materialized as appropriate.
This affects the following TOSA operators:
* arg_max
* max_pool_2d
* clamp
* reduce_max
* reduce_min
* maximum
* minimum
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: a821ae284724f1522297c0b455b1ca5c05fbc270
https://github.com/llvm/llvm-project/commit/a821ae284724f1522297c0b455b1ca5c05fbc270
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_round.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_round.cl
M libclc/generic/lib/math/round.cl
Log Message:
-----------
[libclc] Move round to CLC library (#128721)
Commit: 37559c8401cf9236d561eebd75bd3d70be6ab723
https://github.com/llvm/llvm-project/commit/37559c8401cf9236d561eebd75bd3d70be6ab723
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
Log Message:
-----------
[Hexagon] Handle Call Operand vxi1 in Hexagon Backend (#128027)
This commit updates the Hexagon backend to handle
vxi1 call operands. It ensures compatibility for
vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is
enabled.
~Fixes #59009 and #118879~
Commit: 99207ae835efea859f2d9ed4cce781363c0e1562
https://github.com/llvm/llvm-project/commit/99207ae835efea859f2d9ed4cce781363c0e1562
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp:33:24: error: unused variable
'noSupportOperands' [-Werror,-Wunused-variable]
Commit: 568106c2150f4442ad39d9c58493b962c87763bd
https://github.com/llvm/llvm-project/commit/568106c2150f4442ad39d9c58493b962c87763bd
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
Log Message:
-----------
[lldb][NFC] Fix comment in lldb/Core/ModuleList.h (#128602)
Commit: 7501c9c0e124139198cf84148a49fe80b9f64cea
https://github.com/llvm/llvm-project/commit/7501c9c0e124139198cf84148a49fe80b9f64cea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[AsmParser] Avoid repeated map lookups (NFC) (#128629)
Commit: 791da3c5c2efc13e952ec4fe041e88428e4a331a
https://github.com/llvm/llvm-project/commit/791da3c5c2efc13e952ec4fe041e88428e4a331a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128630)
Commit: 9388e42a3c67a4399bbc3a427077ea95bac31323
https://github.com/llvm/llvm-project/commit/9388e42a3c67a4399bbc3a427077ea95bac31323
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#128631)
Commit: 43401dd0b5c659047e546efbc55f9f88261142d6
https://github.com/llvm/llvm-project/commit/43401dd0b5c659047e546efbc55f9f88261142d6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
Log Message:
-----------
[libc++] Make .verify.cpp tests more robust against changing headers (#128703)
This is fixes the tests for the frozen headers, but is an improvement
either way.
Commit: 38f8ca1d1817969d712a7e70e070228eee8a0f3f
https://github.com/llvm/llvm-project/commit/38f8ca1d1817969d712a7e70e070228eee8a0f3f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated hash lookups (NFC) (#128632)
Commit: 9889de834b0a9fa4a5a222a81a524c75977e41d4
https://github.com/llvm/llvm-project/commit/9889de834b0a9fa4a5a222a81a524c75977e41d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#128634)
Commit: 8bea51103000e4ac752ecd8ed1550c1c9d105a6b
https://github.com/llvm/llvm-project/commit/8bea51103000e4ac752ecd8ed1550c1c9d105a6b
Author: Marius Kamp <msk at posteo.org>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/andnot-blsmsk.ll
Log Message:
-----------
[X86] Fold AND(Y, XOR(X, SUB(0, X))) to ANDN(Y, BLSMSK(X)) (#128348)
XOR(X, SUB(0, X)) corresponds to a bitwise-negated BLSMSK instruction
(i.e., x ^ (x - 1)). On its own, this transformation is probably not
really profitable but when the XOR operation is an operand of an AND
operation, we can use an ANDN instruction to reduce the number of
emitted instructions by one.
Fixes #103501.
Commit: e58f475e84545d12c52e177fdea69c0f2bec81df
https://github.com/llvm/llvm-project/commit/e58f475e84545d12c52e177fdea69c0f2bec81df
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
Log Message:
-----------
[mlir][tosa] Move cond_if and while_loop operations to controlflow extension (#128216)
This commit adds the concept of a controlflow extension to the dialect
and updates the validation pass to check conf_if and while_loop are
supported only in the presence of the controlflow extension.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 53b46bb09474bd22fd097411f9eb4596424116ee
https://github.com/llvm/llvm-project/commit/53b46bb09474bd22fd097411f9eb4596424116ee
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix crash on attempt to fold int_div by zero (#128682)
Fixes #118268.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: f08824b935434b91f7352904a25f6309f2b3e6bd
https://github.com/llvm/llvm-project/commit/f08824b935434b91f7352904a25f6309f2b3e6bd
Author: David Green <david.green at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add udiv and urem uniform tests. NFC
These should cost the same as non-uniform version.
Commit: 24b7759a9dfe5714236957e7d829e2412100a4b7
https://github.com/llvm/llvm-project/commit/24b7759a9dfe5714236957e7d829e2412100a4b7
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/assume.f90
A flang/test/Lower/OpenMP/Todo/assumes.f90
A flang/test/Parser/OpenMP/assumption.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[FLANG][OpenMP]Add frontend support for ASSUME and ASSUMES (#120770)
Enough suport to parse correctly formed directives of !$OMP ASSUME and
!$OMP ASSUMES with teh related clauses that go with them: ABSENT,
CONTAINS, NO_OPENPP, NO_OPENMP_ROUTINES, NO_PARALLELISM and HOLDS.
Tests added for unparsing and dump parse-tree.
Semantics support is very minimal and no specific tests added.
The lowering will hit a TODO, and there are tests in Lower/OpenMP/Todo
to make it clear that this is currently expected behaviour.
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Co-authored-by: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Commit: 041b7f508533417bcda4feaa03d6c16ff85275f5
https://github.com/llvm/llvm-project/commit/041b7f508533417bcda4feaa03d6c16ff85275f5
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Turn off unsafe-buffer warning for methods annotated with clang::unsafe_buffer_usage attribute (#125671)
Unsafe operation in methods that are already annotated with
clang::unsafe_buffer_usage attribute, should not trigger a warning. This
is because, the developer has already identified the method as unsafe
and warning at every unsafe operation is redundant.
rdar://138644831
---------
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: d2d469eb7981885eac188bf7988c72d7e85b2d4e
https://github.com/llvm/llvm-project/commit/d2d469eb7981885eac188bf7988c72d7e85b2d4e
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/Verifier/invoke.ll
Log Message:
-----------
[WebAssembly] Make llvm.wasm.throw invokable (#128104)
`llvm.wasm.throw` intrinsic can throw but it was not invokable. Not sure
what the rationale was when it was first written that way, but I think
at least in Emscripten's C++ exception support with the Wasm port of
libunwind, `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.rethrow`, is used only within `_Unwind_RaiseException`, which
is an one-liner and thus does not need an `invoke`:
https://github.com/emscripten-core/emscripten/blob/720e97f76d6f19e0c6a2d6988988cfe23f0517fb/system/lib/libunwind/src/Unwind-wasm.c#L69
(`_Unwind_RaiseException` is called by `__cxa_throw`, which is generated
by the `throw` C++ keyword)
But this does not address other direct uses of the builtin in C++, whose
use I'm not sure about but is not prohibited. Also other language
frontends may need to use the builtin in different functions, which has
`try`-`catch`es or destructors.
This makes `llvm.wasm.throw` invokable in the backend. To do that, this
adds a custom lowering routine to `SelectionDAGBuilder::visitInvoke`,
like we did for `llvm.wasm.rethrow`.
This does not generate `invoke`s for `__builtin_wasm_throw` yet, which
will be done by a follow-up PR.
Addresses #124710.
Commit: 48db4e8377f8504cf151cf4d2b4ecf33461eedc8
https://github.com/llvm/llvm-project/commit/48db4e8377f8504cf151cf4d2b4ecf33461eedc8
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/MemRef/resolve-dim-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Tosa/transpose-fold.mlir
Log Message:
-----------
[mlir][tosa] Change Transpose perms operand to attribute (#128115)
This patch changes the perms operand for Tosa Transpose operator to an
i32 array attribute
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 4f18f3f09a744ddd05de2188592fa11533ff3054
https://github.com/llvm/llvm-project/commit/4f18f3f09a744ddd05de2188592fa11533ff3054
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
Log Message:
-----------
[RISCV] Use addiw for or_is_add when or input is sign extended. (#128635)
We prefer to emit addi instead of ori because its more compressible, but
this can pessimize the sext.w removal pass.
If the input to the OR is known to be a sign extended 32 bit value, we
can use addiw instead of addi which will give more power to the sext.w
removal pass. As it is known to produce sign a sign extended value and
only consume the lower 32 bits.
Fixes #128468.
Commit: 0a7809c644485d6650ea01bfe616623f580b24d1
https://github.com/llvm/llvm-project/commit/0a7809c644485d6650ea01bfe616623f580b24d1
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[mlir][tosa] Fix ability to expand ranks with dynamic shape support (#128037)
- Fix ability to expand ranks with dynamic shape support
- Simplify the code
Signed-off-by: Suraj Sudhir <suraj.sudhir at arm.com>
Co-authored-by: Suraj Sudhir <suraj.sudhir at arm.com>
Commit: 43999deb370113945ef86680014f838f55315ee7
https://github.com/llvm/llvm-project/commit/43999deb370113945ef86680014f838f55315ee7
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
Log Message:
-----------
[spirv][amdgpu] Set atomic size in the clang target info (#128569)
Problem identified by Joseph. The openmp device runtime uses
__scoped_atomic_load_n and similar which presently hit
```
error: large atomic operation may incur significant performance
penalty; the access size (4 bytes) exceeds the max lock-free size (0 bytes) [-Werror,-Watomic-alignment]
```
This is because the spirv class doesn't set the corresponding field. The
base does, but only if there's a host toolchain, which there isn't.
Commit: 67056c280a7171a3546442013593687d5ad5440b
https://github.com/llvm/llvm-project/commit/67056c280a7171a3546442013593687d5ad5440b
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Support shuffle for F16x8 vectors. (#127857)
Commit: a778930f85b6d17cf31ff0e15964a7c7116e2a9d
https://github.com/llvm/llvm-project/commit/a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.td
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir][linalg] Create a dedicated target for `LinalgRelayoutInterface` (#128485)
Creates an interface target for `LinalgRelayoutInterface`. This is
primarily to reduce the dependency of `Tensor` on `Linalg` to the
required minimum. For context and rationale, see:
* https://github.com/llvm/llvm-project/issues/127668
Note, I also took the liberty of renaming `LinalgRelayoutInterface` as
`RelayoutOpInterface` (removed `Linalg`, added `Op`).
Commit: 3968ebd00da80a08de84f83a101ebb23710f6631
https://github.com/llvm/llvm-project/commit/3968ebd00da80a08de84f83a101ebb23710f6631
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
A bolt/test/X86/entry-point-fallthru.s
Log Message:
-----------
[BOLT] Keep multi-entry functions simple in aggregation mode (#128253)
BOLT used to mark multi-entry functions non-simple in non-relocation
mode with the reasoning that we can't move them due to potentially
undetected references. However, in aggregation mode it doesn't apply as
BOLT doesn't perform optimizations.
Relax this constraint in case of an aggregation job.
Test Plan: added entry-point-fallthru.s
Commit: f5675243995dbca22319ed4c0665b3e46138285b
https://github.com/llvm/llvm-project/commit/f5675243995dbca22319ed4c0665b3e46138285b
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/bolt-address-translation-yaml.test
Log Message:
-----------
[BOLT] Fix doTrace in BAT mode (#128546)
When processing BOLTed binaries with BAT section, we used to
indiscriminately use `BAT->getFallthroughsInTrace` to record
fall-throughs, even if the function is not covered by BAT.
Fix that by using non-BAT CFG-based `getFallthroughsInTrace` if the
function is not in BAT.
Test Plan: updated bolt-address-translation-yaml.test
Commit: ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
https://github.com/llvm/llvm-project/commit/ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
Log Message:
-----------
[libc][cmake] Clean up dead code in add_gen_header (#128753)
DATA_FILES CMake argument never existed in the new YAML-based hdrgen
version of add_gen_header function, and thus its uses added in
b1fd6f0996a9d6e6ebfa0cc3df0fe499c5ccdf65 were always dead code.
Remove them to clean up the function implementation.
Co-authored-by: Alexey Samsonov <samsonov at google.com>
Commit: 66af4923ce245a0fd9427db8e4861354576d0866
https://github.com/llvm/llvm-project/commit/66af4923ce245a0fd9427db8e4861354576d0866
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
Log Message:
-----------
[lldb-dap] Refactor reverse request response handlers (NFC) (#128594)
This refactors the response handlers for reverse request to follow the
same architecture as the request handlers. With only two implementation
that might be overkill, but it reduces code duplication and improves
error reporting by storing the sequence ID. This PR also fixes an
unchecked Expected in the old callback for unknown sequence IDs.
Commit: 7c266756ad2eeeb2a9018eb97dc45809922bd49e
https://github.com/llvm/llvm-project/commit/7c266756ad2eeeb2a9018eb97dc45809922bd49e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 66af4923ce24
Commit: 9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
https://github.com/llvm/llvm-project/commit/9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Use the same lowerings for f16x8 as other float vectors. (#127897)
This fixes failures to select the various compare operations that
weren't being expanded for f16x8.
Commit: c8136da26c56f44ab6a217853c58f79b88ceeb97
https://github.com/llvm/llvm-project/commit/c8136da26c56f44ab6a217853c58f79b88ceeb97
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
A llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
Log Message:
-----------
[RISCV] Correctly Decode Unsigned Immediates with Ranges (#128584)
We currently have two operands upstream that are an unsigned immediate
with a range constraint - `uimm8ge32` (for `cm.jalt`) and `uimm5gt3`
(for `qc.shladd`).
Both of these were using `decodeUImmOperand<N>` for decoding. For `Zcmt`
this worked, because the generated decoder automatically checked for
`cm.jt` first because the 8 undefined bits in `cm.jalt` are `000?????`
in `cm.jt` (this is to do with the range lower-bound being a
power-of-two). For Zcmt, this patch is NFC.
We have less luck with `Xqciac` - `qc.shladd` is being decoded where the
`uimm5` field is 3 or lower. This patch fixes this by introducing a
`decodeUImmOperandGE<Width, LowerBound>` helper, which will corretly
return `MCDisassembler::Fail` when the immediate is below the lower
bound.
I have added a test to show the encoding where `uimm5` is equal to 3 is
no longer disassembled as `qc.shladd`.
Commit: f22291c791c8063ef5125392ada3556dd3e62df5
https://github.com/llvm/llvm-project/commit/f22291c791c8063ef5125392ada3556dd3e62df5
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV][NFC] Merge Xqci Decoder Tables (#128140)
RISC-V has multiple decoder tables because there is no guarantee that
non-standard extensions do not overlap with each other.
Qualcomm's Xqci family of extensions are intended to be implemented
together, and therefore we want a single decode table for this group of
extensions. This should be more efficient overall, and allows us to use
tablegen's existing mechanism that finds overlapping encodings within
the group.
To implement this, the key addition is `TRY_TO_DECODE_FEATURE_ANY`,
which will use the provided decoder table if any of the features from
the FeatureBitset (first argument) are enabled, rather than if all are
enabled.
Commit: 00f02fed882822008f8e4733bcdfb84799d9fb39
https://github.com/llvm/llvm-project/commit/00f02fed882822008f8e4733bcdfb84799d9fb39
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/test/MC/RISCV/xrivosvizip-invalid.s
M llvm/test/MC/RISCV/xrivosvizip-valid.s
Log Message:
-----------
[RISCV] Change the vendor prefix for Rivos from "rv." to "ri." (#128761)
There had been concern raised about possible confusion with "rvv". After
internal discussion, we decided to go with an alternate prefix to reduce
possible confusion going forward. The specification document
(https://github.com/rivosinc/rivos-custom-extensions) has been updated.
And also add the XRivosVizip extension to the documentation. I'd missed
that in the initial commit.
Commit: 4357a6603f2c21f343d500778f71494e865262ac
https://github.com/llvm/llvm-project/commit/4357a6603f2c21f343d500778f71494e865262ac
Author: Jeff Niu <jeffniu22 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
Log Message:
-----------
[mlir][DLTI] Make `getPreferredAlignment` default to `getABIAlignment` (#128754)
Many types don't have a preferred alignment, but often specifying an ABI
alignment is required to implement APIs on top of data layouts. Default
the preferred alignment to `getABIAlignment` to simplify things.
Commit: eacbcbe47744a496ad1651ebd65914f9e6a66f85
https://github.com/llvm/llvm-project/commit/eacbcbe47744a496ad1651ebd65914f9e6a66f85
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Upstream type `bool` (#128601)
Support the type `bool` and the literals `true` and `false`. Add the
type `cir::BoolType` and the attribute `cir::BoolAttr` to ClangIR. Add
code in all the necessary places in ClangIR CodeGen to handle and to
recognize the type and the attribute.
Add test cases to existing tests func-simple.cpp and
global-var-simple.cpp.
Commit: f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
https://github.com/llvm/llvm-project/commit/f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Replace deprecated std::aligned_union, NFCI. (#127417)
All std::aligned_* are deprecated in C++23. Implement the replacement
suggested in P1413R3 using alignas and std::max.
Commit: 5e4938a9918ac0e9c2ed3a9171767e6beafcea47
https://github.com/llvm/llvm-project/commit/5e4938a9918ac0e9c2ed3a9171767e6beafcea47
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
Exclude hwasan from thread_create_failure.pass.cpp (#128768)
Fixes hwasan buildbot failure
(https://lab.llvm.org/buildbot/#/builders/55/builds/7536/steps/10/logs/stdio)
introduced in https://github.com/llvm/llvm-project/pull/125433 by
excluding this test for hwasan, similar to the existing exclusion of
asan.
Commit: 6a5dd04013a1442ed4c5861216c8c67a81f37ed0
https://github.com/llvm/llvm-project/commit/6a5dd04013a1442ed4c5861216c8c67a81f37ed0
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Try to fix AlignedCharArrayUnion with GCC 7.5
Work around "internal compiler error: Segmentation fault", apparently
caused by alignas(Ts...).
Commit: c79e867cd2bbf414f53de169cd4480666303f0dc
https://github.com/llvm/llvm-project/commit/c79e867cd2bbf414f53de169cd4480666303f0dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
Log Message:
-----------
[DirectX] Update CBuffer to refer to a `dx.Layout` type (#128697)
This adds support cbuffers based on llvm/wg-hlsl#171 - the type argument
of the CBuffer TargetExtType is either a `dx.Layout` type which reports
its own size, or it's a normal type and we can simply refer to
DataLayout.
Commit: 303d7fa867407e9763f329e94a271e652ccb9ed0
https://github.com/llvm/llvm-project/commit/303d7fa867407e9763f329e94a271e652ccb9ed0
Author: Johannes de Fine Licht <johannes.definelicht at nextsilicon.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
Log Message:
-----------
[MLIR][Interfaces] Make LoopLikeOpInterface inheritable outside of MLIR (#128743)
Many interface methods did not prefix the `mlir` namespace, which
prevented inheriting from this interface from an interface defined
outside the `mlir` namespace. Prefix namespaces everywhere to enable
this.
Commit: 0be3f134c3b0bea0a3f32db55258c776caf616fb
https://github.com/llvm/llvm-project/commit/0be3f134c3b0bea0a3f32db55258c776caf616fb
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
Log Message:
-----------
[DirectX] only allow intrinsics defined in DXIL.td (#128613)
Fixes #128071
The current behavior lets intrinsics that don't map to a DXILOP slip
through. Nothing catches this until we hit the DXIL validator. This
change fails earlier so we don't encode invalid llvm intrinsics that can
slip through because of clang builtins like `__builtin_reduce_and`
example:
https://hlsl.godbolt.org/z/13rPj18vn
Commit: 2646c36a864aa6a62bc1280e9a8cd2bcd2695349
https://github.com/llvm/llvm-project/commit/2646c36a864aa6a62bc1280e9a8cd2bcd2695349
Author: Christopher Bate <cbate at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
Log Message:
-----------
[mlir][bufferization] Change OneShotModuleBufferize to not analyze or bufferize nested symbol tables (#127726)
The existing OneShotModuleBufferize will analyze and bufferize
operations which are in nested symbol tables (e.g. nested
`builtin.module`, `gpu.module`, or similar operations). This
behavior is untested and likely unintentional given other
limitations of OneShotModuleBufferize (`func.call` can't call
into nested symbol tables). This change reverses the existing
behavior so that the operations considered by the analysis and
bufferization exclude any operations in nested symbol table
scopes. Users who desire to bufferize nested modules can still do
so by applying the transformation in a pass pipeline or in a
custom pass. This further enables controlling the order in which
modules are bufferized as well as allowing use of different
options for different kinds of modules.
Commit: ad94af973a76ecaa3e6a85304a4abe8130e88bdb
https://github.com/llvm/llvm-project/commit/ad94af973a76ecaa3e6a85304a4abe8130e88bdb
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
Log Message:
-----------
[CIR] React to breaking change to DataLayoutTypeInterface (#128772)
In #128754, `DataLayoutTypeInterface` was changed to give
`getPreferredAlignment` a default implemention. As a result, table-gen
no longer declared `getPreferredAlignment` when defining a class that
contained `[DeclareTypeInterfaceMethods<DataLayoutTypeInterface>]` in
the table-gen definition. That means all of the definitions in
`CIRTypes.cpp`, such as `PointerType::getPreferredAligment`, were
compilation errors.
Delete all the definitions of `getPreferredAlignment`. I verified that
the default implementation does the exact same thing as the explicit
overrides that are being deleted.
Commit: 44ffeecde2658249d57a54f52c11a339f2e6d14e
https://github.com/llvm/llvm-project/commit/44ffeecde2658249d57a54f52c11a339f2e6d14e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Analysis/DXILResource.cpp
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
Log Message:
-----------
[DXIL][Analysis] Make sure resource accessors are contiguous (#128696)
When some resource types were present, but not all of them, we were
ending up in a situation where we would fail to initialize the `FirstX`
variables and get incorrect iterators.
Fixes #128560.
Commit: f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
https://github.com/llvm/llvm-project/commit/f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/stdio/generic/fileno.cpp
Log Message:
-----------
[libc] Move fileno and fdopen to fullbuild only (#128762)
Both fileno and fdopen require interfacing with the opaque FILE struct,
so they shouldn't be enabled in overlay mode. This patch moves both into
fullbuild only on all platforms.
Fixes #128643
Commit: 8beec9fc48194224779e5428b625fe341e617129
https://github.com/llvm/llvm-project/commit/8beec9fc48194224779e5428b625fe341e617129
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/a64l.cpp
A libc/src/stdlib/a64l.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/a64l_test.cpp
Log Message:
-----------
[libc] implement a64l (#128758)
Implement the posix function a64l.
Standard:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/a64l.html
Commit: 59cee030fb9b8be7ee0a89964ead5120d029deb4
https://github.com/llvm/llvm-project/commit/59cee030fb9b8be7ee0a89964ead5120d029deb4
Author: Reid Kleckner <rnk at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R clang/utils/creduce-clang-crash.py
A clang/utils/reduce-clang-crash.py
Log Message:
-----------
Generalize creduce-clang-crash.py script to look for cvise (#128592)
cvise reimplements creduce in Python and bundles clang-delta and other
tools. In my experience, it is generally a more robust reduction tool
that is better maintained. I renamed the script to make it tool-neutral,
which also opens up the possibility that we teach it how to
automatically transition over to llvm-reduce and opt/llc to handle LLVM
backend crashes, but that is potential future work.
Internally, the variable names still say "creduce". I kept using the
verb "reduce" because "vise" is not a verb, but the external facing text
has been updated.
Commit: e6f6a1e863895a3378e703525a6d0d293413be33
https://github.com/llvm/llvm-project/commit/e6f6a1e863895a3378e703525a6d0d293413be33
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)
Enable gisel selection for uaddsat and usubsat in true16 flow
This patch includes:
1. Added VGPR_16_Lo128/VGPR_16 to register bank and update register info
for recognizing 16bit regclass id and bit width
2. uaddsat/usubsat test update
Commit: 40566fd674d110185e2d5e72e320369bfab63ede
https://github.com/llvm/llvm-project/commit/40566fd674d110185e2d5e72e320369bfab63ede
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
Log Message:
-----------
[WebAssembly] Generate invokes with llvm.wasm.(re)throw (#128105)
Even though `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.throw`, throws,
```cpp
try {
__builtin_wasm_throw(0, obj);
} catch (...) {
}
```
does not generate `invoke`. This is because we have assumed the
intrinsic cannot be invoked, which doesn't make much sense. (See #128104
for the historical context)
#128104 made `llvm.wasm.throw` intrinsic invokable in the backend. This
actually generates `invoke`s in Clang for `__builtin_wasm_throw`.
While we're at it, this also generates `invoke`s for
`__builtin_wasm_rethrow`, which is actually not used anywhere in C++
support. I haven't deleted it just in case in may have uses later. (For
example, to support rethrow functionality that carries stack trace with
exnref)
Depends on #128104 for the CI to pass.
Fixes #124710.
Commit: 65cf534139ab884d6886810b647dc50e3affaa19
https://github.com/llvm/llvm-project/commit/65cf534139ab884d6886810b647dc50e3affaa19
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add interfaces for __ldcg, __ldca, __ldcs, __ldlu, __ldcv, __stwb, __stcg, __stcs, __stwt (#128766)
Commit: 789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
https://github.com/llvm/llvm-project/commit/789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
Author: Paul Floyd <pjfloyd at wanadoo.fr>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M openmp/tools/archer/ompt-tsan.cpp
Log Message:
-----------
[OMPT] Use __tsan_init to detect TSan binaries rather than RunningOnValgrind (#128357)
Switch to using __tsan_init rather than RunningOnValgrind as the means
for detecting TSan instumented binaries. RunningOnValgrind is present in
other libraries (such as Google perftools tcmalloc). An exe that links
with a tcmalloc static library and exports symbols with -rdynamic will
appear to be TSan instrumented even when it is not resulting in "Unable
to fint TSan function ..." messages.
Fixes issue #122319.
Commit: 864071dd7e191ba895abf69dfa6937a2cadaffbe
https://github.com/llvm/llvm-project/commit/864071dd7e191ba895abf69dfa6937a2cadaffbe
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Bazel fixes for a778930f85b6d17cf31ff0e15964a7c7116e2a9d (#128783)
Commit: 30a7c816ee5ca998da960c6ab98e72903de40592
https://github.com/llvm/llvm-project/commit/30a7c816ee5ca998da960c6ab98e72903de40592
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[LTO][Pipelines][NFC] Exctract isLTOPostLink (#128653)
Commit: 8fc4020c788ab93eb0ff82bda3db87ac80065674
https://github.com/llvm/llvm-project/commit/8fc4020c788ab93eb0ff82bda3db87ac80065674
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M .github/workflows/release-binaries.yml
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/bolt-address-translation-yaml.test
A bolt/test/X86/entry-point-fallthru.s
M clang/Maintainers.rst
M clang/cmake/caches/Release.cmake
M clang/docs/ReleaseNotes.rst
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/cpuid.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/test/AST/ByteCode/arrays.cpp
A clang/test/AST/ByteCode/libcxx/pointer-subscript.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
M clang/test/CodeGenCXX/merge-functions.cpp
M clang/test/Headers/cpuid.c
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
R clang/utils/creduce-clang-crash.py
A clang/utils/reduce-clang-crash.py
M flang-rt/CMakeLists.txt
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/module/cudadevice.f90
A flang/test/Lower/OpenMP/Todo/assume.f90
A flang/test/Lower/OpenMP/Todo/assumes.f90
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Parser/OpenMP/assumption.f90
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdio/generic/fileno.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/a64l.cpp
A libc/src/stdlib/a64l.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/a64l_test.cpp
M libclc/amdgcn/lib/workitem/get_global_size.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_log.h
A libclc/clc/include/clc/math/clc_log10.h
A libclc/clc/include/clc/math/clc_log2.h
A libclc/clc/include/clc/math/clc_round.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_log.cl
A libclc/clc/lib/generic/math/clc_log10.cl
A libclc/clc/lib/generic/math/clc_log2.cl
A libclc/clc/lib/generic/math/clc_log_base.h
A libclc/clc/lib/generic/math/clc_round.cl
M libclc/generic/include/clc/math/log10.h
R libclc/generic/include/math/binary_intrin.inc
R libclc/generic/include/math/ternary_intrin.inc
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log2.cl
R libclc/generic/lib/math/log_base.h
M libclc/generic/lib/math/round.cl
M libcxx/include/future
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.comp/equal.pass.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
A libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
A lldb/examples/python/fzf_history.py
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/Analysis/DXILResource.h
A llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
R llvm/include/llvm/ExecutionEngine/Orc/GetTapiInterface.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Support/AlignOf.h
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
R llvm/lib/ExecutionEngine/Orc/GetTapiInterface.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
A llvm/test/CodeGen/AArch64/build-attributes-all.ll
A llvm/test/CodeGen/AArch64/build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
A llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/ARM/select-imm.ll
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
A llvm/test/CodeGen/Hexagon/bittracker-regclass.ll
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
M llvm/test/CodeGen/MSP430/shift-amount-threshold.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
A llvm/test/CodeGen/PowerPC/llvm.sincos.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/Thumb/branchless-cmp.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/half-precision.ll
A llvm/test/CodeGen/X86/andnot-blsmsk.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
A llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
A llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-aeabi-known.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-bti.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-attrs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-err-headers.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-gcs.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-mixed.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-none.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-numerical-tags.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-out-of-order.s
A llvm/test/MC/AArch64/build-attributes-asm-aeabi-pac.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi-err.s
A llvm/test/MC/AArch64/build-attributes-asm-non_aeabi.s
A llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
M llvm/test/MC/RISCV/xrivosvizip-invalid.s
M llvm/test/MC/RISCV/xrivosvizip-valid.s
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/MergeFunc/comdat.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
M llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
A llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
M llvm/test/Verifier/invoke.ll
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Dialect/SCF/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
A mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/MemRef/resolve-dim-ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Tosa/transpose-fold.mlir
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M openmp/tools/archer/ompt-tsan.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Target/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/250d83255545...8fc4020c788a
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