[all-commits] [llvm/llvm-project] 9d1910: [lldb][bazel] Port https://github.com/llvm/llvm-pr...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Mon Feb 24 08:41:09 PST 2025
Branch: refs/heads/users/vitalybuka/spr/llvm-mt-use-xmldeleter-to-free-xmlfreedoc
Home: https://github.com/llvm/llvm-project
Commit: 9d191056013d27db086f284ac9b2dc1f5fd2ed89
https://github.com/llvm/llvm-project/commit/9d191056013d27db086f284ac9b2dc1f5fd2ed89
Author: Christian Sigg <csigg at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Port https://github.com/llvm/llvm-project/commit/d0e37d9723314199e08e3bb8a61f9b7e033b1ff4
Commit: 86cb0bd3a23740787fd160bcacceb06c0df0511b
https://github.com/llvm/llvm-project/commit/86cb0bd3a23740787fd160bcacceb06c0df0511b
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Target/LLVMIR/nvvm/cvt_tf32.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-alloc.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-barriers.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-commit.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-cp.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-fence-wait.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-shift.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_prefetch.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_store_reduce.mlir
Log Message:
-----------
[MLIR][NVVM] [NFC] Update test cmd-lines and doc links (#128207)
For the NVVM Dialect tests under Target/LLVMIR/nvvm/ dir,
we verify the lowering to the intrinsics using mlir-translate.
Remove the -verify-diagnostics option from the cmd-line
for these tests since all the verifier checks are tested through
the nvvmir-invalid.mlir file. Similarly, remove the split-input-file
option which is not relevant here.
Update a few remaining links in the NVVMOps.td file.
All the reference links follow the same style now.
Rename the tcgen05-barriers.mlir file to tcgen05-commit.mlir
and move the wait/fence tests to a separate file.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 850b49297615a613ac83adca2c9cf823a4b8ef95
https://github.com/llvm/llvm-project/commit/850b49297615a613ac83adca2c9cf823a4b8ef95
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M bolt/docs/BinaryAnalysis.md
M bolt/include/bolt/Core/MCPlusBuilder.h
A bolt/include/bolt/Passes/NonPacProtectedRetAnalysis.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Passes/CMakeLists.txt
A bolt/lib/Passes/NonPacProtectedRetAnalysis.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/binary-analysis/AArch64/cmdline-args.test
A bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
A bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M bolt/test/binary-analysis/AArch64/lit.local.cfg
Log Message:
-----------
[BOLT][binary-analysis] Add initial pac-ret gadget scanner (#122304)
This adds an initial pac-ret gadget scanner to the
llvm-bolt-binary-analysis-tool.
The scanner is taken from the prototype that was published last year at
https://github.com/llvm/llvm-project/compare/main...kbeyls:llvm-project:bolt-gadget-scanner-prototype,
and has been discussed in RFC
https://discourse.llvm.org/t/rfc-bolt-based-binary-analysis-tool-to-verify-correctness-of-security-hardening/78148
and in the EuroLLVM 2024 keynote "Does LLVM implement security
hardenings correctly? A BOLT-based static analyzer to the rescue?"
[Video](https://youtu.be/Sn_Fxa0tdpY)
[Slides](https://llvm.org/devmtg/2024-04/slides/Keynote/Beyls_EuroLLVM2024_security_hardening_keynote.pdf)
In the spirit of incremental development, this PR aims to add a minimal
implementation that is "fully working" on its own, but has major
limitations, as described in the bolt/docs/BinaryAnalysis.md
documentation in this proposed commit. These and other limitations will
be fixed in follow-on PRs, mostly based on code already existing in the
prototype branch. I hope incrementally upstreaming will make it easier
to review the code.
Note that I believe that this could also form the basis of a scanner to
analyze correct implementation of PAuthABI.
Commit: 11fdeadbdff245531f8d2ee9dd7141fe966a077f
https://github.com/llvm/llvm-project/commit/11fdeadbdff245531f8d2ee9dd7141fe966a077f
Author: Andrey Timonin <timonina1909 at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[mlir][emitc][NFC] Add an example to the description of the emitc.literal operation (#128005)
Co-authored-by: Marius Brehler <marius.brehler at gmail.com>
Commit: 6b5bde697bb6f2ec8564c9b35bbf9f2d5b703f13
https://github.com/llvm/llvm-project/commit/6b5bde697bb6f2ec8564c9b35bbf9f2d5b703f13
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/test/Analysis/ftime-trace.cpp
Log Message:
-----------
[analyzer] Refine TimeTrace name for dispatchWorkItem (#128352)
Fixes
https://github.com/llvm/llvm-project/pull/125508#discussion_r1965038954
Commit: f89a986153a5907468f8f1f1e7f9f9bccfa4bb93
https://github.com/llvm/llvm-project/commit/f89a986153a5907468f8f1f1e7f9f9bccfa4bb93
Author: Andrey Timonin <timonina1909 at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[mlir][emitc][NFC] Add an example to the description of the emitc.verbatim operation (#128004)
The official page provides an explanation of the **new** functionality
of `emitc.verbatim`, but a classic example in the `.td` file for this
operation is still missing.
Commit: 4db54e9f1ac61e52c4318f17fa5d921501504a97
https://github.com/llvm/llvm-project/commit/4db54e9f1ac61e52c4318f17fa5d921501504a97
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-23 (Sun, 23 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#128458)
Commit: 71b7b1f79f8eab5b4d4eb0354d5b74ce3addd977
https://github.com/llvm/llvm-project/commit/71b7b1f79f8eab5b4d4eb0354d5b74ce3addd977
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-23 (Sun, 23 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#128461)
Commit: ea248365fa1539262c82943f50e28ed47687033d
https://github.com/llvm/llvm-project/commit/ea248365fa1539262c82943f50e28ed47687033d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-23 (Sun, 23 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/SampleContextTracker.cpp
Log Message:
-----------
[IPO] Avoid repeated map lookups (NFC) (#128462)
Commit: abcb66d18e3898ee42d3d313b46e18b97639a3cc
https://github.com/llvm/llvm-project/commit/abcb66d18e3898ee42d3d313b46e18b97639a3cc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-23 (Sun, 23 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#128463)
Commit: 1dc8578df700aaf9ba6bff6c79665a05fd0a30e9
https://github.com/llvm/llvm-project/commit/1dc8578df700aaf9ba6bff6c79665a05fd0a30e9
Author: David Green <david.green at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add vrev shuffle cost tests. NFC
Commit: 89824547ecdcab53734c02621b92f901f1615393
https://github.com/llvm/llvm-project/commit/89824547ecdcab53734c02621b92f901f1615393
Author: David Green <david.green at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
Log Message:
-----------
[AArch64] Add rev codegen tests for bfloat16. NFC
Commit: 0770afb88ec150e58498c0653c7818664d07ca71
https://github.com/llvm/llvm-project/commit/0770afb88ec150e58498c0653c7818664d07ca71
Author: Christian Sigg <csigg at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M bolt/include/bolt/Passes/NonPacProtectedRetAnalysis.h
Log Message:
-----------
[bolt] Remove unnecessary include.
... which introduced a testing dependency in
https://github.com/llvm/llvm-project/commit/850b49297615a613ac83adca2c9cf823a4b8ef95
Commit: 7cda365e12f782d018195556b8fbd32428a0b886
https://github.com/llvm/llvm-project/commit/7cda365e12f782d018195556b8fbd32428a0b886
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for f32 in redux.sync Op (#128137)
This change adds support for the f32 variants of the `redux.sync`
instruction in the NVVM Dialect through the newly added intrinsics for
the same.
Commit: 19a39e98ffdd93dce98557d07cff40cc1799f568
https://github.com/llvm/llvm-project/commit/19a39e98ffdd93dce98557d07cff40cc1799f568
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/arrays.cpp
Log Message:
-----------
[clang][bytecode] Handle non-primitive array index expressions (#128479)
By rejecting them instead of asserting in `classifyPrim()`.
Commit: 5c6453da8db5deed1ee22215c7def86fc270ecb9
https://github.com/llvm/llvm-project/commit/5c6453da8db5deed1ee22215c7def86fc270ecb9
Author: David Green <david.green at arm.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/AArch64/vector-reverse.ll
Log Message:
-----------
[AArch64] Add BF16 REV costs.
Same as FP16 costs, these full reverse shuffles can use REV or REV+EXT.
Commit: 6ad55f15176d10cd094c960807eac4ee2aa68a89
https://github.com/llvm/llvm-project/commit/6ad55f15176d10cd094c960807eac4ee2aa68a89
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated hash lookups (NFC) (#128459)
Commit: 47656dc765aabed8079c650261a79a7e85c4370c
https://github.com/llvm/llvm-project/commit/47656dc765aabed8079c650261a79a7e85c4370c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#128464)
Commit: 229dcf9d3456e95dff2aa0a8eef0a707bd2106c1
https://github.com/llvm/llvm-project/commit/229dcf9d3456e95dff2aa0a8eef0a707bd2106c1
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
A llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NPM] Port MachineLateInstrsCleanup to NPM (#128160)
There are no standalone tests for this pass for backends implementing
the NPM yet.
Commit: 301fe4797191e528d23dcaf52b8e47649d2bf555
https://github.com/llvm/llvm-project/commit/301fe4797191e528d23dcaf52b8e47649d2bf555
Author: Florin Popa <popa.florin at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M lld/test/ELF/aarch64-relocs.s
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
A llvm/test/MC/AArch64/align-code.s
Log Message:
-----------
[AArch64][ELF] Section alignment of 4 for AArch64 instruction (#114031)
The integrated assembler sets a minimum alignment for the .text section
of 4. However user defined sections get an alignment of 1. Unlike the
GNU assembler which raises the section alignment to 4 if an AArch64
instruction is used, the integrated assembler leaves the alignment at 1
---------
Co-authored-by: Florin Popa <florin.popa at arm.com>
Commit: 7a9f53cecf5774a0696586961184835b01cab02c
https://github.com/llvm/llvm-project/commit/7a9f53cecf5774a0696586961184835b01cab02c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] combineBROADCAST_LOAD - merge across chains (REAPPLIED) (#128209)
Remove the restriction when reusing wider BROADCAST_LOAD nodes that both nodes couldn't have uses of their load chains - use makeEquivalentMemoryOrdering to merge the chains instead.
Reapplied - move makeEquivalentMemoryOrdering prior to the CombineTo call to ensure that the original node hasn't already been removed.
Fixes asan use-after-poison error reported in #128380 / 50b0669e8468279518ae0be27c8b6a134c4d95d1.
Commit: 6c2d418027be6906733972256e379a844f88fc06
https://github.com/llvm/llvm-project/commit/6c2d418027be6906733972256e379a844f88fc06
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libclc/generic/lib/gen_convert.py
Log Message:
-----------
[libclc] Fix int<->float conversion builtins (#126905)
While working on moving the conversion builtins to the CLC library in
25c05541 it was discovered that many weren't passing the OpenCL-CTS
tests.
As it happens, the clspv-specific code for conversion implementations
between integer and floating-point types was more correct. However:
* The clspv code was generating 'sat' conversions to floating-point
types, which are not legal
* The clspv code around rtn/rtz conversions needed tweaking as it wasn't
validating when sizeof(dst) > sizeof(src), e.g., int -> double.
With this commit, the CTS failures seen before have been resolved.
This also assumes that the new implementations are correct also for
clspv. If this is the case, then 'clc' and 'clspv' modes are mutually
exclusive and we can simplify the build process for conversions by not
building clc-clspv-convert.cl.
Commit: c5f40bf024ee2d62478c8036fb174d75ecabe51f
https://github.com/llvm/llvm-project/commit/c5f40bf024ee2d62478c8036fb174d75ecabe51f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
Log Message:
-----------
[InstCombine] Fold `X!=Y ? ctz(X^Y, true) : BW -> ctz(X^Y, false)` (#128483)
Proof: https://alive2.llvm.org/ce/z/mzL6W2
Closes https://github.com/llvm/llvm-project/issues/128441.
Commit: 35c90bfdda0d7021c7ec7e6603e5b5753fcc8069
https://github.com/llvm/llvm-project/commit/35c90bfdda0d7021c7ec7e6603e5b5753fcc8069
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Remove virtual from getOutliningTypeImpl override. NFC (#128482)
Commit: 3532651b6fc1cd637d2e0ab5d979343b24d422f7
https://github.com/llvm/llvm-project/commit/3532651b6fc1cd637d2e0ab5d979343b24d422f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
RegAllocGreedy: Add braces
Commit: e7ad07ffb846a9812d9567b8d4b680045dce5b28
https://github.com/llvm/llvm-project/commit/e7ad07ffb846a9812d9567b8d4b680045dce5b28
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
A libclc/clc/include/clc/internal/math/clc_sw_fma.h
A libclc/clc/include/clc/math/clc_fma.h
M libclc/clc/include/clc/math/math.h
A libclc/clc/lib/clspv/SOURCES
A libclc/clc/lib/clspv/math/clc_sw_fma.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_fma.cl
A libclc/clc/lib/generic/math/clc_fma.inc
A libclc/clc/lib/generic/math/clc_sw_fma.cl
A libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv/math/clc_runtime_has_hw_fma32.cl
M libclc/clspv/lib/math/fma.cl
R libclc/generic/include/math/clc_fma.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_exp10.cl
R libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/fma.cl
R libclc/generic/lib/math/fma.inc
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/spirv/lib/SOURCES
M libclc/spirv/lib/math/fma.cl
R libclc/spirv/lib/math/fma.inc
Log Message:
-----------
[libclc] Move fma to the CLC library (#126052)
This builtin is a little more involved than others as targets deal with
fma in various different ways.
Fundamentally, the CLC __clc_fma builtin compiles to
__builtin_elementwise_fma, which compiles to the @llvm.fma intrinsic.
However, in the case of fp32 fma some targets call the __clc_sw_fma
function, which provides a software implementation of the builtin. This
in principle is controlled by the __CLC_HAVE_HW_FMA32 macro and may be a
runtime decision, depending on how the target defines that macro.
All targets build the CLC fma functions for all types. This is to the
CLC library can have a reliable internal implementation for its own
purposes.
For AMD/NVPTX targets there are no meaningful changes to the generated
LLVM bytecode. Some blocks of code have moved around, which confounds
llvm-diff.
For the clspv and SPIR-V/Mesa targets, only fp32 fma is of interest. Its
use in libclc is tightly controlled by checking __CLC_HAVE_HW_FMA32
first. This can either be a compile-time constant (1, for clspv) or a
runtime function for SPIR-V/Mesa.
The SPIR-V/Mesa target only provided fp32 fma in the OpenCL layer. It
unconditionally mapped that to the __clc_sw_fma builtin, even though the
generic version in theory had a runtime toggle through
__CLC_HAVE_HW_FMA32 specifically for that target. Callers of fma,
though, would end up using the ExtInst fma, *not* calling the _Z3fmafff
function provided by libclc.
This commit keeps this system in place in the OpenCL layer, by mapping
fma to __clc_sw_fma. Where other builtins would previously call fma
(i.e., result in the ExtInst), they now call __clc_fma. This function
checks the __CLC_HAVE_HW_FMA32 runtime toggle, which selects between the
slow version or the quick version. The quick version is the LLVM fma
intrinsic which llvm-spirv translates to the ExtInst.
The clspv target had its own software implementation of fp32 fma, which
it called unconditionally - even though __CLC_HAVE_HW_FMA32 is 1 for
that target. This is potentially just so its library ships a software
version which it can fall back on. In the OpenCL layer, the target
doesn't provide fp64 fma, and maps fp16 fma to fp32 mad.
This commit keeps this system roughly in place: in the OpenCL layer it
maps fp32 fma to __clc_sw_fma, and fp16 fma to mad. Where builtins would
previously call into fma, they now call __clc_fma, which compiles to the
LLVM intrinsic. If this goes through a translation to SPIR-V it will
become the fma ExtInst, or the intrinsic could be replaced by the
_Z3fmafff software implementation.
The clspv and SPIR-V/Mesa targets could potentially be cleaned up later,
depending on their needs.
Commit: 3dc159431be7a8c5f1a26a8bd57794f1c7008969
https://github.com/llvm/llvm-project/commit/3dc159431be7a8c5f1a26a8bd57794f1c7008969
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
M clang/include/clang/StaticAnalyzer/Core/PathDiagnosticConsumers.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/AnalysisManager.h
M clang/include/clang/StaticAnalyzer/Frontend/AnalysisConsumer.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/StaticAnalyzer/Core/AnalysisManager.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CheckerRegistration.h
M clang/unittests/StaticAnalyzer/Reusables.h
Log Message:
-----------
[analyzer] Clean up slightly the messed up ownership model of the analyzer (#128368)
Well, yes. It's not pretty.
At least after this we would have a bit more unique pointers than
before.
This is for fixing the memory leak diagnosed by:
https://lab.llvm.org/buildbot/#/builders/24/builds/5580
And that caused the revert of #127409.
After these uptrs that patch can re-land finally.
Commit: 5a2bee04d08868d1b8c2ddb1719be1cee0f577bf
https://github.com/llvm/llvm-project/commit/5a2bee04d08868d1b8c2ddb1719be1cee0f577bf
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
M llvm/tools/llvm-objdump/ELFDump.cpp
Log Message:
-----------
[llvm-objdump]Correct .dynstr finding of getDynamicStrTab() (#127975)
The dynamic string table used by the dynamic section is referenced by
the sh_link field of that section, so we should use that directly,
rather than going via the dynamic symbol table.
More info:
https://github.com/llvm/llvm-project/pull/125679#discussion_r1961333454
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: 61fb9541095316db352f0e4da855305d1715da10
https://github.com/llvm/llvm-project/commit/61fb9541095316db352f0e4da855305d1715da10
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Improve support for vector.extract(broadcast) (#116234)
This patch improves support for vector.extract(broadcast) dynamic
dimension folders. This is mostly a matter of moving a conservative
condition for dynamic dimensions. The broadcast folder for
vector.extract now covers the cases that the vector.extractelement +
broadcast folder does.
This patch also improves test coverage for vector.extract + broadcast
folders/canonicalizers. The folders/canonicalizers now enumerate every
supported / unsupported case.
Commit: 9cbdcfcafdc0646cef27c94ee22770b2d7aebf6a
https://github.com/llvm/llvm-project/commit/9cbdcfcafdc0646cef27c94ee22770b2d7aebf6a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
Log Message:
-----------
[CaptureTracking] Remove StoreCaptures parameter (NFC)
The implementation doesn't use it, and is unlikely to use it in
the future.
The places that do set StoreCaptures=false, do so incorrectly and
would be broken if the parameter actually did anything.
Commit: 7de64925da9f09d1a66230c5e118fe127a6c49e3
https://github.com/llvm/llvm-project/commit/7de64925da9f09d1a66230c5e118fe127a6c49e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/ARM/vpadd.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
Log Message:
-----------
[DAG] shouldReduceLoadWidth - hasOneUse should check just the loaded value - not the chain (#128167)
The hasOneUse check was failing in any case where the load was part of a chain - we should only be checking if the loaded value has one use, and any updates to the chain should be handled by the fold calling shouldReduceLoadWidth.
I've updated the x86 implementation to match, although it has no effect here yet (I'm still looking at how to improve the x86 implementation) as the inner for loop was discarding chain uses anyway.
By using SDValue::hasOneUse instead this patch exposes a missing dependency on the LLVMSelectionDAG library in a lot of tools + unittests, which resulted in having to make SDNode::hasNUsesOfValue inline.
Noticed while fighting the x86 regressions in #122671
Commit: db40592de60f579afa18db3a06a4505c8e63de65
https://github.com/llvm/llvm-project/commit/db40592de60f579afa18db3a06a4505c8e63de65
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineFunction.cpp
Log Message:
-----------
MachineFunction: Remove null check on TargetRegisterInfo (#128480)
Targets are required to define this, it is not optional. Make the method
pure virtual to enforce this
Commit: 9b52d9e18662160d14b882371a9c749770fd99bf
https://github.com/llvm/llvm-project/commit/9b52d9e18662160d14b882371a9c749770fd99bf
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Prevent loop wrapper translation crashes (#115475)
This patch updates the `convertOmpOpRegions` translation function to
prevent calling it for a loop wrapper region from causing a compiler
crash due to a lack of terminator operations.
This problem is currently not triggered because there are no cases for
which the region of a loop wrapper is passed to that function. This
will have to change in order to support composite construct translation
to LLVM IR.
Commit: 6aea6308d125c15b05bf10766eb831f32140968a
https://github.com/llvm/llvm-project/commit/6aea6308d125c15b05bf10766eb831f32140968a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
Log Message:
-----------
AMDGPU: Fix creating illegally typed readfirstlane in atomic optimizer (#128388)
We need to promote 8/16-bit cases to 32-bit. Unfortunately we are
missing demanded bits optimizations on readfirstlane, so we end up
emitting
an and instruction on the input. I'm also surprised this pass isn't
handling
half or bfloat yet.
Commit: e1cc5e9f9ab628f501bb88488e865c2a039321e4
https://github.com/llvm/llvm-project/commit/e1cc5e9f9ab628f501bb88488e865c2a039321e4
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
Log Message:
-----------
[clang-tidy] Fix build after 3dc159431be7a8c5f1a26a8bd57794f1c7008969
Commit: c80b99d98ad0c7a3c185b4f09d2b60affb34cad1
https://github.com/llvm/llvm-project/commit/c80b99d98ad0c7a3c185b4f09d2b60affb34cad1
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
R clang/test/Analysis/uninit-asm-goto.cpp
R clang/test/Analysis/uninit-sometimes.cpp
A clang/test/SemaCXX/uninit-asm-goto.cpp
A clang/test/SemaCXX/uninit-sometimes.cpp
Log Message:
-----------
[Sema][NFC] Move two misplaced uninit tests to clang/test/SemaCXX (#128013)
Because they are the last two remaining test files that appeared under
`clang/test/Analysis` but were unrelated to the clang static analyzer.
For background see the following discourse thread:
https://discourse.llvm.org/t/taking-ownership-of-clang-test-analysis/84689/2
I placed them in in `clang/test/SemaCXX` because they are testing the
`-Wuninitialized` warning family and the other tests of this feature can
be found there (or in `Sema`, `SemaObjC` depending on the language).
Note that `clang/test/Analysis` contains many other test files named
`uninit-*`, but those test the uninitialized value handling of the clang
static analyzer, which is independent of the (non-path-sensitive)
compiler warnings that are tested in the two files that I'm moving.
Also note that the implementation of the `-Wuninitialized`-like warnings
relies on the source files `clang/lib/Analysis/UninitializedValues.cpp`
and `clang/lib/Sema/AnalysisBasedWarnings.cpp`, and this would
theoretically justify leaving their tests in the "Analysis" directory;
but in practice the "Analysis" directory is almost exclusively used by
the static analyzer, so I still decided to relocate these two tests for
the sake of consistency.
Commit: 1ed359e6826590cc77f62af906b6cf4b5354a7fb
https://github.com/llvm/llvm-project/commit/1ed359e6826590cc77f62af906b6cf4b5354a7fb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
R cross-project-tests/debuginfo-tests/dexter/dex/tools/clang_opt_bisect/Tool.py
Log Message:
-----------
[Dexter] Remove clang-opt-bisect analyzer tool (#128165)
The idea behind this tool was that you'd instrument a source file to
measure its debug-info quality, then watch as it progressively got worse
with more optimisations being enabled in clang. However we've since
stripped the "building" portions of Dexter out as they were ill placed,
which makes this tooling redundant. The lack of __init__.py adjacent to
it means it couldn't be run anyway.
The core idea behind this is still sound; just it's best placed on the
other side of the build system, something that Dexter shouldn't try to
solve.
Commit: 971fc42254706b7a0cdeaf8183478d1e2a9aee51
https://github.com/llvm/llvm-project/commit/971fc42254706b7a0cdeaf8183478d1e2a9aee51
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
TargetTransformInfo: Add missing consts to a couple of methods (#128492)
Commit: aca8a5cb2325767859f38894f42ce47732cbb53e
https://github.com/llvm/llvm-project/commit/aca8a5cb2325767859f38894f42ce47732cbb53e
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/generic/lib/gen_convert.py
Log Message:
-----------
[libclc] Remove clspv-specific clc conversions (#128500)
The clc and clc+clspv modes produced the same conversions code, so this
patch simplifies the process. It further simplifies the internal checks
the script makes by assuming the mutual exclusivity.
Commit: 0f34b656f01a3774f28436e8dee4d99c6a7bc2cc
https://github.com/llvm/llvm-project/commit/0f34b656f01a3774f28436e8dee4d99c6a7bc2cc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
InstCombine: Remove a check for pointer bitcasts (#128491)
Commit: 72768d9bb8ad3e97a852270726f04d7167d9ef50
https://github.com/llvm/llvm-project/commit/72768d9bb8ad3e97a852270726f04d7167d9ef50
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
Log Message:
-----------
[ConstraintElim] Teach checkAndReplaceCondition about samesign (#128168)
`samesign upred` is equivalent to `spred`:
https://alive2.llvm.org/ce/z/57iaEC
Commit: c83bdc7c111f8100d8fdf9e7a87d05b5a1a3ae94
https://github.com/llvm/llvm-project/commit/c83bdc7c111f8100d8fdf9e7a87d05b5a1a3ae94
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
Log Message:
-----------
[MLIR][OpenMP] Normalize lowering of omp.loop_nest (#127217)
This patch refactors the translation of `omp.loop_nest` operations into
LLVM IR so that it is handled similarly to other operations. Before this
change, the responsibility of translating the loop nest fell into each
loop wrapper, causing code duplication. This patch centralizes that
handling of the loop. One consequence of this was fixing an issue
lowering non-inclusive `omp.simd` loops.
As a result, it is now expected that the handling of composite
constructs is performed collaboratively among translating functions for
each operation involved. At the moment, only `do/for simd` is supported
by ignoring SIMD information, and this behavior is preserved.
The translation of loop wrapper operations needs access to the
`llvm::CanonicalLoopInfo` loop information structure in order to apply
transformations to it. This is now created in the nested call to
`convertOmpLoopNest`, so it needs to be passed up to all associated loop
wrapper translation functions. This is done via the creation of an
`OpenMPLoopInfoStackFrame` within `convertHostOrTargetOperation`,
associated to the outermost loop wrapper. This structure is updated by
`convertOmpLoopNest`, making the result available to all loop wrappers
after their body has been translated.
Commit: d5148f000a9213d5e64f49c67d0e861e8b303d92
https://github.com/llvm/llvm-project/commit/d5148f000a9213d5e64f49c67d0e861e8b303d92
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll
Log Message:
-----------
[X86] Fix arithmetic error in extractVector (#128052)
The computation of the element count for the result VT in extractVector
is incorrect when vector width does not divide VT.getSizeInBits(), which
can occur when the source vector element count is not a power of two,
e.g. extracting a vectorWidth 256b vector from a 384b source.
This rewrites the expression so the division is exact given that
vectorWidth is a multiple of the source element size.
Commit: 4ba3ebef642eaa4d46567a972c5ee1badb2ebadf
https://github.com/llvm/llvm-project/commit/4ba3ebef642eaa4d46567a972c5ee1badb2ebadf
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
On Windows, remove the UCRT libraries from the release script (#128378)
Since the 19.0 release, the UCRT dlls shouldn't be included anymore in the Windows distribution, as we link the CRT
statically into all distributed binaries.
https://discourse.llvm.org/t/llvm-x86-64-pc-windows-msvc-binaries-no-longer-need-msvc-runtime-dlls-since-19-x/84465
Commit: 8199c2d427fcf72e39aa29dd457eebca8a985af8
https://github.com/llvm/llvm-project/commit/8199c2d427fcf72e39aa29dd457eebca8a985af8
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/array-character.f90
R flang/test/Lower/array-copy.f90
R flang/test/Lower/array-derived-assignments.f90
M flang/test/Lower/array-elemental-calls-char-byval.f90
M flang/test/Lower/array-elemental-calls-char.f90
R flang/test/Lower/array-expression.f90
M flang/test/Lower/call-by-value-attr.f90
M flang/test/Lower/call-parenthesized-arg.f90
M flang/test/Lower/character-assignment.f90
R flang/test/Lower/character-concatenation.f90
M flang/test/Lower/character-substrings.f90
M flang/test/Lower/components.f90
M flang/test/Lower/derived-assignments.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/forall/scalar-substring.f90
Log Message:
-----------
[flang][NFC] update some old tests to HLFIR lowering (#127230)
Update some LIT tests that are using the legacy lowering to use HLFIR.
This makes testing more modular and is a step towards getting rid of the
legacy lowering (that is only kept because of the tests).
There are many more.
I deleted a couple file that were very specific to the legacy lowering
(e.g. array-copy).
Commit: de473fcdea7024a70dd5ff5f929049c904457b07
https://github.com/llvm/llvm-project/commit/de473fcdea7024a70dd5ff5f929049c904457b07
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libcxx/utils/ci/run-buildbot-container
Log Message:
-----------
[libc++] Synchronize Docker container SHA in run-buildbot-container (#128225)
We should really find a way to have a canonical location for that SHA,
but last time I looked into it I failed to find a way to share it.
Commit: 363bfd6090b0755fc133250ba3470b420902d976
https://github.com/llvm/llvm-project/commit/363bfd6090b0755fc133250ba3470b420902d976
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
A libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/module.modulemap
Log Message:
-----------
[libc++] Use the new locale base API on Linux (#128007)
This follows the lead for what we did on all other platforms.
Commit: aa770857eead289bedc19237a0a4657d3311668d
https://github.com/llvm/llvm-project/commit/aa770857eead289bedc19237a0a4657d3311668d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
A llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
A llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
Log Message:
-----------
[MergeFunc] Add tests for (merging weak|linkonce)_odr functions.
Tests for https://github.com/llvm/llvm-project/pull/125050.
Commit: 96c87a16a507207e839f20b668ccd51dd2db6123
https://github.com/llvm/llvm-project/commit/96c87a16a507207e839f20b668ccd51dd2db6123
Author: lorenzo chelini <lchelini at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/IR/Region.cpp
Log Message:
-----------
[MLIR][NFC] Fix comment in `Region.cpp`
BlockAndValueMapping has been renamed to IRMapping
Commit: 22a5bb32b787443b70476cc1359709b6c888b591
https://github.com/llvm/llvm-project/commit/22a5bb32b787443b70476cc1359709b6c888b591
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/Store.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/region-store.cpp
M clang/unittests/StaticAnalyzer/StoreTest.cpp
Log Message:
-----------
[analyzer] Limit Store by region-store-binding-limit (#127602)
In our test pool, the max entry point RT was improved by this change:
1'181 seconds (~19.7 minutes) -> 94 seconds (1.6 minutes)
BTW, the 1.6 minutes is still really bad. But a few orders of magnitude
better than it was before.
This was the most servere RT edge-case as you can see from the numbers.
There are are more known RT bottlenecks, such as:
- Large environment sizes, and `removeDead`. See more about the failed
attempt on improving it at:
https://discourse.llvm.org/t/unsuccessful-attempts-to-fix-a-slow-analysis-case-related-to-removedead-and-environment-size/84650
- Large chunk of time could be spend inside `assume`, to reach a fixed
point. This is something we want to look into a bit later if we have
time.
We have 3'075'607 entry points in our test set.
About 393'352 entry points ran longer than 1 second when measured.
To give a sense of the distribution, if we ignore the slowest 500 entry
points, then the maximum entry point runs for about 14 seconds. These
500 slow entry points are in 332 translation units.
By this patch, out of the slowest 500 entry points, 72 entry points were
improved by at least 10x after this change.
We measured no RT regression on the "usual" entry points.
(The dashed lines represent the maximum of their RT)
CPP-6092
Commit: eb14d2a1d48fe76c5faed71a08547135a35ee742
https://github.com/llvm/llvm-project/commit/eb14d2a1d48fe76c5faed71a08547135a35ee742
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/bv-matched-node-reorder.ll
Log Message:
-----------
[SLP]Fix check for matched gather node, if it is a subvector node
If the gather node is a subvector node, it may match the existing
vector/gather node in the graph, but still may require reordering. in
this case need to fully check its dependencies to prevent a compiler
crash.
Fixes #128401
Commit: 7262a1ea313699c733ec24925fe83c8f8e60334c
https://github.com/llvm/llvm-project/commit/7262a1ea313699c733ec24925fe83c8f8e60334c
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang] Set compile definitions for flang-rt build on AIX (#127919)
After commit b55f751, the flang-rt build on AIX is missing `-D_LARGE_FILE_API
-D_XOPEN_SOURCE=700` in compiling the source. This patch is to add the
compile definitions.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: a88167a60d0b5529b2a5ab185680f25c3c983ec3
https://github.com/llvm/llvm-project/commit/a88167a60d0b5529b2a5ab185680f25c3c983ec3
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/test/IR/invalid-builtin-attributes.mlir
Log Message:
-----------
[MLIR] Improve error handling when parsing dense attributes (#128523)
Avoid triggering assertions when we expect to parse a string but
encounter a different type. Instead, handle the mismatch gracefully by
emitting a parser error.
Commit: 2dfb29a9b2f63e8dcbace2bf9b73ecc770f62b4d
https://github.com/llvm/llvm-project/commit/2dfb29a9b2f63e8dcbace2bf9b73ecc770f62b4d
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_nan.h
A libclc/clc/include/clc/math/clc_nan.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nan.cl
A libclc/clc/lib/generic/math/clc_nan.inc
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/nan.inc
Log Message:
-----------
[libclc] Move nan to the CLC library (#128521)
Commit: 3a6108bcac26016b791cabce86424c1f1dcf3056
https://github.com/llvm/llvm-project/commit/3a6108bcac26016b791cabce86424c1f1dcf3056
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
Log Message:
-----------
[SLP][REVEC] Fix scalar mask is passed to getScalarizationOverhead but the type is vector. (#128476)
Fix "Vector size mismatch".
Commit: 0b52aa1bdbc7416592e9c81d9a44ce411c21e081
https://github.com/llvm/llvm-project/commit/0b52aa1bdbc7416592e9c81d9a44ce411c21e081
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
Log Message:
-----------
[flang] Unsupported rounding modes (#128240)
Two new ieee_round_type values were added in f18 beyond the four values
defined in f03 and f08: ieee_away and ieee_other. Contemporary hardware
typically does not have support for these rounding modes, so flang does
not support them. ieee_support_rounding calls for these values return
false. Current generated code handles some attempts to set the rounding
mode to one of these unsupported values by setting the mode to
ieee_nearest. Update the code to explicitly do this in all cases.
Commit: 16f9c5da45b88ace429064b4823e94491b0ea9b1
https://github.com/llvm/llvm-project/commit/16f9c5da45b88ace429064b4823e94491b0ea9b1
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
Log Message:
-----------
[SPIR-V] Stop generating StorageImageReadWithoutFormat and StorageImageWriteWithoutFormat for the Unknown image format in the OpenCL environment (#128497)
This PR resolves the issue of the SPIR-V specification, requiring
Shader-coupled capabilities to read/write images in the OpenCL SPIR-V
environment, from the perspective of the LLVM SPIR-V backend. See
https://github.com/KhronosGroup/SPIRV-Headers/issues/487 for details and
discussion.
Current implementation correctly reproduces requirements of the SPIR-V
specification, however, since the requirements are problematic, out
current implementation blocks generation of valid SPIR-V code for
compute environments. This PR is to implement a solution discussed at
the SPIR-V WG to allow proceeding with generation of valid SPIR-V code
for the OpenCL environment and do not impact Vulkan environment at the
same time.
Commit: 529b3d16daf2c7970f6f0b1f97e8ed09891c726a
https://github.com/llvm/llvm-project/commit/529b3d16daf2c7970f6f0b1f97e8ed09891c726a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Remove SK_Select from manual splitting in getShuffleCost
We have general splitting logic for this kind just below, which to my
knowledge is both correct and precise. Given no test changes, either
a) the adhoc logic works out the same, or b) we have no coverage. I
did not investigate which.
Commit: 17ccaf4fa82ed6d081144f91b5580e24e44d435c
https://github.com/llvm/llvm-project/commit/17ccaf4fa82ed6d081144f91b5580e24e44d435c
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M offload/plugins-nextgen/host/CMakeLists.txt
Log Message:
-----------
[NFC][Offload] Fix typo to output architecture (#128527)
Commit: b66ec64b5b634cbf760d69d1629e462268aa1cbd
https://github.com/llvm/llvm-project/commit/b66ec64b5b634cbf760d69d1629e462268aa1cbd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
RegAllocGreedy: Remove unnecessary null register class check (#128487)
Commit: 538b898a836ac6efc3b0ec12cf27b511608d2e64
https://github.com/llvm/llvm-project/commit/538b898a836ac6efc3b0ec12cf27b511608d2e64
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilia-invalid.s
A llvm/test/MC/RISCV/xqcilia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (#124706)
This extension adds eight 48 bit large arithmetic instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Commit: cebb8f72b7937548bd17c7972297f2efafa1e958
https://github.com/llvm/llvm-project/commit/cebb8f72b7937548bd17c7972297f2efafa1e958
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMPIRBuilder] Add support for distribute constructs (#127816)
This patch adds the `OpenMPIRBuilder::createDistribute()` function and
updates `OpenMPIRBuilder::applyStaticWorkshareLoop()` in preparation for
adding `distribute` support to flang.
Co-authored-by: Dominik Adamski <dominik.adamski at amd.com>
Commit: 5bddadf783c177943fa4f86fa0d295d4e88e7dea
https://github.com/llvm/llvm-project/commit/5bddadf783c177943fa4f86fa0d295d4e88e7dea
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[CodingStandard] Rework anonymous namespace section to cover visibility more broadly (#126775)
- Rename anonymous namespace section and rework it to
cover visibility more broadly.
- Add language suggesting restricting visibility as much as
possible, using various C++ facilities.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 4defac91dbdf4d54aa40a47851c48e9c587fb7e9
https://github.com/llvm/llvm-project/commit/4defac91dbdf4d54aa40a47851c48e9c587fb7e9
Author: Matthias Springer <me at m-sp.org>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][GPUToNVVM] Add `benefit` to `populate` functions (#128484)
Certain GPU->NVVM patterns compete with Arith->LLVM patterns. (The ones
that lower to libdevice.) Add an optional `benefit` parameter to all
`populate` functions so that users can give preference to GPU->NVVM
patterns.
Commit: 7a4cb9bac50c8c19ec0d4ab7f186ef086064a549
https://github.com/llvm/llvm-project/commit/7a4cb9bac50c8c19ec0d4ab7f186ef086064a549
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
M clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/HeuristicResolver.cpp
Log Message:
-----------
[clang-tidy][NFC] Expose HeuristicResolver::lookupDependentName() and use it in StandaloneEmptyCheck (#128391)
The use replaces CXXRecordDecl::lookupDependentName() which
HeuristicResolver aims to supersede.
Commit: ff7790e6dde7859b993b7d9abb4a2ec4fe2ae779
https://github.com/llvm/llvm-project/commit/ff7790e6dde7859b993b7d9abb4a2ec4fe2ae779
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
Log Message:
-----------
[MLIR][OpenMP] Simplify definition of the BlockArgOpenMPOpInterface, NFC (#128198)
This patch removes code duplication from the definition of methods of
the `BlockArgOpenMPOpInterface` and makes the order relationship between
entry block argument generating clauses explicit.
The goal of this change is to make the addition of clauses and methods
to the interface less error-prone.
Commit: 5b2aba0df176766108d01072b3babf5c47d9ba52
https://github.com/llvm/llvm-project/commit/5b2aba0df176766108d01072b3babf5c47d9ba52
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M bolt/docs/BinaryAnalysis.md
M bolt/include/bolt/Core/MCPlusBuilder.h
A bolt/include/bolt/Passes/NonPacProtectedRetAnalysis.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Passes/CMakeLists.txt
A bolt/lib/Passes/NonPacProtectedRetAnalysis.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/test/binary-analysis/AArch64/cmdline-args.test
A bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
A bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M bolt/test/binary-analysis/AArch64/lit.local.cfg
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/StandaloneEmptyCheck.cpp
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/Sema/HeuristicResolver.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
M clang/include/clang/StaticAnalyzer/Core/PathDiagnosticConsumers.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/AnalysisManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
M clang/include/clang/StaticAnalyzer/Frontend/AnalysisConsumer.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/StaticAnalyzer/Core/AnalysisManager.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/Store.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/ftime-trace.cpp
M clang/test/Analysis/region-store.cpp
R clang/test/Analysis/uninit-asm-goto.cpp
R clang/test/Analysis/uninit-sometimes.cpp
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/SemaCXX/uninit-asm-goto.cpp
A clang/test/SemaCXX/uninit-sometimes.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CheckerRegistration.h
M clang/unittests/StaticAnalyzer/Reusables.h
M clang/unittests/StaticAnalyzer/StoreTest.cpp
R cross-project-tests/debuginfo-tests/dexter/dex/tools/clang_opt_bisect/Tool.py
M flang-rt/CMakeLists.txt
M flang/docs/Extensions.md
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/array-character.f90
R flang/test/Lower/array-copy.f90
R flang/test/Lower/array-derived-assignments.f90
M flang/test/Lower/array-elemental-calls-char-byval.f90
M flang/test/Lower/array-elemental-calls-char.f90
R flang/test/Lower/array-expression.f90
M flang/test/Lower/call-by-value-attr.f90
M flang/test/Lower/call-parenthesized-arg.f90
M flang/test/Lower/character-assignment.f90
R flang/test/Lower/character-concatenation.f90
M flang/test/Lower/character-substrings.f90
M flang/test/Lower/components.f90
M flang/test/Lower/derived-assignments.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/forall/scalar-substring.f90
M libclc/CMakeLists.txt
A libclc/clc/include/clc/internal/math/clc_sw_fma.h
A libclc/clc/include/clc/math/clc_fma.h
A libclc/clc/include/clc/math/clc_nan.h
A libclc/clc/include/clc/math/clc_nan.inc
M libclc/clc/include/clc/math/math.h
A libclc/clc/lib/clspv/SOURCES
A libclc/clc/lib/clspv/math/clc_sw_fma.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_fma.cl
A libclc/clc/lib/generic/math/clc_fma.inc
A libclc/clc/lib/generic/math/clc_nan.cl
A libclc/clc/lib/generic/math/clc_nan.inc
A libclc/clc/lib/generic/math/clc_sw_fma.cl
A libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv/math/clc_runtime_has_hw_fma32.cl
M libclc/clspv/lib/math/fma.cl
R libclc/generic/include/math/clc_fma.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/gen_convert.py
M libclc/generic/lib/math/clc_exp10.cl
R libclc/generic/lib/math/clc_fma.cl
M libclc/generic/lib/math/clc_fmod.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_remainder.cl
M libclc/generic/lib/math/clc_remquo.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/fma.cl
R libclc/generic/lib/math/fma.inc
M libclc/generic/lib/math/nan.cl
M libclc/generic/lib/math/nan.inc
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/spirv/lib/SOURCES
M libclc/spirv/lib/math/fma.cl
R libclc/spirv/lib/math/fma.inc
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
A libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/module.modulemap
M libcxx/utils/ci/run-buildbot-container
M lld/test/ELF/aarch64-relocs.s
M llvm/docs/CodingStandards.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/SampleContextTracker.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/AArch64/vector-reverse.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/neon-reverseshuffle.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/ARM/vpadd.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
A llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
A llvm/test/MC/AArch64/align-code.s
A llvm/test/MC/RISCV/xqcilia-invalid.s
A llvm/test/MC/RISCV/xqcilia-valid.s
M llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
M llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr-used.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr-weak-odr-mixed-used.ll
A llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
A llvm/test/Transforms/MergeFunc/merge-weak-odr-used.ll
A llvm/test/Transforms/MergeFunc/merge-weak-odr.ll
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
A llvm/test/Transforms/SLPVectorizer/X86/bv-matched-node-reorder.ll
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/release/build_llvm_release.bat
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/IR/Region.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/IR/invalid-builtin-attributes.mlir
M mlir/test/Target/LLVMIR/nvvm/cvt_tf32.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-alloc.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-barriers.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-commit.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-cp.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-fence-wait.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-shift.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_prefetch.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_store_reduce.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M offload/plugins-nextgen/host/CMakeLists.txt
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/28366872c9a8...5b2aba0df176
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