[all-commits] [llvm/llvm-project] 6757cf: [RISCV] [MachineOutliner] Analyze all candidates (...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6757cf4e6f1c7767d605e579930a24758c0778dc
      https://github.com/llvm/llvm-project/commit/6757cf4e6f1c7767d605e579930a24758c0778dc
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-02-21 (Fri, 21 Feb 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    A llvm/test/CodeGen/RISCV/machine-outliner-call-x5-liveout.mir

  Log Message:
  -----------
  [RISCV] [MachineOutliner] Analyze all candidates (#127659)

#117700 made a change from analyzing all the candidates to analyzing
just the first candidate before deciding to either delete or keep all of
them.

Even though the candidates all have the same instructions, the basic
blocks in which they are present are different and we will need to check
each of them before deciding whether to keep or erase them.
Particularly, `isAvailableAcrossAndOutOfSeq` checks to see if the
register (x5 in this case) is available from the end of the MBB to the
beginning of the candidate and not checking this for each candidate led
to incorrect candidates being outlined resulting in correctness issues
in a few downstream benchmarks.

Similarly, deleting all the candidates if the first one is not viable
will result in missed outlining opportunities.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications