[all-commits] [llvm/llvm-project] 7c2ebe: AMDGPU: Restrict src0 to VGPRs only for certain cv...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7
      https://github.com/llvm/llvm-project/commit/7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2025-02-21 (Fri, 21 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
    M llvm/test/MC/AMDGPU/gfx950_err.s

  Log Message:
  -----------
  AMDGPU: Restrict src0 to VGPRs only for certain cvt scale opcodes. (#127464)

The Src0 operand width higher that 32-bits of cvt_scale opcodes
operating on FP6/BF6/FP4 need to be restricted to take only VGPRs.



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