[all-commits] [llvm/llvm-project] f83ef2: [NVPTX] Remove redundant addressing mode instrs (#...

[Alex MacLean via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f83ef281b5d3cf4d93ea58122280d47a8595a2bd
      https://github.com/llvm/llvm-project/commit/f83ef281b5d3cf4d93ea58122280d47a8595a2bd
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2025-02-20 (Thu, 20 Feb 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
    M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
    M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
    M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
    M llvm/test/CodeGen/NVPTX/variadics-backend.ll

  Log Message:
  -----------
  [NVPTX] Remove redundant addressing mode instrs (#128044)

Remove load and store instructions which do not include an immediate,
and just use the immediate variants in all cases. These variants will be
emitted exactly the same when the immediate offset is 0. Removing the
non-immediate versions allows for the removal of a lot of code and would
make any MachineIR passes simpler.



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