[all-commits] [llvm/llvm-project] 6ecc50: [AMDGPU] Replace gfx940 and gfx941 with gfx942 in ...

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/02-11-_amdgpu_replace_gfx940_and_gfx941_with_gfx942_in_llvm
  Home:   https://github.com/llvm/llvm-project
  Commit: 6ecc50b535007d6d96cb9fd4e543cc7c359e2a49
      https://github.com/llvm/llvm-project/commit/6ecc50b535007d6d96cb9fd4e543cc7c359e2a49
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-02-19 (Wed, 19 Feb 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
    M clang/test/CodeGenOpenCL/amdgpu-features.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
    M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/BinaryFormat/ELF.h
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/include/llvm/TargetParser/TargetParser.h
    M llvm/lib/Object/ELFObjectFile.cpp
    M llvm/lib/ObjectYAML/ELFYAML.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNProcessors.td
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/AMDGPU/SISchedule.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/TargetParser/TargetParser.cpp
    M llvm/tools/llvm-readobj/ELFDumper.cpp

  Log Message:
  -----------
  [AMDGPU] Replace gfx940 and gfx941 with gfx942 in llvm

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

This PR removes all non-documentation occurrences of gfx940/gfx941 from
the llvm directory, and the remaining occurrences in clang.

Documentation changes will follow.

For SWDEV-512631


  Commit: 707cfbd95712689ddcbfbe9c51ec612c737c4e6e
      https://github.com/llvm/llvm-project/commit/707cfbd95712689ddcbfbe9c51ec612c737c4e6e
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-02-19 (Wed, 19 Feb 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
    M clang/test/CodeGenOpenCL/amdgpu-features.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/TargetParser/TargetParser.cpp

  Log Message:
  -----------
  Revert part of the initial PR to leave the subtarget feature alone.

Also revert the FeatureForceStoreSC0SC1 removal so that it can be
handled in a separate PR.


  Commit: c69444cfae45a5367eb5c5cb600ceff4f4bbc649
      https://github.com/llvm/llvm-project/commit/c69444cfae45a5367eb5c5cb600ceff4f4bbc649
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-02-19 (Wed, 19 Feb 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll

  Log Message:
  -----------
  Update llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll


Compare: https://github.com/llvm/llvm-project/compare/f63b131fcb69...c69444cfae45

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