[all-commits] [llvm/llvm-project] f7a5f0: [AMDGPU][True16][CodeGen] FLAT_load using D16 pseu...

[Brox Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f7a5f067885b7f6cc4a000c8392adf6b777a9108
      https://github.com/llvm/llvm-project/commit/f7a5f067885b7f6cc4a000c8392adf6b777a9108
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-02-18 (Tue, 18 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
    M llvm/test/CodeGen/AMDGPU/flat-address-space.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#114500)

Implement new pseudos with the suffix _t16 for FLAT_LOAD which have
VGPR_16 as the load dst. Lower the pseudos to the existing real
instructions with VGPR_32 src or dst (which makes them consistent with
the hardware encoding). This patch reduces VGPR usage by making hi
halves of VGPRs available for other values.

There are more 8/16 bits ld/st instructions to be supported in the
up-coming patches



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