[all-commits] [llvm/llvm-project] 03ecc8: X86: Fix convertToThreeAddress losing subregister ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/x86/fix-convertToThreeAddress-losing-subregisters
  Home:   https://github.com/llvm/llvm-project
  Commit: 03ecc8df8e5843474901689a82450e0f32e57701
      https://github.com/llvm/llvm-project/commit/03ecc8df8e5843474901689a82450e0f32e57701
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-02-18 (Tue, 18 Feb 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h

  Log Message:
  -----------
  X86: Fix convertToThreeAddress losing subregister indexes

This avoids dozens of regressions in a future patch. These
primarily manifested as assertions where we had copies of 64-bit
registers to 32-bit registers.

This is testable in principle with hand written MIR, but that's
a bit too much x86 for me.


  Commit: 065046bf6fa8f69587d323e8b62421abb8d396a5
      https://github.com/llvm/llvm-project/commit/065046bf6fa8f69587d323e8b62421abb8d396a5
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-02-18 (Tue, 18 Feb 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86FastISel.cpp
    M llvm/lib/Target/X86/X86InstrBuilder.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp

  Log Message:
  -----------
  Address addRegReg fixme


Compare: https://github.com/llvm/llvm-project/compare/6484b4e2595b...065046bf6fa8

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