[all-commits] [llvm/llvm-project] a1d4e4: AMDGPU: Fix foldImmediate breaking register class ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/fix-foldImmediate-breaking-aligned-copy-regclass-constraint
  Home:   https://github.com/llvm/llvm-project
  Commit: a1d4e4ee8e9dde52052f51478d0c6e98ef23f1a1
      https://github.com/llvm/llvm-project/commit/a1d4e4ee8e9dde52052f51478d0c6e98ef23f1a1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-02-18 (Tue, 18 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir

  Log Message:
  -----------
  AMDGPU: Fix foldImmediate breaking register class constraints

This fixes a verifier error when folding an immediate materialized
into an aligned vgpr class into a copy to an unaligned virtual register.


  Commit: 8f0654d7748afe5727d7350d4fd2931e941cb926
      https://github.com/llvm/llvm-project/commit/8f0654d7748afe5727d7350d4fd2931e941cb926
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-02-18 (Tue, 18 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

  Log Message:
  -----------
  Update llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Co-authored-by: Christudasan Devadasan <christudasan.devadasan at amd.com>


Compare: https://github.com/llvm/llvm-project/compare/86471a9825bd...8f0654d7748a

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