[all-commits] [llvm/llvm-project] e750c7: [RISCV] Set Feature32Bit/Feature64Bit based on tri...

Craig Topper via All-commits all-commits at lists.llvm.org
Thu Feb 13 09:07:44 PST 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e750c7e636f083c48a6cea7fae37ffc3734c7da0
      https://github.com/llvm/llvm-project/commit/e750c7e636f083c48a6cea7fae37ffc3734c7da0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-02-13 (Thu, 13 Feb 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

  Log Message:
  -----------
  [RISCV] Set Feature32Bit/Feature64Bit based on triple for -mcpu=help. (#127031)

llvm-mc keeps going after printing help text and creates an assembler.
If we don't set one of the XLen sized feature bits we trip a fatal error
in RISCVFeatures::validate.

llvm-mc should probably be fixed, but I don't know if its the only tool
with this issue.



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