[all-commits] [llvm/llvm-project] 99099c: [lldb] Use Lambda to simplify repeptitive code in ...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Feb 10 09:40:28 PST 2025
Branch: refs/heads/users/MaskRay/spr/arm-move-mcstreameremitthumbfunc-to-armtargetstreamer
Home: https://github.com/llvm/llvm-project
Commit: 99099cd63516bd87665a5199547f6daa9f8d6ce3
https://github.com/llvm/llvm-project/commit/99099cd63516bd87665a5199547f6daa9f8d6ce3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-06 (Thu, 06 Feb 2025)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
Log Message:
-----------
[lldb] Use Lambda to simplify repeptitive code in DynamicLoaderDarwin (NFC) (#126175)
I suggested using a lambda in #126171 but @jasonmolenda missed it.
Commit: 4d3148d92681c154de51379a0cf393f9af8e1d75
https://github.com/llvm/llvm-project/commit/4d3148d92681c154de51379a0cf393f9af8e1d75
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
Log Message:
-----------
[LV][EVL] Fix the check for legality of folding with EVL. (#125678)
The current legality check for folding with EVL has incomplete
verification for VF.
This patch fixes the VF check, ensuring that tail folding with EVL is
enabled only when a scalable VF is available. This allows loops that
prefer tail folding with EVL but cannot use scalable VF vectorization to
still be vectorized using a fixed VF, rather than abandoning
vectorization entirely.
Commit: 7fa57cd430f5811beed8cfc862768238fc5d06bb
https://github.com/llvm/llvm-project/commit/7fa57cd430f5811beed8cfc862768238fc5d06bb
Author: Karim Nosseir <44206880+karimnosseir at users.noreply.github.com>
Date: 2025-02-06 (Thu, 06 Feb 2025)
Changed paths:
M mlir/include/mlir/Bytecode/BytecodeWriter.h
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
Log Message:
-----------
[MLIR] Add move constructor to BytecodeWriterConfig (#126130)
The config is currently not movable and because there are constructors
the default move won't be generated, which prevents it from being moved.
Also, it is not copyable because of the unique_ptr. This PR adds move
constructor to allow moving it.
Commit: d21fc58aeeaa7f0369a24dbe70a0360e0edbf76f
https://github.com/llvm/llvm-project/commit/d21fc58aeeaa7f0369a24dbe70a0360e0edbf76f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-fold-reg-sequence-subreg.mir
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
Log Message:
-----------
AMDGPU: Use default shouldRewriteCopySrc (#125535)
This was ultimately working around bugs in subregister handling
in peephole-opt. In the common case, it would give up on folding
anything into a subregister extract copy.
Commit: a1984ec5eab09f9b49c232eb00827c3718f5940f
https://github.com/llvm/llvm-project/commit/a1984ec5eab09f9b49c232eb00827c3718f5940f
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
A llvm/test/tools/llvm-readobj/ELF/RISCV/note-gnu-property.yaml
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj][ELF][RISCV] Dump .note.gnu.property section contents (#125642)
RISCV Zicfilp/Zicfiss extensions uses the `.note.gnu.property` section
to store flags indicating the adoption of features based on these
extensions. This patch enables the llvm-readobj/llvm-readelf tools to
dump these flags with the `--note` flag.
Commit: 63bb4ba84a22279c1cdd4953f0c19269b23a9d32
https://github.com/llvm/llvm-project/commit/63bb4ba84a22279c1cdd4953f0c19269b23a9d32
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
Log Message:
-----------
[ORC] Add ExecutionSession convenience methods to access bootstrap values.
The getBootstrapMap, getBootstrapMapValue, getBootstrapSymbolsMap, and
getBootstrapSymbols methods forward to their respective counterparts in
ExecutorProcessControl, similar to the callWrapper functions.
These methods will be used to simplify an upcoming patch that accesses
the bootstrap values.
Commit: e2eaf8ded78507100513a17e8193e2c4b094f8da
https://github.com/llvm/llvm-project/commit/e2eaf8ded78507100513a17e8193e2c4b094f8da
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.h
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[ORC] Force eh-frame use for older Darwins on x86-64 in MachOPlatform, LLJIT.
The system libunwind on older Darwins does not support JIT registration of
compact-unwind. Since the CompactUnwindManager utility discards redundant
eh-frame FDEs by default we need to remove the compact-unwind section first
when targeting older libunwinds in order to preserve eh-frames.
While LLJIT was already doing this as of eae6d6d18bd, MachOPlatform was not.
This was causing buildbot failures in the ORC runtime (e.g. in
https://green.lab.llvm.org/job/llvm.org/job/clang-stage1-RA/3479/).
This patch updates both LLJIT and MachOPlatform to check a bootstrap value,
"darwin-use-ehframes-only", to determine whether to forcibly preserve
eh-frame sections. If this value is present and set to true then compact-unwind
sections will be discarded, causing eh-frames to be preserved. If the value is
absent or set to false then compact-unwind will be used and redundant FDEs in
eh-frames discarded (FDEs that are needed by the compact-unwind section are
always preserved).
rdar://143895614
Commit: 083686daf9feb5b5acadaef22e60b10a8b781f8a
https://github.com/llvm/llvm-project/commit/083686daf9feb5b5acadaef22e60b10a8b781f8a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
Log Message:
-----------
[gn build] Port e2eaf8ded785
Commit: 9b8297bc7ea8f217a3f701afedd2c953a4ad7867
https://github.com/llvm/llvm-project/commit/9b8297bc7ea8f217a3f701afedd2c953a4ad7867
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/CFG.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
A clang/test/Analysis/dtor-union.cpp
Log Message:
-----------
[analyzer] Do not destruct fields of unions (#122330)
The C++ standard prohibits this implicit destructor call, leading to
incorrect reports from clang-analyzer. This causes projects that use
std::option (including llvm) to fail the cplusplus.NewDelete test
incorrectly when run through the analyzer.
Fixes #119415
Commit: 35afd022ee5735c746c39b5b2cd24872333012fd
https://github.com/llvm/llvm-project/commit/35afd022ee5735c746c39b5b2cd24872333012fd
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
A llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
A llvm/test/CodeGen/X86/isel-fcmp-x87.ll
A llvm/test/CodeGen/X86/isel-fcmp.ll
Log Message:
-----------
[X86][GlobalISel] Support G_FCMP for scalar cases (#123598)
With this patch, we are enabling comparisons for Long double (80) types
on X87 stack. It lowers G_FCMP.
---------
Co-authored-by: mattarde <mattarde at intel.com>
Commit: b7feccb31dba8f512c97f89cd413625016f34cf3
https://github.com/llvm/llvm-project/commit/b7feccb31dba8f512c97f89cd413625016f34cf3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-06 (Thu, 06 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
A llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
Log Message:
-----------
[memprof] Dump call site matching information (#125130)
MemProfiler.cpp annotates the IR with the memory profile so that we
can later duplicate context. This patch dumps the entire inline call
stack
for each call site match.
Commit: 74192e57f7208926ab15502cc6ac31e4d8b98ba3
https://github.com/llvm/llvm-project/commit/74192e57f7208926ab15502cc6ac31e4d8b98ba3
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
Log Message:
-----------
[X86] Silence an unused-variable warning (NFC)
/llvm-project/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp:1054:9:
error: unused variable 'RhsBank' [-Werror,-Wunused-variable]
auto *RhsBank = RBI.getRegBank(RhsReg, MRI, TRI);
^
1 error generated.
Commit: 6b902efdf63c61be72feff94707bcfb1a92347fe
https://github.com/llvm/llvm-project/commit/6b902efdf63c61be72feff94707bcfb1a92347fe
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
Log Message:
-----------
[mlir][linalg] Add support for masked vectorization of `tensor.insert_slice` (2/N) (#123031)
For context, recall that `tensor.insert_slice` is vectorised using the
`vector.transfer_read` + `vector.transfer_write` pair. An unmasked
example is shown below:
```mlir
// BEFORE VECTORIZATION
%res = tensor.insert_slice
%slice into %dest[0, %c2]
[5, 1] [1, 1] : tensor<5x1xi32> into tensor<5x3xi32>
// AFTER VECTORIZATION
%read = vector.transfer_read %source[%c0, %c0], %pad
: tensor<5x1xi32>, vector<8x1xi32>
%res = vector.transfer_write %read, %dest[%c0, %c2]
: vector<8x1xi32>, tensor<5x3xi32>
```
This PR extends `vectorizeAsInsertSliceOp` to add masking support for
the `vector.transfer_write` operation. This complements the changes
in #122927, which introduced masking for the `vector.transfer_read`.
Commit: ac640a2d626e65cd4c35a4442f40a23da4d8cbfd
https://github.com/llvm/llvm-project/commit/ac640a2d626e65cd4c35a4442f40a23da4d8cbfd
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Add additional tests to esnure safe accesses to const sized array are not warned (#125483)
Add more tests, where the index of the const array access evaluates to a
constant and depends on a template argument.
rdar://143759014
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: e346d4752f73d7e943cd7c270f2f470e47e58c56
https://github.com/llvm/llvm-project/commit/e346d4752f73d7e943cd7c270f2f470e47e58c56
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Categorize Vector-to-LLVM conversion tests (nfc) (#125918)
Following https://github.com/llvm/llvm-project/issues/124308, this patch
reorganizes the `vector-to-llvm.mlir` tests by splitting them into two
categories:
- **Basic conversion tests**: Tests that only require
`populateVectorToLLVMConversionPatterns`, focusing on the minimal
conversion from Vector to LLVM. These have been moved to
`vector-to-llvm-interface.mlir`.
- **Full pass tests**: Tests that require the complete
`ConvertVectorToLLVMPass`, which includes
`populateVectorToLLVMConversionPatterns` along with additional
patterns. These remain in `vector-to-llvm.mlir`.
This reorganization clarifies test coverage and helps avoid unnecessary
duplication.
NOTE: This is merely moving tests around between two files and adds
some comments.
Commit: 83783e8bec0eb25e06eff57a22b0419cdc2bce2c
https://github.com/llvm/llvm-project/commit/83783e8bec0eb25e06eff57a22b0419cdc2bce2c
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
Log Message:
-----------
[RISCV] Fix typos discovered by codespell (NFC) (#126191)
Found using https://github.com/codespell-project/codespell
```
codespell RISCV --write-changes \
--ignore-words-list=FPR,fpr,VAs,ORE,WorstCase,hart,sie,MIs,FLE,fle,CarryIn,vor,OLT,VILL,vill,bu,pass-thru
```
Commit: 26ecddb05d13c101ccd840a6710eb5f8b82de841
https://github.com/llvm/llvm-project/commit/26ecddb05d13c101ccd840a6710eb5f8b82de841
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Allow default path when looking for llvm-spirv (#126071)
This is an external tool, so I don't think there is an expectation that
it has to be in the LLVM tools bindir. It may also be in the default
system bindir (which is not necessarily the same).
Commit: 15e50b1736002b730cbbe1bba74f05dfda4c8aaf
https://github.com/llvm/llvm-project/commit/15e50b1736002b730cbbe1bba74f05dfda4c8aaf
Author: Matthias Springer <me at m-sp.org>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Polynomial/IR/PolynomialTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
Log Message:
-----------
[mlir][IR] Clean up type constraints around `ValueSemanticsContainerOf` (#126075)
* Remove duplicate `TypeOrContainer`. There is an identical class with
the same name: `TypeOrValueSemanticsContainer`.
* Remove `TypeOrContainerOfAnyRank` and use
`TypeOrValueSemanticsContainer` instead. `TypeOrContainerOfAnyRank` is
inconsistent with the other classes because it explicitly checks for
`VectorType` and `TensorType` instead of utilizing the value semantics
type trait.
* Remove `SignlessIntegerOrIndexLikeOfAnyRank` etc. and use
`SignlessIntegerOrIndexLike` instead. `SignlessIntegerOrIndexLike` etc.
already allow 0-d vectors, so there is no difference with
`SignlessIntegerOrIndexLikeOfAnyRank`.
Commit: ac158aa13b5a81552e45e63f534420c38e514484
https://github.com/llvm/llvm-project/commit/ac158aa13b5a81552e45e63f534420c38e514484
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[LoopVectorizer] Allow partial reductions to be made in predicated loops (#124268)
Does a select on the input rather than the output. This way the mask has
the same number of lanes as the other operand in the select instruction.
Commit: 4bf97aa818965d86055c762a42f6d518e8e3a21e
https://github.com/llvm/llvm-project/commit/4bf97aa818965d86055c762a42f6d518e8e3a21e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/llvm.modf.ll
A llvm/test/CodeGen/AArch64/veclib-llvm.modf.ll
Log Message:
-----------
[IR] Add `llvm.modf` intrinsic (#121948)
This adds the `llvm.modf` intrinsic, legalization, and lowering (mostly
reusing the lowering for sincos and frexp).
The `llvm.modf` intrinsic takes a floating-point value and returns both
the integral and fractional parts (as a struct).
```
declare { float, float } @llvm.modf.f32(float %Val)
declare { double, double } @llvm.modf.f64(double %Val)
declare { x86_fp80, x86_fp80 } @llvm.modf.f80(x86_fp80 %Val)
declare { fp128, fp128 } @llvm.modf.f128(fp128 %Val)
declare { ppc_fp128, ppc_fp128 } @llvm.modf.ppcf128(ppc_fp128 %Val)
declare { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> %Val)
```
This corresponds to the libm `modf` function but returns multiple values
in a struct (rather than take output pointers), which makes it easier to
vectorize.
Commit: 1608fe8d56015719d5bf7abca608adad8a866f43
https://github.com/llvm/llvm-project/commit/1608fe8d56015719d5bf7abca608adad8a866f43
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/source/Interpreter/OptionArgParser.cpp
A lldb/test/Shell/Commands/command-breakpoint-by-addr.test
Log Message:
-----------
[lldb][Breakpoint] Allow whitespace in breakpoint address expression (#126053)
Setting a breakpoint on `<symbol> + <offset>` used to work until
`2c76e88e9eb284d17cf409851fb01f1d583bb22a`, where this regex was
reworked. Now we only accept `<symbol>+ <offset>` or
`<symbol>+<offset>`.
This patch fixes the regression by adding yet another `[[:space:]]*`
component to the regex.
One could probably simplify the regex (or even replace the regex by just
calling the relevent `consumeXXX` APIs on `llvm::StringRef`). Though I
left that for the future.
rdar://130780342
Commit: e00fc80c194b3742cd387b7cc74a5fd7ab775bf0
https://github.com/llvm/llvm-project/commit/e00fc80c194b3742cd387b7cc74a5fd7ab775bf0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/CodeGen/debug-info-enum-extensibility.c
Log Message:
-----------
[clang][DebugInfo] Set EnumKind based on enum_extensibility attribute (#126045)
This is the 2nd part to
https://github.com/llvm/llvm-project/pull/124752. Here we make sure to
set the `DICompositeType` `EnumKind` if the enum was declared with
`__attribute__((enum_extensibility(...)))`. In DWARF this will be
rendered as `DW_AT_APPLE_enum_kind` and will be used by LLDB when
creating `clang::EnumDecl`s from debug-info.
Depends on https://github.com/llvm/llvm-project/pull/126044
Commit: 7aeae7379d430404499f2929ffeea9416575a091
https://github.com/llvm/llvm-project/commit/7aeae7379d430404499f2929ffeea9416575a091
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Log Message:
-----------
[lldb][TypeSystemClang] Fix typo in assertion
This was meant to assert that we have the same number of names as we do
formal parameter types (since callers of this API rely on this being true).
Commit: 1930524bbde3cd26ff527bbdb5e1f937f484edd6
https://github.com/llvm/llvm-project/commit/1930524bbde3cd26ff527bbdb5e1f937f484edd6
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
Log Message:
-----------
[LoopVectorize] Fix cost model assert when vectorising calls (#125716)
The legacy and vplan cost models did not agree because
VPWidenCallRecipe::computeCost only calculates the cost of the
call instruction, whereas
LoopVectorizationCostModel::setVectorizedCallDecision in some
cases adds on the cost of a synthesised mask argument. However,
this mask is always 'splat(i1 true)' which should be hoisted out
of the loop during codegen. In order to synchronise the two cost
models I have two options:
1) Also add the cost of the splat to the vplan model, or
2) Remove the cost of the splat from the legacy model.
I chose 2) because I feel this more closely represents what the
final code will look like. There is an argument that we should
take account of such broadcast costs in the preheader when
deciding if it's profitable to vectorise a loop, however there
isn't currently a mechanism to do this. We currently only take
account of the runtime checks when assessing profitability and
what the minimum trip count should be. However, I don't believe
this work needs doing as part of this PR.
Commit: 9d83790d170cc0a06179514e2ab739f7ecafb78c
https://github.com/llvm/llvm-project/commit/9d83790d170cc0a06179514e2ab739f7ecafb78c
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
Log Message:
-----------
[lldb] Fix build error in ValueObject test
Fixes 0cbc4983adcdbbd85ccb38b2dfbfe5985367b1b2.
llvm-project/lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp(221): error C2065: 'u_int8_t': undeclared identifier
Commit: 3872e55758a5de035c032a975f244302c3ddacc3
https://github.com/llvm/llvm-project/commit/3872e55758a5de035c032a975f244302c3ddacc3
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize] Fix build error (#126218)
Fixes issue caused by 1930524bbde3cd26ff527bbdb5e1f937f484edd6
Unused variable UsesMask in LoopVectorize.cpp
Commit: 6424abcd6c9c6aa8171c79d0fe0369d3a10da3d5
https://github.com/llvm/llvm-project/commit/6424abcd6c9c6aa8171c79d0fe0369d3a10da3d5
Author: David Green <david.green at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
Log Message:
-----------
[AArch64] Enable AvoidLDAPUR for cpu=generic between armv8.4 and armv9.3. (#125261)
As added in #124274, CPUs in this range can suffer from performance
issues with ldapur. As the gain from ldar->ldapr is expected to be
greater than the minor gain from ldapr->ldapur, this opts to avoid the
instruction under the default -mcpu=generic when the -march is less that
armv8.8 / armv9.3.
I renamed AArch64Subtarget::Others to AArch64Subtarget::Generic to be
clearer what it means.
Commit: 52db30ec4154b0ef21db546ed9b5a9bfe47859cd
https://github.com/llvm/llvm-project/commit/52db30ec4154b0ef21db546ed9b5a9bfe47859cd
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
Log Message:
-----------
[lldb] Fix compiler error in ValueObject tests
Fixes 0cbc4983adcdbbd85ccb38b2dfbfe5985367b1b2.
error: non-constant-expression cannot be narrowed from type 'uint64_t' (aka 'unsigned long long') to 'size_t' (aka 'unsigned int') in initializer list [-Wc++11-narrowing]
71 | in_value.GetLocalBufferSize()};
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Given this is test code, I think a static cast is fine here.
Tiny risk that it's actually a symptom of a bug that would
happen if you did 32-bit to 64-bit debugging. I expect you'd
find a lot more bugs than that though.
Commit: 612df14c0058572c876f59d41ec56c89710cee15
https://github.com/llvm/llvm-project/commit/612df14c0058572c876f59d41ec56c89710cee15
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/clang_f_opts.c
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[Clang][Driver] Add an option to control loop-interchange (#125830)
This introduces options `-floop-interchange` and `-fno-loop-interchange`
to enable/disable the loop-interchange pass. This is part of the work
that tries to get that pass enabled by default (#124911), where it was
remarked that a user facing option to control this would be convenient
to have. The option name is the same as GCC's.
Commit: 98e118ca435d280ff1c3540eb5e9b4140b44a1b4
https://github.com/llvm/llvm-project/commit/98e118ca435d280ff1c3540eb5e9b4140b44a1b4
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/FlangDriver.md
M flang/lib/Decimal/CMakeLists.txt
M flang/runtime/CMakeLists.txt
M flang/test/Driver/linker-flags.f90
M flang/test/Driver/msvc-dependent-lib-flags.f90
M flang/test/Driver/nostdlib.f90
M flang/test/Runtime/no-cpp-dep.c
M flang/test/lit.cfg.py
M lld/COFF/MinGW.cpp
Log Message:
-----------
[Flang] Don't use FortranDecimal for runtime (#121997)
Avoid using the same library for runtime and compiler. `FortranDecimal`
was used in two ways:
1. As an auxiliary library needed for `libFortranRuntime.a`. This patch
adds the two source files of FortranDecimal directly into
FortranRuntime, so `FortranRuntime` is not used anymore.
2. As a library used by the Flang compiler. As the only remaining use of
the library, extra CMake code to make it compatible with the runtime can
be removed.
Before this PR, `enable_cuda_compilation` is applied to `FortranDecimal`
which causes everything that links to it, including flang (the
compiler), to depend on libcudart when CUDA support is enabled.
Having two runtime library just makes everything more complicated while
the user ideally should not be concerned with how the runtime is
structured internally. Some logic was copied for FortranDecimal because
of this, such as the ability to be compiled out-of tree
(b75a3c9f31c1ffdc9856aee32991d8129b372ee7) which is undocumented, the
logic to link against the various versions of Microsofts runtime library
(#70833), and avoiding dependency on the C++ runtime
(7783bba22c7add678d796741d30669c73159b3d8).
Commit: c269182b13abddc459820e57a4d2065f364b23dc
https://github.com/llvm/llvm-project/commit/c269182b13abddc459820e57a4d2065f364b23dc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[lldb][TypeSystemClang] Initialize ClassTemplateSpecializationDecl's StrictPackMatch field (#126215)
This addresses the MSAN failure reported
in
https://github.com/llvm/llvm-project/pull/125791#issuecomment-2639183154:
```
==5633==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 in clang::ASTNodeImporter::CallOverloadedCreateFun<clang::ClassTemplateSpecializationDecl>::operator()
#1 in bool clang::ASTNodeImporter::GetImportedOrCreateSpecialDecl<...>
...
```
The ASTImporter reads `D->hasStrictPackMatch()` and forwards it to the
constructor of the destination `ClassTemplateSpecializationDecl`. But if
`D` is a decl that LLDB created from debug-info, it would've been
created using `ClassTemplateSpecializationDecl::CreateDeserialized`,
which doesn't initialize the `StrictPackMatch` field.
This patch just initializes the field to a fixed value of `false`, to
preserve previous behaviour and avoid the use-of-uninitialized-value.
An alternative would be to always initialize it in the
`ClassTemplateSpecializationDecl` constructor, but there were
reservations about providing a default value for it because it might
lead to hard-to-diagnose problems down the line.
Commit: ae08969a2068dd327fbf4d0f606550574fbb9e45
https://github.com/llvm/llvm-project/commit/ae08969a2068dd327fbf4d0f606550574fbb9e45
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/pr126012.ll
Log Message:
-----------
[IndVars] Add test for #126012 (NFC)
Commit: 83ba3740bf51347307494d013099e392c310e32b
https://github.com/llvm/llvm-project/commit/83ba3740bf51347307494d013099e392c310e32b
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindTable.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Symbol/UnwindTable.cpp
R lldb/test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c
M lldb/test/Shell/SymbolFile/target-symbols-add-unwind.test
Log Message:
-----------
[lldb] Clear cached unwind plans when adding symbols (#125839)
PR #86603 broke unwinding in for unwind info added via "target symbols
add". #86770 attempted to fix this, but the fix was only partial -- it
accepted new sources of unwind information, but didn't take into account
that the symbol file can alter what lldb percieves as function
boundaries.
A stripped file will not contain information about private
(non-exported) symbols, which will make the public symbols appear very
large. If lldb tries to unwind from such a function before symbols are
added, then the cached unwind plan will prevent new (correct) unwind
plans from being created.
target-symbols-add-unwind.test might have caught this, were it not for
the fact that the "image show-unwind" command does *not* use cached
unwind information (it recomputes it from scratch).
The changes in this patch come in three pieces:
- Clear cached unwind plans when adding symbols. Since the symbol
boundaries can change, we cannot trust anything we've computed
previously.
- Add a flag to "image show-unwind" to display the cached unwind
information (mainly for the use in the test, but I think it's also
generally useful).
- Rewrite the test to better and more reliably simulate the real-world
scenario: I've swapped the running process for a core (minidump) file so
it can run anywhere; used the caching version of the show-unwind
command; and swapped C for assembly to better control the placement of
symbols
Commit: 191d7d64e5bc9c66fcb17a4c752a55129d33fd44
https://github.com/llvm/llvm-project/commit/191d7d64e5bc9c66fcb17a4c752a55129d33fd44
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_many.c
Log Message:
-----------
[Offload] Fix assumptions on symbols after #124846 (#126238)
In #124846 the symbolizer was changed to ignore 0-column entries, which
lead to a slightly different representation in the stack traces. This
patch addresses these differences.
Not sure if the difference in kernel_trap.c is also a result of this
change or not.
Can be tracked separate from this, after the bots are back to green.
Commit: 60cc48d900d16d895096cfd598938cf00b05ec0f
https://github.com/llvm/llvm-project/commit/60cc48d900d16d895096cfd598938cf00b05ec0f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/char_string.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/pointer_string.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_char.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_pointer.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_string.pass.cpp
Log Message:
-----------
[libc++] Refactor strings operator+ tests
This avoids duplicating the test data for all the different tests.
Commit: 52b59476cdd251fec2404cc843b7b95c1cb4afeb
https://github.com/llvm/llvm-project/commit/52b59476cdd251fec2404cc843b7b95c1cb4afeb
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/infer-via-ranges.ll
A llvm/test/Transforms/IndVarSimplify/infer-via-ranges.ll
Log Message:
-----------
SCEV: re-org a test, regen via UTC (#126237)
Commit: 1454fc9dbfd13d75b9a06e604683a7440df3b757
https://github.com/llvm/llvm-project/commit/1454fc9dbfd13d75b9a06e604683a7440df3b757
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
M mlir/test/Target/SPIRV/group-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for OpGroupNonUniformBallotBitCount (#126055)
A new constraint is also added to restrict attributes values for SPIR-V
attributes. Ideally this should use `ConfinedAttr` with a custom
constraint directly on the operand, however it seems TableGen does not
allow using that with SPIR-V attributes. I suspect it is because SPIR-V
attributes do not derive from the generic MLIR attribute class -
TableGen complains about missing enum field.
Commit: a69975d8349c1e0dcb86814df67d7160395b468e
https://github.com/llvm/llvm-project/commit/a69975d8349c1e0dcb86814df67d7160395b468e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Remove unnecessary if statement (#126223)
This doesn't seem to do any good and breaks a few libc++ tests. Remove
the special case.
Commit: 7f21c77024e562f55f7de0d36a9c9e747a5e9ff5
https://github.com/llvm/llvm-project/commit/7f21c77024e562f55f7de0d36a9c9e747a5e9ff5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
ValueTracking: modernize isKnownInversion (NFC) (#126234)
Commit: 2a6cfbd98516d902267a39e26ecbbff8c8121b01
https://github.com/llvm/llvm-project/commit/2a6cfbd98516d902267a39e26ecbbff8c8121b01
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/test/SemaCXX/unique_object_duplication.cpp
Log Message:
-----------
[clang] [test] Adjust XFAILs for windows in unique_object_duplication.cpp (#126139)
This test does succeed in MinGW configurations.
Commit: 3fdb3482439b2957abc176ae10522df3df322709
https://github.com/llvm/llvm-project/commit/3fdb3482439b2957abc176ae10522df3df322709
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Fix some formatting issues (NFC) (#126224)
Fixes codeblock and inline code formatting for the `llvm.modf.*`
intrinsic.
Commit: 991123f2fbe1e85e315049d4ed84b9bdbebff474
https://github.com/llvm/llvm-project/commit/991123f2fbe1e85e315049d4ed84b9bdbebff474
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
Log Message:
-----------
[X86] Add test where storing return addr clobbers argument stack slot.
Currently for the test the return address is written to the stack before
loading the argument from an aliasing stack slot.
Commit: b51fc2ac60418316c3e308cff43a9fb9711d7b25
https://github.com/llvm/llvm-project/commit/b51fc2ac60418316c3e308cff43a9fb9711d7b25
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Tools/TargetSetup.h
Log Message:
-----------
[flang] Modifications to ieee_support_standard (#125967)
The result of a call to ieee_support_halting is one of the components
that affect the result of a call to ieee_support_standard.
Commit: cfd8980fe79872feb9ed81959aa018681c7b3354
https://github.com/llvm/llvm-project/commit/cfd8980fe79872feb9ed81959aa018681c7b3354
Author: Steven Perron <stevenperron at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
Log Message:
-----------
[SPIRV] Handle vector load/store for RWBuffer (#125581)
The type inference for `spv_resource_getpointer` must look at the uses
of the intrinsic. The type of the handle will be a scalar type, but it
can still be read or written as a vector of that type.
Fixes https://github.com/llvm/llvm-project/issues/124551.
Commit: a361de6d13183111e942d9f5c6345ed3e8964b2b
https://github.com/llvm/llvm-project/commit/a361de6d13183111e942d9f5c6345ed3e8964b2b
Author: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/lib/CodeGen/RDFGraph.cpp
A llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
A llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
Log Message:
-----------
[RDF] Create phi nodes for clobbering defs (#123694)
When a def in a block A reaches another block B that is in A's iterated
dominance frontier, a phi node is added to B for the def register.
A clobbering def can be created at a call instruction, for a register
clobbered by a call.
However, phi nodes are not created for a register, when one of the
reaching defs of the register is a clobbering def.
This patch adds phi nodes for registers that have a clobbering reaching
def. These additional phis help in checking reaching defs for an
instruction in RDF based copy propagation and addressing mode
optimizations.
Commit: 1f2c36a879a604683da646a44f73bd6d90b61040
https://github.com/llvm/llvm-project/commit/1f2c36a879a604683da646a44f73bd6d90b61040
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
A llvm/test/MC/ARM/vcvt-fixed-point-errors.s
M llvm/test/tools/llvm-mca/ARM/m55-fp.s
M llvm/test/tools/llvm-mca/ARM/m7-fp.s
M llvm/test/tools/llvm-mca/ARM/m85-fp.s
Log Message:
-----------
[ARM] Reject fixed-point VCVT with different registers (#126232)
These instructions only have one register field in their encoding, so
both registers in the assembly must be the same.
Previously, we were accepting these instructions, but ignoring the
second register operand.
Fixes #126227
Commit: b284a849d51b320004bc3e656c428aefab156dac
https://github.com/llvm/llvm-project/commit/b284a849d51b320004bc3e656c428aefab156dac
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM] Add default constructor for `nvvm.barrier` [NFC] (#126225)
This PR adds a default constructor to `nvvm.barrier`, making it more
convenient to build the OP.
Commit: 0227396417d4625bc93affdd8957ff8d90c76299
https://github.com/llvm/llvm-project/commit/0227396417d4625bc93affdd8957ff8d90c76299
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libcxx/include/__type_traits/conjunction.h
Log Message:
-----------
Revert "[libc++] Reduce std::conjunction overhead (#124259)"
It turns out that the new implementation takes significantly more stack
memory for some reason.
This reverts commit 2696e4fb9567d23ce065a067e7f4909b310daf50.
Commit: c8b2ba722f760087a9c8f058c26e656213d76d2c
https://github.com/llvm/llvm-project/commit/c8b2ba722f760087a9c8f058c26e656213d76d2c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lld/test/COFF/arm64ec-patchable-thunks.test
Log Message:
-----------
[LLD][COFF] Add test for hybrid patchable thunks on ARM64X (NFC) (#126135)
Commit: abd31b48e3a8b1fe3cb01d37e35c80aa7cab9fc0
https://github.com/llvm/llvm-project/commit/abd31b48e3a8b1fe3cb01d37e35c80aa7cab9fc0
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lld/COFF/MinGW.cpp
M lld/test/COFF/arm64x-export-all.s
Log Message:
-----------
[LLD][MinGW] Exclude load config symbols from auto-export (#126134)
Commit: 2b43543afb83d0c67b4cabfaec84b16cf522786d
https://github.com/llvm/llvm-project/commit/2b43543afb83d0c67b4cabfaec84b16cf522786d
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC][CodeGen] true16 for v_alignbyte_b32 (#125706)
Support true16 format for v_alignbyte_b32 in MC and CodeGen
Commit: 79e9887a0f408a50f5781aa5079ae71731e18c23
https://github.com/llvm/llvm-project/commit/79e9887a0f408a50f5781aa5079ae71731e18c23
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M flang/test/Evaluate/fold-ieee.f90
M flang/test/Evaluate/folding18.f90
Log Message:
-----------
[flang] test fix (#126251)
Commit: 27598aba49a7bbb6751fff5c8dc455edf701e1aa
https://github.com/llvm/llvm-project/commit/27598aba49a7bbb6751fff5c8dc455edf701e1aa
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
R libcxx/test/benchmarks/containers/container_benchmarks.h
R libcxx/test/benchmarks/containers/deque.bench.cpp
R libcxx/test/benchmarks/containers/list.bench.cpp
A libcxx/test/benchmarks/containers/sequence/deque.bench.cpp
A libcxx/test/benchmarks/containers/sequence/list.bench.cpp
A libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
A libcxx/test/benchmarks/containers/sequence/vector.bench.cpp
R libcxx/test/benchmarks/containers/vector.bench.cpp
Log Message:
-----------
[libc++] Further refactor sequence container benchmarks (#126129)
This patch does not significantly change how the sequence container
benchmarks are done, but it adopts the same style as the associative
container benchmarks.
This commit does adjust how we were benchmarking push_back, where we
never really measured the overhead of the slow path of push_back (when
we need to reallocate).
Commit: 1611059f5d57ed1ceffb1367327957f10f8658ff
https://github.com/llvm/llvm-project/commit/1611059f5d57ed1ceffb1367327957f10f8658ff
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
Log Message:
-----------
[VPlan] Compute cost for binary op VPInstruction with underlying values. (#125434)
As exposed by https://github.com/llvm/llvm-project/pull/125094, we are
missing cost computation for some binary VPInstructions we created based
on original IR instructions. Their cost should be considered.
PR: https://github.com/llvm/llvm-project/pull/125434
Commit: 1f67070a3f6ca8d0bf5fdca90ceb6b607422c899
https://github.com/llvm/llvm-project/commit/1f67070a3f6ca8d0bf5fdca90ceb6b607422c899
Author: Eric Hein <ehein6 at gatech.edu>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Transforms/ViewOpGraph.cpp
M mlir/test/Transforms/print-op-graph-back-edges.mlir
M mlir/test/Transforms/print-op-graph-cycles.mlir
M mlir/test/Transforms/print-op-graph.mlir
Log Message:
-----------
[ViewOpGraph] Improve GraphViz output (#125509)
This patch improves the GraphViz output of ViewOpGraph
(--view-op-graph).
- Switch to rectangular record-based nodes, inspired by a similar
visualization in [Glow](https://github.com/pytorch/glow). Rectangles
make more efficient use of space when printing text.
- Add input and output ports for each operand and result, and remove
edge labels.
- Switch to a muted color palette to reduce eye strain.
Commit: 289b17635958d986b74683c932df6b1d12f37b70
https://github.com/llvm/llvm-project/commit/289b17635958d986b74683c932df6b1d12f37b70
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
Log Message:
-----------
[SPIRV] Fix a warning
This patch fixes:
llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp:749:13: error: unused
variable 'ImageType' [-Werror,-Wunused-variable]
Commit: 46f5662ebc461c897d7aa59b182e4cce29af7368
https://github.com/llvm/llvm-project/commit/46f5662ebc461c897d7aa59b182e4cce29af7368
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
Log Message:
-----------
[Hexagon] Avoid repeated map lookups (NFC) (#126185)
Commit: dbb20fc07326926d53adb95d01323a353074aae1
https://github.com/llvm/llvm-project/commit/dbb20fc07326926d53adb95d01323a353074aae1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
Log Message:
-----------
[ObjectYAML] Avoid repeated hash lookups (NFC) (#126187)
Commit: 80a471820071c1913e0159eaf932a6547fc9c42f
https://github.com/llvm/llvm-project/commit/80a471820071c1913e0159eaf932a6547fc9c42f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
Log Message:
-----------
[GVNHoist] Avoid repeated hash lookups (NFC) (#126189)
Commit: 0afbefa282add55ca2dc2389e6b75b864b37c196
https://github.com/llvm/llvm-project/commit/0afbefa282add55ca2dc2389e6b75b864b37c196
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/utils/TableGen/AsmWriterEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#126190)
Commit: d0170424b7250bf5cda0e6253ec62112a6e1c92a
https://github.com/llvm/llvm-project/commit/d0170424b7250bf5cda0e6253ec62112a6e1c92a
Author: Ron Gut <65685404+gutron at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/tools/clang-format/clang-format.el
Log Message:
-----------
[emacs][clang-format] Suppress reference to free variable errors (#126254)
vc-git-program is referenced but not defined -- vc-git provides the
definition.
Commit: 247430e9c41c61b66e2ee95c29a05de3e24c19b9
https://github.com/llvm/llvm-project/commit/247430e9c41c61b66e2ee95c29a05de3e24c19b9
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Temporarily disable a broken LookupAddressRangeWithStmtSequenceOffset debug info test
Commit: 4c7cbb947814ed373f49b4a666206ccec8c9b63f
https://github.com/llvm/llvm-project/commit/4c7cbb947814ed373f49b4a666206ccec8c9b63f
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-load.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
Log Message:
-----------
[flang] update PPC vector tests (NFC) (#126256)
Replace 'undef' with 'poison' based on commit f4e3b87
Commit: 2c43479683651f0eb208c97bf12e49bacbea4e6f
https://github.com/llvm/llvm-project/commit/2c43479683651f0eb208c97bf12e49bacbea4e6f
Author: David Green <david.green at arm.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Fix op mask detection in performZExtDeinterleaveShuffleCombine (#126054)
Given a zext from an extract vector, with a shuffle mask like <4, 0, 0, 4> we
would previously recognize the top half as a deinterleave. In order to convert
into a uzp we should have been checking that the bottom half is also poison.
Fixes #125989
Commit: f3040498f0bdcd6c61cf9df4ba41d2913118915e
https://github.com/llvm/llvm-project/commit/f3040498f0bdcd6c61cf9df4ba41d2913118915e
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
A llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
Log Message:
-----------
[NVPTX] Add tcgen05 wait/fence/commit intrinsics (#126091)
This patch adds intrinsics for tcgen05 wait,
fence and commit PTX instructions.
lit tests are added and verified with a
ptxas-12.8 executable.
Docs are updated in the NVPTXUsage.rst file.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 1438c8d68ddaacba4a95a02b66ffbae2ea586993
https://github.com/llvm/llvm-project/commit/1438c8d68ddaacba4a95a02b66ffbae2ea586993
Author: Petr Hosek <phosek at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
A clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[Fuchsia] Support PGO (#120323)
Enable 2-stage builds with PGO.
Commit: 4d7192a5ecabb36263a2cacd4e9243b958424805
https://github.com/llvm/llvm-project/commit/4d7192a5ecabb36263a2cacd4e9243b958424805
Author: earnol <earnol at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/include/clang/ASTMatchers/ASTMatchers.h
Log Message:
-----------
[clang][doc] Provide documentation for FixedPointLiteral matcher (#125122)
Provide a documentation for FixedPointLiteral explaining which literals
will be matched and which are not. This documentation is compatible with
https://github.com/llvm/llvm-project/commit/53e92e48d0c03a2475e8517dd4c28968d84fc217
change.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 3f8e2802069aabe4384ecd4575d50fd4457dae51
https://github.com/llvm/llvm-project/commit/3f8e2802069aabe4384ecd4575d50fd4457dae51
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/include/clang/AST/OperationKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Edit/RewriteObjCFoundationAPI.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
A clang/test/CodeGenHLSL/BasicFeatures/ArrayElementwiseCast.hlsl
A clang/test/CodeGenHLSL/BasicFeatures/StructElementwiseCast.hlsl
A clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/SemaHLSL/BuiltIns/vector-constructors-erros.hlsl
A clang/test/SemaHLSL/Language/ElementwiseCast-errors.hlsl
A clang/test/SemaHLSL/Language/ElementwiseCasts.hlsl
Log Message:
-----------
[HLSL] Implement HLSL Elementwise casting (excluding splat cases); Re-land #118842 (#126258)
Implement HLSLElementwiseCast excluding support for splat cases
Do not support casting types that contain bitfields.
Partly closes https://github.com/llvm/llvm-project/issues/100609 and
partly closes https://github.com/llvm/llvm-project/issues/100619
Re-land #118842 after fixing warning as an error, found by a buildbot.
Commit: c4c22a5377f41f3bcbca10a70a663b804659d2a2
https://github.com/llvm/llvm-project/commit/c4c22a5377f41f3bcbca10a70a663b804659d2a2
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Use PointerType::get(Context) in MVE TableGen emitter (NFC) (#124782)
Follow-up to #123569
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 92eeff4f592018cde3fbc311412b07e028493668
https://github.com/llvm/llvm-project/commit/92eeff4f592018cde3fbc311412b07e028493668
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/offload-Xarch.c
Log Message:
-----------
[Clang] Forward `-Xarch_<arch> -Wl,foo` for GPU toolchains (#126248)
Summary:
This patch handles the use of `-Xarch_<arch> -Wl,foo` to send an
argument to the linker for the embedded offloading jobs in the linker
wrapper. This makes it equivalent to `-Xoffload-linker foo`.
Commit: 51759ffc4408e9eb5c2d40c9489ce3b98de233d5
https://github.com/llvm/llvm-project/commit/51759ffc4408e9eb5c2d40c9489ce3b98de233d5
Author: s.vgys <83276820+samvangysegem at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
fix: removes invalid token from LLVM_VERSION_SUFFIX in LIBC namespace (#126193)
Resolves #125831
Commit: 7eaaa4e9415fc7533e688a9ed877aff75b7dfce4
https://github.com/llvm/llvm-project/commit/7eaaa4e9415fc7533e688a9ed877aff75b7dfce4
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/docs/BoundsSafety.rst
Log Message:
-----------
[BoundsSafety][doc] Fix formatting (#126245)
Commit: bfba6215cec20bee308a4637298a590057004ff8
https://github.com/llvm/llvm-project/commit/bfba6215cec20bee308a4637298a590057004ff8
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/test/Tooling/clang-linker-wrapper-spirv-elf.cpp
M clang/test/lit.site.cfg.py.in
M llvm/utils/gn/secondary/clang/test/BUILD.gn
Log Message:
-----------
[clang-linker-wrapper][lit] Fix OpenMP SPIR-V ELF test again (#126142)
I was able to reproduce the issue with the sanitizer buildbot scripts
and confirmed this fixes it.
The issue was the quotes, `"0"` is true in Python so we incorrectly
added the `spirv-tools` feature even when the CMake variable was false.
I don't know why it didn't always fail.
Also add the var to clang's `BUILD.gn` which matches what we do for
other similar variables, however I don't think it has any effect on CI
here.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 68325148d32edc70d85018364c5cb04432e5bd52
https://github.com/llvm/llvm-project/commit/68325148d32edc70d85018364c5cb04432e5bd52
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Fold `vector.extract` from poison vector (#126122)
This PR adds a folder for `vector.extract(ub.poison) -> ub.poison`. It
also replaces `create` with `createOrFold` insert/extract ops in vector
unroll and transpose lowering patterns to trigger the poison foldings
introduced recently.
Commit: 571a98722f5cabfc702aa1d307ffee9ebbef6e48
https://github.com/llvm/llvm-project/commit/571a98722f5cabfc702aa1d307ffee9ebbef6e48
Author: TatWai Chong <78814694+tatwaichong at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Change 'shape' of RESHAPE from attribute to input shape … (#125789)
The shape operand is changed to input shape type since V1.0
Change-Id: I508cc1d67e9b017048b3f29fecf202cb7d707110
Co-authored-by: Won Jeon <won.jeon at arm.com>
Commit: 7aabbf22f0a55370638cf1bcd1004376b0d7dad8
https://github.com/llvm/llvm-project/commit/7aabbf22f0a55370638cf1bcd1004376b0d7dad8
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
A llvm/test/CodeGen/X86/dwo-stats.ll
Log Message:
-----------
[llvm][ELF] Separate out .dwo bytes written in stats (#126165)
So we can distinguish between debug info sections written to .dwo files
and those written to the object file.
Commit: 5a0075adbb623c8661862b9af1272b8f430d9e5c
https://github.com/llvm/llvm-project/commit/5a0075adbb623c8661862b9af1272b8f430d9e5c
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/test/Conversion/ConvertToSPIRV/vector-unroll.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-scalable-vectors.mlir
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-transforms.mlir
Log Message:
-----------
[mlir][Vector] Generate poison vectors in vector.shape_cast lowering (#125613)
This is the first PR that introduces `ub.poison` vectors as part of a
rewrite/conversion pattern in the Vector dialect. It replaces the
`arith.constant dense<0>` vector initialization for
`vector.insert_slice` ops with a poison vector.
This PR depends on all the previous PRs that introduced support for
poison in Vector operations such as `vector.shuffle`, `vector.extract`,
`vector.insert`, including ODS, canonicalization and lowering support.
This PR may improve end-to-end compilation time through LLVM, depending
on the workloads.
Commit: e566313a1fac1b290c98454cc52b485ae4f644c5
https://github.com/llvm/llvm-project/commit/e566313a1fac1b290c98454cc52b485ae4f644c5
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/hdr/types/CMakeLists.txt
R libc/hdr/types/sighandler_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/__sighandler_t.h
A libc/include/llvm-libc-types/sighandler_t.h
M libc/include/llvm-libc-types/struct_sigaction.h
M libc/include/signal.yaml
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/signal.cpp
M libc/src/signal/signal.h
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/signal_test.cpp
Log Message:
-----------
[libc][signal] clean up usage of sighandler_t (#125745)
`man 3 signal`'s declaration has a face _only a mother could love_.
sighandler_t and __sighandler_t are not defined in the C standard, or POSIX.
They are helpful typedefs provided by glibc and the Linux kernel UAPI headers
respectively since working with function pointers' syntax can be painful. But
we should not rely on them; in C++ we have `auto*` and `using` statements.
Remove the proxy header, and only include a typedef for sighandler_t when
targeting Linux, for compatibility with glibc.
Fixes: #125598
Commit: 2c4dd89902c3e679607567569651acf8b828360e
https://github.com/llvm/llvm-project/commit/2c4dd89902c3e679607567569651acf8b828360e
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBitCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Vector/vector-bitcast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-broadcast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
Log Message:
-----------
[mlir][Vector] Introduce poison in LowerVectorBitCast/Broadcast/Transpose (#126180)
This PR continues with the introduction of poison as initialization
vector, in this particular case, in LowerVectorBitCast,
LowerVectorBroadcast and LowerVectorTranspose.
Commit: f2a1103b323492160d7d27a1575fbda709b49036
https://github.com/llvm/llvm-project/commit/f2a1103b323492160d7d27a1575fbda709b49036
Author: Krishna Pandey <47917477+krishna2803 at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/countlshk.cpp
A libc/src/stdfix/countlshk.h
A libc/src/stdfix/countlshr.cpp
A libc/src/stdfix/countlshr.h
A libc/src/stdfix/countlsk.cpp
A libc/src/stdfix/countlsk.h
A libc/src/stdfix/countlslk.cpp
A libc/src/stdfix/countlslk.h
A libc/src/stdfix/countlslr.cpp
A libc/src/stdfix/countlslr.h
A libc/src/stdfix/countlsr.cpp
A libc/src/stdfix/countlsr.h
A libc/src/stdfix/countlsuhk.cpp
A libc/src/stdfix/countlsuhk.h
A libc/src/stdfix/countlsuhr.cpp
A libc/src/stdfix/countlsuhr.h
A libc/src/stdfix/countlsuk.cpp
A libc/src/stdfix/countlsuk.h
A libc/src/stdfix/countlsulk.cpp
A libc/src/stdfix/countlsulk.h
A libc/src/stdfix/countlsulr.cpp
A libc/src/stdfix/countlsulr.h
A libc/src/stdfix/countlsur.cpp
A libc/src/stdfix/countlsur.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/CountlsTest.h
A libc/test/src/stdfix/countlshk_test.cpp
A libc/test/src/stdfix/countlshr_test.cpp
A libc/test/src/stdfix/countlsk_test.cpp
A libc/test/src/stdfix/countlslk_test.cpp
A libc/test/src/stdfix/countlslr_test.cpp
A libc/test/src/stdfix/countlsr_test.cpp
A libc/test/src/stdfix/countlsuhk_test.cpp
A libc/test/src/stdfix/countlsuhr_test.cpp
A libc/test/src/stdfix/countlsuk_test.cpp
A libc/test/src/stdfix/countlsulk_test.cpp
A libc/test/src/stdfix/countlsulr_test.cpp
A libc/test/src/stdfix/countlsur_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point `countlsfx` functions in llvm-libc (#125356)
fixes #113357
Commit: 5566bfa51e9baea0fdcd332198408f8cba39c0d0
https://github.com/llvm/llvm-project/commit/5566bfa51e9baea0fdcd332198408f8cba39c0d0
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Improve RISCVOperand Printing (#126179)
We've gradually added more information to the RISCVOperand structure,
but the debug output has never caught up, which is quite confusing. This
adds printing for many of additional the fields in the structure, where
they are relevant.
In addition to this, we now have quite a lot of internal registers which
share names with each other - e.g. X0_H, X0_W, X0, X0_Pair all have the
same name - so also print the enum value to differentiate these.
Commit: 501901e8217a09ce788bedc0eb94cd7d54fa9f6f
https://github.com/llvm/llvm-project/commit/501901e8217a09ce788bedc0eb94cd7d54fa9f6f
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL][NFC] Add test check to make sure the resource handle gets stored in the resource global (#124866)
Commit: 73f11ac17d50f0585d03a880e756ff13c321bfd0
https://github.com/llvm/llvm-project/commit/73f11ac17d50f0585d03a880e756ff13c321bfd0
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
Log Message:
-----------
[mlir][tosa] Use explicit namespace for OpTrait. (#126286)
I'm seeing build errors in a downstream project using torch-mlir that
are fixed by this change. See
https://github.com/iree-org/iree/pull/19903#discussion_r1946899561 for
more context. The build error on MSVC is:
```
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/Utils/ConversionUtils.h(148): error C2872: 'OpTrait': ambiguous symbol
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/IR/TosaOps.h(49): note: could be 'mlir::OpTrait'
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Dialect/Torch/IR/TorchTraits.h(23): note: or 'mlir::torch::Torch::OpTrait'
C:\home\runner\_work\iree\iree\third_party\llvm-project\mlir\include\mlir/Dialect/Tosa/Utils/ConversionUtils.h(148): note: the template instantiation context (the oldest one first) is
C:\home\runner\_work\iree\iree\third_party\torch-mlir\lib\Conversion\TorchToTosa\TosaLegalizeCommon.cpp(126): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInfer<mlir::tosa::MulOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::PatternRewriter &,mlir::Location,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
with
[
TosaOp=mlir::tosa::MulOp
]
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Conversion/TorchToTosa/TosaLegalizeUtils.h(83): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInfer<TosaOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::ImplicitLocOpBuilder &,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
with
[
TosaOp=mlir::tosa::MulOp
]
C:\home\runner\_work\iree\iree\third_party\torch-mlir\include\torch-mlir/Conversion/TorchToTosa/TosaLegalizeUtils.h(76): note: see reference to function template instantiation 'TosaOp mlir::tosa::CreateOpAndInferShape<TosaOp,mlir::Value&,mlir::Value&,mlir::Value&>(mlir::ImplicitLocOpBuilder &,mlir::Type,mlir::Value &,mlir::Value &,mlir::Value &)' being compiled
with
[
TosaOp=mlir::tosa::MulOp
]
```
I think the torch-mlir code here is causing the issue, but I'm not sure
why builds only started failing now:
https://github.com/llvm/torch-mlir/blob/main/include/torch-mlir/Dialect/Torch/IR/TorchTraits.h.
Given that `mlir::OpTrait` already exists, torch-mlir should not be
creating an ambiguous symbol `mlir::torch::Torch::OpTrait`. So while a
better fix would be to the downstream project, being explicit here
doesn't seem that unreasonable to me.
Commit: 4df287a171b63514a5028b85272fcc1b89555ee4
https://github.com/llvm/llvm-project/commit/4df287a171b63514a5028b85272fcc1b89555ee4
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 5a0075adbb623c8661862b9af1272b8f430d9e5c
Commit: 479ffe851bda03d7707b5aae633f231980b71344
https://github.com/llvm/llvm-project/commit/479ffe851bda03d7707b5aae633f231980b71344
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/test/Driver/offload-Xarch.c
Log Message:
-----------
[OpenMP] Fix Xarch OpenMP test on Windows
Summary:
We don't support OpenMP offloading on Windows so this produces weird
results.
Commit: 8a03658d575b5cfd65abb5cd4e80d0ee4163fc11
https://github.com/llvm/llvm-project/commit/8a03658d575b5cfd65abb5cd4e80d0ee4163fc11
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[mlir][xegpu] Tensor descriptor type verifier (#124548)
Adds XeGPU tensor descriptor type verifier.
The type verifier covers general tensor descriptor invariants w.r.t. Xe
ISA semantics.
Related operation verifiers are updated to account for the new
descriptor checks and avoid duplication.
Commit: 605a9e37b64b5b5647f1f3e560f7ffe31157841c
https://github.com/llvm/llvm-project/commit/605a9e37b64b5b5647f1f3e560f7ffe31157841c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/declare_target_messages.cpp
Log Message:
-----------
[OpenMP] Fix infinite loop on recursive initializers (#126269)
Summary:
If the user tried to initialize a gobal declare target variable with
itself the compiler will hang forever. Add a visited set to make sure
this stops.
Fixes: https://github.com/llvm/llvm-project/issues/69194
Commit: d705e7e9eb5e6d3c791935f191225118b88ab574
https://github.com/llvm/llvm-project/commit/d705e7e9eb5e6d3c791935f191225118b88ab574
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/utils/TableGen/CodeGenMapTable.cpp
Log Message:
-----------
[NFC][TableGen] Code cleanup in CodeGenMapTable `EmitMapTable` (#126157)
- Emit C++17 nested namespaces.
- Shorten the binary search table name to just `Table` since its
declared in the scope of each search function.
- Use `using namespace XXX` in the search function to avoid emitting the
Target Inst Namespace prefix in the table entries.
- Add short-cut handling of `TableSize` == 0 case (verified in Hexagon
target).
- Use `SetVector` in `ColFieldValueMap` to get automatic deduplication
and eliminate manual deduplication code.
- Use range for loops.
Commit: 7abca756d1434f0e51cd0af8da647d51f38f634e
https://github.com/llvm/llvm-project/commit/7abca756d1434f0e51cd0af8da647d51f38f634e
Author: Ben Barham <ben_barham at apple.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/Index/IndexBody.cpp
A clang/test/Index/index-deduction-guide.cpp
Log Message:
-----------
[Index] Skip adding call relations to deduction guides (#126151)
Deduction guides have no name and we already skip adding occurrences to
them for that reason. Also skip adding any relations to them.
Commit: bada9220b87e73c0f4a498b82f883e17eda928d1
https://github.com/llvm/llvm-project/commit/bada9220b87e73c0f4a498b82f883e17eda928d1
Author: Krishna Pandey <47917477+krishna2803 at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/src/__support/fixed_point/fx_bits.h
Log Message:
-----------
[libc][stdfix] Fix buildbot failure because of a typo. (#126291)
Fix build-bot failure caused by #125356
Commit: 6ef978b8c41a83378af3de1dceeea434715f80f4
https://github.com/llvm/llvm-project/commit/6ef978b8c41a83378af3de1dceeea434715f80f4
Author: QuietMisdreavus <QuietMisdreavus at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
A clang/test/ExtractAPI/typedef_underscore.c
Log Message:
-----------
[clang][ExtractAPI] combine typedef records if the underlying type's name is underscored (#125964)
fixes rdar://137214218
When 'typedef struct' decls are encountered, the records are combined if
the underlying type is either anonymous or has the same name as the
typedef. Extend this behavior to also combine records when the
underlying type has an underscored name that is equivalent to the
typedef name when the leading underscores are removed.
Commit: 7623d917849daf6d796e497d125e48026b0247cf
https://github.com/llvm/llvm-project/commit/7623d917849daf6d796e497d125e48026b0247cf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
R libc/src/stdfix/countlshk.cpp
R libc/src/stdfix/countlshk.h
R libc/src/stdfix/countlshr.cpp
R libc/src/stdfix/countlshr.h
R libc/src/stdfix/countlsk.cpp
R libc/src/stdfix/countlsk.h
R libc/src/stdfix/countlslk.cpp
R libc/src/stdfix/countlslk.h
R libc/src/stdfix/countlslr.cpp
R libc/src/stdfix/countlslr.h
R libc/src/stdfix/countlsr.cpp
R libc/src/stdfix/countlsr.h
R libc/src/stdfix/countlsuhk.cpp
R libc/src/stdfix/countlsuhk.h
R libc/src/stdfix/countlsuhr.cpp
R libc/src/stdfix/countlsuhr.h
R libc/src/stdfix/countlsuk.cpp
R libc/src/stdfix/countlsuk.h
R libc/src/stdfix/countlsulk.cpp
R libc/src/stdfix/countlsulk.h
R libc/src/stdfix/countlsulr.cpp
R libc/src/stdfix/countlsulr.h
R libc/src/stdfix/countlsur.cpp
R libc/src/stdfix/countlsur.h
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/CountlsTest.h
R libc/test/src/stdfix/countlshk_test.cpp
R libc/test/src/stdfix/countlshr_test.cpp
R libc/test/src/stdfix/countlsk_test.cpp
R libc/test/src/stdfix/countlslk_test.cpp
R libc/test/src/stdfix/countlslr_test.cpp
R libc/test/src/stdfix/countlsr_test.cpp
R libc/test/src/stdfix/countlsuhk_test.cpp
R libc/test/src/stdfix/countlsuhr_test.cpp
R libc/test/src/stdfix/countlsuk_test.cpp
R libc/test/src/stdfix/countlsulk_test.cpp
R libc/test/src/stdfix/countlsulr_test.cpp
R libc/test/src/stdfix/countlsur_test.cpp
Log Message:
-----------
Revert "[libc][stdfix] Fix buildbot failure because of a typo. (#126291)"
This reverts commit bada9220b87e73c0f4a498b82f883e17eda928d1.
Revert "[libc][stdfix] Implement fixed point `countlsfx` functions in llvm-libc (#125356)"
This reverts commit f2a1103b323492160d7d27a1575fbda709b49036.
Commit: dee20925e76e9aed50c0fd4ac36a9ee1039a5265
https://github.com/llvm/llvm-project/commit/dee20925e76e9aed50c0fd4ac36a9ee1039a5265
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc][test] `-Wimplicit-fallthrough`, `-Wwrite-strings` and non-GCC warnings (#124036)
* Enabled `-Wimplicit-fallthrough`
* Enabled `-Wwrite-strings`
* Enabled non-GCC warnings
* Fix non-GCC to mean `clang`
* Move `-Wstrict-prototypes` to common section
See:
https://github.com/llvm/llvm-project/pull/122835#discussion_r1924109264
Relates to #119281
Commit: cea799afc632879f7d08157108a60c67317829a2
https://github.com/llvm/llvm-project/commit/cea799afc632879f7d08157108a60c67317829a2
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
Log Message:
-----------
[LV] Add ordered reduction test with live-in.
Extra test for https://github.com/llvm/llvm-project/pull/124644.
Commit: fb1216e82979511a3dfc931e693b575c225c5224
https://github.com/llvm/llvm-project/commit/fb1216e82979511a3dfc931e693b575c225c5224
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
Log Message:
-----------
[NFC][GlobalISel] Minor cleanup in LegalityQuery constructors (#126285)
- Remove a redundant LegalityQuery constructor by using a default value
for `MMODescrs` and remove const for ArrayRef arguments.
- Use a delegating constructor for `MemDesc` constructor that takes
`MachineMemOperand`.
Commit: 6e5988863177e1d53e7a7abb7a3db2b85376f0f5
https://github.com/llvm/llvm-project/commit/6e5988863177e1d53e7a7abb7a3db2b85376f0f5
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
workflows/premerge: Move concurrency definition to workflow level (#126308)
Prior workflow runs were not being cancelled when the pull request was
closed, and I think this was why. Also, there is no advantage to having
the definitions at the job level.
Commit: 2e0c0931bc891e76effaeb9c82fa08749e61f9b3
https://github.com/llvm/llvm-project/commit/2e0c0931bc891e76effaeb9c82fa08749e61f9b3
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/test/BUILD.gn
Log Message:
-----------
[gn] fix bug in bfba6215cec2
Commit: 8b12acd2a4a030ad0be76295b98815f93b2631d8
https://github.com/llvm/llvm-project/commit/8b12acd2a4a030ad0be76295b98815f93b2631d8
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][vector][spirv] Handle 1-element vector.{load|store} lowering. (#126294)
Add support for single element vector{load|store} lowering to SPIR-V.
Since, SPIR-V converts single element vector to scalars, it needs
special attention for vector{load|store} lowering to spirv{load|store}.
Commit: 427b24a40879d512802ca4c04d18b0f124e2a684
https://github.com/llvm/llvm-project/commit/427b24a40879d512802ca4c04d18b0f124e2a684
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] adding readlink(at) interception (#126262)
Commit: 6dbe5422907ff342fd5971a88892aee8f75a25ca
https://github.com/llvm/llvm-project/commit/6dbe5422907ff342fd5971a88892aee8f75a25ca
Author: Petr Hosek <phosek at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/math/generic/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/exhaustive/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/stdfix/CMakeLists.txt
M libc/utils/MPFRWrapper/CMakeLists.txt
Log Message:
-----------
[libc] Use `${libc_opt_high_flag}` instead of `-O3` (#123233)
This is preferable since `${libc_opt_high_flag}` will be set correctly
for the compiler used.
Commit: addbb4448487717283d334e48c63868d6f8553be
https://github.com/llvm/llvm-project/commit/addbb4448487717283d334e48c63868d6f8553be
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/openmp-offload.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[LinkerWrapper] Clean up options after proper forwarding (#126297)
Summary:
Recent changes made a lot of this stuff redundant or unused, clean it up
a bit.
Also snuck in a change to pass the CUDA path since we still use it for
`fatbinary` internally.
Commit: 76985fd7cafddec5254c15caeeeabc80e5a8c2f9
https://github.com/llvm/llvm-project/commit/76985fd7cafddec5254c15caeeeabc80e5a8c2f9
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
A llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/MC/CMakeLists.txt
A llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/ObjectYAML/DXContainer/RootSignature-Flags.yaml
M llvm/tools/obj2yaml/dxcontainer2yaml.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DXIL] Adding support to RootSignatureFlags in obj2yaml (#122396)
This PR adds:
- `RootSignatureFlags` extraction from DXContainer using `obj2yaml`
This PR is part of: #121493
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 756dab4c25c30743a1bdcae8a8e8b8d22f1873b1
https://github.com/llvm/llvm-project/commit/756dab4c25c30743a1bdcae8a8e8b8d22f1873b1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
Log Message:
-----------
[gn build] Port 76985fd7cafd
Commit: 170cdadf7d1fa254d5a77648b65c4c72e78c8b75
https://github.com/llvm/llvm-project/commit/170cdadf7d1fa254d5a77648b65c4c72e78c8b75
Author: Petr Hosek <phosek at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc] Exercise all CMake build types in GitHub Action workflows (#126315)
We want to test libc in all build configurations: Debug, Release and
MinSizeRel which correspond to -O0, -O3 and -Os optimization flags.
Commit: 898112e529eae3f4c2210d9b03b14b71869ebc9e
https://github.com/llvm/llvm-project/commit/898112e529eae3f4c2210d9b03b14b71869ebc9e
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP supported features table (#126292)
Updated status to 'done' for OpenMP 6.0 features:
- OpenMP directives in concurrent loop regions
- atomics constructs on concurrent loop regions
- Lift nesting restriction on concurrent loop
Removed duplicate OpenMP 6.0 feature per Michael Klemm:
- atomic constructs in loop region
Commit: 51e7dc8627e636ff69ee8bcb0bf599b7a3a4957f
https://github.com/llvm/llvm-project/commit/51e7dc8627e636ff69ee8bcb0bf599b7a3a4957f
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/unittests/Object/DXContainerTest.cpp
Log Message:
-----------
Use explicit unsigned literals to fix mixed sign comparisons
Commit: 343bbda140d5a15cd7d7fbfc6041a7506da5cdae
https://github.com/llvm/llvm-project/commit/343bbda140d5a15cd7d7fbfc6041a7506da5cdae
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Log Message:
-----------
Use a stable sort to handle overlapping/duplicate line sequences
This can occur due to linker ICF and stable sort will ensure the results
are stable.
No explicit/new test coverage, because nondeterminism is non-testable.
It should already be covered by the DWARFDebugLineTest that was failing
some internal testing on an ARM machine which might've been what changed
the sort order. But `llvm::sort` also deliberately randomizes the
contents (under EXPENSIVE_CHECKS) so I'd have expected failures to show
up in any EXPENSIVE_CHECKS Build...
Commit: e6e8ac59ba45e03da92aebec1f4561c1fa970df1
https://github.com/llvm/llvm-project/commit/e6e8ac59ba45e03da92aebec1f4561c1fa970df1
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M flang/CMakeLists.txt
M flang/examples/CMakeLists.txt
M flang/test/CMakeLists.txt
M flang/test/Driver/ctofortran.f90
M flang/test/Driver/exec.f90
M flang/test/Runtime/no-cpp-dep.c
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/f18/CMakeLists.txt
M flang/unittests/CMakeLists.txt
M flang/unittests/Evaluate/CMakeLists.txt
Log Message:
-----------
[Flang] Optionally do not compile the runtime in-tree (#122336)
Introduce the CMake switch FLANG_INCLUDE_RUNTIME. When set to off, do
not add build instructions for the runtime.
This is required for Flang-RT (#110217) and the current runtime CMake
code to co-exist. When using `LLVM_ENABLE_RUNTIME=flang-rt`, the in-tree
build instructions are in conflict and must be disabled.
Commit: 3e2afe5f019b7a1c60e23cb2743018bd2d0417b1
https://github.com/llvm/llvm-project/commit/3e2afe5f019b7a1c60e23cb2743018bd2d0417b1
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
R clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
Revert "[Fuchsia] Support PGO" (#126293)
Reverts llvm/llvm-project#120323
This breaks some internal Fuchsia builders. We can reland again later,
once that is addresed.
Commit: 7464dc8c7618aeb5a01998576bbcc4c88f0dde1d
https://github.com/llvm/llvm-project/commit/7464dc8c7618aeb5a01998576bbcc4c88f0dde1d
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Include RISCVGenSearchTable.inc in RISCVISelDAGToDAG.h (#126326)
This line was previously removed when
12d47247e5046b959af180e12f648c54e2c5e863 moved it to RISCVInstrInfo.h.
But we probably don't want to have dangling `#define *_DECL`
(RISCVGenSearchableTables.inc will `#undef` these macros) and I think
there is no harm putting declarations of those search table functions in
RISCVISelDAGToDAG.h.
Commit: 51ba9819b40e04ef0ddbe141d3d30c32a295a0bc
https://github.com/llvm/llvm-project/commit/51ba9819b40e04ef0ddbe141d3d30c32a295a0bc
Author: A. Jiang <de34 at live.cn>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M libcxx/test/support/MinSequenceContainer.h
M libcxx/test/support/min_allocator.h
Log Message:
-----------
[libc++][test] Fix `size_type` issues with `MinSequenceContainer` and `min_allocator` (#126267)
`MinSequenceContainer::size` can be narrowing on 64-bit platforms, and
MSVC complains about such implicit conversion. This PR changes the
implicit conversion to explicit `static_cast`.
`min_allocator::allocate` and `min_allocator::deallocate` have
`ptrdiff_t` as the parameter type, which seems weird, because the
underlying `std::allocator`'s member functions take `size_t`. It seems
better to use `size_t` consistently.
Commit: 12a154a94a9c2f6f0690adc7302da9c9e47ec806
https://github.com/llvm/llvm-project/commit/12a154a94a9c2f6f0690adc7302da9c9e47ec806
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
M libunwind/test/signal_unwind.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
Log Message:
-----------
[libunwind] Unwind through loongarch64/Linux sigreturn frame (#123682)
Similar to D90898 (Linux AArch64), D124765 (SystemZ), and D148499
(RISCV).
In this commit, I enabled two test cases, while zhuqizheng supported
with the source code development.
Co-Authored-By: zhuqizheng <zhuqizheng at loongson.cn>
Co-authored-by: zhuqizheng <zhuqizheng at loongson.cn>
Commit: ff79d83caeeea8457f69406f38801fe8893bbfd8
https://github.com/llvm/llvm-project/commit/ff79d83caeeea8457f69406f38801fe8893bbfd8
Author: Tiezhu Yang <yangtiezhu at loongson.cn>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
Log Message:
-----------
[LLDB][LoongArch] Extend the maximum number of watchpoints (#126204)
The maximum number of load/store watchpoints and fetch instruction
watchpoints is 14 each according to LoongArch Reference Manual [1],
so extend the maximum number of watchpoints from 8 to 14 for ptrace.
A new struct user_watch_state_v2 was added into uapi in the related
kernel commit 531936dee53e ("LoongArch: Extend the maximum number of
watchpoints") [2], but there may be no struct user_watch_state_v2 in
the system header in time.
In order to avoid undefined or redefined error, just add a new struct
loongarch_user_watch_state in LLDB which is same with the uapi struct
user_watch_state_v2, then replace the current user_watch_state with
loongarch_user_watch_state.
As far as I can tell, the only users for this struct in the userspace
are GDB and LLDB, there are no any problems of software compatibility
between the application and kernel according to the analysis.
The compatibility problem has been considered while developing and
testing. When the applications in the userspace get watchpoint state,
the length will be specified which is no bigger than the sizeof struct
user_watch_state or user_watch_state_v2, the actual length is assigned
as the minimal value of the application and kernel in the generic code
of ptrace:
```
kernel/ptrace.c: ptrace_regset():
kiov->iov_len = min(kiov->iov_len,
(__kernel_size_t) (regset->n * regset->size));
if (req == PTRACE_GETREGSET)
return copy_regset_to_user(task, view, regset_no, 0,
kiov->iov_len, kiov->iov_base);
else
return copy_regset_from_user(task, view, regset_no, 0,
kiov->iov_len, kiov->iov_base);
```
For example, there are four kind of combinations, all of them work well.
(1) "older kernel + older app", the actual length is 8+(8+8+4+4)*8=200;
(2) "newer kernel + newer app", the actual length is 8+(8+8+4+4)*14=344;
(3) "older kernel + newer app", the actual length is 8+(8+8+4+4)*8=200;
(4) "newer kernel + older app", the actual length is 8+(8+8+4+4)*8=200.
[1]
https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=531936dee53e
Signed-off-by: Tiezhu Yang <yangtiezhu at loongson.cn>
Commit: b850ce41db1e90cb2573ab5880da1d05de7828fd
https://github.com/llvm/llvm-project/commit/b850ce41db1e90cb2573ab5880da1d05de7828fd
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR][Affine] Fix private memref creation bug in affine fusion (#126028)
Fix private memref creation bug in affine fusion exposed in the case of
the same memref being loaded from/stored to in producer nest. Make the
private memref replacement sound.
Change affine fusion debug string to affine-fusion - more compact.
Fixes: https://github.com/llvm/llvm-project/issues/48703
Commit: 9d5edc9a0dd35049017aad2a9d3f4a4a2746fec9
https://github.com/llvm/llvm-project/commit/9d5edc9a0dd35049017aad2a9d3f4a4a2746fec9
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
Log Message:
-----------
[lldb][NFC] Replace GetLocalBufferSize() with GetLocalBuffer() (#126333)
Commit: de12bf508970ef9c0612c3950410530c4b822e6e
https://github.com/llvm/llvm-project/commit/de12bf508970ef9c0612c3950410530c4b822e6e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Refactor tablegen classes to push common values down to VPseudoBinaryM. NFC (#126339)
Move VPseudoBinaryM ajacent to its only users.
Commit: e0a21e23a7aa6acf3e07b866c3c599db5eb4b67f
https://github.com/llvm/llvm-project/commit/e0a21e23a7aa6acf3e07b866c3c599db5eb4b67f
Author: Gedare Bloom <gedare at rtems.org>
Date: 2025-02-07 (Fri, 07 Feb 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Add BinPackLongBracedList style option (#112482)
The use of Cpp11BracedListStyle with BinPackArguments=False avoids bin
packing until reaching a hard-coded limit of 20 items. This is an
arbitrary choice. Introduce a new style option to allow disabling this
limit.
Commit: 6f241e36831927e3aea113cfc017c34fdeda340a
https://github.com/llvm/llvm-project/commit/6f241e36831927e3aea113cfc017c34fdeda340a
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/test/SemaCXX/cxx1z-decomposition.cpp
Log Message:
-----------
[Clang][Sema] Fix wrong initialization kind when handling initializing structured bindings from an array with direct-list-initialization (#124793)
In 377257f063c, elements of structured bindings are copy-initialized.
They should be direct-initialized because the form of the initializer of
the whole structured bindings is a direct-list-initialization.
> [dcl.struct.bind]/1:
> ... and each element is copy-initialized or direct-initialized from
the corresponding element of the assignment-expression as specified by
the form of the initializer. ...
For example,
```cpp
int arr[2]{};
// elements of `[a, b]` should be direct-initialized
auto [a, b]{arr};
```
Commit: 1c497c4837e82e23589b29e3ce0aedd3f461018b
https://github.com/llvm/llvm-project/commit/1c497c4837e82e23589b29e3ce0aedd3f461018b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#126343)
Commit: dbe812220c3100ece253feb72d65172780ef723b
https://github.com/llvm/llvm-project/commit/dbe812220c3100ece253feb72d65172780ef723b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#126344)
Commit: 5901bda5a0ed31e024abc8a7af52b272400daa08
https://github.com/llvm/llvm-project/commit/5901bda5a0ed31e024abc8a7af52b272400daa08
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Log Message:
-----------
[Vectorize] Avoid repeated hash lookups (NFC) (#126345)
Commit: 95922d83341f3476bdc2eccd524a02d9a4ab80da
https://github.com/llvm/llvm-project/commit/95922d83341f3476bdc2eccd524a02d9a4ab80da
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/tools/dsymutil/BinaryHolder.cpp
Log Message:
-----------
[dsymutil] Avoid repeated hash lookups (NFC) (#126190) (#126346)
Commit: 027aa70ea44502280779c3887c72886326785c6b
https://github.com/llvm/llvm-project/commit/027aa70ea44502280779c3887c72886326785c6b
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[TOSA] Fix negate maxValue computation (#126295)
getInput1Zp() returns an unsigned value which means in case of negative
zero point value the max intermediate value computation currently goes
wrong. Use getInput1ZpAttr() instead which returns an APInt and allows
easy sign extension to int64_t.
Commit: 564b9b7f4db05b5ce3558041b164f21dfe051a91
https://github.com/llvm/llvm-project/commit/564b9b7f4db05b5ce3558041b164f21dfe051a91
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AArch64/a55-fuse-address.mir
M llvm/test/CodeGen/AArch64/ampere1-sched-add.mir
M llvm/test/CodeGen/AArch64/cluster-frame-index.mir
M llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir
M llvm/test/CodeGen/AArch64/dump-schedule-trace.mir
M llvm/test/CodeGen/AArch64/force-enable-intervals.mir
M llvm/test/CodeGen/AArch64/machine-scheduler.mir
M llvm/test/CodeGen/AArch64/macro-fusion-addsub-2reg-const1.mir
M llvm/test/CodeGen/AArch64/macro-fusion-last.mir
M llvm/test/CodeGen/AArch64/misched-branch-targets.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/misched-fusion-arith-logic.mir
M llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
M llvm/test/CodeGen/AArch64/misched-fusion-crypto-eor.mir
M llvm/test/CodeGen/AArch64/misched-move-imm.mir
M llvm/test/CodeGen/AArch64/misched-predicate-virtreg.mir
M llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir
M llvm/test/CodeGen/AArch64/sched-postidxalias.mir
M llvm/test/CodeGen/AArch64/sched-print-cycle.mir
M llvm/test/CodeGen/AArch64/scheduledag-constreg.mir
M llvm/test/CodeGen/AArch64/sve-aliasing.mir
M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
M llvm/test/CodeGen/ARM/cortex-m7-wideops.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/PowerPC/topdepthreduce-postra.mir
M llvm/test/CodeGen/RISCV/misched-postra-direction.mir
Log Message:
-----------
Revert "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126268)
This reverts commit 5aa4979c47255770cac7b557f3e4a980d0131d69 while I
investigate what's causing the compile-time regression.
Commit: 16df836a527e4a04d2cbdb52365c81ff80e3e757
https://github.com/llvm/llvm-project/commit/16df836a527e4a04d2cbdb52365c81ff80e3e757
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Mark hasVF & hasScalableVF as const (NFC).
Commit: 0cdb467c7da731bb83abc75480cbf66ad64aa014
https://github.com/llvm/llvm-project/commit/0cdb467c7da731bb83abc75480cbf66ad64aa014
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/Expr/TestEnumExtensibility.m
Log Message:
-----------
[lldb][TypeSystemClang] Create EnumExtensibilityAttr from DW_AT_APPLE_enum_kind (#126221)
This patch consumes the `DW_AT_APPLE_enum_kind` attribute added in
https://github.com/llvm/llvm-project/pull/124752 and turns it into a
Clang attribute in the AST. This will currently be used by the Swift
language plugin when it creates `EnumDecl`s from debug-info and passes
it to Swift compiler, which expects these attributes
Commit: ee806646ad893fcb0d19a75cebcc1f0e0bccabf1
https://github.com/llvm/llvm-project/commit/ee806646ad893fcb0d19a75cebcc1f0e0bccabf1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Consistently use hasScalarVFOnly (NFC).
Consistently use hasScalarVFOnly instead of using
hasVF(ElementCount::getFixed(1)). Also add an assert to ensure all cases
are covered by hasScalarVFOnly.
Commit: 66bea0df75ccdd5ffed41d06c7301a116d11abcb
https://github.com/llvm/llvm-project/commit/66bea0df75ccdd5ffed41d06c7301a116d11abcb
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/dump-section.test
M llvm/test/tools/llvm-objcopy/MachO/dump-section.test
M llvm/test/tools/llvm-objcopy/wasm/dump-section.test
Log Message:
-----------
[llvm-objcopy] Fix prints wrong path when dump-section output path doesn't exist (#125345)
Fix printing the correct file path in the error message when the output
file specified by `--dump-section` cannot be opened
Fixes: #125113 on ELF, MachO, Wasm
Commit: ef23ba7da34ca1285f10603cc4aa6441ab4530e6
https://github.com/llvm/llvm-project/commit/ef23ba7da34ca1285f10603cc4aa6441ab4530e6
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Support] Re-raise external signals (#125854)
Otherwise, the handler "swallows" the signal and the process continues
to execute. While this use case is peculiar, ignoring these signals
entirely seems more odd.
Commit: 4e29148cca3fac0f1ffb1fbfbe3bbbd489859897
https://github.com/llvm/llvm-project/commit/4e29148cca3fac0f1ffb1fbfbe3bbbd489859897
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/XCore.cpp
Log Message:
-----------
[CodeGen][XCore] Replace PointerType::getUnqual(Type) with opaque version (NFC) (#126279)
Follow-up to #123569
Commit: 54e0c2bbe2b36b08772ca6e5e3f176d7caf116bd
https://github.com/llvm/llvm-project/commit/54e0c2bbe2b36b08772ca6e5e3f176d7caf116bd
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/SystemZ.cpp
Log Message:
-----------
[CodeGen][SystemZ] Replace PointerType::getUnqual(Type) with opaque version (NFC) (#126280)
Follow-up to #126278
Commit: df2e8ee7ae349364967a1a2d09f17b249a38c04d
https://github.com/llvm/llvm-project/commit/df2e8ee7ae349364967a1a2d09f17b249a38c04d
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AArch64.cpp
Log Message:
-----------
[CodeGen][AArch64] Replace PointerType::getUnqual(Type) with opaque version (NFC) (#126278)
Follow-up to #123569
Commit: 6ff8a06de9ce125023e117014ce4dca8fcc391d7
https://github.com/llvm/llvm-project/commit/6ff8a06de9ce125023e117014ce4dca8fcc391d7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[VPlan] Run recipe removal and simplification after optimizeForVFAndUF. (#125926)
Run recipe simplification and dead recipe removal after VPlan-based
unrolling and optimizeForVFAndUF, to clean up any redundant or dead
recipes introduced by them. Currently this is NFC, as it removes the
corresponding removeDeadRecipes run in optimizeForVFAndUF and no
additional simplifications kick in after unrolling yet. That is changing
with https://github.com/llvm/llvm-project/pull/123655.
Note that with this change, pattern-matching is now applied after
EVL-based recipes have been introduced.
Trying to match VPWidenEVLRecipe when not explicitly requested might
apply a pattern with 2 operands to one with 3 due to the extra EVL
operand and VPWidenEVLRecipe being a subclass of VPWidenRecipe.
To prevent this, update Recipe_match::match to only match
VPWidenEVLRecipe if it is in the requested recipe types (RecipeTy).
PR: https://github.com/llvm/llvm-project/pull/125926
Commit: e0fee55a5549e04bb14d45fba6267bd69285ce77
https://github.com/llvm/llvm-project/commit/e0fee55a5549e04bb14d45fba6267bd69285ce77
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Address.h
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[CodeGen] Replace of PointerType::get(Type) with opaque version (NFC) (#124771)
Follow-up to https://github.com/llvm/llvm-project/issues/123569
Commit: a07928c3ce9da62b82a796ef26f5f7aaa0311d37
https://github.com/llvm/llvm-project/commit/a07928c3ce9da62b82a796ef26f5f7aaa0311d37
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/Hexagon.cpp
Log Message:
-----------
[CodeGen][Hexagon] Replace PointerType::getUnqual(Type) with opaque version (NFC) (#126274)
Follow-up to https://github.com/llvm/llvm-project/issues/123569
The obsolete bitcasts on the LoadInsts are also removed.
Commit: 101b3ff7af8fabe4ec5c06219a70094c1d901c49
https://github.com/llvm/llvm-project/commit/101b3ff7af8fabe4ec5c06219a70094c1d901c49
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
Log Message:
-----------
[RISCV][NFC] Adopt DiagnosticString interface (#126290)
Commit: 2feced1df0aa01f78501720b98faa985bcec846a
https://github.com/llvm/llvm-project/commit/2feced1df0aa01f78501720b98faa985bcec846a
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-barriers.mlir
Log Message:
-----------
[MLIR][NVVM] Add tcgen05 wait/fence Ops (#126265)
PR #126091 adds intrinsics for tcgen05
wait/fence/commit operations. This patch
adds NVVM Dialect Ops for them.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 69b8cf4f0621b359b487ad41887c20984be53a34
https://github.com/llvm/llvm-project/commit/69b8cf4f0621b359b487ad41887c20984be53a34
Author: vporpo <vporpodas at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Tracker.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAlwaysAccept.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
A llvm/test/Transforms/SandboxVectorizer/X86/simple_cost_test.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice_pow2.ll
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/default_pass_pipeline.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SandboxVectorizer/repeated_instrs.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/test/Transforms/SandboxVectorizer/special_opcodes.ll
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Add cost estimation and tr-accept-or-revert pass (#126325)
The TransactionAcceptOrRevert pass is the final pass in the Sandbox
Vectorizer's default pass pipeline. It's job is to check the cost
before/after vectorization and accept or revert the IR to its original
state.
Since we are now starting the transaction in BottomUpVec, tests that run
a custom pipeline need to accept the transaction. This is done with the
help of the TransactionAlwaysAccept pass (tr-accept).
Commit: 40ce8fd8436d7b52b31cb8174fe442c9c1cae7a0
https://github.com/llvm/llvm-project/commit/40ce8fd8436d7b52b31cb8174fe442c9c1cae7a0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 69b8cf4f0621
Commit: 5c8c2b3db54395073e3183f89167156df29dff61
https://github.com/llvm/llvm-project/commit/5c8c2b3db54395073e3183f89167156df29dff61
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/CMakeLists.txt
M flang/cmake/modules/AddFlang.cmake
M flang/docs/FlangDriver.md
M flang/docs/GettingStarted.md
M flang/docs/OpenACC-descriptor-management.md
M flang/docs/Real16MathSupport.md
M flang/docs/ReleaseNotes.md
M flang/examples/ExternalHelloWorld/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/runtime/CMakeLists.txt
M flang/runtime/CUDA/CMakeLists.txt
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/time-intrinsic.cpp
M flang/runtime/tools.h
M flang/test/CMakeLists.txt
M flang/test/Driver/gcc-toolchain-install-dir.f90
M flang/test/Driver/linker-flags.f90
M flang/test/Driver/msvc-dependent-lib-flags.f90
M flang/test/Driver/nostdlib.f90
M flang/test/Runtime/no-cpp-dep.c
M flang/test/lit.cfg.py
M flang/tools/f18/CMakeLists.txt
M flang/unittests/CMakeLists.txt
M flang/unittests/Evaluate/CMakeLists.txt
M flang/unittests/Runtime/CMakeLists.txt
M flang/unittests/Runtime/CUDA/CMakeLists.txt
M lld/COFF/MinGW.cpp
Log Message:
-----------
[Flang] Rename libFortranRuntime.a to libflang_rt.runtime.a (#122341)
Following the conclusion of the
[RFC](https://discourse.llvm.org/t/rfc-names-for-flang-rt-libraries/84321),
rename Flang's runtime libraries as follows:
* libFortranRuntime.(a|so) to libflang_rt.runtime.(a|so)
* libFortranFloat128Math.a to libflang_rt.quadmath.a
* libCufRuntime_cuda_${CUDAToolkit_VERSION_MAJOR}.(a|so) to
libflang_rt.cuda_${CUDAToolkit_VERSION_MAJOR}.(a|so)
This follows the same naming scheme as Compiler-RT libraries
(`libclang_rt.${component}.(a|so)`). It provides some consistency
between Flang's runtime libraries for current and potential future
library components.
Commit: 7f2f905361558b9137855b00debfdcc5eb057729
https://github.com/llvm/llvm-project/commit/7f2f905361558b9137855b00debfdcc5eb057729
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
A llvm/test/Transforms/SandboxVectorizer/X86/lit.local.cfg
Log Message:
-----------
[SandboxVec] Fix: Add missing lit.local.cfg for target test
Commit: 9266b48c5b28d4633cf7671c10c2aa52e22d4d65
https://github.com/llvm/llvm-project/commit/9266b48c5b28d4633cf7671c10c2aa52e22d4d65
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
Log Message:
-----------
[VPlan] Add outer loop tests with wide phis in inner loop.
Add test coverage with phis outside a header block with multiple
incoming values.
Commit: ca9c0486cccba08dc6a3489176cbd7f38bad8e63
https://github.com/llvm/llvm-project/commit/ca9c0486cccba08dc6a3489176cbd7f38bad8e63
Author: David Green <david.green at arm.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
Log Message:
-----------
[ARM] Silence "enumerated and non-enumerated type in conditional expression" warning. NFC
Fixes #125543
Commit: 451007173abaeff7de70d6d7fb0135b7858d093d
https://github.com/llvm/llvm-project/commit/451007173abaeff7de70d6d7fb0135b7858d093d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/Analysis/UninitializedValues.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#126378)
Commit: 2fee5ef2356b514dda30e89f39125a390c0d928e
https://github.com/llvm/llvm-project/commit/2fee5ef2356b514dda30e89f39125a390c0d928e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[ByteCode] Avoid repeated hash lookups (NFC) (#126379)
Commit: 7628fcf3d43eb20c292ab0dd25ba3f52dba248a6
https://github.com/llvm/llvm-project/commit/7628fcf3d43eb20c292ab0dd25ba3f52dba248a6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/CrossTU/CrossTranslationUnit.cpp
Log Message:
-----------
[CrossTU] Avoid repeated hash lookups (NFC) (#126380)
Commit: cf5947be13e7af67219379e07bc0128f1f1e7f88
https://github.com/llvm/llvm-project/commit/cf5947be13e7af67219379e07bc0128f1f1e7f88
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated map lookups (NFC) (#126381)
Commit: 1e0a48967102780a3caad09e874539869d04110d
https://github.com/llvm/llvm-project/commit/1e0a48967102780a3caad09e874539869d04110d
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M bolt/lib/RuntimeLibs/RuntimeLibrary.cpp
Log Message:
-----------
[BOLT] Resolve symlink for library lookup (#126386)
Commit: 8e61aae4a8ce938f42604b10123c3b21d4adc0b8
https://github.com/llvm/llvm-project/commit/8e61aae4a8ce938f42604b10123c3b21d4adc0b8
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/profile-continuous.c
A clang/test/Driver/fprofile-continuous.c
Log Message:
-----------
[profile] Add a clang option -fprofile-continuous that enables continuous instrumentation profiling mode (#124353)
In Continuous instrumentation profiling mode, profile or coverage data
collected via compiler instrumentation is continuously synced to the
profile file. This feature has existed for a while, and is documented
here:
https://clang.llvm.org/docs/SourceBasedCodeCoverage.html#running-the-instrumented-program
This PR creates a user facing option to enable the feature.
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: fec6d168bbdf5116d2f7aaa52f0f429916af4f2d
https://github.com/llvm/llvm-project/commit/fec6d168bbdf5116d2f7aaa52f0f429916af4f2d
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb] Upstream a few remaining Triple::XROS patches (#126335)
Recognize the visionOS Triple::OSType::XROS os type. Some of these have
already been landed on main, but I reviewed the downstream sources and
there were a few that still needed to be landed upstream.
Commit: f9250401ef120a4605ad67bb43d3b25500900498
https://github.com/llvm/llvm-project/commit/f9250401ef120a4605ad67bb43d3b25500900498
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
Log Message:
-----------
[TableGen] Move formation of MoveSiblingMatcher earlier in ContractNodes. NFC
ContractNodes recursively walks forward through a linked list. During
this recursion, Matchers are combined into other Matchers.
Previously the formation of MoveSiblingMatcher was after the
recursive call so it occurred as we were unwinding. If a
MoveSiblingMatcher was formed, we would recursively walk forward
to the end of the linked list again which isn't efficient.
To make this more efficient, move the formation of MoveSiblingMatcher
to the forward pass. Add additional rules to unfold MoveSiblingMatcher
if it would be more efficient to use CheckChildType, CheckChildInteger,
CheckChildSame, etc.
As an added benefit, this makes the function tail recursive which
the compiler can better optimize.
Commit: 4aa71f0d4cccf1b06949c5a3c5ceb2e19250c7df
https://github.com/llvm/llvm-project/commit/4aa71f0d4cccf1b06949c5a3c5ceb2e19250c7df
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
Log Message:
-----------
[TableGen] Fix an unused variable warning. NFC
Commit: c40877d095eaa03d64e614723a69f1d68717f32a
https://github.com/llvm/llvm-project/commit/c40877d095eaa03d64e614723a69f1d68717f32a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/RISCV/postra-copy-expand.mir
Log Message:
-----------
[RISCV] Attach an implicit source operand on vector copies (#126155)
Somtimes when we're breaking up a large vector copy into several smaller
ones, not every single smaller source registers are initialized at the
time when the original COPY happens, and the verifier will not be
pleased when seeing the smaller copies reading from an undef register.
This patch is a workaround for the said issue by attaching an implicit
read of the source operand on the newly generated copies.
This is tested by llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll which
would have crashed the compiler without this fix when
LLVM_EXPENSIVE_CHECK is enabled. Original context:
https://github.com/llvm/llvm-project/pull/124825#issuecomment-2639097531
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 10ed0e406589604bf8ea5edd571a6f72dd8a6721
https://github.com/llvm/llvm-project/commit/10ed0e406589604bf8ea5edd571a6f72dd8a6721
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/target-specific-options.s
Log Message:
-----------
[ELF] Reorder target-specific error messaes
Commit: c89735d289f341985ca2ea74486b96bc611b3c64
https://github.com/llvm/llvm-project/commit/c89735d289f341985ca2ea74486b96bc611b3c64
Author: Michael Kenzel <michael.kenzel at gmail.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/Threading.h
Log Message:
-----------
Remove dependence on <ciso646> (#73273)
C++23 removed `<ciso646>` from the standard library. The header is used
in two places: Once in order to pull in standard library macros. Since
this file also includes `<optional>`, that use of `<ciso646>` is
technically redundant, but should probably be left in in case a future
change ever removes the include of `<optional>`. A second use of
`<ciso646>` appears to have been introduced in
da650094b187ee3c8017d74f63c885663faca1d8, but seems unnecessary (the
file doesn't seem to use anything from that header, and it seems to
build just fine on MSVC here without it). The new `<version>` header
should be supported by all supported implementations. This change
replaces uses of `<ciso646>` with the `<version>` header, or removes
them entirely where unnecessary.
Commit: 7c60725fcf1038f6c84df396496cf52d67ab5b43
https://github.com/llvm/llvm-project/commit/7c60725fcf1038f6c84df396496cf52d67ab5b43
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/Threading.h
Log Message:
-----------
Revert "Remove dependence on <ciso646>" (#126399)
Reverts llvm/llvm-project#73273
Commit: 59cbe2ff591d91e8375cfb4f4ba59dff49a82f4f
https://github.com/llvm/llvm-project/commit/59cbe2ff591d91e8375cfb4f4ba59dff49a82f4f
Author: Michael Park <mcypark at gmail.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
A clang/test/Modules/pr120277-2.cpp
Log Message:
-----------
[C++20][Modules][Serialization] Add an additional test case for #120277. (#126349)
https://github.com/llvm/llvm-project/commit/4b35dd57b88a59b169c3471cbc398113d3bf98e8
was shipped to address https://github.com/llvm/llvm-project/issues/120277 .
It was thought to be a regression in 19.x according to this comment:
https://github.com/llvm/llvm-project/issues/120277#issuecomment-2558991129
This is a test case that fails even in 17.x but nevertheless is also
fixed by: https://github.com/llvm/llvm-project/commit/4b35dd57b88a59b169c3471cbc398113d3bf98e8
Commit: 66c31f5d024f3ec9f9afa74c340ba0a4e0776823
https://github.com/llvm/llvm-project/commit/66c31f5d024f3ec9f9afa74c340ba0a4e0776823
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#126401)
This patch just cleans up the "if" condition. Further cleanups are
left to subsequent patches.
Commit: 8d373ceaec1f1b27c9e682cfaf71aae19ea48d98
https://github.com/llvm/llvm-project/commit/8d373ceaec1f1b27c9e682cfaf71aae19ea48d98
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-08 (Sat, 08 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Handle C-style cast of member function pointer type (#126340)
Fixes #125012.
Commit: 7b348f9bfdb319fe9497c881311eaa0aa40fed88
https://github.com/llvm/llvm-project/commit/7b348f9bfdb319fe9497c881311eaa0aa40fed88
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
Log Message:
-----------
[MIR][NFC] Use `std::move` to avoid copying (#125930)
Commit: 5ecc86bbcaebea5e7e480a3b2a5c4327f204bf3b
https://github.com/llvm/llvm-project/commit/5ecc86bbcaebea5e7e480a3b2a5c4327f204bf3b
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] test trunc to i1 as condition in dominating condition. (NFC)
Commit: 32c4493d5f8164ebe9d3d3e01ca744e6c3afcf17
https://github.com/llvm/llvm-project/commit/32c4493d5f8164ebe9d3d3e01ca744e6c3afcf17
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr56319-vector-exit-cond-optimization-epilogue-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference-simplifications.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[VPlan] Add incoming values for all predecessor to ResumePHI (NFCI).
Follow-up as discussed when using VPInstruction::ResumePhi for all resume
values (#112147). This patch explicitly adds incoming values for each
predecessor in VPlan. This simplifies codegen and allows transformations
adjusting the predecessors of blocks with
NFC modulo incoming block order in phis.
Commit: 09a500b3db5e99db4b5c7d5ac95c3aa99c191adf
https://github.com/llvm/llvm-project/commit/09a500b3db5e99db4b5c7d5ac95c3aa99c191adf
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] more test of trunc to i1 as condition in dominating condition. (NFC)
Commit: 4c470d0c933cee57843052e0783f6f11a20bd820
https://github.com/llvm/llvm-project/commit/4c470d0c933cee57843052e0783f6f11a20bd820
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
Log Message:
-----------
This commit fixes the build failure due to OMP_TRAIT_PROPERTY macro r… (#126222)
…edefinition - https://github.com/llvm/llvm-project/issues/126043
Commit: a32efd8edc6ec5f80ffa16b3d4e52e6407d5fe99
https://github.com/llvm/llvm-project/commit/a32efd8edc6ec5f80ffa16b3d4e52e6407d5fe99
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M clang/test/Driver/offload-Xarch.c
Log Message:
-----------
[Clang] Disable failing offload test on darwin
Summary:
We don't support offloading on Darwin. This fails because there's some
handling missing somewhere else that likely won't ever be added.
Commit: b1a267e1b9e9b50ba5b99de014ed056bf201b762
https://github.com/llvm/llvm-project/commit/b1a267e1b9e9b50ba5b99de014ed056bf201b762
Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
Log Message:
-----------
[mlir][vector] Remove references to non-existing patterns (nfc)
Delete references to:
* `VectorLoadToMemrefLoadLowering`,
* `VectorStoreToMemrefStoreLowering`.
These patters were removed in #121454.
Commit: 8a4707bf1de659f569558ab32d4c7cf5029acd3f
https://github.com/llvm/llvm-project/commit/8a4707bf1de659f569558ab32d4c7cf5029acd3f
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M libcxx/include/chrono
Log Message:
-----------
[NFC][libc++] Fixes minor issues in the synopsis.
Commit: cb1b51f4ff4e2a179dddf492e3310343f53a9ba1
https://github.com/llvm/llvm-project/commit/cb1b51f4ff4e2a179dddf492e3310343f53a9ba1
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M libcxx/docs/Status/FormatPaper.csv
Log Message:
-----------
[libc++][doc] Updates format status.
Commit: 70906f0514826b5e64bd9354210ae836740c2053
https://github.com/llvm/llvm-project/commit/70906f0514826b5e64bd9354210ae836740c2053
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
Log Message:
-----------
[LV][X86] Regenerate interleaved load/store costs. NFC.
update_analyze_test_checks has improved the checks since these were last updated.
Reduce noise diffs in future patches.
Commit: ed9107f2d71804f6bedff6cd05b1f1a4750eb112
https://github.com/llvm/llvm-project/commit/ed9107f2d71804f6bedff6cd05b1f1a4750eb112
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M offload/DeviceRTL/include/DeviceTypes.h
M offload/DeviceRTL/include/State.h
M offload/DeviceRTL/src/Configuration.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/DeviceRTL/src/Reduction.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/DeviceRTL/src/Workshare.cpp
Log Message:
-----------
[OpenMP] Replace use of target address space with <gpuintrin.h> local (#126119)
Summary:
This definition is more portable since it defines the correct value for
the target. I got rid of the helper mostly because I think it's easy
enough to use now that it's a type and being explicit about what's
`undef` or `poison` is good.
Commit: 6444ed53658354efb8fc126f93281bc13f1d6300
https://github.com/llvm/llvm-project/commit/6444ed53658354efb8fc126f93281bc13f1d6300
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M clang/lib/AST/VTableBuilder.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#126400)
Commit: c741cf1617c22d18316fd98af1c30dc244eab22e
https://github.com/llvm/llvm-project/commit/c741cf1617c22d18316fd98af1c30dc244eab22e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/StackColoring.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#126403)
Commit: db348c8e8b2472563a8db363b18d2604968ae43b
https://github.com/llvm/llvm-project/commit/db348c8e8b2472563a8db363b18d2604968ae43b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/include/llvm/Passes/DroppedVariableStats.h
Log Message:
-----------
[Passes] Avoid repeated hash lookups (NFC) (#126404)
Commit: 87ae9547ea0f590f8adbbdfaeca28ef999ddffa8
https://github.com/llvm/llvm-project/commit/87ae9547ea0f590f8adbbdfaeca28ef999ddffa8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#126405)
Commit: 4972722f90deddf45c29958070bb1beb509e72ac
https://github.com/llvm/llvm-project/commit/4972722f90deddf45c29958070bb1beb509e72ac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
M llvm/test/CodeGen/X86/horizontal-sum.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
Log Message:
-----------
[X86] lowerV4F64Shuffle - prefer lowerShuffleAsDecomposedShuffleMerge if we're blending inplace/splatable shuffle inputs on AVX2 targets (#126420)
More aggressively use broadcast instructions where possible
Fixes #50315
Commit: 3d140004c70e2bc79416825e43207e8b711c56d9
https://github.com/llvm/llvm-project/commit/3d140004c70e2bc79416825e43207e8b711c56d9
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] Test for not in dominating condition. (NFC)
Commit: 472220077383b2dbd9cfcaffcc6030558ba7a744
https://github.com/llvm/llvm-project/commit/472220077383b2dbd9cfcaffcc6030558ba7a744
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M lldb/test/API/api/command-return-object/TestSBCommandReturnObject.py
R lldb/test/API/python_api/commandreturnobject/TestSBCommandReturnObject.py
Log Message:
-----------
[lldb] Merge TestSBCommandReturnObject tests
In #125132, Michael pointed out that there are now two tests with the
same name:
./lldb/test/API/api/command-return-object/TestSBCommandReturnObject.py
./lldb/test/API/python_api/commandreturnobject/TestSBCommandReturnObject.py
Commit: e9a20f77ee2117b4a6eb40826b7280e29ad29e1e
https://github.com/llvm/llvm-project/commit/e9a20f77ee2117b4a6eb40826b7280e29ad29e1e
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
Log Message:
-----------
Reland "[LV]: Teach LV to recursively (de)interleave." (#125094)
This patch relands the changes from "[LV]: Teach LV to recursively
(de)interleave.#122989"
Reason for revert:
- The patch exposed an assert in the vectorizer related to VF difference
between
legacy cost model and VPlan-based cost model because of uncalculated
cost for
VPInstruction which is created by VPlanTransforms as a replacement to
'or disjoint'
instruction.
VPlanTransforms do that instructions change when there are memory
interleaving and
predicated blocks, but that change didn't cause problems because at most
cases the cost
difference between legacy/new models is not noticeable.
- Issue is fixed by #125434
Original patch: https://github.com/llvm/llvm-project/pull/89018
Reviewed-by: paulwalker-arm, Mel-Chen
Commit: d2047242e6d0f0deb7634ff22ab164354c520c79
https://github.com/llvm/llvm-project/commit/d2047242e6d0f0deb7634ff22ab164354c520c79
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/csky-toolchain.c
Log Message:
-----------
[CSKY] Default to unsigned char
This matches the ABI document found at
https://github.com/c-sky/csky-doc/blob/master/C-SKY_V2_CPU_Applications_Binary_Interface_Standards_Manual.pdf
Partially addresses https://github.com/llvm/llvm-project/issues/115957
Reviewed By: zixuan-wu
Pull Request: https://github.com/llvm/llvm-project/pull/115961
Commit: 3ce96b9ee961e0dc1f27fbb96339c6253f0196bc
https://github.com/llvm/llvm-project/commit/3ce96b9ee961e0dc1f27fbb96339c6253f0196bc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Analysis/DependenceGraphBuilder.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#126402)
Commit: f6f052625e77632bb672c5ea40d414f0f33fd5b1
https://github.com/llvm/llvm-project/commit/f6f052625e77632bb672c5ea40d414f0f33fd5b1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M clang/lib/Sema/JumpDiagnostics.cpp
Log Message:
-----------
[Sema] Avoid repeated hash lookups (NFC) (#126428)
Commit: b48b422c08e85e6afd39aea7341fdf08d07d3e08
https://github.com/llvm/llvm-project/commit/b48b422c08e85e6afd39aea7341fdf08d07d3e08
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[Serialization] Avoid repeated hash lookups (NFC) (#126429)
Commit: aa066e36f8c421a64e098601b226f0ecd85500c5
https://github.com/llvm/llvm-project/commit/aa066e36f8c421a64e098601b226f0ecd85500c5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#126430)
Commit: d1af9ca9fdb0db6ecea00e58b713e43fc1b9fa1c
https://github.com/llvm/llvm-project/commit/d1af9ca9fdb0db6ecea00e58b713e43fc1b9fa1c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated map lookups (NFC) (#126431)
Commit: df25511f0e13e8292de485c2c4d7b58941c77afb
https://github.com/llvm/llvm-project/commit/df25511f0e13e8292de485c2c4d7b58941c77afb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[Coroutines] Avoid repeated hash lookups (NFC) (#126432)
Commit: af6c6992cfda195e84cbe8a0710fd3bc02082104
https://github.com/llvm/llvm-project/commit/af6c6992cfda195e84cbe8a0710fd3bc02082104
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#126433)
Commit: 04e5ea5237da5c49d05cd9499a5f0eb325638cf9
https://github.com/llvm/llvm-project/commit/04e5ea5237da5c49d05cd9499a5f0eb325638cf9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
Log Message:
-----------
[TableGen] Remove recursive walk of linked list from ContractNodes. NFC
After f9250401ef120a4605ad67bb43d3b25500900498, this function is
tail recursive so it was straightforward to convert this to iteratively
walk the linkd list.
Commit: 560cea61abc68a9278d0ada26b3e7071e7b97bfe
https://github.com/llvm/llvm-project/commit/560cea61abc68a9278d0ada26b3e7071e7b97bfe
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse2.ll
A llvm/test/CodeGen/AArch64/v8.4-atomic.ll
Log Message:
-----------
[NFC][AArch64] move AArch64 non auto-generated tests to static file (#126312)
Move AArch64 non auto-generated test code into a static file, since the
script `./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py` will overwrite
these tests when re-run. (Test code was originally added in change
465bc5e729fd755880b9a288de42a37ad1206301)
Commit: 2e3729bf40040ac960153e893d670c58f94eac62
https://github.com/llvm/llvm-project/commit/2e3729bf40040ac960153e893d670c58f94eac62
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
Log Message:
-----------
[LV] Prevent query the computeCost() when VF=1 in emitInvalidCostRemarks(). (#117288)
We should only query the computeCost() when the VF is vector.
Commit: 967973512b9eba99dd8b04db42dbafcc50d94728
https://github.com/llvm/llvm-project/commit/967973512b9eba99dd8b04db42dbafcc50d94728
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
A llvm/test/CodeGen/AMDGPU/do-not-unify-divergent-exit-nodes-with-musttail.ll
Log Message:
-----------
[AMDGPU] Don't unify divergent exit nodes with `musttail` calls (#126395)
Fixes SWDEV-512254.
Commit: 161cfc6f39bef8994eb944687033ebd3570196e8
https://github.com/llvm/llvm-project/commit/161cfc6f39bef8994eb944687033ebd3570196e8
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
Log Message:
-----------
[AVX10.2] Fix wrong intrinsic names after rename (#126390)
In my previous PR (#123656) to update the names of AVX10.2 intrinsics
and mnemonics, I have erroneously deleted `_ph` from few intrinsics.
This PR corrects this.
Commit: 55632404bd0b6f2b6c09426ed492e9351c9706ed
https://github.com/llvm/llvm-project/commit/55632404bd0b6f2b6c09426ed492e9351c9706ed
Author: Brad Smith <brad at comstyle.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M third-party/benchmark/src/sysinfo.cc
Log Message:
-----------
[benchmark] Sync a few commits from upstream to help with CPU count (#126410)
Try to use the _SC_NPROCESSORS_ONLN sysconf elsewhere
(cherry picked from commit edb1e76d8cb080a396c7c992e5d4023e1a777bd1)
Replace usage of deprecated sysctl on macOS
(cherry picked from commit faaa266d33ff203e28b31dd31be9f90c29f28d04)
Retrieve the number of online CPUs on OpenBSD and NetBSD
(cherry picked from commit 41e81b1ca4bbb41d234f2d0f2c56591db78ebb83)
Update error message now that /proc/cpuinfo is no longer in use
(cherry picked from commit c35af58b61daa111c93924e0e7b65022871fadac)
Fix runtime crash when parsing /proc/cpuinfo fails
(cherry picked from commit 39be87d3004ff9ff4cdf736651af80c3d15e2497)
another reversal of something that breaks on wasm
(cherry picked from commit 44507bc91ff9a23ad8ad4120cfc6b0d9bd27e2ca)
Commit: 70fdd9f0a24154b63169c66aff1ddc4507db6034
https://github.com/llvm/llvm-project/commit/70fdd9f0a24154b63169c66aff1ddc4507db6034
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.mir
Log Message:
-----------
[GlobalISel] Check whether `G_CTLZ` is legal in `matchUMulHToLShr` (#126457)
We need to check `G_CTLZ` because the combine uses `G_CTLZ` to get log
base 2,
and it is not always legal for on a target.
Fixes SWDEV-512440.
Commit: aebe6c5d7f88a05a29ef6c643482ca7eaf994b19
https://github.com/llvm/llvm-project/commit/aebe6c5d7f88a05a29ef6c643482ca7eaf994b19
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-09 (Sun, 09 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
R llvm/test/MC/RISCV/rv32zicfiss-invalid.s
R llvm/test/MC/RISCV/rv64zicfiss-invalid.s
A llvm/test/MC/RISCV/zicfiss-invalid.s
Log Message:
-----------
[RISCV] Improve Errors for X1/X5/X1X5 Reg Classes (#126184)
LLVM has functionality for producing a register-class-specific error
message in the assembly parser, rather than just emitting the generic
"invalid operand for instruction" error.
This starts the gradual adoption of this functionality for RISC-V, with
some lesser-used shadow-stack register classes:
- GPRX1 (only contains `ra`)
- GPRX5 (only contains `t0`)
- GPRX1X5 (only contains `ra` and `t0`)
LLVM is reasonably conservative about when these errors are used, in
particular you have to have all the features for the relevant mnemonic
enabled before it will do, hence the test updates.
This also merges a pair of almost identical rv32/rv64 test files into a
single file with one run line.
Commit: 3a66ebae06d72d500c52413b9b189e95762e01b3
https://github.com/llvm/llvm-project/commit/3a66ebae06d72d500c52413b9b189e95762e01b3
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/docs/BoundsSafety.rst
M clang/docs/BoundsSafetyImplPlans.rst
Log Message:
-----------
[BoundsSafety][doc] Fix a typo (#126247)
Commit: 30e7c101465d5fa4e9266b9ae3b238eb8cf4533b
https://github.com/llvm/llvm-project/commit/30e7c101465d5fa4e9266b9ae3b238eb8cf4533b
Author: David Stuttard <david.stuttard at amd.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU] - Fix non-deterministic compile issue (#126271)
4ce1f9079d4d3 [AMDGPU] Allow rematerialization of instructions with
virtual register uses (#124327)
made changes that require an ordered traversal of a DenseMap. Changing
it to MapVector which
respects insertion order.
Commit: 67b7a2590f39ad9ff5413adb9af162220972833e
https://github.com/llvm/llvm-project/commit/67b7a2590f39ad9ff5413adb9af162220972833e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/Nanobind.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/test/python/ir/module.py
Log Message:
-----------
Revert "[mlir] Python: Parse ModuleOp from file path" (#126482)
Reverts llvm/llvm-project#125736
The gcc7 Bot is broken at the moment.
Commit: 5f84b6edd97153f1e5ec00ce110108ba8f6048bd
https://github.com/llvm/llvm-project/commit/5f84b6edd97153f1e5ec00ce110108ba8f6048bd
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
A llvm/test/Transforms/LoopIdiom/AArch64/find-first-byte.ll
Log Message:
-----------
[AArch64] Add MATCH loops to LoopIdiomVectorizePass (#101976)
This patch adds a new loop to LoopIdiomVectorizePass, enabling it to
recognise and vectorise loops such as:
```cpp
template<class InputIt, class ForwardIt>
InputIt find_first_of(InputIt first, InputIt last,
ForwardIt s_first, ForwardIt s_last)
{
for (; first != last; ++first)
for (ForwardIt it = s_first; it != s_last; ++it)
if (*first == *it)
return first;
return last;
}
```
These loops match the C++ standard library function `std::find_first_of`.
Commit: d9cdf27834de94a7c6f5b66b28c0e6667fec5418
https://github.com/llvm/llvm-project/commit/d9cdf27834de94a7c6f5b66b28c0e6667fec5418
Author: Aniket Lal <lalaniket8 at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/dep-file-flag-with-multiple-offload-archs.hip
Log Message:
-----------
[Driver][HIP] Do not pass -dependency-file flag for HIP Device offloading (#125646)
When we launch hipcc with multiple offload architectures along with -MF
dep_file flag, the clang compilation invocations for host and device
offloads write to the same dep_file, and can lead to collision during
file IO operations. This can typically happen during large workloads.
This commit provides a fix to generate dep_file only in host
compilation.
---------
Co-authored-by: anikelal <anikelal at amd.com>
Commit: 91682da4388037489ecc62a5e5c06a290866e018
https://github.com/llvm/llvm-project/commit/91682da4388037489ecc62a5e5c06a290866e018
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/merge-base-offset-tlsle.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for tls-le merge base offset. NFC (#122998)
Similar to tests in `merge-base-offset.ll`, except for tests of
blockaddress.
A later commit will optimize this.
Commit: 52a02b6d1e0c6b492495ff79a3a06ce93e6180b8
https://github.com/llvm/llvm-project/commit/52a02b6d1e0c6b492495ff79a3a06ce93e6180b8
Author: Brad Smith <brad at comstyle.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/z_Linux_asm.S
Log Message:
-----------
[openmp] Fix for 32-bit PowerPC (#126412)
Commit: 7aed53eb1982113e825534f0f66d0a0e46e7a5ed
https://github.com/llvm/llvm-project/commit/7aed53eb1982113e825534f0f66d0a0e46e7a5ed
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/pr126012.ll
Log Message:
-----------
[ScalarEvolution] Handle addrec incoming value in isImpliedViaMerge() (#126236)
The code already guards against values coming from a previous iteration
using properlyDominates(). However, addrecs are considered to properly
dominate the loop they are defined in.
Handle this special case separately, by checking for expressions that
have computable loop evolution (this should cover cases like a zext of
an addrec as well).
I considered changing the definition of properlyDominates() instead, but
decided against it. The current definition is useful in other context,
e.g. when deciding whether an expression is safe to expand in a given
block.
Fixes https://github.com/llvm/llvm-project/issues/126012.
Commit: b3e74e307ff813abbc32399af31e69114a058212
https://github.com/llvm/llvm-project/commit/b3e74e307ff813abbc32399af31e69114a058212
Author: David Green <david.green at arm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
Log Message:
-----------
[AArch64] Add SUBHN patterns for xor variant (#126100)
`xor x, -1` can be treated as `sub -1, x`, add patterns for generating
subhn as opposed to a not.
Fixes #123999
Commit: 317a644ae6d501f1a1ec54d17ea8559bcdea35c0
https://github.com/llvm/llvm-project/commit/317a644ae6d501f1a1ec54d17ea8559bcdea35c0
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/memcpy-f128.ll
M llvm/test/CodeGen/ARM/memcpy-inline.ll
Log Message:
-----------
[SDAG] Precommit tests for #126207 (NFC) (#126208)
Add missing test coverage for codepaths touched by #126207.
Commit: 2d31a12dbe2339d20844ede70cbb54dbaf4ceea9
https://github.com/llvm/llvm-project/commit/2d31a12dbe2339d20844ede70cbb54dbaf4ceea9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/test/Transforms/DeadStoreElimination/inter-procedural.ll
Log Message:
-----------
[DSE] Don't use initializes on byval argument (#126259)
There are two ways we can fix this problem, depending on how the
semantics of byval and initializes should interact:
* Don't infer initializes on byval arguments. initializes on byval
refers to the original caller memory (or having both attributes is made
a verifier error).
* Infer initializes on byval, but don't use it in DSE. initializes on
byval refers to the callee copy. This matches the semantics of readonly
on byval. This is slightly more powerful, for example, we could do a
backend optimization where byval + initializes will allocate the full
size of byval on the stack but not copy over the parts covered by
initializes.
I went with the second variant here, skipping byval + initializes in DSE
(FunctionAttrs already doesn't propagate initializes past byval). I'm
open to going in the other direction though.
Fixes https://github.com/llvm/llvm-project/issues/126181.
Commit: 7090dff6fe1e788517be0c49ee8c87d7cfa54b63
https://github.com/llvm/llvm-project/commit/7090dff6fe1e788517be0c49ee8c87d7cfa54b63
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][scf]: Add value bound for the computed upper bound of for loop (#126426)
Add additional bound for the induction variable of the `scf.for` such
that:
`%iv <= %lower_bound + (%trip_count - 1) * step`
Commit: 6fd99de31864a5ef84ae8613b3a9034e05293461
https://github.com/llvm/llvm-project/commit/6fd99de31864a5ef84ae8613b3a9034e05293461
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/openmp-offload.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
Revert "[LinkerWrapper] Clean up options after proper forwarding" (#126495)
Reverts llvm/llvm-project#126297
Broken buildbots
https://lab.llvm.org/staging/#/builders/105/builds/15554
https://lab.llvm.org/buildbot/#/builders/30/builds/15490
Error is
```
# .---command stderr------------
# | FileCheck error: '/work/janplehr/git/llvm-project/bot-tester-builds/cmakecachebuild/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/bug51781.c.tmp.custom' is empty.
# | FileCheck command line: /home/janplehr/git/llvm-project/bot-tester-builds/cmakecachebuild/./bin/FileCheck /work/janplehr/git/llvm-project/offload/test/offloading/bug51781.c -check-prefix=CUSTOM -input-file=/work/janplehr/git/llvm-project/bot-tester-builds/cmakecachebuild/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/bug51781.c.tmp.custom
```
The file is empty, while the `CUSTOM` check-target expects to find
```
// CUSTOM: Rewriting generic-mode kernel with a customized state machine.
```
Commit: 4dec3909e93c23ef1545c934f9715f9be2d7c49b
https://github.com/llvm/llvm-project/commit/4dec3909e93c23ef1545c934f9715f9be2d7c49b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/include/clc/integer/clc_abs.h
M libclc/clc/include/clc/integer/clc_abs_diff.h
M libclc/clc/include/clc/relational/clc_all.h
M libclc/clc/include/clc/relational/clc_any.h
M libclc/clc/include/clc/relational/clc_isequal.h
M libclc/clc/include/clc/relational/clc_isfinite.h
M libclc/clc/include/clc/relational/clc_isgreater.h
M libclc/clc/include/clc/relational/clc_isgreaterequal.h
M libclc/clc/include/clc/relational/clc_isinf.h
M libclc/clc/include/clc/relational/clc_isless.h
M libclc/clc/include/clc/relational/clc_islessequal.h
M libclc/clc/include/clc/relational/clc_islessgreater.h
M libclc/clc/include/clc/relational/clc_isnormal.h
M libclc/clc/include/clc/relational/clc_isnotequal.h
M libclc/clc/include/clc/relational/clc_isordered.h
M libclc/clc/include/clc/relational/clc_isunordered.h
M libclc/clc/include/clc/relational/clc_signbit.h
M libclc/clc/include/clc/shared/clc_max.h
M libclc/clc/include/clc/shared/clc_min.h
R libclc/clc/lib/clspv/SOURCES
R libclc/clc/lib/spirv/SOURCES
Log Message:
-----------
[libclc] Have all targets build all CLC functions (#124779)
This removes all remaining SPIR-V workarounds for CLC functions, in an
effort to streamline the CLC implementation and prevent further issues
that #124614 had to fix. This commit fixes the same issue for the SPIR-V
targets.
Target-specific CLC implementations can and will exist, but for now
they're all identical and so the target-specific SOURCES files have been
removed. Target implementations now always include the 'generic' CLC
directory, meaning we can avoid unnecessary duplication of SOURCES
listings.
Commit: cab893ab8ebdcf63cfc63666009122d9c0e31bdf
https://github.com/llvm/llvm-project/commit/cab893ab8ebdcf63cfc63666009122d9c0e31bdf
Author: Aniket Lal <lalaniket8 at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/test/Driver/dep-file-flag-with-multiple-offload-archs.hip
Log Message:
-----------
[Clang][Driver][HIP] Do not specify explicit target cpu in host compilation run line (#126488)
This PR fixes the post merge check fails from PR
https://github.com/llvm/llvm-project/pull/125646
Co-authored-by: anikelal <anikelal at amd.com>
Commit: f845497f3b2e9b8660cfd33177c8e8a2ce1b8fc0
https://github.com/llvm/llvm-project/commit/f845497f3b2e9b8660cfd33177c8e8a2ce1b8fc0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][Docs] Explain how to handle excessive formatting changes (#126239)
Based on some feedback in Discord about a PR where a reviewer asked the
author to move the formatting changes to a new PR, which appears to
contradict the current form of this document.
I've added an explanation here, before the point where the author would
be committing any of the formatting changes.
There are other ways this can go, for example some projects don't want
the churn of formatting, or you can pre-emptively send a formatting PR,
but I don't think enumerating them all here will help the audience for
this text.
So I've recomended one path that will start them off well, and can
branch off if the reviewers make requests.
Commit: d9183fd96ef2e87b8c59b26956316a97fece0c84
https://github.com/llvm/llvm-project/commit/d9183fd96ef2e87b8c59b26956316a97fece0c84
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fmaxnum.ll
M llvm/test/CodeGen/X86/fminnum.ll
M llvm/test/CodeGen/X86/fp-select-cmp-and.ll
M llvm/test/CodeGen/X86/setcc-combine.ll
M llvm/test/CodeGen/X86/sse-minmax.ll
M llvm/test/CodeGen/X86/vec_floor.ll
M llvm/test/CodeGen/X86/vector-reduce-fmax.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fmin.ll
M llvm/test/CodeGen/X86/vselect-zero.ll
Log Message:
-----------
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
When we first began (2015) to lower f32/f64 selects to
X86ISD::BLENDV(scalar_to_vector(),scalar_to_vector(),scalar_to_vector()),
we limited it to AVX targets to avoid issues with SSE41's xmm0
constraint for the condition mask.
Since then we've seen general improvements in TwoAddressInstruction and
better handling of condition commutation for X86ISD::BLENDV nodes, which
should address many of the original concerns of using SSE41 BLENDVPD/S.
In most cases we will replace 3 logic instruction with the BLENDV node
and (up to 3) additional moves. Although the BLENDV is often more
expensive on original SSE41 targets, this should still be an improvement
in a majority of cases.
We also have no equivalent restrictions for SSE41 for v2f64/v4f32 vector
selection.
Fixes #105807
Commit: 65a92544f7716541cdfab99499ce467b26a3ce8e
https://github.com/llvm/llvm-project/commit/65a92544f7716541cdfab99499ce467b26a3ce8e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] canonicalizeShuffleWithOp - pull out repeated flag settings to IsMergeableWithShuffle lambda. NFC.
Prep work before tweaking the flags in a future patch.
Commit: 7ee56b9afcad456bb662aad941052af334fe3a11
https://github.com/llvm/llvm-project/commit/7ee56b9afcad456bb662aad941052af334fe3a11
Author: wldfngrs <wldfngrs at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/math/CMakeLists.txt
A libc/src/math/asinf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinf16.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinf16_test.cpp
Log Message:
-----------
[libc][math][c23] Add asinf16() function (#124212)
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 738cf5acc68c697dad5611b2424aa6b124b368f2
https://github.com/llvm/llvm-project/commit/738cf5acc68c697dad5611b2424aa6b124b368f2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
Log Message:
-----------
InstSimplify: improve computePointerICmp (NFC) (#126255)
The comment about inbounds protecting only against unsigned wrapping is
incorrect: it also protects against signed wrapping, but the issue is
that it could cross the sign boundary.
Commit: 0b5c318127b1ed8125bffd5df1c96067c2186878
https://github.com/llvm/llvm-project/commit/0b5c318127b1ed8125bffd5df1c96067c2186878
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset-tlsle.ll
Log Message:
-----------
[LoongArch] Merge base and offset for tls-le code sequence (#122999)
Adapt the merge base offset pass to optimize the tls-le code sequence.
Commit: 71ee257a1d3a3e09423132e36f526e032c0f3b93
https://github.com/llvm/llvm-project/commit/71ee257a1d3a3e09423132e36f526e032c0f3b93
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
Log Message:
-----------
[RISCV][VLOPT] Precommit tests for opt info on passthrus. NFC
Currently we are returning the wrong operand info for passthru
operands.
Commit: 771f6b9f43039a4701a3ab76ac2456857ddf74ac
https://github.com/llvm/llvm-project/commit/771f6b9f43039a4701a3ab76ac2456857ddf74ac
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Add support for Widening Floating-Point Fused Multiply-Add Instructions (#126485)
We already had getOperandInfo support, so this marks the instructions as
supported in isCandidate. It also adds support for vfwmaccbf16.v{v,f}
from zvfbfwma
Commit: f796bc622a7725708b8ffbe0c7a684a8557e77a3
https://github.com/llvm/llvm-project/commit/f796bc622a7725708b8ffbe0c7a684a8557e77a3
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/python/mlir/dialects/linalg/__init__.py
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/python/dialects/linalg/ops.py
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
Log Message:
-----------
[MLIR][Linalg] Expose linalg.matmul and linalg.contract via Python API (#126377)
Now that linalg.matmul is in tablegen, "hand write" the Python wrapper
that OpDSL used to derive. Similarly, add a Python wrapper for the new
linalg.contract op.
Required following misc. fixes:
1) make linalg.matmul's parsing and printing consistent w.r.t. whether
indexing_maps occurs before or after operands, i.e. per the tests cases
it comes _before_.
2) tablegen for linalg.contract did not state it accepted an optional
cast attr.
3) In ODS's C++-generating code, expand partial support for `$_builder`
access in `Attr::defaultValue` to full support. This enables access to
the current `MlirContext` when constructing the default value (as is
required when the default value consists of affine maps).
Commit: 729416e586fba71b4f63d71b1b5c765aefbf200b
https://github.com/llvm/llvm-project/commit/729416e586fba71b4f63d71b1b5c765aefbf200b
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
A clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[analyzer][NFC] Remove "V2" from ArrayBoundCheckerV2.cpp (#126094)
Previously commit 6e17ed9b04e5523cc910bf171c3122dcc64b86db deleted the
obsolete checker `alpha.security.ArrayBound` which was implemented in
`ArrayBoundChecker.cpp` and renamed the checker
`alpha.security.ArrayBoundV2` to `security.ArrayBound`.
This commit concludes that consolidation by renaming the source file
`ArrayBoundCheckerV2.cpp` to `ArrayBoundChecker.cpp` (which was "freed
up" by the previous commit).
Commit: 83fa117f76f9c4c82ce0ca914c4eba268c6c2fa2
https://github.com/llvm/llvm-project/commit/83fa117f76f9c4c82ce0ca914c4eba268c6c2fa2
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV] Add cost model for fma (#126076)
This change builds on PR #125683, which added a cost model for fmuladd.
To ensure completeness, this patch extends the cost model to also cover fma, using the same costing approach as fmuladd.
I plan to send a follow-up patch that includes the cost model vp_fma and vp_fmuladd, and their tests.
Commit: 121e6abefd9cd0276d04df32df1da3604c044cdf
https://github.com/llvm/llvm-project/commit/121e6abefd9cd0276d04df32df1da3604c044cdf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] IsElementEquivalent - pull out repeated getValueType calls. NFC.
Commit: bde8ce6a5c47a3e5719618797cc4143db6f871f5
https://github.com/llvm/llvm-project/commit/bde8ce6a5c47a3e5719618797cc4143db6f871f5
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
Log Message:
-----------
[AMDGPU] Only run `AMDGPUPrintfRuntimeBindingPass` at non-prelink phase (#125162)
Commit: 199c791a1dbf417fdb08fbbb054d51ed398f285a
https://github.com/llvm/llvm-project/commit/199c791a1dbf417fdb08fbbb054d51ed398f285a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Support partial initializers for CXXNewExprs (#126494)
For `new A[N]{1,2,3}`, we need to allocate N elements of type A, and
initialize the first three with the given InitListExpr elements.
However, if N is larger than 3, we need to initialize the remaining
elements with the InitListExpr array filler.
Similarly, for `new A[N];`, we need to initilize all fields with the
constructor of A. The initializer type is a CXXConstructExpr of
IncompleteArrayType in this case, which we can't generally handle.
Commit: af2a228e0b5c9fbfa02f37f1be10800b17509617
https://github.com/llvm/llvm-project/commit/af2a228e0b5c9fbfa02f37f1be10800b17509617
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
Log Message:
-----------
[RISCV][VLOPT] Fix passthru operand info for mixed-width instructions (#126504)
After #124066 we started allowing users that are passthrus. However for
widening/narrowing instructions we were returning the wrong operand info
for passthru operands since it originally assumed the operand would
never be a passthru. This fixes it by handling it in IsMODef.
Commit: c6b13a28717455028bf48bcb20f723ad3bbff783
https://github.com/llvm/llvm-project/commit/c6b13a28717455028bf48bcb20f723ad3bbff783
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-samesign.ll
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
M llvm/test/Transforms/IndVarSimplify/iv-ext-samesign.ll
Log Message:
-----------
Revert "SCEV: teach isImpliedViaOperations about samesign" (#126506)
The commit f5d24e6c is buggy, and following miscompiles have been
reported: #126409 and
https://github.com/llvm/llvm-project/pull/124270#issuecomment-2647222903
Revert it while we investigate.
Commit: 71adb054024a1e9bd5ed4566beda74dea65362cd
https://github.com/llvm/llvm-project/commit/71adb054024a1e9bd5ed4566beda74dea65362cd
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang] Expose -f(no-)strict-overflow as a clang-cl option (#126512)
Also move the -fno-strict-overflow option definition next to the
-fstrict-overflow one while here.
Also add test coverage for f(no-)wrapv-pointer being a clang-cl option.
Commit: 4d2a1bf563556d12cccc4cace1c2e225a3c002e4
https://github.com/llvm/llvm-project/commit/4d2a1bf563556d12cccc4cace1c2e225a3c002e4
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[clang] CTAD alias: Respect explicit deduction guides defined after the first use of the alias template. (#125478)
Fixes #103016
This is the last missing piece for the C++20 CTAD alias feature. No
release note being added in this PR yet, I will send out a follow-up
patch to mark this feature done.
(Since the release 20 branch is cut, I think we should target on
clang21).
Commit: 1aa48af1f86009365524d43966bb40ea246fea47
https://github.com/llvm/llvm-project/commit/1aa48af1f86009365524d43966bb40ea246fea47
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Discard all CastExprs uniformly (#126511)
Commit: ec60e1d8e2c265f86f08590b6061eb6f51dc3349
https://github.com/llvm/llvm-project/commit/ec60e1d8e2c265f86f08590b6061eb6f51dc3349
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-readobj/XCOFF/symbols.test
M llvm/test/tools/llvm-readobj/XCOFF/symbols64.test
M llvm/tools/llvm-readobj/XCOFFDumper.cpp
Log Message:
-----------
[XCOFF][llvm-readobj] Print symbol value kind when dumping symbols (#125861)
llvm-readobj print out symbol value name for xcoff symbol table.
reference doc:
https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__yaa3i18fjbau
Commit: 3019e49ebfc5d710191712b6d437c56c01e65b87
https://github.com/llvm/llvm-project/commit/3019e49ebfc5d710191712b6d437c56c01e65b87
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
SCEV: thread samesign in isBasicBlockEntryGuardedByCond (NFC) (#125840)
isBasicBlockEntryGuardedByCond inadvertedenly drops samesign information
when calling ICmpInst::getNonStrictPredicate. Fix this.
Commit: 36530414e3fc49ce9c5a74acf3a68731965ea4d6
https://github.com/llvm/llvm-project/commit/36530414e3fc49ce9c5a74acf3a68731965ea4d6
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV][VLOPT] Add support for Vector Fixed-Point Arithmetic Instructions (#126483)
This patch adds the remaining support for fixed-point arithmetic
instructions (we previously had support for averaging adds and
subtracts).
For saturating adds/subs/multiplies/clips, we can't change `vl` if
`vxsat` is used, since changing `vl` may change its value. So this patch
checks to see if it's dead before considering it a candidate.
Commit: 280d2a3035ad362cb9dab9f59aa9bdbb88723e9e
https://github.com/llvm/llvm-project/commit/280d2a3035ad362cb9dab9f59aa9bdbb88723e9e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/AST/RawCommentList.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#126461)
Commit: eaedfc0e5299d43dda28346eb2a5b068a8bee58d
https://github.com/llvm/llvm-project/commit/eaedfc0e5299d43dda28346eb2a5b068a8bee58d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
Log Message:
-----------
[Lex] Avoid repeated hash lookups (NFC) (#126462)
Commit: ba9810e803744974157e85a80854e163818db608
https://github.com/llvm/llvm-project/commit/ba9810e803744974157e85a80854e163818db608
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#126464)
Commit: de563951b7740b3f2e1b3a07362e7890e09624ec
https://github.com/llvm/llvm-project/commit/de563951b7740b3f2e1b3a07362e7890e09624ec
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/RegionInfoImpl.h
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#126465)
Commit: 2f88672414b4e9c74c47718c9979c79ba4c40e04
https://github.com/llvm/llvm-project/commit/2f88672414b4e9c74c47718c9979c79ba4c40e04
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
Log Message:
-----------
[Coroutines] Avoid repeated hash lookups (NFC) (#126466)
Commit: 6228379a6c98d90d81db1a7b15f9682b7b01fb90
https://github.com/llvm/llvm-project/commit/6228379a6c98d90d81db1a7b15f9682b7b01fb90
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
Log Message:
-----------
[llvm-profgen] Avoid repeated hash lookups (NFC) (#126467)
Commit: 783275eb7b3ecde63bdb6ac1316c090bfc568bdd
https://github.com/llvm/llvm-project/commit/783275eb7b3ecde63bdb6ac1316c090bfc568bdd
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/clang_wrapv_opts.c
Log Message:
-----------
[clang] Handle f(no-)strict-overflow, f(no-)wrapv, f(no-)wrapv-pointer like gcc (#126524)
We now process all 6 options left-to-right and pick whatever is active
at the end.
Fixes #124868.
Commit: 308d28667c14e7c14d8688cd19201308e07c8721
https://github.com/llvm/llvm-project/commit/308d28667c14e7c14d8688cd19201308e07c8721
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/docs/GitHub.rst
Log Message:
-----------
[llvm][docs] Tweak backporting instructions a bit (#126519)
* Drop ".Z" in milestone name since we've been doing X.Y releases
instead of X.Y.Z releases since LLVM 18
* Add "LLVM" prefix since that's what release milestones are named
* Use a numbered list to make it clearer that there are two steps
needed, and add some more details to the first step
Commit: 1c583c19bb7914a2686e245b7e1d14f82fe454eb
https://github.com/llvm/llvm-project/commit/1c583c19bb7914a2686e245b7e1d14f82fe454eb
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[acc][mlir] Add functionality for categorizing OpenACC variable types (#126167)
OpenACC specification describes the following type categories: scalar,
array, composite, and aggregate (which includes arrays, composites, and
others such as Fortran pointer/allocatable).
Decision for how to do implicit mapping is dependent on a variable's
category. Since acc dialect's only means of distinguishing between types
is through the interfaces attached, add API to be able to get the type
category.
In addition to defining the new API, attempt to provide a base
implementation for memref which matches what OpenACC spec describes.
Commit: 0010a3c97ef4df11aa50b381ea801c9ba8dd516f
https://github.com/llvm/llvm-project/commit/0010a3c97ef4df11aa50b381ea801c9ba8dd516f
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[NFC][LoopVectorize] Add more partial reduction tests (#126525)
* Adds variants of dotp (dotp_i8_to_i64_has_neon_dotprod,
dotp_i16_to_i64_has_neon_dotprod) that show how the loop
vectoriser has generated fixed-width partial reductions
without any matching NEON udot instruction.
* Adds loops that could also benefit from partial
reductions once the work is done to recognise patterns
such as
%zext = zext i8 %load to i32
%acc.next = add i32 %acc, %zext
See zext_add_reduc_i8_i32, etc. I intend to follow up with
a patch to add support for vectorising such patterns.
Commit: 83af335ea47b50037beb46e5d6fb04be89f3b207
https://github.com/llvm/llvm-project/commit/83af335ea47b50037beb46e5d6fb04be89f3b207
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/utils/lit/tests/xunit-output.py
Log Message:
-----------
[llvm][lit] Update regexes in Xunit test (#126527)
I got a report that downstream this test failed and the cause was that
it took longer than the 1 second we expected to run one of the test
cases.
This test doesn't need to be that specific, so I am updating all the
time regexes to be the same one that allows 0-9 any number of digits,
requires a decimal point, then 0-9 any number of digits for the final
part.
Commit: c69be3fe4bec916c111eec4eec1def04b16fba8d
https://github.com/llvm/llvm-project/commit/c69be3fe4bec916c111eec4eec1def04b16fba8d
Author: Amit Kumar Pandey <137622562+ampandey-1995 at users.noreply.github.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/hip-sanitize-options.hip
Log Message:
-----------
[Driver][ROCm][OpenMP] Fix default ockl linking for OpenMP. (#126186)
ASan gpu runtime (asanrtl.bc) linking is dependent on 'ockl.bc'. Link
'ockl.bc' only when ASan is enabled for openmp amdgpu offloading
application.
Commit: 71fcc825b4e271b7608b54de27ae69fe70f00fad
https://github.com/llvm/llvm-project/commit/71fcc825b4e271b7608b54de27ae69fe70f00fad
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
A llvm/test/Transforms/StructurizeCFG/simple-structurizecfg-crash.ll
Log Message:
-----------
[NFC][StructurizeCFG] Add a test that can crash StructurizeCFG pass (#126087)
I tried to fix it in #124051 but failed to do so. This PR adds the test
and
marks it as xfail.
Commit: 8380b5c7494e5511dfdc944108ff316453a36061
https://github.com/llvm/llvm-project/commit/8380b5c7494e5511dfdc944108ff316453a36061
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/test/TableGen/get-operand-type-no-expand.td
M llvm/test/TableGen/get-operand-type.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
- Detect whether logical operand mapping/named operand mappings have
been enabled in a previous pass over instructions and execute the
relevant emission code only if those mappings are enabled.
- For these mappings, skip the fixed set of predefined instructions as
they won't have these mappings enabled.
- Emit operand type mappings only for X86 target, as they are only used
by X86 and look for X86 specific `X86MemOperand`.
- Cleanup `emitOperandTypeMappings` code: remove code to handle empty
instruction list and use range for loops.
Commit: f3cd2238383f695c719e7eab6aebec828781ec91
https://github.com/llvm/llvm-project/commit/f3cd2238383f695c719e7eab6aebec828781ec91
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/OpenMP/spirv_target_codegen_basic.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPGridValues.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP][OpenMPIRBuilder] Add initial changes for SPIR-V target frontend support (#125920)
As Intel is working to add support for SPIR-V OpenMP device offloading
in upstream clang/liboffload, we need to modify the OpenMP frontend to
allow SPIR-V as well as generate valid IR for SPIR-V. For example, we
need the frontend to generate code to define and interact with device
globals used in the DeviceRTL.
This is the beginning of what I expect will be (many) other changes, but
let's get started with something simple.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 6b52fb25b90e575b507343bde0162d3d652ff666
https://github.com/llvm/llvm-project/commit/6b52fb25b90e575b507343bde0162d3d652ff666
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M flang/docs/Directives.md
M flang/lib/Lower/Bridge.cpp
M flang/test/Integration/unroll.f90
Log Message:
-----------
[flang] Correctly handle `!dir$ unroll` with unrolling factors of 0 and 1 (#126170)
https://github.com/llvm/llvm-project/pull/123331 added support for the
unrolling directive. In the presence of an explicit unrolling factor,
that unrolling factor would be unconditionally passed into the metadata
even when it was 1 or 0. These special cases should instead disable
unrolling. Adding an explicit unrolling factor of 0 triggered this
assertion which is fixed by this patch:
```
unsigned int unrollCountPragmaValue(const llvm::Loop*):
Assertion `Count >= 1 && "Unroll count must be positive."' failed.
```
Updated tests and documentation.
Commit: 7ae78a6cdb6ce9ad1534ed10519649fb3d47aca9
https://github.com/llvm/llvm-project/commit/7ae78a6cdb6ce9ad1534ed10519649fb3d47aca9
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-02-11 (Tue, 11 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][vector]add extractInsertFoldConstantOp fold function and apply it to extractOp and insertOp. (#124399)
add extractInsertFoldConstantOp fold function and apply it to extractOp and insertOp.
Commit: 3706dfef660097f24fb5efbac0d7f14b424492ed
https://github.com/llvm/llvm-project/commit/3706dfef660097f24fb5efbac0d7f14b424492ed
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
Log Message:
-----------
[LV] Forget LCSSA phi with new pred before other SCEV invalidation. (#119897)
`forgetLcssaPhiWithNewPredecessor` performs additional invalidation if
there is an existing SCEV for the phi, but earlier
`forgetBlockAndLoopDispositions` or `forgetLoop` may already invalidate
the SCEV for the phi.
Change the order to first call `forgetLcssaPhiWithNewPredecessor` to
ensure it runs before its SCEV gets invalidated too eagerly.
Fixes https://github.com/llvm/llvm-project/issues/119665.
PR: https://github.com/llvm/llvm-project/pull/119897
Commit: 62ae876b1ba2f03bb125174aa24e30b4ebd351a5
https://github.com/llvm/llvm-project/commit/62ae876b1ba2f03bb125174aa24e30b4ebd351a5
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[mlir][tosa] Fix conv op build functions (#126321)
This patch fixes several issues:
- buildConvOpWithQuantInfo:
call buildConvOpResultTypeInfo to get final output type
- buildTransConvOpWithQuantInfo:
add input_zp and weight_zp operands
remove input_zp/weight_zp attributes
- createZeroPointTensor:
add getElementTypeOrSelf to get element type just in case
remove bad auto-merge lines
Change-Id: Idbf88f500ce57a865da4b7be7b7b8bf2ba194b24
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 6a8439b5933e71d6dc93d5bdc921340efaa9522f
https://github.com/llvm/llvm-project/commit/6a8439b5933e71d6dc93d5bdc921340efaa9522f
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/statvfs.yaml
Log Message:
-----------
[libc][docs] Add sys/statvfs to documentation and YAML definitions (#126413)
These changes ensure that the sys/statvfs header is documented properly
with respect to the issue (
https://github.com/llvm/llvm-project/issues/122006 ) .
Commit: 5b9e6c7993359c16b4d645c851bb7fe2fd7b78c7
https://github.com/llvm/llvm-project/commit/5b9e6c7993359c16b4d645c851bb7fe2fd7b78c7
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Improves type-safety in generator script. (#101880)
This changes the code to use dataclasses instead of dict entries. It
also adds type aliases to use in the typing information and updates the
typing information.
Commit: 62245aaa6b1983ceae768eaee30aa41c4dd6db51
https://github.com/llvm/llvm-project/commit/62245aaa6b1983ceae768eaee30aa41c4dd6db51
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/rv32c-invalid.s
M llvm/test/MC/RISCV/xwchc-invalid.s
Log Message:
-----------
[RISCV] Improve Errors for GPRNoX0X2/SP Reg Classes (#126394)
More adoption of better diagnostics for RISC-V register classes:
- GPRNoX0X2 (GPRs excluding `zero` and `x2`, used for `c.lui`)
- SP (only contains `sp`)
Commit: b319dfef21f6c7b0bc6a356d6b9f41a3b3b98ae9
https://github.com/llvm/llvm-project/commit/b319dfef21f6c7b0bc6a356d6b9f41a3b3b98ae9
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++][CI] Updates Clang HEAD version in Docker. (#126419)
This is a preparation to test Clang 21 in the CI,
Drive-by: Updated some outdated documentation.
Commit: 55015e150b35f69431ce1f906e22a598d5b2f000
https://github.com/llvm/llvm-project/commit/55015e150b35f69431ce1f906e22a598d5b2f000
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Delete `getLogicalOperandType` from InstrInfoEmitter (#125951)
Delete `getLogicalOperandType` function from InstrInfoEmitter as no
backend seems to use it.
Commit: e42fdcb41fdcfe7bf302b40f20afb4e9cda5602d
https://github.com/llvm/llvm-project/commit/e42fdcb41fdcfe7bf302b40f20afb4e9cda5602d
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-11 (Tue, 11 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
Log Message:
-----------
[RISCV] Match widening fp instructions with same fpext used in multiple operands (#125803)
Because the fpext has a single use constraint on it we can't match cases
where it's used for both operands.
Introduce a new PatFrag that allows multiple uses on a single user and
use it for the binary patterns, and some ternary patterns.
(For some of the ternary patterns there is a fneg that counts as a
separate user, we still need to handle these)
Commit: 9e0077c921ebf505afa117cf520c628ace1a29cf
https://github.com/llvm/llvm-project/commit/9e0077c921ebf505afa117cf520c628ace1a29cf
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] Handle not in dominating condition. (#126423)
General handling of not in dominating condition.
proof: https://alive2.llvm.org/ce/z/FjJN8q
Commit: 0a470a926481d370251731cb2dd897531756335f
https://github.com/llvm/llvm-project/commit/0a470a926481d370251731cb2dd897531756335f
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Options.td
M lld/docs/ld.lld.1
M lld/test/ELF/package-metadata.s
Log Message:
-----------
[ELF] --package-metadata: support %[0-9a-fA-F][0-9a-fA-F]
(This application-specific option is probably not appropriate as a
linker option (.o file offers more flexibility and decouples JSON
verification from linkers). However, the option has gained some traction
in Linux distributions, with support in GNU ld, gold, and mold.)
GNU ld has supported percent-encoded bytes and extensions like
`%[comma]` since November 2024. mold supports just percent-encoded
bytes. To prepare for potential adoption by Ubuntu, let's support
percent-encoded bytes.
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=32003
Link: https://bugs.launchpad.net/ubuntu/+source/dpkg/+bug/2071468
Pull Request: https://github.com/llvm/llvm-project/pull/126396
Commit: 7177cf3b589f2d8d37a15883dbfd13b93ec0e931
https://github.com/llvm/llvm-project/commit/7177cf3b589f2d8d37a15883dbfd13b93ec0e931
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-10 (Mon, 10 Feb 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/premerge.yaml
M bolt/lib/RuntimeLibs/RuntimeLibrary.cpp
M clang/docs/BoundsSafety.rst
M clang/docs/BoundsSafetyImplPlans.rst
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/OperationKinds.def
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/RawCommentList.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/UninitializedValues.cpp
M clang/lib/CodeGen/Address.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/Hexagon.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/CodeGen/Targets/XCore.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Edit/RewriteObjCFoundationAPI.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Index/IndexBody.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
A clang/test/Analysis/dtor-union.cpp
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
A clang/test/CodeGen/debug-info-enum-extensibility.c
A clang/test/CodeGen/profile-continuous.c
A clang/test/CodeGenHLSL/BasicFeatures/ArrayElementwiseCast.hlsl
A clang/test/CodeGenHLSL/BasicFeatures/StructElementwiseCast.hlsl
A clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/cl-options.c
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/clang_wrapv_opts.c
M clang/test/Driver/csky-toolchain.c
A clang/test/Driver/dep-file-flag-with-multiple-offload-archs.hip
A clang/test/Driver/fprofile-continuous.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/offload-Xarch.c
A clang/test/ExtractAPI/typedef_underscore.c
A clang/test/Index/index-deduction-guide.cpp
A clang/test/Modules/pr120277-2.cpp
M clang/test/OpenMP/declare_target_messages.cpp
A clang/test/OpenMP/spirv_target_codegen_basic.cpp
M clang/test/SemaCXX/cxx1z-decomposition.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
M clang/test/SemaCXX/unique_object_duplication.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
M clang/test/SemaHLSL/BuiltIns/vector-constructors-erros.hlsl
A clang/test/SemaHLSL/Language/ElementwiseCast-errors.hlsl
A clang/test/SemaHLSL/Language/ElementwiseCasts.hlsl
M clang/test/Tooling/clang-linker-wrapper-spirv-elf.cpp
M clang/test/lit.site.cfg.py.in
M clang/tools/clang-format/clang-format.el
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M flang/CMakeLists.txt
M flang/cmake/modules/AddFlang.cmake
M flang/docs/Directives.md
M flang/docs/FlangDriver.md
M flang/docs/GettingStarted.md
M flang/docs/OpenACC-descriptor-management.md
M flang/docs/Real16MathSupport.md
M flang/docs/ReleaseNotes.md
M flang/examples/CMakeLists.txt
M flang/examples/ExternalHelloWorld/CMakeLists.txt
M flang/include/flang/Evaluate/target.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Decimal/CMakeLists.txt
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/runtime/CMakeLists.txt
M flang/runtime/CUDA/CMakeLists.txt
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/time-intrinsic.cpp
M flang/runtime/tools.h
M flang/test/CMakeLists.txt
M flang/test/Driver/ctofortran.f90
M flang/test/Driver/exec.f90
M flang/test/Driver/gcc-toolchain-install-dir.f90
M flang/test/Driver/linker-flags.f90
M flang/test/Driver/msvc-dependent-lib-flags.f90
M flang/test/Driver/nostdlib.f90
M flang/test/Evaluate/fold-ieee.f90
M flang/test/Evaluate/folding18.f90
M flang/test/Integration/unroll.f90
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-load.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
M flang/test/Runtime/no-cpp-dep.c
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/f18/CMakeLists.txt
M flang/unittests/CMakeLists.txt
M flang/unittests/Evaluate/CMakeLists.txt
M flang/unittests/Runtime/CMakeLists.txt
M flang/unittests/Runtime/CUDA/CMakeLists.txt
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/docs/headers/math/index.rst
M libc/hdr/types/CMakeLists.txt
R libc/hdr/types/sighandler_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/__sighandler_t.h
A libc/include/llvm-libc-types/sighandler_t.h
M libc/include/llvm-libc-types/struct_sigaction.h
M libc/include/math.yaml
M libc/include/signal.yaml
M libc/src/math/CMakeLists.txt
A libc/src/math/asinf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinf16.cpp
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/signal.cpp
M libc/src/signal/signal.h
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinf16_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinf16_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/signal_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
M libc/utils/MPFRWrapper/CMakeLists.txt
A libc/utils/docgen/sys/statvfs.yaml
M libclc/CMakeLists.txt
M libclc/clc/include/clc/integer/clc_abs.h
M libclc/clc/include/clc/integer/clc_abs_diff.h
M libclc/clc/include/clc/relational/clc_all.h
M libclc/clc/include/clc/relational/clc_any.h
M libclc/clc/include/clc/relational/clc_isequal.h
M libclc/clc/include/clc/relational/clc_isfinite.h
M libclc/clc/include/clc/relational/clc_isgreater.h
M libclc/clc/include/clc/relational/clc_isgreaterequal.h
M libclc/clc/include/clc/relational/clc_isinf.h
M libclc/clc/include/clc/relational/clc_isless.h
M libclc/clc/include/clc/relational/clc_islessequal.h
M libclc/clc/include/clc/relational/clc_islessgreater.h
M libclc/clc/include/clc/relational/clc_isnormal.h
M libclc/clc/include/clc/relational/clc_isnotequal.h
M libclc/clc/include/clc/relational/clc_isordered.h
M libclc/clc/include/clc/relational/clc_isunordered.h
M libclc/clc/include/clc/relational/clc_signbit.h
M libclc/clc/include/clc/shared/clc_max.h
M libclc/clc/include/clc/shared/clc_min.h
R libclc/clc/lib/clspv/SOURCES
R libclc/clc/lib/spirv/SOURCES
M libcxx/docs/Status/FormatPaper.csv
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/chrono
R libcxx/test/benchmarks/containers/container_benchmarks.h
R libcxx/test/benchmarks/containers/deque.bench.cpp
R libcxx/test/benchmarks/containers/list.bench.cpp
A libcxx/test/benchmarks/containers/sequence/deque.bench.cpp
A libcxx/test/benchmarks/containers/sequence/list.bench.cpp
A libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
A libcxx/test/benchmarks/containers/sequence/vector.bench.cpp
R libcxx/test/benchmarks/containers/vector.bench.cpp
M libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py
M libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/char_string.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/pointer_string.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_char.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_pointer.pass.cpp
M libcxx/test/std/strings/basic.string/string.nonmembers/string_op+/string_string.pass.cpp
M libcxx/test/support/MinSequenceContainer.h
M libcxx/test/support/min_allocator.h
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
M libcxx/utils/generate_feature_test_macro_components.py
M libunwind/src/UnwindCursor.hpp
M libunwind/test/signal_unwind.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
M lld/COFF/MinGW.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Options.td
M lld/docs/ld.lld.1
M lld/test/COFF/arm64ec-patchable-thunks.test
M lld/test/COFF/arm64x-export-all.s
M lld/test/ELF/package-metadata.s
M lld/test/ELF/target-specific-options.s
M lldb/include/lldb/Symbol/UnwindTable.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/UnwindTable.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/test/API/api/command-return-object/TestSBCommandReturnObject.py
R lldb/test/API/python_api/commandreturnobject/TestSBCommandReturnObject.py
A lldb/test/Shell/Commands/command-breakpoint-by-addr.test
A lldb/test/Shell/Expr/TestEnumExtensibility.m
R lldb/test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c
M lldb/test/Shell/SymbolFile/target-symbols-add-unwind.test
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
M llvm/docs/Contributing.rst
M llvm/docs/GitHub.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/Analysis/RegionInfoImpl.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.h
M llvm/include/llvm/Frontend/OpenMP/OMPGridValues.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/InitializePasses.h
A llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/DroppedVariableStats.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/SandboxIR/Tracker.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAlwaysAccept.h
M llvm/lib/Analysis/DependenceGraphBuilder.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/MC/CMakeLists.txt
A llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-samesign.ll
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
M llvm/test/Analysis/ScalarEvolution/infer-via-ranges.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
M llvm/test/CodeGen/AArch64/a55-fuse-address.mir
M llvm/test/CodeGen/AArch64/ampere1-sched-add.mir
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
M llvm/test/CodeGen/AArch64/cluster-frame-index.mir
M llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir
M llvm/test/CodeGen/AArch64/dump-schedule-trace.mir
M llvm/test/CodeGen/AArch64/force-enable-intervals.mir
A llvm/test/CodeGen/AArch64/llvm.modf.ll
M llvm/test/CodeGen/AArch64/machine-scheduler.mir
M llvm/test/CodeGen/AArch64/macro-fusion-addsub-2reg-const1.mir
M llvm/test/CodeGen/AArch64/macro-fusion-last.mir
M llvm/test/CodeGen/AArch64/memcpy-f128.ll
M llvm/test/CodeGen/AArch64/misched-branch-targets.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/misched-fusion-arith-logic.mir
M llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
M llvm/test/CodeGen/AArch64/misched-fusion-crypto-eor.mir
M llvm/test/CodeGen/AArch64/misched-move-imm.mir
M llvm/test/CodeGen/AArch64/misched-predicate-virtreg.mir
M llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir
M llvm/test/CodeGen/AArch64/sched-postidxalias.mir
M llvm/test/CodeGen/AArch64/sched-print-cycle.mir
M llvm/test/CodeGen/AArch64/scheduledag-constreg.mir
M llvm/test/CodeGen/AArch64/sve-aliasing.mir
A llvm/test/CodeGen/AArch64/v8.4-atomic.ll
A llvm/test/CodeGen/AArch64/veclib-llvm.modf.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.mir
M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
A llvm/test/CodeGen/AMDGPU/do-not-unify-divergent-exit-nodes-with-musttail.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
M llvm/test/CodeGen/AMDGPU/peephole-opt-fold-reg-sequence-subreg.mir
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
M llvm/test/CodeGen/ARM/cortex-m7-wideops.mir
M llvm/test/CodeGen/ARM/memcpy-inline.ll
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
A llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
A llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
A llvm/test/CodeGen/LoongArch/merge-base-offset-tlsle.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
A llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
A llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/PowerPC/topdepthreduce-postra.mir
M llvm/test/CodeGen/RISCV/misched-postra-direction.mir
A llvm/test/CodeGen/RISCV/postra-copy-expand.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
A llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
M llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
A llvm/test/CodeGen/X86/dwo-stats.ll
M llvm/test/CodeGen/X86/fmaxnum.ll
M llvm/test/CodeGen/X86/fminnum.ll
M llvm/test/CodeGen/X86/fp-select-cmp-and.ll
M llvm/test/CodeGen/X86/horizontal-sum.ll
A llvm/test/CodeGen/X86/isel-fcmp-x87.ll
A llvm/test/CodeGen/X86/isel-fcmp.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/setcc-combine.ll
M llvm/test/CodeGen/X86/sse-minmax.ll
A llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
M llvm/test/CodeGen/X86/vec_floor.ll
M llvm/test/CodeGen/X86/vector-reduce-fmax.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fmin.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vselect-zero.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
A llvm/test/MC/ARM/vcvt-fixed-point-errors.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/RISCV/rv32c-invalid.s
R llvm/test/MC/RISCV/rv32zicfiss-invalid.s
R llvm/test/MC/RISCV/rv64zicfiss-invalid.s
M llvm/test/MC/RISCV/xwchc-invalid.s
A llvm/test/MC/RISCV/zicfiss-invalid.s
A llvm/test/ObjectYAML/DXContainer/RootSignature-Flags.yaml
M llvm/test/TableGen/get-operand-type-no-expand.td
M llvm/test/TableGen/get-operand-type.td
M llvm/test/Transforms/DeadStoreElimination/inter-procedural.ll
A llvm/test/Transforms/IndVarSimplify/infer-via-ranges.ll
M llvm/test/Transforms/IndVarSimplify/iv-ext-samesign.ll
A llvm/test/Transforms/IndVarSimplify/pr126012.ll
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
A llvm/test/Transforms/LoopIdiom/AArch64/find-first-byte.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr56319-vector-exit-cond-optimization-epilogue-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
A llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference-simplifications.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
A llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
A llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
A llvm/test/Transforms/SandboxVectorizer/X86/lit.local.cfg
A llvm/test/Transforms/SandboxVectorizer/X86/simple_cost_test.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice_pow2.ll
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/default_pass_pipeline.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SandboxVectorizer/repeated_instrs.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/test/Transforms/SandboxVectorizer/special_opcodes.ll
A llvm/test/Transforms/StructurizeCFG/simple-structurizecfg-crash.ll
M llvm/test/tools/llvm-mca/ARM/m55-fp.s
M llvm/test/tools/llvm-mca/ARM/m7-fp.s
M llvm/test/tools/llvm-mca/ARM/m85-fp.s
M llvm/test/tools/llvm-objcopy/ELF/dump-section.test
M llvm/test/tools/llvm-objcopy/MachO/dump-section.test
M llvm/test/tools/llvm-objcopy/wasm/dump-section.test
A llvm/test/tools/llvm-readobj/ELF/RISCV/note-gnu-property.yaml
M llvm/test/tools/llvm-readobj/XCOFF/symbols.test
M llvm/test/tools/llvm-readobj/XCOFF/symbols64.test
M llvm/tools/dsymutil/BinaryHolder.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/XCOFFDumper.cpp
M llvm/tools/obj2yaml/dxcontainer2yaml.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/clang/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/lit/tests/xunit-output.py
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/Nanobind.h
M mlir/include/mlir/Bytecode/BytecodeWriter.h
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
M mlir/include/mlir/Dialect/Polynomial/IR/PolynomialTypes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBitCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Transforms/ViewOpGraph.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/dialects/linalg/__init__.py
M mlir/test/Conversion/ConvertToSPIRV/vector-unroll.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
M mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-bitcast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-broadcast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-scalable-vectors.mlir
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-barriers.mlir
M mlir/test/Target/SPIRV/group-ops.mlir
M mlir/test/Transforms/print-op-graph-back-edges.mlir
M mlir/test/Transforms/print-op-graph-cycles.mlir
M mlir/test/Transforms/print-op-graph.mlir
M mlir/test/python/dialects/linalg/ops.py
M mlir/test/python/ir/module.py
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M offload/DeviceRTL/include/DeviceTypes.h
M offload/DeviceRTL/include/State.h
M offload/DeviceRTL/src/Configuration.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/DeviceRTL/src/Reduction.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/DeviceRTL/src/Workshare.cpp
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_many.c
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/z_Linux_asm.S
M third-party/benchmark/src/sysinfo.cc
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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