[all-commits] [llvm/llvm-project] 62245a: [RISCV] Improve Errors for GPRNoX0X2/SP Reg Classe...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 62245aaa6b1983ceae768eaee30aa41c4dd6db51
      https://github.com/llvm/llvm-project/commit/62245aaa6b1983ceae768eaee30aa41c4dd6db51
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-02-10 (Mon, 10 Feb 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/test/MC/RISCV/rv32c-invalid.s
    M llvm/test/MC/RISCV/xwchc-invalid.s

  Log Message:
  -----------
  [RISCV] Improve Errors for GPRNoX0X2/SP Reg Classes (#126394)

More adoption of better diagnostics for RISC-V register classes:
- GPRNoX0X2 (GPRs excluding `zero` and `x2`, used for `c.lui`)
- SP (only contains `sp`)



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications