[all-commits] [llvm/llvm-project] 2feced: [MLIR][NVVM] Add tcgen05 wait/fence Ops (#126265)

[Durgadoss R via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2feced1df0aa01f78501720b98faa985bcec846a
      https://github.com/llvm/llvm-project/commit/2feced1df0aa01f78501720b98faa985bcec846a
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2025-02-08 (Sat, 08 Feb 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    A mlir/test/Target/LLVMIR/nvvm/tcgen05-barriers.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add tcgen05 wait/fence Ops (#126265)

PR #126091 adds intrinsics for tcgen05
wait/fence/commit operations. This patch
adds NVVM Dialect Ops for them.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>



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