[all-commits] [llvm/llvm-project] 1f2c36: [ARM] Reject fixed-point VCVT with different regis...

[Oliver Stannard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1f2c36a879a604683da646a44f73bd6d90b61040
      https://github.com/llvm/llvm-project/commit/1f2c36a879a604683da646a44f73bd6d90b61040
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2025-02-07 (Fri, 07 Feb 2025)

  Changed paths:
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    A llvm/test/MC/ARM/vcvt-fixed-point-errors.s
    M llvm/test/tools/llvm-mca/ARM/m55-fp.s
    M llvm/test/tools/llvm-mca/ARM/m7-fp.s
    M llvm/test/tools/llvm-mca/ARM/m85-fp.s

  Log Message:
  -----------
  [ARM] Reject fixed-point VCVT with different registers (#126232)

These instructions only have one register field in their encoding, so
both registers in the assembly must be the same.

Previously, we were accepting these instructions, but ignoring the
second register operand.

Fixes #126227



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