[all-commits] [llvm/llvm-project] ead88c: [RISCV] Prefer (select (x < 0), y, z) -> x >> (XL...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ead88c787c4eba28b2148a5aaf190186bdb40820
      https://github.com/llvm/llvm-project/commit/ead88c787c4eba28b2148a5aaf190186bdb40820
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-02-06 (Thu, 06 Feb 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Prefer (select (x < 0), y, z)  -> x >> (XLEN - 1) & (y - z) + z even with Zicond. (#125772)

The Zicond version of this requires an li instruction and an
additional register.

Without Zicond we match this in a DAGCombine on RISCVISD::SELECT_CC.

This PR has 2 commits. I'll pre-commit the test change if this looks
good.



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